Communication method and apparatus

Abstract

A communication method and apparatus. The method comprises: a terminal device sends a first start indication signal and a first clock capture signal on N OFDM symbols, N being a positive integer, wherein the first start indication signal is used for determining the start of data transmission, the first clock capture signal is used for determining the length of a chip in the data transmission, each of the N OFDM symbols comprises M chips, the value of M is one of a plurality of candidate values, and in the case of the plurality of candidate values, the lengths of the start indication signals are the same, and M is a positive integer. The lengths of start indication signals corresponding to values of M corresponding to a plurality of candidate values are the same, so that the complexity of detecting the start indication signals by a terminal device can be reduced.

Description

Communication method and apparatus

[0001] Cross-reference to Related Applications

[0002] This application claims priority to the Chinese Patent Application No. 202411100225.4, filed on August 9, 2024, and entitled “A Communication Method and Apparatus”, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the technical field of communication, and in particular, to a communication method and apparatus. BACKGROUND

[0004] An ambient IoT (A-IoT) system is an asynchronous system. Before transmitting a data signal to an A-IoT device, a network side needs to first transmit a start indication signal and a clock capture signal to the A-IoT device. The A-IoT device can keep synchronization with the network side according to the start indication signal and the clock capture signal, and then receive the data signal from the network side. How the network side transmits the start indication signal and the clock capture signal to the A-IoT device is a research direction. SUMMARY

[0005] Embodiments of the present application provide a communication method and apparatus to realize the network side transmitting a start indication signal and a clock capture signal to a terminal device (such as an A-IoT device).

[0006] In a first aspect, a communication method is provided. The execution subject of the method is an access network device or an intermediate node, or a module, unit or component (such as a chip, chip system, processor, circuit or other) applied in the access network device or the intermediate node. The method comprises: transmitting a first start indication signal and a first clock capture signal on N orthogonal frequency division multiplexing (OFDM) symbols, N being a positive integer; wherein the first start indication signal is used to determine the start of data transmission, and the first clock capture signal is used to determine the length of a chip in the data transmission, each OFDM symbol of the N OFDM symbols comprising M chips, the value of M belonging to one of a plurality of candidate values, and in the case of the plurality of candidate values, the length of the start indication signal is the same, M being a positive integer.

[0007] Through the above design, for the M values corresponding to the plurality of candidate values, the length of the start indication signal is the same, thereby reducing the complexity of the terminal device detecting the start indication signal.

[0008] In a possible implementation, in the case of the plurality of candidate values, the level pattern of the clock capture signal is the same.

[0009] Through the above design, for the M values corresponding to the plurality of candidate values, the level pattern of the clock capture signal is same, and the probability of false detection of the data signal is reduced.

[0010] In a possible implementation, a maximum value of the number of consecutive high-level chips in the level pattern of the clock capture signal is a first value, a maximum value of the number of consecutive high-level chips in the data signal is a second value, and the first value is greater than the second value; and / or, a maximum value of the number of consecutive low-level chips in the level pattern of the clock capture signal is a third value, a maximum value of the number of consecutive low-level chips in the data signal is a fourth value, and the third value is greater than the fourth value.

[0011] Through the above design, the terminal device can distinguish the clock capture signal from the data signal, and false detection of the data signal is avoided.

[0012] In a possible implementation, a maximum value of the number of consecutive high-level chips in the start indication signal is a fifth value, a maximum value of the number of consecutive high-level chips in the data signal is a sixth value, and the fifth value is greater than the sixth value; and / or, a maximum value of the number of consecutive low-level chips in the level pattern of the start indication signal is a seventh value, a maximum value of the number of consecutive low-level chips in the data signal is an eighth value, and the seventh value is greater than the eighth value.

[0013] Through the above design, the terminal device can distinguish the start indication signal from the data signal, and the probability of false detection of the data signal is reduced.

[0014] In a possible implementation, the plurality of candidate values include at least two of the following: 1, 2, 4, 6, 8, 12, 16, and 24.

[0015] The second aspect is a method opposite to the first aspect, and the beneficial effects can refer to the first aspect. A communication method is provided, and the execution subject of the method is a terminal device, or a module, unit or component (such as a chip, chip system, processor, circuit or other) applied in the terminal device, and the method includes: receiving a first start indication signal and a first clock capture signal on N orthogonal frequency division multiplexing (OFDM) symbols, N being a positive integer; wherein the first start indication signal is used to determine the start of data reception, and the first clock capture signal is used to determine the length of a chip in the data reception, each OFDM symbol of the N OFDM symbols includes M chips, M belongs to one of a plurality of candidate values, in the case of the plurality of candidate values, the length of the start indication signal is same, and M is a positive integer.

[0016] In a possible implementation, in the case of the plurality of candidate values, the level pattern of the clock capture signal is same.

[0017] In a possible implementation, a maximum number of consecutive high level chips in the level pattern of the clock capture signal is a first value, and a maximum number of consecutive high level chips in the data signal is a second value, the first value being greater than the second value; and / or, a maximum number of consecutive low level chips in the level pattern of the clock capture signal is a third value, and a maximum number of consecutive low level chips in the data signal is a fourth value, the third value being greater than the fourth value.

[0018] In a possible implementation, a maximum number of consecutive high level chips in the level pattern of the start indication signal is a fifth value, and a maximum number of consecutive high level chips in the data signal is a sixth value, the fifth value being greater than the sixth value; and / or, a maximum number of consecutive low level chips in the level pattern of the start indication signal is a seventh value, and a maximum number of consecutive low level chips in the data signal is an eighth value, the seventh value being greater than the eighth value.

[0019] In a possible implementation, the plurality of candidate values include at least two of 1, 2, 4, 6, 8, 12, 16, and 24.

[0020] In a third aspect, an apparatus is provided, which can implement the method in the first aspect. For example, the apparatus includes modules, units, or components corresponding to the method described in the first aspect. The modules, units, or components can be implemented in hardware, or in software, or in a combination of hardware and software.

[0021] In a design, the apparatus includes units for implementing the method in the first aspect.

[0022] In a design, the apparatus includes a processor configured to implement the method in the first aspect. Optionally, the apparatus further includes a memory coupled to the processor, and the processor is configured to execute computer programs or instructions stored in the memory, so that the apparatus implements the method in the first aspect.

[0023] In a design, the apparatus includes a processor and an interface circuit configured to receive signals from other apparatuses outside the apparatus and transmit the signals to the processor, or transmit signals from the processor to other apparatuses outside the apparatus, and the processor is configured to implement the method in the first aspect by logic circuit or executing code instructions.

[0024] In a design, the apparatus can be a first apparatus, or a module, unit, or component (for example, a chip, a chip system, a circuit, or a processor) in the first apparatus corresponding to the method, operation, step, or action described in the first aspect, or can be used in matching with the first apparatus.

[0025] In a fourth aspect, an apparatus is provided, which is capable of implementing the method of the second aspect. For example, the apparatus includes modules, units, or components corresponding to the method of the second aspect. The modules, units, or components can be implemented by hardware, or by software, or by a combination of hardware and software.

[0026] In one design, the apparatus includes units for implementing the method of the second aspect.

[0027] In one design, the apparatus includes a processor configured to implement the method of the second aspect. Optionally, the apparatus further includes a memory coupled to the processor, and the processor is configured to execute computer programs or instructions stored in the memory, so that the apparatus implements the method of the second aspect.

[0028] In one design, the apparatus includes a processor and an interface circuit configured to receive signals from other apparatuses outside the apparatus and transmit the signals to the processor, or transmit signals from the processor to other apparatuses outside the apparatus, and the processor is configured to implement the method of the second aspect by logic circuit or executing code instructions.

[0029] In one design, the apparatus can be the second apparatus, or a module, unit or component (e.g., a chip, chip system, circuit or processor, etc.) in the second apparatus that implements the method / operation / step / action of the second aspect one-to-one, or is capable of matching use with the second apparatus.

[0030] In a fifth aspect, a computer readable storage medium is provided, which stores computer programs or instructions, when the computer programs or instructions are run on a computer, so that the computer implements the method of the first aspect or the second aspect.

[0031] In a sixth aspect, a computer program product is provided, which includes computer programs or instructions, when the computer programs or instructions are run on a computer, so that the method of the first aspect or the second aspect is executed.

[0032] In a seventh aspect, a chip is provided, which includes a processor configured to implement the method of the first aspect or the second aspect. Optionally, the chip further includes a memory coupled to the processor, and the processor is configured to execute computer programs or instructions stored in the memory, so that the chip implements the method of the first aspect or the second aspect.

[0033] In an eighth aspect, a communication system is provided, which includes a first communication apparatus and a second communication apparatus; wherein the first communication apparatus is configured to implement the method of the first aspect; and the second communication apparatus is configured to implement the method of the second aspect. BRIEF DESCRIPTION OF DRAWINGS

[0034] FIG. 1 is a schematic diagram of a communication system according to an embodiment of the present application;

[0035] FIG. 2a and FIG. 2b are schematic diagrams of an A-IoT device according to an embodiment of the present application;

[0036] FIG. 3a and FIG. 3b are schematic diagrams of a network architecture according to an embodiment of the present application;

[0037] FIG. 4 is a schematic diagram of R2D transmission according to an embodiment of the present application;

[0038] FIG. 5 is a schematic diagram of a communication method according to an embodiment of the present application;

[0039] FIG. 6 is a schematic diagram of a start indication signal and a clock capture signal according to an embodiment of the present application;

[0040] FIG. 7 and FIG. 8 are schematic diagrams of an apparatus according to an embodiment of the present application. DETAILED DESCRIPTION

[0041] In order to make the purpose, technical solutions and advantages of the present application clearer, the embodiments of the present application are described in detail below with reference to the drawings. The specific operation methods, function descriptions and the like in the method embodiments can also be applied to the apparatus embodiments or system embodiments.

[0042] In the embodiments of the present application, the number of nouns represents "a singular noun or a plural noun", that is, "one or more" unless otherwise specified. "At least one" means one or more, and "multiple" means two or more. "And / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the following cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. In the textual description of the present application, the character " / ", generally represents that the front and rear associated objects are in an "or" relationship; in the formula of the present application, the character " / ", represents that the front and rear associated objects are in a "division" relationship. "Including at least one of A, B or C" or similar expressions can represent: including A; including B; including C; including A and B; including A and C; including B and C; including A, B and C, where A, B, C can be singular or plural.

[0043] In the embodiments of the present application, various numbers involved are distinguished for the convenience of description, and are not used to limit the scope of the embodiments of the present application. The size of the serial number of the above processes does not mean the execution order, and the execution order of the processes should be determined by their functions and internal logic. The ordinal numbers "first", "second" and the like involved in the embodiments of the present application are used to distinguish multiple objects, and do not limit the size, order, time sequence, priority or importance of the multiple objects.

[0044] Figure 1 illustrates a possible, non-limiting system diagram. As shown in Figure 1, the communication system 1000 includes a radio access network (RAN) 100 and a core network (CN) 200. Optionally, the communication system 1000 also includes an Internet 300.

[0045] RAN100 includes at least one RAN node (110a and 110b in Figure 1, collectively referred to as 110) and at least one terminal device (120a-120j in Figure 1, collectively referred to as 120). RAN100 may also include other RAN nodes, such as wireless relay devices and / or wireless backhaul devices (not shown in Figure 1).

[0046] Terminal device 120 is connected to RAN node 110 wirelessly. RAN node 110 is connected to core network 200 wirelessly or via wired connection. The core network equipment in core network 200 and RAN node 110 in RAN 100 can be different physical devices, or they can be the same physical device integrating core network logical functions and radio access network logical functions.

[0047] RAN100 can be used for cellular systems related to the 3rd generation partnership project (3GPP), such as 4th generation (4G). th generation, 4G), fifth generation (5 th RAN100 can be a generation (5G) mobile communication system, or a future-oriented evolution system (such as a future communication network). RAN100 can also be an open access network (O-RAN or ORAN), a cloud radio access network (CRAN), or a wireless fidelity (WiFi) system. RAN100 can also be a communication system that integrates two or more of the above systems.

[0048] RAN node 110, forming part of the communication system, assists terminal devices in achieving wireless access. Multiple RAN nodes 110 in the communication system 1000 can be of the same type or different types. In some scenarios, the roles of RAN node 110 and terminal device 120 are relative. For example, network element 120i in Figure 1 can be a helicopter or drone, which can be configured as a mobile base station. For terminal devices 120j accessing RAN 100 through network element 120i, network element 120i is a base station; however, for base station 110a, network element 120i is a terminal device.

[0049] In a possible scenario, the RAN node can be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next generation NodeB (gNB), a base station in a future communication network, or an access node in a WiFi system, etc. The RAN node can be a macro base station (such as 110a in FIG. 1), a micro base station or an indoor station (such as 110b in FIG. 1), a relay node or a donor node, or a wireless controller in a CRAN scenario. Alternatively, the RAN node can also be a server, a wearable device, a vehicle or a vehicle-mounted device, etc. For example, an access network device in vehicle to everything (V2X) technology can be a road side unit (RSU). All or part of the functions of the RAN node in the embodiments of the present application can be implemented by software functions running on hardware, or by virtualized functions instantiated on a platform (such as a cloud platform). The RAN node in the embodiments of the present application can also be a logical node, a logical module or software that can implement all or part of the functions of the RAN node.

[0050] In another possible scenario, multiple RAN nodes cooperate to assist a terminal device to implement wireless access, and different RAN nodes respectively implement part of the functions of a base station. For example, the RAN node can be a central unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), or a radio unit (RU), etc. The CU and the DU can be separately arranged, or can be included in the same network element, such as a baseband unit (BBU). The RU can be included in a radio frequency device or a radio frequency unit, such as a remote radio unit (RRU), an active antenna processing unit (AAU), or a remote radio head (RRH).

[0051] It can be understood that the CU (or CU-CP and CU-UP), DU or RU can also have different names in different systems, but those skilled in the art can understand their meanings. For example, in an ORAN system, the CU can also be referred to as an open CU (O-CU), the DU can also be referred to as an open DU (O-DU), the CU-CP can also be referred to as an open CU-CP (O-CU-CP), the CU-UP can also be referred to as an open CU-UP (O-CU-UP), and the RU can also be referred to as an open RU (O-RU). For the convenience of description, the CU, CU-CP, CU-UP, DU and RU are taken as examples for description in the present application. Any one of the CU (or CU-CP, CU-UP), DU and RU in the embodiments of the present application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module.

[0052] The terminal device 120 is a device with wireless transceiving function. The terminal device 120 can also be referred to as a terminal, a user equipment (UE), a mobile station, a mobile terminal device, etc. The terminal device can be widely applied to various scenarios, such as device-to-device (D2D) communication, vehicle to everything (V2X) communication, machine-type communication (MTC), internet of things (IoT), virtual reality, augmented reality, industrial control, automatic driving, remote medical treatment, smart power grid, smart furniture, smart office, smart wear, smart transportation, smart city, etc. The terminal device can be an ambient IoT (A-IoT) device, an IoT tag, a mobile phone, a tablet computer, a computer with wireless transceiving function, a wearable device, a vehicle, a drone, a helicopter, an airplane, a ship, a robot, a mechanical arm, a smart home device, etc. The device form of the terminal device is not limited in the embodiments of the present application.

[0053] The RAN nodes 110 and the terminal devices 120 can be fixed positions or mobile. The RAN nodes 110 and the terminal devices 120 can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; can also be deployed on water; can also be deployed on aircraft, balloons and artificial satellites in space. The embodiments of the present application do not limit the application scenarios of the RAN nodes 110 and the terminal devices 120. The RAN nodes 110 and the terminal devices 120 can be deployed in the same scenario or different scenarios, for example, the RAN nodes 110 and the terminal devices 120 are deployed on land at the same time; or the RAN nodes 110 are deployed on land and the terminal devices 120 are deployed on water, and the like, which are not listed one by one.

[0054] The RAN nodes 110 and the terminal devices 120 can communicate through licensed spectrum, can communicate through unlicensed spectrum, or can communicate through both licensed spectrum and unlicensed spectrum at the same time; for example, the RAN nodes 110 and the terminal devices 120 can communicate through spectrum below 6 gigahertz (GHz), can communicate through spectrum above 6 GHz, and can also communicate through both spectrum below 6 GHz and spectrum above 6 GHz at the same time. The embodiments of the present application do not limit the spectrum resources used for wireless communication.

[0055] The RAN nodes 110 and the terminal devices 120 can be referred to as communication apparatuses, for example, the network elements 110a and 110b in FIG. 1 can be understood as communication apparatuses with base station functions; for example, the communication apparatus can be a base station, or a module, unit or component applied to a base station (for example, a chip, a chip system, a processor, a circuit or other, etc.). The chip system is composed of a chip, and can also include a chip and other discrete devices. The network elements 120a-120j can be understood as communication apparatuses with terminal device functions; for example, the communication apparatus can be a terminal device, or a module, unit or component applied to a terminal device.

[0056] The scheme of the embodiments of the present application can be applied to the communication system 1000 shown in FIG. 1, which can correspond to a terrestrial network (TN). Alternatively, the scheme of the embodiments of the present application can also be applied to a non-terrestrial network (NTN). In the communication system of the NTN, the "RAN node" in FIG. 1 can be replaced by "satellite and ground station". Among them, the satellite is deployed in space, and the ground station is deployed on the ground, which can be understood as a base station deployed on the ground, and the ground station can also be referred to as a gateway (GW). The link between the satellite and the terminal device is called a user link, the link between the satellite and the ground station is called a feeder link, and the link between different satellites is called an inter-satellite link. The working mode of the satellite includes transparent and regenerative.

[0057] When the satellite works in the transparent mode, the satellite has the function of signal forwarding, and the ground station has all or part of the functions of the base station, and the ground station can be regarded as a base station. It can be understood that the ground station can be one device (for example, a macro base station, or a micro base station, etc.), or the ground station can realize the corresponding functions by multiple RAN nodes (for example, CU and DU, etc.), for details, refer to the foregoing description. Alternatively,

[0058] When the satellite works in the regenerative mode, the satellite has the ability to process digital signals, and the satellite has all or part of the functions of the base station, and the satellite can be regarded as a base station. Further, for the regenerative mode, it can be subdivided into: all functions of the base station are deployed on the satellite, which is called all functions of the base station (such as CU and DU) on the satellite, or part of the functions of the base station are deployed on the satellite, which is called part of the functions of the base station (such as DU) on the satellite, and the remaining functions of the base station (such as CU) are implemented on the ground station.

[0059] The satellite and the ground station can be referred to as communication devices, for example, the satellite can be understood as a communication device with satellite functions, and the ground station can be understood as a communication device with ground station functions.

[0060] It can be understood that in the TN corresponding communication system, the RAN node is used to help the terminal device to realize wireless access, and it can also have other different descriptions, such as RAN entity, ORAN device, access node, access network device, etc.; in the NTN corresponding communication system, the satellite and the ground station help the terminal device to realize wireless access. In the subsequent description of the embodiments of the present application, if there is no special description, the node or device that helps the terminal device to realize wireless access is referred to as "access network device" for description.

[0061] It can be understood that, in the scheme of the embodiments of the present application, the functions of the access network device can also be performed by a module, unit or component (such as a chip) in the access network device, or by a control subsystem containing the functions of the access network device. The control subsystem containing the functions of the access network device herein can be a control center in the above-mentioned application scenarios such as smart grid, industrial control, intelligent transportation and smart city. The functions of the terminal device can also be performed by a module, unit or component (such as a chip or modem) in the terminal device, or by a device containing the functions of the terminal device.

[0062] In the communication system 1000 shown in FIG. 1, the terminal device can be an A-IoT device, and the A-IoT device is described as follows.

[0063] In the release-19 of 3GPP, an A-IoT device with low power consumption is proposed. The A-IoT device can work in a battery-free or low-power battery mode, collect energy from the environment for service and communication, and does not need to replace the battery manually. The A-IoT device includes two types, which are:

[0064] The first type of A-IoT device: The peak power consumption of the first type of A-IoT device is about 1 μW, which can be referred to as device 1 (device1). The first type of A-IoT device does not have the ability to generate uplink signals and supports a backscatter mode. For example, an auxiliary terminal device or an intermediate node can send a carrier signal to the A-IoT device. The A-IoT device reflects the signal according to the received carrier signal, thereby realizing the uplink transmission of the A-IoT device.

[0065] The second type of A-IoT device: The peak power consumption of the second type of A-IoT device is about less than or equal to several hundred μW. The second type of A-IoT device can be referred to as device 2 (device2). Further, the second type of A-IoT device includes: a device that enables backscattering of an externally provided carrier, referred to as device 2a (device2a), or a device that uses an internally generated carrier for transmission, referred to as device 2b (device2b).

[0066] It can be understood that the execution subject of the receiving end in the scheme of the embodiments of the present application can be the first type of A-IoT device, or can be a chip (referred to as a chip of the first type of A-IoT device) in the first type of A-IoT device, or a first type of A-IoT module.

[0067] As shown in FIG. 2a, the first type of A-IoT device includes:

[0068] 1. Antenna: receives RF energy and can be shared by receiver / transmitter.

[0069] 2. Matching network: matches impedance between antenna and other parts (including RF energy harvester and receiver related modules).

[0070] 3. RF energy harvester: includes rectifier to convert RF signal (AC) to DC.

[0071] 4. Energy storage (e.g. capacitor): stores harvested energy from RF energy receiver.

[0072] 5. Power management unit (PMU): manages energy stored by energy harvester and provides energy to active modules that need energy supply.

[0073] 6. Digital baseband logic: includes functional modules such as encoder, decoder, and controller, etc.

[0074] 7. Memory: includes two types of memory: 1) non-volatile memory such as electrically EPROM (EEPROM), etc.; 2) registers to temporarily save information, only when energy in energy storage is sufficient.

[0075] 8. Clock generator: provides clock signal.

[0076] 9. Receiver related modules such as:

[0077] 1) RF band pass filter (BPF): improves frequency selectivity.

[0078] 2) RF envelope detector: converts RF signal to baseband.

[0079] 3 baseband low pass filter (LPF): filters out harmonic and high frequency components to improve signal quality to comparator.

[0080] 4) Comparator: decides high / low (level) of input signal.

[0081] 10. Transmitter related modules such as: backscatter modulator: switches impedance to modulate backscatter signal with transmit signal from baseband logic.

[0082] 11. Clock generator: provides clock signal.

[0083] It can be understood that the execution subject of the receiving end in the embodiments of the present application can be a second type of A-IoT device, or can be a chip in the second type of A-IoT device (referred to as a chip of the second type of A-IoT device), or a second type of A-IoT module. Taking the second type of A-IoT device as an example, the device 2a is shown in FIG. 2b, the second type of A-IoT device (device 2a) includes:

[0084] 1. Antenna: Receive RF energy and receiver / transmitter can share, can be separated.

[0085] 2. Matching network: Match the impedance between the antenna and other parts (including the RF energy collector and the receiver-related modules).

[0086] 3. RF energy collector: Including rectifier, convert radio frequency signal (AC) to direct current.

[0087] 4. Energy management unit (PMU): Manage the energy stored from the energy collector, provide energy to the active modules that need energy supply.

[0088] 5. Digital baseband logic: Including functional modules, such as encoder, decoder, controller, etc.

[0089] 6. Memory: Including two kinds of memory: 1) Non-volatile memory, such as EEPROM, etc. 2) Register that temporarily saves information, can be stored only when the energy in the energy storage is sufficient.

[0090] 7. Clock generator: Provide clock signal.

[0091] 8. Local oscillator (LO): For the transmitting end to generate the carrier frequency, or for the intermediate frequency (IF) reception to generate the carrier frequency offset.

[0092] 9. Receive-related modules, such as:

[0093] 1) RF bandpass filter BPF: Improve frequency selectivity.

[0094] 2) Mixer: Convert RF signal to intermediate frequency signal.

[0095] 3) Intermediate frequency IF amplifier (amplifier, amf): Amplify intermediate frequency signal.

[0096] 4) Intermediate frequency IF filter: Intermediate frequency filter filters out unwanted RF and LO signals.

[0097] 5) Intermediate frequency (IF) envelope demodulation (ED): Detecting the envelope from the intermediate frequency signal.

[0098] 6) Baseband circuit test board (bread board, BB) amplifier (amf): depending on the implementation, may or may not be present.

[0099] 7) Baseband BB low-pass filter LPF: Filters out harmonics and high-frequency components, improving the signal quality input to the comparator / analog-to-digital converter (ADC).

[0100] 8) Comparator / N-bit ADC.

[0101] 10. Launch-related modules, such as:

[0102] 1) Transmit modulation: Modulate baseband bits according to the modulation method. This part can be part of the baseband logic module.

[0103] 2) Digital-to-analog converter (DAC): Converts digital signals into analog signals.

[0104] 3) Low-pass filter (LPF): Filters out unwanted signals.

[0105] 4) Mixer: Upconverts baseband signals to the RF frequency range.

[0106] 5) Power amplifier (PA): If present, amplifies the transmitted signal.

[0107] 11. Energy storage device (e.g., capacitor): Stores the collected energy from the RF energy receiver.

[0108] In addition, the chip shown in Figure 2b also includes a low noise amplifier (LNA) and an energy harvester (other than RF).

[0109] In this application embodiment, the following two network architectures are provided, and the solutions in this application embodiment can be applied to the following two network architectures:

[0110] Network architecture 1: As shown in FIG. 3a, the access network device communicates with the A-IoT device directly. For example, the access network device sends downlink data and / or signaling to the A-IoT device directly, or the A-IoT device sends uplink data and / or signaling to the access network device directly. In this network architecture, there can be a case that the access network device sending downlink data and / or signaling to the A-IoT device is different from the access network device receiving uplink data and / or signaling sent by the A-IoT device.

[0111] In network architecture 1, the access network device can communicate with the A-IoT device as a reader device, and thus the communication link from the access network device to the A-IoT device can be referred to as a reader-to-device (R2D) link or communication, abbreviated as R2D communication. The communication link from the A-IoT device to the access network device can be referred to as a device-to-reader (D2R) link or communication, abbreviated as D2R communication.

[0112] Network architecture 2: As shown in FIG. 3b, the access network device communicates with the A-IoT device through an intermediate node. For example, the intermediate node forwards the communication information between the access network device and the A-IoT device. For example, in the process of R2D communication, the access network device sends R2D data and / or signaling to the intermediate node, and the intermediate node sends the R2D data and / or signaling to the A-IoT device. Alternatively, the access network device can control the intermediate node to communicate with the A-IoT device. For example, in the process of R2D communication, the access network device sends control information to the intermediate node, and the intermediate node sends R2D data and / or signaling to the A-IoT device according to the control information, etc.

[0113] In network architecture 2, the access network device can communicate with the A-IoT device as a reader device, and thus the communication link from the intermediate node to the A-IoT device can be referred to as a reader-to-device (R2D) link or communication, abbreviated as R2D communication. The communication link from the A-IoT device to the intermediate node can be referred to as a device-to-reader (D2R) link or communication, abbreviated as D2R communication.

[0114] In a possible implementation, the access network device can be a new radio (NR) base station, a pole station, a small station, or a micro station, etc. The intermediate node can be a relay device, an integrated access and backhaul (IAB) device, a terminal device, a repeater, etc. The A-IoT device can be a first type of A-IoT device, or a second type of A-IoT device, without limitation.

[0115] The A-IoT system is an asynchronous system, and before the A-IoT device receives the data signal, the A-IoT device needs to acquire the start of the data signal and the length of the chip in the data signal. Therefore, before transmitting the data signal, the network side needs to first transmit a time acquisition signal to the A-IoT device. For R2D communication, one R2D transmission includes a time acquisition signal and a data signal, and the data signal is transmitted on a data channel. For R2D transmission, the data channel is referred to as a physical reader device channel (PRDCH).

[0116] The time acquisition signal includes a start-indicator signal and a clock acquisition signal, or the time acquisition signal includes a start-indicator part and a clock acquisition part. In the description of the embodiments of the present application, the start-indicator signal and the clock acquisition signal are taken as examples for illustration, but it can be understood that the start-indicator signal can be replaced by the start-indicator part, and the clock acquisition signal can be replaced by the clock acquisition part.

[0117] In a possible implementation, referring to FIG. 4, the start-indicator signal is located before the clock acquisition signal, and there is no time interval between the two, that is, the end of the start-indicator signal is the start of the clock acquisition signal. Further, the clock acquisition signal is located before the data signal, and there is no time interval between the two, that is, the end of the clock acquisition signal is the start of the data signal. It can be understood that in the R2D transmission, the data signal is transmitted in the PRDCH, and the transmission of the data signal can also be described as PRDCH transmission or data channel transmission, etc.

[0118] In a possible implementation, the start indication signal is used to determine or provide the start of the R2D transmission. For example, specifically: the start indication signal is used to determine the start of the subsequent clock capture signal, and further, the start indication signal is also used to determine the start of the subsequent PRDCH. The clock capture signal is used to determine the chip length of the subsequent PRDCH, and further, the clock capture signal is also used to determine the start of the subsequent PRDCH. In the description of the embodiments of the present application, the chip length can also be described as: chip duration, time length of a chip, or time unit of a chip, etc. For example, the chip length of the PRDCH can also be described as the chip duration of the PRDCH, or the transmission time unit of the PRDCH, etc.

[0119] The following describes the process of R2D transmission, specifically: in one R2D transmission, including: a time capture signal and a data signal. Further, the time capture signal includes a start indication signal and a clock capture signal. The following focuses on the process of the A-IoT device detecting the start indication signal and the clock capture signal, and performing corresponding operations using the start indication signal and the clock capture signal:

[0120] In one understanding, as shown in FIG. 4, the start indication signal is all low, and the A-IoT device can consider that the start indication signal is detected when detecting the low level. The end of the start indication signal can be considered as the start of the clock capture signal. In one understanding, as shown in FIG. 4, the start level of the clock capture signal is high, and when the A-IoT device detects that the level changes from low to high, the A-IoT device considers that the clock capture signal is detected. The A-IoT device detects the clock capture signal according to the level pattern corresponding to the chip of the clock capture signal. The end of the clock capture signal can be considered as the start of the PRDCH transmission (i.e. the data signal).

[0121] In one understanding, the A-IoT device can detect the length of the chip through the clock capture signal. For example, as shown in FIG. 4, the level pattern corresponding to the chip of the clock capture signal is {1010}. Wherein {1} represents that the level corresponding to the chip is high, and {0} represents that the level corresponding to the chip is low. The A-IoT device can determine the length of one chip (which can be simply referred to as chip length) in the clock capture signal and the start of the PRDCH according to the level pattern corresponding to the chip of the clock capture signal. It can be understood that the length of one chip in the clock capture signal is the same as the length of one chip in the PRDCH.

[0122] In a possible implementation, the A-IoT device determines the chip length according to the duration between two edges of the same direction in the clock capture signal and a predefined value. For example, the edge can be a rising edge or a falling edge, where the rising edge is the time when the low level is converted to the high level, and the falling edge is the time when the high level is converted to the low level. The predefined value is the number of chips included by the two edges of the same direction. It can be understood that the length of one chip is equal to the duration of the two edges / the predefined value. For example, taking the rising edge as an example: it can be seen from FIG. 4 that the length of one chip is equal to the duration between 2 rising edges / 2, where the predefined value is equal to 2. Further,

[0123] The A-IoT device can determine the level corresponding to the chip in the data signal according to the chip length determined above. For example, referring to FIG. 4, the level corresponding to the chip in the data signal transmitted by the PRDCH is {011010}.

[0124] In the current scheme, M chips are included in one orthogonal frequency division multiplexing (OFDM) symbol. It can be understood that in the case where the subcarrier spacing is fixed, the duration of one OFDM symbol is fixed, and because M takes different values, the length of the chip in one OFDM symbol is different. For different candidate values of M, if the number of chips of the start indication signal is fixed, the length of the start indication signal changes with the change of the value of M, and thus for different values of M, the A-IoT device needs to detect start indication signals of different lengths, thereby increasing the complexity and power consumption of the A-IoT device in detecting the start indication signal; further, increasing the complexity and power consumption of the R2D transmission.

[0125] In view of the above, the embodiments of the present application provide a communication method and device, in which: for the M values corresponding to a plurality of candidate values, the length of the start indication signal is the same, thereby reducing the complexity and power consumption of the A-IoT device in detecting the start indication signal; further, reducing the complexity and power consumption of the R2D transmission. It can be understood that in the description in the embodiments, the length can also be described as the time length or the duration. For example, the length of the start indication signal can be replaced by: the time length or the duration of the start indication signal, and the like.

[0126] In the flowchart of the embodiments of the present application, the execution subject can be a terminal device, an access network device, or a module, unit, or component (for example, a chip, a chip system, a processor, a circuit, or the like) in the terminal device or the access network device. Hereinafter, the execution subject is taken as an example of the terminal device and the access network device. When the execution subject is a module, unit, or component in the terminal device or the access network device, the receiving / sending can be understood as input / output, that is, the module communicates with other modules or components of the terminal device or the access network device. In addition, the processing performed by a single execution subject can also be divided into processing performed by multiple execution subjects, which can be logically and / or physically separated. For example, the processing performed by the access network device can be divided into processing performed by at least one of a CU, a DU, and an RU.

[0127] FIG. 5 is a schematic interaction diagram of a communication method 5000 provided by the embodiments of the present application. It can be understood that steps 510 to 530 are only for describing the process of the communication method 5000, and should not constitute a limitation on the method 5000. Steps 510 to 530 can be divided into more steps, or combined into fewer steps, and the order of steps 510 to 530 is not limited.

[0128] Optionally, step 510: The access network device generates a first start indication signal and a first clock capture signal.

[0129] Step 520: The access network device transmits the first start indication signal and the clock capture signal on N orthogonal frequency division multiplexing (OFDM) symbols; correspondingly, the terminal device receives the first start indication signal and the first clock capture signal on the N OFDM symbols, and N is a positive integer.

[0130] The function of the first start indicator signal is described as follows: in one description, the first start indicator signal is used to determine the start of the data transmission. In one description, the "data transmission" can be replaced by "R2D" transmission, "PRDCH" or "PRDCH" transmission. The meaning of the "R2D" transmission can be referred to the description above. Therefore, in one description, the function of the first start indicator signal can be described as: the first start indicator signal is used to determine the start of the R2D transmission. In one understanding, the R2D transmission or the data transmission includes the start indicator signal, the clock acquisition signal and the data signal. In one description, the function of the first start indicator signal can be described as: the first start indicator signal is used to determine the start of the first clock acquisition signal and the data signal. In one description, the function of the first start indicator signal can also be described as: the start indicator part provides the start of the R2D transmission. It can be understood that the name of the start indicator signal is not limited in the embodiments of the present application. For example, with the evolution of the technology and / or the standard, the signal which implements the function of the start indicator signal can be described as other names. For example, the first start indicator signal can be replaced by the first signal or the first start indicator part.

[0131] The function of the first clock acquisition signal is described as follows: in one description, the first clock acquisition signal is used to determine the length of the chip in the data transmission. Alternatively, the first clock acquisition signal is used to determine the length of the chip in the data signal. The data signal is transmitted in the data channel, for example, the data channel can be the PRDCH channel. In one description, the first clock acquisition signal is used to determine the length of the chip in the subsequent data channel. In one description, the function of the first clock acquisition signal can also be described as: the clock acquisition part provides at least the chip synchronization of the subsequent physical channel transmission. It can be understood that the name of the clock acquisition signal is not limited in the embodiments of the present application. For example, with the evolution of the technology and / or the standard, the signal which implements the function of the clock acquisition signal can be described as other names. For example, the first clock acquisition signal can be replaced by the second signal or the first clock acquisition part.

[0132] In one understanding, the "data transmission" is understood as: data sending. In this way, the first start indication signal is used to determine the start of the data transmission. For the receiving end, i.e., the terminal device side, the role of the above-mentioned first start indication signal can be described as: the first start indication signal is used to determine the start of data reception. Similarly, the first clock capture signal is used to determine the length of the chip in the data transmission. For the receiving end, i.e., the terminal device side, the role of the above-mentioned first clock capture signal can be described as: the first clock capture signal is used to determine the length of the chip in the data reception.

[0133] In one possible implementation, the first start indication signal and the first clock capture signal can occupy all or part of the time domain resources of the above-mentioned N OFDM symbols. For example, the value of N is 2, and the first start indication signal and the first clock capture signal can occupy all time domain resources of the 2 OFDM symbols. Alternatively, the first start indication signal and the first clock capture signal can occupy part of the time domain resources of the 2 OFDM symbols. For example, the first start indication signal and the first clock capture signal can occupy 1 OFDM symbol and part of another OFDM symbol, and the role of the remaining part of the another OFDM symbol is not limited. For example, the remaining part of the above-mentioned another OFDM symbol can be used to transmit or carry a data signal.

[0134] In one possible implementation, each OFDM symbol in the above-mentioned N OFDM symbols includes M chips. For example, the chip can be a chip using on-off keying (OOK) modulation. The level corresponding to each chip can be high or low, or the level corresponding to each chip is: {1} or {0}, where {1} is equal to high, {0} is equal to low, or described as: the state corresponding to each chip is on or off, where on is equal to high and off is equal to low. The duration of one OFDM symbol is fixed, and in the case where one OFDM symbol includes M chips, the length of each chip in the M chips is equal to: the duration of one OFDM symbol / M.

[0135] In one understanding, since the duration of one OFDM symbol is fixed and one OFDM symbol includes M chips, the length of the chip in one OFDM symbol is not the same under different values of M, that is, the length of the chip in the OFDM symbol changes with the change of the value of M.

[0136] In a possible implementation, the value of M belongs to one of multiple candidate values, in the case of multiple candidate values, the length of the starting indication signal is the same, and M is a positive integer. The length of the starting indication signal can also be described as the time length or duration of the starting indication signal. In one understanding, the "starting indication signal" corresponds to the "first starting indication signal" above, for example, the first starting indication signal belongs to one of the starting indication signals.

[0137] It can be understood that the multiple candidate values include at least two M values. For example, in one implementation, the multiple candidate values include at least two of 1, 2, 4, 6, 8, 12, and 16. As can be seen, in the embodiment of the present application, for multiple M values, the length of the corresponding starting indication signal is the same, and the same length of the starting indication signal corresponding to different M values can reduce the complexity and power consumption of the terminal device in detecting the starting indication signal.

[0138] The above multiple candidate values include 1, 2, 4, 6, 8, 12, 16, and 24, for example, the "multiple candidate values" are described above.

[0139] Example 1: The multiple candidate values {1, 2, 4, 6, 8, 12, 16, 24} have the same length of the corresponding starting indication signal.

[0140] For example, when the value of M is any value in the above multiple candidate values, the length of the corresponding starting indication signal is the same.

[0141] Example 2: The above multiple candidate values are divided into multiple subsets, each subset includes at least one M value, and the length of the corresponding starting indication signal in each subset is the same.

[0142] For example, all M values {1, 2, 4, 6, 8, 12, 16, 24} are divided into 3 subsets. For example, the 3 subsets are: the value of subset 1 is {2, 4}, the value of subset 2 is {6, 8}, and the value of subset 3 is {12, 24}. For subset 1 (i.e., when the M value is equal to 2 and 4), the length of the starting indication signal is fixed as a first value; for subset 2 (i.e., when the M value is equal to 6 and 8), the length of the starting indication signal is fixed as a second value; for subset 3 (i.e., when the M value is equal to 12 and 24), the length of the starting indication signal is fixed as a third value; it can be understood that the first value, the second value, and the third value are different. For another example, all M values are divided into 2 subsets, which are a first subset and a second subset.

[0143] 1, the value of the first subset is {1, 2}, and the length of the starting indication signal corresponding to the first subset is fixed as 1 OFDM symbol.

[0144] For example, when M equals 1, 1 chip is included in the start indication signal of 1 OFDM symbol length, for example, the chip corresponds to the level {0}. The clock capture signal needs to be distinguished from the data signal. For example, the chip of the clock capture signal corresponds to the level pattern {11101}. Alternatively, when M equals 2, 2 chips are included in the start indication signal of 1 OFDM symbol length, for example, the chip corresponds to the level {00}. The data signal can have a case that 2 chips in succession correspond to the low level, and the clock capture signal needs to be distinguished from the data signal, for example, the chip of the clock capture signal corresponds to the level pattern {11101}. For the process and reasons of distinguishing the start indication signal and / or the clock capture signal from the data signal, refer to the description below.

[0145] In the description of the embodiments of the present application, the level pattern corresponding to the chip of the clock capture signal can be referred to as the level pattern of the clock capture signal. Further, the level pattern corresponding to the chip can also be described as "chip corresponding level combination", "chip corresponding level", "chip value", "chip value pattern".

[0146] 2, the value of the second subset is {6, 12, 24}, and the length of the start indication signal corresponding to the second subset is fixed as 1 / 2 OFDM symbol.

[0147] For example, when the value of M is equal to 6, 12 or 24, the length of the start indication signal can be distinguished from the data signal, and at this time, the clock capture signal does not need to be distinguished from the data signal. For example, the level pattern corresponding to the chip of the clock capture signal can be {1010} or {101}.

[0148] Further, in the above example 1 or example 2, the level pattern of the clock capture signal corresponding to the plurality of candidate values can be the same. In one understanding, the "clock capture signal" has a corresponding relationship with the "first clock capture signal" above, for example, the first clock capture signal belongs to one of the clock capture signals. For example, in the above example 1, when the value of M belongs to any value of the plurality of candidate values, the level pattern of the clock capture signal corresponding to the value is the same. Alternatively, in the above example 2, there are at least two subsets, and the level pattern of the clock capture signal corresponding to each subset is the same. It can be seen that in the embodiments of the present application, for the plurality of candidate values, the level pattern of the clock capture signal corresponding to the plurality of candidate values is the same, and the terminal device detects the clock capture signal according to the same level pattern in the M value corresponding to the plurality of candidate values, which reduces the complexity of the terminal device detecting the clock capture signal.

[0149] In a possible implementation, the above scheme can be extended. For example, in the scheme of the embodiments of the present application, the concept of "multiple candidate values" can not exist.

[0150] Example 1: Regardless of the value of M, the length of the starting indication signal is fixed, and this scheme can be considered as an extension of the above example 1 scheme.

[0151] At this time, regardless of the value of M, the length of the corresponding starting indication signal is fixed, and the terminal device detects the corresponding starting indication signal according to the fixed length, thereby reducing the complexity of the terminal device in detecting the starting indication signal.

[0152] Example 2: All possible M values can be divided into multiple subsets, each subset including at least two M values, and the M values included in different subsets are not repeated. In each subset, the length of the corresponding starting indication signal is fixed, and this scheme can be considered as an extension of the above example 2.

[0153] For example, all possible M values are divided into X subsets, X is an integer greater than 1; each of the X subsets includes 2 M values, and the lengths of the starting indication signals corresponding to each subset are the same. At this time, for one transmission, the access network device can determine the number of chips included in one OFDM symbol, that is, the value of M; further, the access network device determines the length of the starting indication signal corresponding to the subset (for example, the first subset) to which the current M value belongs according to the subset; and the access network device transmits the starting indication signal according to the length determined above.

[0154] Further, in the scheme of the above example 1: regardless of the value of M, the level pattern of the corresponding clock capture signal is the same. Or, in the scheme of the above example 2: the level pattern of the clock capture signal corresponding to each subset is the same.

[0155] In one understanding, for the level pattern of the clock capture signal, the level pattern can be understood as: a pattern or style composed of high level and / or low level. For example, in one scheme, the level pattern corresponding to the chip of the clock capture signal is {11101}.

[0156] In a possible implementation, at least one of the starting indication signal and / or the clock capture signal needs to be distinguished from the subsequent data signal, so as to avoid confusion between the starting indication signal and / or the clock capture signal and the subsequent data signal, and cause detection error of the data signal.

[0157] In a possible implementation, the maximum value of the number of consecutive high levels or low levels in the level pattern of the clock capture signal can be used to distinguish the data signal.

[0158] Example 1: the maximum number of consecutive high levels in the level pattern of the clock capture signal is different from the maximum number of consecutive high levels in the data signal.

[0159] For example, the maximum number of consecutive high levels in the level pattern of the clock capture signal is greater than the maximum number of consecutive high levels in the data signal. For example, the maximum number of consecutive high levels in the level pattern of the clock capture signal is a first value, the maximum number of consecutive high levels in the data signal is a second value, and the first value is greater than the second value. For example, when the data signal is encoded in the Manchester encoding mode, the maximum number of consecutive high levels in the data signal is 2, i.e., the second value is 2, and at this time, the first value can be any integer greater than 2, for example, the first value can be 3. At this time, when the terminal device detects 3 consecutive high levels, it is considered that the signal is a clock capture signal.

[0160] Example 2: the maximum number of consecutive low levels in the level pattern of the clock capture signal is different from the maximum number of consecutive low levels in the data signal.

[0161] For example, the maximum number of consecutive low levels in the level pattern of the clock capture signal is greater than the maximum number of consecutive low levels in the data signal. For example, the maximum number of consecutive low levels in the level pattern of the clock capture signal is a third value, the maximum number of consecutive low levels in the data signal is a fourth value, and the third value is greater than the fourth value. For example, when the data signal is encoded in the Manchester encoding mode, the maximum number of consecutive low levels in the data signal is 2, i.e., the fourth value is 2, and at this time, the third value can be any integer greater than 2, for example, the third value can be 3. At this time, when the terminal device detects 3 consecutive low levels, it is considered that the signal is a clock capture signal.

[0162] Of course, the relationship between the clock capture signal and the data signal can only satisfy the above example 1 or example 2, or can satisfy both example 1 and example 2, without limitation.

[0163] In another possible implementation, the maximum number of consecutive high levels or low levels in the start indication signal can be used to distinguish the number signal.

[0164] Example 1: the maximum number of consecutive high levels in the start indication signal is different from the maximum number of consecutive high levels in the data signal.

[0165] For example, the maximum number of consecutive high levels in the start indication signal is greater than the maximum number of consecutive high levels in the data signal. For example, the maximum number of consecutive high levels in the start indication signal is the fifth value, and the maximum number of consecutive high levels in the data signal is the sixth value, and the fifth value is greater than the sixth value. For example, when the data signal is encoded in the Manchester coding mode, the sixth value is 2, and at this time, the fifth value can be any integer greater than 2.

[0166] Example 2: The maximum number of consecutive low levels in the start indication signal is different from the maximum number of consecutive low levels in the data signal.

[0167] For example, the maximum number of consecutive low levels in the start indication signal is greater than the maximum number of consecutive low levels in the data signal. For example, the maximum number of consecutive low levels in the start indication signal is the seventh value, and the maximum number of consecutive low levels in the data signal is the eighth value, and the seventh value is greater than the eighth value. For example, when the data signal is encoded in the Manchester coding mode, the maximum number of consecutive low levels in the data signal is 2, that is, the eighth value is 2, and at this time, the seventh value can be any integer greater than 2, for example, the seventh value can be 3. At this time, when the terminal device detects 3 consecutive low levels, it is considered that the signal is a start indication signal.

[0168] Of course, the relationship between the start indication signal and the data signal can only satisfy the above example 1 or example 2, or can satisfy example 1 or example 2 at the same time, and is not limited.

[0169] It can be understood that in the embodiments of the present application, only the scheme of distinguishing the clock capture signal from the data signal, or only the scheme of distinguishing the start indication signal from the data signal, or both the scheme of distinguishing the clock capture signal from the data signal and the scheme of distinguishing the start indication signal from the data signal can be used.

[0170] For example, in one scheme, the length of the start indication signal is fixed regardless of the value of M. For example, the length of the start indication signal is fixed as 1 / 2 OFDM symbol. As shown in FIG. 6, the value of M is equal to 2. It can be understood that when the value of M is equal to 2, one OFDM symbol includes 2 chips, and the length of each chip is 1 / 2 OFDM symbol:

[0171] As shown in FIG. 6, the length of the start indication signal is fixed as 1 / 2 OFDM symbol, and the level corresponding to the chip of the start indication signal is {0}. At this time, if the clock capture signal is a high-low alternating level pattern, the level of the clock capture signal and the data signal can exist the same possibility. If the terminal device does not detect the clock capture signal, the terminal device can misjudge the subsequent data signal as the clock capture signal, thereby causing the detection error of the data signal. Therefore, in one design, the level pattern of the clock capture signal is designed as three high levels, and then low level plus high level, that is, the level pattern corresponding to the chip of the clock capture signal is {11101}. It can be understood that in FIG. 6, each OFDM symbol includes M chips, and further includes a cyclic prefix (CP) part before each OFDM symbol.

[0172] Further, when the value of M is equal to 6, the length of the start indication signal is fixed as 1 / 2 OFDM symbol, and the level corresponding to the chip of the start indication signal is {000}, and the level misjudgment of the data signal as the start indication signal does not occur. Therefore, the level pattern of the clock capture signal does not need to be forced to be distinguished from the level of the data signal. For example, for the case that the value of M is equal to 6, the level pattern corresponding to the chip of the clock capture signal is {101}, or the same as the level pattern when M=2, and the level pattern thereof is {11101}.

[0173] In one understanding, at least one of the start indication signal and the clock capture signal needs to be distinguished from the data signal. In one coding scheme, for example, the Manchester coding scheme, the data signal will usually have at most 2 continuous high levels or 2 continuous low levels. Therefore, in the above-mentioned design with M=2, the length of the start indication signal is fixed as 1 / 2 OFDM symbol, and the start indication signal has 2 chips in the 1 / 2 OFDM symbol, and the level corresponding to the chips of the start indication signal is {0}. The start indication signal cannot be distinguished from the data signal. At this time, the clock capture signal needs to be distinguished from the data signal. In the above-mentioned design with M=2, the level pattern corresponding to the chips of the clock capture signal is designed as {11101}. Since the data signal has at most 2 continuous high levels, the 3 continuous high levels in the clock capture signal can be distinguished from the data signal. It can be understood that, in the above-mentioned design with M=2, the clock capture signal can also use other level patterns, as long as the level pattern can be distinguished from the data signal. In the above-mentioned design with M=6, the length of the start indication signal is fixed as 1 / 2 OFDM symbol, and the start indication signal has 3 chips in the 1 / 2 OFDM symbol, and the level corresponding to the chips of the start indication signal is {000}. Since the 3 continuous low levels can be distinguished from the data signal, the start indication signal can be distinguished from the data signal. Whether the subsequent clock capture signal can be distinguished from the data signal is not mandatory. For example, the level pattern corresponding to the chips of the clock capture signal can be {101} (corresponding to the case that the clock capture signal cannot be distinguished from the data signal), or {11101} (corresponding to the case that the clock capture signal can be distinguished from the data signal).

[0174] In the above description of the embodiments of the present application, the case that the start indication signal is a low level is mainly described. In one possible design, the start indication signal can include a high level and a low level.

[0175] For example, in one possible implementation, the length of the start indication signal is fixed as 1 OFDM symbol, the length of the high level is 1 / 2 OFDM symbol, and the length of the low level is 1 / 2 OFDM symbol. When M=2, the case that the start indication signal is the same as the data signal occurs. At this time, the clock capture signal needs to be distinguished from the data signal. At this time, the design of the clock capture signal can be referred to the above description.

[0176] In another possible implementation, the length of the start indication signal is fixed as 1 OFDM symbol, the length of the high level is 1 / 4 OFDM symbol, and the length of the low level is 3 / 4 OFDM symbol. For the cases of M=2 and M=6, the length of the high level and the length of the low level of the start indication signal can be distinguished from the length of the level in the data signal, so as to realize the distinction between the start indication signal and the data signal. At this time, the clock capture signal does not need to be forced to be distinguished from the data signal. For example, the level pattern of the chip of the clock capture signal can be {101} or {1010}, etc.

[0177] In one understanding, the design of the start indication signal and the clock capture signal pattern satisfies the following criteria:

[0178] 1) For a certain M value, if the length of the low level in the start indication signal (the start indication signal is all low level) or the length of the high level and the length of the low level (the start indication signal is high level + low level) is the same as the length of the high level or the length of the low level in the data signal. At this time, the clock capture signal needs to be distinguished from the data signal. For example, the maximum continuous length of the high level in the level pattern of the clock capture signal is different from the length of the high level in the data signal, and / or the maximum continuous length of the low level in the level pattern of the clock capture signal is different from the length of the low level in the data signal.

[0179] 2) For a certain M value, if the length of the low level in the start indication signal (the start indication signal is all low level) or the length of the high level and the length of the low level (the start indication signal is high level + low level) is different from the length of the high level or the length of the low level in the data signal, at this time, the clock capture signal does not need to be distinguished from the data signal. For example, the maximum continuous length of the high level or the continuous length of the low level in the level pattern of the clock capture signal can be the same as or different from the length of the high level or the length of the low level of the data signal, without limitation.

[0180] Through the above design, for different M values, that is, different chip lengths, the terminal device can detect the start indication signal according to a fixed length, reducing the detection complexity of the terminal device. Further, for different M values, the level pattern of the clock capture signal is the same, and the terminal device detects the duration of different edges according to the above fixed level pattern, so as to determine the length of the chip, further reducing the complexity of the terminal device in detecting the clock capture signal.

[0181] In one possible implementation, after step 520, the following can also be included:

[0182] Step 530: the access network device sends a data signal; correspondingly, the terminal device receives the data signal. For example, the terminal device can receive the data signal according to the received first start indication signal and the first clock capture signal.

[0183] In a possible implementation, the first start indication signal can be a low level, and the terminal device can consider that the first start indication signal is detected when the low level is detected. The start level of the first clock capture signal is a high level, and the terminal device can consider that the first clock capture signal is detected when the level detected by the terminal device changes from a low level to a high level. According to the level pattern of the first clock capture signal, the length of a chip is determined. For example, the terminal device can determine the duration of two edges, which can be two rising edges or two falling edges. According to the duration of the two edges and the number of chips corresponding to the two edges, the length of a chip is determined. For example, as shown in FIG. 6, the level pattern corresponding to a chip of the first clock capture signal is {11101}, and it can be seen that four levels are included between two adjacent rising edges, and therefore the length of a chip is equal to: the duration of the two adjacent rising edges / 4. Then, the terminal device detects and envelope demodulates the data signal according to the determined length of a chip.

[0184] In a possible implementation, the access network device can generate N OFDM signals, and each OFDM symbol in the N OFDM signals includes M chips. The specific process is as follows: a discrete fourier transform (DFT) module in a DFT-spread-OFDM (DFT-s-OFDM) functional module in the access network device performs N'-point DFT on an N'-point time domain sequence, and each chip of the M chips is mapped to N' / M points. Alternatively, a processing module in the access network device maps X points of the signal after DFT to X subcarriers, and pads zeros on both sides to N' points, and an inverse fast fourier transform (IFFT) module in the DFT-s-OFDM functional module performs N'-point IFFT on the N'-point frequency domain signal. Alternatively, the processing module in the access network device pads zeros on both sides of the signal after DFT to N points, and the IFFT module in the DFT-s-OFDM functional module performs N-point IFFT, where N≥N'. The access network device adds a CP to each OFDM symbol.

[0185] It can be understood that in the scheme of the embodiments of the present application, the terminal device can be an A-IoT device. The type of the A-IoT device is not limited. For example, the A-IoT device in the embodiments of the present application can be a first type of A-IoT device, or a second type of A-IoT device, which is not limited. For the type of the A-IoT device, refer to the foregoing description.

[0186] It can be understood that the scheme of the embodiments of the present application can be applied to the network architecture shown in FIG. 3a, at this time, the terminal device can be replaced by an A-IoT device. In addition, the scheme of the embodiments of the present application can also be applied to the network architecture shown in FIG. 3b, at this time, the access network device and the terminal device can be replaced by an intermediate node and an A-IoT device, respectively. That is, the "access network device" involved in the flow of FIG. 5 can be replaced by an "intermediate node". It can be understood that the scheme of the embodiments of the present application can be implemented by an intermediate node, or can also be implemented by a module, unit, or component applied in the intermediate node (such as a chip).

[0187] In the embodiments provided by the present application, the method provided by the embodiments of the present application is introduced from the perspective of the interaction between the terminal device and the access network device. In order to realize the functions of the method provided by the embodiments of the present application, the terminal device or the access network device can include hardware structure and / or software module, and realize the above-mentioned functions in the form of hardware structure, software module, or hardware structure plus software module. Whether a certain function in the above-mentioned functions is executed in the form of hardware structure, software module, or hardware structure plus software module depends on the design constraint conditions of the specific application of the technical scheme.

[0188] Based on the same concept as the above method embodiments, FIG. 7 and FIG. 8 are structural schematic diagrams of possible communication apparatuses provided by the embodiments of the present application. These communication apparatuses can realize the functions of the terminal device or the access network device implemented in the above-mentioned method embodiments, and thus can realize the beneficial effects possessed by the above-mentioned method embodiments. In the embodiments of the present application, the communication apparatus can be a terminal device or an access network device, or a unit, module or component applied in the terminal device or the access network device (such as a chip, chip system, circuit, processor or other etc.). In the following description, the "unit" is taken as an example for illustration. For example, in the following description, the communication apparatus includes a processing unit and a transceiver unit. The processing unit in the following description can also be replaced by a processing module or a processing component, etc. The transceiver unit can also be replaced by a transceiver unit or a transceiver component. For example, the transceiver component can refer to a communication module.

[0189] As shown in FIG. 7, the communication apparatus 7000 includes a processing unit 7010 and a transceiver unit 7020. The communication apparatus 7000 is used to realize the functions of the terminal device or the access network device in the above-mentioned FIG. 5.

[0190] Optionally, the transceiver unit 7020 can also be referred to as an output unit, an interface unit, or a communication unit, etc. In a possible implementation, the transceiver unit 7020 includes at least one of a transmitting unit or a receiving unit. The transmitting unit and the receiving unit can be integrated together, or two independent units, etc.

[0191] When the communication apparatus 7000 is used to implement the functions of the access network device in FIG. 5, specifically: optionally, the processing unit 7010 is configured to generate a first start indication signal and a first clock capture signal; and the transceiver unit 7020 is configured to transmit the first start indication signal and the first clock capture signal on N orthogonal frequency division multiplexing, OFDM, symbols, N being a positive integer; wherein the first start indication signal is used to determine the start of data transmission, and the first clock capture signal is used to determine the length of a chip in the data transmission, each OFDM symbol of the N OFDM symbols including M chips, M being a positive integer and belonging to one of a plurality of candidate values, in the case of the plurality of candidate values, the length of the start indication signal is the same.

[0192] In a possible implementation, in the case of the plurality of candidate values, the level pattern of the clock capture signal is the same.

[0193] In a possible implementation, the maximum value of the number of consecutive high-level chips in the level pattern of the clock capture signal is a first value, the maximum value of the number of consecutive high-level chips in the data signal is a second value, the first value being greater than the second value; and / or, the maximum value of the number of consecutive low-level chips in the level pattern of the clock capture signal is a third value, the maximum value of the number of consecutive low-level chips in the data signal is a fourth value, the third value being greater than the fourth value.

[0194] In a possible implementation, the maximum value of the number of consecutive high-level chips in the start indication signal is a fifth value, the maximum value of the number of consecutive high-level chips in the data signal is a sixth value, the fifth value being greater than the sixth value; and / or, the maximum value of the number of consecutive low-level chips in the level pattern of the start indication signal is a seventh value, the maximum value of the number of consecutive low-level chips in the data signal is an eighth value, the seventh value being greater than the eighth value.

[0195] In a possible implementation, the plurality of candidate values includes at least two of the following: 1, 2, 4, 6, 8, 12, 16, and 24.

[0196] When the communication apparatus 7000 is used to implement the function of the terminal device in FIG. 5, specifically: the transceiver unit 7020 is configured to receive a first start indication signal and a first clock capture signal on N orthogonal frequency division multiplexing (OFDM) symbols, N being a positive integer; the first start indication signal is used to determine the start of data reception, and the first clock capture signal is used to determine the length of a chip in data reception; each of the N OFDM symbols includes M chips, M being one of a plurality of candidate values; in the case of the plurality of candidate values, the length of the start indication signal is the same, and M is a positive integer. Optionally, the processing unit 7010 is configured to receive a data signal according to the first start indication signal and the first clock capture signal.

[0197] In a possible implementation, in the case of the plurality of candidate values, the level pattern of the clock capture signal is the same.

[0198] In a possible implementation, the maximum number of consecutive high-level chips in the level pattern of the clock capture signal is a first value, the maximum number of consecutive high-level chips in the data signal is a second value, the first value is greater than the second value; and / or, the maximum number of consecutive low-level chips in the level pattern of the clock capture signal is a third value, the maximum number of consecutive low-level chips in the data signal is a fourth value, the third value is greater than the fourth value.

[0199] In a possible implementation, the maximum number of consecutive high-level chips in the start indication signal is a fifth value, the maximum number of consecutive high-level chips in the data signal is a sixth value, the fifth value is greater than the sixth value; and / or, the maximum number of consecutive low-level chips in the level pattern of the start indication signal is a seventh value, the maximum number of consecutive low-level chips in the data signal is an eighth value, the seventh value is greater than the eighth value.

[0200] In a possible implementation, the plurality of candidate values includes at least two of the following: 1, 2, 4, 6, 8, 12, 16, and 24.

[0201] It can be understood that the division of the units in the embodiments of the present application is illustrative, and is merely a logical function division. In actual implementation, another division manner can be used. In addition, each functional unit in the embodiments of the present application can be integrated in one physical device (for example, in a processor), or each functional unit can be a separate physical device, or two or more units can be integrated in one unit for implementation. The integrated unit can be implemented in the form of hardware, or in the form of a software function module, and the like.

[0202] As shown in FIG. 8, the communication apparatus 8000 includes a processor 8010 and an interface circuit 8020. The processor 8010 and the interface circuit 8020 are coupled with each other. It can be understood that the interface circuit 8020 can be a transceiver or an input / output interface. Optionally, the communication apparatus 8000 can further include a memory 8030 for storing instructions executed by the processor 8010 or storing input data required by the processor 8010 for executing instructions or storing data generated after the processor 8010 executes instructions.

[0203] When the communication apparatus 8000 is used to implement the method shown in FIG. 5, the processor 8010 is configured to implement the functions of the processing unit 7010, and the interface circuit 8020 is configured to implement the functions of the transceiver unit 7020.

[0204] When the communication apparatus is a chip applied to a terminal device, the chip implements the functions of the terminal device in the method embodiments. The chip receives information sent by the access network device to the terminal device through other modules (such as a radio frequency module or an antenna) in the terminal device; or the chip sends information to other modules (such as a radio frequency module or an antenna) in the terminal device, and the information is sent by the terminal device to the access network device.

[0205] When the communication apparatus is a module applied to an access network device, the module implements the functions of the access network device in the method embodiments. The module receives information from other modules (such as a radio frequency module or an antenna) in the access network device, and the information is sent by the terminal device to the access network device; or the module sends information to other modules (such as a radio frequency module or an antenna) in the access network device, and the information is sent by the access network device to the terminal device. The module of the access network device can be a chip of the access network device, or a DU or other module. The DU can be a DU under the O-RAN architecture.

[0206] The embodiments of the present application also provide a communication apparatus, which includes a processor configured to implement the functions of the terminal device or the access network device in FIG. 5. Optionally, the communication apparatus further includes a memory, the processor and the memory are coupled, and the processor is configured to execute computer programs or instructions stored in the memory to implement the functions of the terminal device or the access network device in FIG. 5. Optionally, the communication apparatus can be a chip or a chip system.

[0207] The embodiments of the present application also provide a communication apparatus, which includes a processor and an interface circuit configured to receive signals from other devices outside the apparatus and transmit the signals to the processor or send signals from the processor to other devices outside the apparatus, and the processor is configured to implement the functions of the terminal device or the access network device in FIG. 5 by logic circuit or executing code instructions.

[0208] The embodiment of the present application further provides a computer readable storage medium, which stores instructions, the instructions can also be referred to as a computer program, computer program code, etc. The instructions run on a computer, so that the computer executes the functions of the terminal device or the access network device in Fig. 5.

[0209] The embodiment of the present application further provides a computer program product, which comprises a computer program or instructions, when the computer program or instructions run on a computer, the functions of the terminal device or the access network device in Fig. 5 are realized.

[0210] It can be understood that the processor in the embodiment of the present application can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. The general-purpose processor can be a microprocessor or any conventional processor.

[0211] The memory in the embodiment of the present application can be a random access memory (RAM), a flash memory, a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically EPROM (EEPROM), a register, a hard disk, a mobile hard disk, a CD-ROM or any other form of storage medium well known in the art.

[0212] The method steps in the embodiment of the present application can be implemented in hardware, or in software instructions executable by a processor. The software instructions can be composed of corresponding software modules, which can be stored in a random access memory, a flash memory, a read-only memory, a programmable ROM, an erasable programmable ROM, an electrically EPROM, a register, a hard disk, a mobile hard disk, a CD-ROM or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor, so that the processor can read information from the storage medium and write information to the storage medium. The storage medium can also be an integral part of the processor. The processor and the storage medium can be located in an ASIC.

[0213] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer programs or instructions are loaded and executed on a computer, all or part of the processes or functions of the embodiments are performed. The computer can be a general purpose computer, a special purpose computer, a computer network, an access network device, a user equipment or other programmable apparatus. The computer programs or instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer programs or instructions can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center through wired or wireless manner. The computer readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center and the like integrated with one or more available media. The available medium can be a magnetic medium, for example, a floppy disk, a hard disk, a magnetic tape; or an optical medium, for example, a digital video disc; or a semiconductor medium, for example, a solid state disk. The computer readable storage medium can be a volatile or non-volatile storage medium, or can include both volatile and non-volatile storage media.

[0214] In various embodiments of the present application, the terms and / or descriptions of different embodiments are consistent and can be referred to each other if there is no special description and logical conflict, and the technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationship.

Claims

1. A communication method characterized by comprising: Comprising: transmitting a first start indication signal and a first clock acquisition signal on N orthogonal frequency division multiplexing (OFDM) symbols, N being a positive integer; wherein the first start indication signal is used to determine the start of data transmission, the first clock acquisition signal is used to determine the length of a chip in the data transmission, each of the N OFDM symbols comprises M chips, the value of M belongs to one of a plurality of candidate values, in the case of the plurality of candidate values, the length of the start indication signal is the same, and M is a positive integer.

2. The method of claim 1, wherein, In the case of the plurality of candidate values, the level pattern of the clock acquisition signal is the same.

3. The method of claim 1 or 2, wherein, The maximum value of the number of consecutive high-level chips in the level pattern of the clock acquisition signal is a first value, the maximum value of the number of consecutive high-level chips in the data signal is a second value, and the first value is greater than the second value; and / or, The maximum value of the number of consecutive low-level chips in the level pattern of the clock acquisition signal is a third value, the maximum value of the number of consecutive low-level chips in the data signal is a fourth value, and the third value is greater than the fourth value.

4. The method of any one of claims 1 to 3, wherein, The maximum value of the number of consecutive high-level chips in the start indication signal is a fifth value, the maximum value of the number of consecutive high-level chips in the data signal is a sixth value, and the fifth value is greater than the sixth value; and / or, The maximum value of the number of consecutive low-level chips in the level pattern of the start indication signal is a seventh value, the maximum value of the number of consecutive low-level chips in the data signal is an eighth value, and the seventh value is greater than the eighth value.

5. The method of any one of claims 1 to 4, wherein, The plurality of candidate values includes at least two of the following: 1, 2, 4, 6, 8, 12, 16, and 24.

6. A communication method characterized by comprising: Comprising: receiving a first start indication signal and a first clock acquisition signal on N orthogonal frequency division multiplexing (OFDM) symbols, N being a positive integer; wherein the first start indication signal is used to determine the start of data transmission, the first clock acquisition signal is used to determine the length of a chip in the data transmission, each of the N OFDM symbols comprises M chips, the value of M belongs to one of a plurality of candidate values, in the case of the plurality of candidate values, the length of the start indication signal is the same, and M is a positive integer.

7. The method of claim 6, wherein, In the case of the plurality of candidate values, the level pattern of the clock acquisition signal is the same.

8. The method of claim 6 or 7, wherein, The maximum value of the number of consecutive high-level chips in the level pattern of the clock acquisition signal is a first value, the maximum value of the number of consecutive high-level chips in the data signal is a second value, and the first value is greater than the second value; and / or, The maximum value of the number of consecutive low-level chips in the level pattern of the clock acquisition signal is a third value, the maximum value of the number of consecutive low-level chips in the data signal is a fourth value, and the third value is greater than the fourth value.

9. The method of any one of claims 6 to 8, wherein, The maximum value of the number of consecutive high-level chips in the start indication signal is a fifth value, the maximum value of the number of consecutive high-level chips in the data signal is a sixth value, and the fifth value is greater than the sixth value; and / or, The maximum value of the number of consecutive low-level chips in the level pattern of the start indication signal is a seventh value, the maximum value of the number of consecutive low-level chips in the data signal is an eighth value, and the seventh value is greater than the eighth value.

10. The method of any one of claims 6 to 9, wherein, The plurality of candidate values includes at least two of: 1, 2, 4, 6, 8, 12, 16, 24.

11. A communications device, characterized by comprising means for implementing the method of any of claims 1 to 5.

12. A communications device, characterized by comprising a processor configured to cause the communication device to perform the method of any of claims 1 to 5.

13. A communications device, characterized by comprising means for implementing the method of any of claims 6 to 10.

14. A communications device, characterized by comprising a processor configured to cause the communication device to perform the method of any of claims 6 to 10.

15. A computer-readable storage medium, characterized in that, The computer readable storage medium has stored thereon instructions which, when executed, cause a communication device to perform the method of any of claims 1 to 5, or the method of any of claims 6 to 10.

16. A computer program product, characterised in that, The computer program product comprises instructions which, when executed, cause a communication device to perform the method of any of claims 1 to 5, or the method of any of claims 6 to 10.

17. A chip, characterized by comprising a processor for implementing the method of any of claims 1 to 5, or the method of any of claims 6 to 10.

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