Substrate processing system and substrate processing method
The substrate processing system addresses the challenge of separating and processing bonded semiconductor wafers by using laser irradiation, separation, and detection to optimize polishing and etching, enhancing throughput and yield.
Patent Information
- Application Number
- PCT/JP2025/026630
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-08-09
- Filing Date
- 2025-07-28
- Publication Date
- 2026-02-12
AI Technical Summary
Existing technologies face challenges in efficiently separating and processing semiconductor wafers bonded together, particularly in addressing cracks and determining appropriate processing methods based on crack depth for reuse.
A substrate processing system and method that includes a laser irradiation device to reduce bonding strength, a separation device to separate the wafers, and detection and inspection devices to assess and calculate crack depth, followed by polishing and etching to optimize wafer thickness.
Enables effective separation and reuse of semiconductor wafers by optimizing polishing and etching based on crack depth, improving throughput and yield by avoiding unnecessary processing and ensuring uniform thickness.
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Figure JP2025026630_12022026_PF_FP_ABST
Abstract
Description
Substrate processing system and substrate processing method
[0001] The present disclosure relates to a substrate processing system and a substrate processing method.
[0002] Patent Document 1 discloses a substrate processing apparatus for processing a laminated substrate formed by bonding a first substrate and a second substrate, in which laser light is irradiated onto laser absorption layers formed on the first substrate and the second substrate to cause delamination at the interface between the second substrate and the laser absorption layer, thereby delaminating the second substrate from the first substrate.
[0003] Japanese Patent Application Laid-Open No. 2021-106197
[0004] The technology according to the present disclosure separates the first substrate from a laminated substrate in which the first substrate and the second substrate are bonded together, and appropriately processes the separated first substrate.
[0005] One aspect of the present disclosure is a substrate processing system that processes a laminated substrate formed by bonding a first substrate and a second substrate, and includes a laser irradiation device including a laser head and a lens for irradiating laser light toward the laminated substrate, a separation device that separates the first substrate from the laminated substrate, and a detection device that detects cracks that have occurred in the first substrate separated by the separation device and calculates the depth of the cracks.
[0006] According to the present disclosure, it is possible to separate the first substrate from a laminated substrate in which the first substrate and the second substrate are bonded together, and to appropriately process the separated first substrate.
[0007] 1 is a side view showing an outline of the configuration of a laminated wafer to be processed; FIG. 2 is a plan view showing an outline of the configuration of a wafer processing system; FIG. 3 is a side view showing an outline of the configuration of a laser irradiation device; FIG. 4 is a plan view showing an outline of the configuration of a laser irradiation device; FIG. 5 is a flow diagram showing main steps of wafer processing in a wafer processing system; FIG. 6 is an explanatory diagram showing the appearance of a laminated wafer irradiated with laser light; FIG. 7 is an explanatory diagram showing the appearance of a laser absorption layer being irradiated with laser light; FIG. 8 is an explanatory diagram showing the appearance of a crack occurring in a first wafer; FIG. 9 is an explanatory diagram showing the appearance of an operation of a separation device; FIG. 10 is an explanatory diagram explaining whether a separated first wafer can be reused; FIG. 11 is an explanatory diagram showing the appearance of a crack occurring in a first wafer being removed; FIG. 12 is an explanatory diagram showing the appearance of a crack occurring in a first wafer being removed; FIG. 13 is an explanatory diagram showing the appearance of a plurality of cracks occurring in a first wafer.
[0008] Hereinafter, a wafer processing system as a substrate processing system and a wafer processing method as a substrate processing method according to the present embodiment will be described with reference to the drawings. Note that in this specification and the drawings, elements having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.
[0009] 1 , a wafer processing system 1 according to this embodiment, which will be described later, processes an overlapped wafer T as an overlapped substrate in which a first wafer W as a first substrate and a second wafer S as a second substrate are bonded together. Hereinafter, the surface of the first wafer W that is bonded to the second wafer S will be referred to as the front surface Wa, and the surface opposite the front surface Wa will be referred to as the back surface Wb. Similarly, the surface of the second wafer S that is bonded to the first wafer W will be referred to as the front surface Sa, and the surface opposite the front surface Sa will be referred to as the back surface Sb.
[0010] The first wafer W is a semiconductor wafer such as a silicon substrate, and has at least one film laminated on the front surface Wa side. Hereinafter, the film formed on the front surface Wa side may be referred to as a "laminated film." In this embodiment, the laminated film includes a laser absorbing layer P, a device layer Dw, and a bonding layer Fw, which are laminated in this order from the front surface Wa side. The laser absorbing layer P absorbs laser light irradiated from the laser irradiation unit 210, which will be described later. The laser absorbing layer P may be made of, for example, an oxide film (SiO 2The device layer Dw includes a plurality of devices. The bonding layer Fw may be, for example, an oxide film (THOX film, SiO 2 Examples of the bonding layer Fw include a silicon dioxide film, a TEOS film, a SiC film, a SiCN film, and an adhesive. The first wafer W is bonded to the second wafer S via this bonding layer Fw. Note that the device layer Dw and the bonding layer Fw may not be formed on the front surface Wa. In this case, the laser absorption layer P is formed on the second wafer S side, and the device layer Ds on the second wafer S side, which will be described later, is transferred to the first wafer W side.
[0011] The second wafer S is a semiconductor wafer such as a silicon substrate, and at least one film is laminated on the surface Sa side. Hereinafter, the film formed on the surface Sa side may be referred to as a "laminated film." In this embodiment, the laminated film includes a device layer Ds and a bonding layer Fs, which are laminated in this order from the surface Sa side. The device layer Ds and the bonding layer Fs are the same as the device layer Dw and the bonding layer Fw of the first wafer W, respectively. The bonding layer Fw of the first wafer W and the bonding layer Fs of the second wafer S are then bonded. Note that the device layer Ds and the bonding layer Fs may not be formed on the surface Sa.
[0012] As shown in FIG. 2, the wafer processing system 1 includes a first processing system 2 and a second processing system 3 .
[0013] The first processing system 2 has a configuration in which a carry-in / out station 10 and a processing station 11 are integrally connected. In the carry-in / out station 10, for example, a FOUP F capable of accommodating a plurality of overlapping wafers T, a plurality of first wafers W, or a plurality of second wafers S is carried in and out between the outside. The processing station 11 is equipped with various processing devices that perform desired processing on the overlapping wafers T, the first wafers W, or the second wafers S.
[0014] The carry-in / out station 10 is provided with a FOUP mounting table 20 on which a plurality of FOUPs F, for example, three FOUPs F, are mounted. A wafer transfer device 30 is provided on the positive X-axis side of the FOUP mounting table 20. The wafer transfer device 30 moves on a transfer path 31 extending in the Y-axis direction, and is configured to be able to transfer the overlapped wafer T, first wafer W, or second wafer S between the FOUP F on the FOUP mounting table 20 and a transition stage 50, an inversion device 60, and a detection device 70, which will be described later.
[0015] The processing station 11 is provided with a wafer transfer device 40, a transition stage 50, an inverting device 60, a detection device 70, an inspection device 80, a laser irradiation device 90, a cleaning device 100, and a separation device 110. The transition stage 50, the inverting device 60, and the detection device 70 are disposed on the positive X-axis side of the wafer transfer device 30 and the negative X-axis side of the wafer transfer device 40. The transition stage 50, the inverting device 60, and the detection device 70 are stacked vertically from the top in this order. The inspection device 80 and the laser irradiation device 90 are disposed on the positive Y-axis side of the wafer transfer device 40, and the cleaning device 100 and the separation device 110 are disposed on the negative Y-axis side of the wafer transfer device 40. The number and arrangement of the transition stage 50, the inverting device 60, the detection device 70, the inspection device 80, the laser irradiation device 90, the cleaning device 100, and the separation device 110 are not limited to those described in this embodiment and can be determined arbitrarily.
[0016] The wafer transport device 40 is configured to be freely movable on a transport path 41 extending in the X-axis direction, and is configured to be able to transport the overlapped wafer T, the first wafer W, or the second wafer S to the transition stage 50, the inversion device 60, the detection device 70, the inspection device 80, the laser irradiation device 90, the cleaning device 100, and the separation device 110.
[0017] The transition stage 50 temporarily stores the overlapped wafer T, the first wafer W, or the second wafer S for transfer between the wafer transfer device 30 and the wafer transfer device 40. The reversing device 60 reverses the front and back surfaces of the first wafer W.
[0018] The laser irradiation device 90 applies laser light (e.g., CO 2 The laser irradiation device 90 irradiates a laser beam (laser) to reduce the bonding strength at the interface between the first wafer W and the laser absorption layer P. In the following description, the interface (in this embodiment, the interface between the first wafer W and the laser absorption layer P) whose bonding strength has been reduced by the irradiation of the laser beam may be referred to as a "separation surface." The laser irradiation device 90 has a control device 91, which will be described later. The configuration of the laser irradiation device 90 will be described later.
[0019] The separating device 110 separates the first wafer W from the overlapped wafer T (second wafer S) using as a base point the interface between the first wafer W and the laser absorption layer P, which serves as a separation surface, where the bonding strength has been reduced by the laser irradiation device 90. The configuration of the separating device 110 will be described later.
[0020] The cleaning apparatus 100 cleans the first wafer W and the second wafer S separated by the separating apparatus 110. The configuration of the cleaning apparatus 100 is not particularly limited.
[0021] In this embodiment, an example will be described in which only one cleaning apparatus 100 common to the first wafer W and the second wafer S is arranged in the wafer processing system 1, but the first cleaning apparatus for cleaning the first wafer W and the second cleaning apparatus for cleaning the second wafer S may also be arranged independently in the wafer processing system 1.
[0022] The inspection device 80 inspects the front surface Wa (separated surface) of the first wafer W separated from the overlapped wafer T in the separation device 110. For example, a known inspection device is used as the inspection device 80. For example, the inspection device 80 captures an image of the entire front surface Wa using an imaging unit (not shown) equipped with a wide-angle CCD camera or the like to obtain an image of the front surface Wa. The inspection device 80 has a control device 81, which will be described later. Furthermore, the inspection results of the inspection device 80 are output to the control device 81, control device 190, or control device 192, which will be described later.
[0023] The detection device 70 detects cracks formed on the front surface Wa (separation surface) of the first wafer W separated from the overlapped wafer T in the separation device 110, and calculates the depth of the cracks. For example, a known non-destructive detection device is used as the detection device 70. For example, the detection device 70 irradiates the first wafer W with detection light and detects cracks based on the detection light reflected from the first wafer W. The detection device 70 also calculates the depth of the crack based on the reflected light of the detection light. The detection device 70 has a control device 71, which will be described later. Furthermore, the detection result by the detection device 70 is output to the control device 71, control device 190, or control device 192, which will be described later.
[0024] The second processing system 3 has a configuration in which a load / unload station 120 and a processing station 121 are integrally connected. In the load / unload station 120, for example, a FOUP F capable of accommodating a plurality of first wafers W is loaded and unloaded between the load / unload station 120 and the outside. The processing station 121 is equipped with various processing devices that perform desired processing on the first wafers W.
[0025] The carry-in / out station 120 is provided with a FOUP mounting table 130 on which a plurality of FOUPs F, for example, three FOUPs F, can be placed. A wafer transfer device 140 is provided on the positive X-axis side of the FOUP mounting table 130. The wafer transfer device 140 moves on a transfer path 141 extending in the Y-axis direction, and is configured to be able to transfer a first wafer W between the FOUP F on the FOUP mounting table 20 and a transition stage 160, which will be described later.
[0026] The processing station 121 is provided with a wafer transfer device 150, a transition stage 160, a polishing device 170, and an etching device 180. The transition stage 160 is disposed on the positive X-axis side of the wafer transfer device 140 and on the negative X-axis side of the wafer transfer device 150. The polishing device 170 is disposed on the positive Y-axis side of the wafer transfer device 150, and the etching device 180 is disposed on the negative Y-axis side of the wafer transfer device 150. The number and arrangement of the transition stages 160, polishing devices 170, and etching devices 180 are not limited to those in this embodiment and can be determined as desired.
[0027] The wafer transfer device 150 is configured to be movable on a transfer path 151 extending in the X-axis direction, and is configured to be able to transfer the first wafer W to the transition stage 160, the polishing device 170, and the etching device 180.
[0028] The transition stage 160 temporarily stores the first wafer W for transfer between the wafer transfer device 140 and the wafer transfer device 150 .
[0029] The polishing apparatus 170 polishes the back surface Wb of the first wafer W separated from the overlapped wafer T in the first processing system 2. As the polishing apparatus 170, for example, a known CMP (Chemical Mechanical Polishing) apparatus is used.
[0030] The polishing apparatus 170 may have any configuration, and may polish the back surface Wb of the first wafer W held by a chuck (not shown), for example, by bringing a polishing pad (not shown) into contact with the back surface Wb. In the technology disclosed herein, "polishing" includes "grinding," and the polishing apparatus 170 may be, for example, a known grinding apparatus.
[0031] The etching apparatus 180 etches the back surface Wb of the first wafer W ground by the polishing apparatus 170. For example, a known wet etching apparatus is used as the etching apparatus 180. For example, the etching apparatus 180 supplies an etching liquid to the back surface Wb of the first wafer W held by a chuck (not shown), and etches the back surface Wb.
[0032] The polishing apparatus 170 and the etching apparatus 180 of this embodiment constitute a surface processing apparatus in the present disclosure. That is, the polishing apparatus 170 and the etching apparatus 180 polish and further etch the front surface Wa of the first wafer W, respectively, to process the front surface Wa of the first wafer W.
[0033] The wafer processing system 1 described above is provided with a control device 71, a control device 81, a control device 91, at least one control device 190, at least one control device 191, and at least one control device 192. The control device 71 individually controls the operation of the detection device 70. The control device 81 individually controls the operation of the inspection device 80. The control device 91 individually controls the operation of the laser irradiation device 90. The control device 190 oversees the control of a series of wafer processes in the first processing system 2. The control device 191 oversees the control of a series of wafer processes in the second processing system 3. The control device 192 controls the control devices 190 and 191 to oversee the control of a series of wafer processes in the wafer processing system 1.
[0034] Controller 71, controller 81, controller 91, controller 190, controller 191, and controller 192 each process computer-executable instructions that cause detection device 70, inspection device 80, laser irradiation device 90, first processing system 2, second processing system 3, and wafer processing system 1 to perform the various processes described in this disclosure. Controller 71, controller 81, controller 91, controller 190, controller 191, and controller 192 can each be configured to control each element of detection device 70, inspection device 80, laser irradiation device 90, first processing system 2, second processing system 3, and wafer processing system 1 to perform the various processes described herein. In one embodiment, some or all of the control device 71 may be included in the detection device 70, some or all of the control device 81 may be included in the inspection device 80, some or all of the control device 91 may be included in the laser irradiation device 90, some or all of the control device 190 may be included in the first processing system 2, some or all of the control device 191 may be included in the second processing system 3, and some or all of the control device 192 may be included in the wafer processing system 1.
[0035] The control devices 71, 81, 91, 190, 191, and 192 may each include a processing unit, a storage unit, and a communication interface. The control devices 71, 81, 91, 190, 191, and 192 may each be realized by, for example, a computer. The processing unit may be configured to read a program providing logic or routines that enable various control operations from the storage unit and execute the read program to perform various control operations. This program may be stored in the storage unit in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit and read from the storage unit and executed by the processing unit. The medium may be various computer-readable storage media or a communication line connected to the communication interface. The storage medium may be temporary or non-temporary. The processing unit may be a CPU (Central Processing Unit) or one or more circuits. The storage unit may include a random access memory (RAM), a read only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface may communicate with the detection device 70, the inspection device 80, the laser irradiation device 90, the first processing system 2, the second processing system 3, and the wafer processing system 1 via a communication line such as a local area network (LAN).
[0036] In this embodiment, the control devices 71, 81, and 91 are installed individually for the detection device 70, the inspection device 80, and the laser irradiation device 90, respectively, but these control devices 71, 81, and 91 may be configured integrally with the control device 190. In other words, the operations of the detection device 70, the inspection device 80, and the laser irradiation device 90 may be controlled by the control device 190. Furthermore, the control devices 190, 191, and 192 may also be configured integrally.
[0037] Next, the above-mentioned laser irradiation apparatus 90 will be described. As shown in Figures 3 and 4, the laser irradiation apparatus 90 has a chuck 200 that holds the overlapped wafer T on its upper surface. The chuck 200 suction-holds the back surface Sb of the second wafer S in a state in which the first wafer W is placed on top and the second wafer S is placed on the bottom. The chuck 200 is provided with lifting pins (not shown) for supporting and elevating the overlapped wafer T from below. The lifting pins are inserted into through-holes (not shown) formed through the chuck 200 and are configured to be freely raised and lowered.
[0038] The chuck 200 is supported by a slider table 202 via an air bearing 201. A rotation mechanism (rotor) 203 is provided on the underside of the slider table 202. The rotation mechanism 203 incorporates, for example, a motor as a drive source. The chuck 200 is configured to be rotatable about a vertical axis via the air bearing 201 by the rotation mechanism 203. The slider table 202 is configured to be movable along rails 206 extending in the Y-axis direction on a base 205 via a movement mechanism (transporter) 204 provided on the underside of the slider table 202. The drive source of the movement mechanism 204 is not particularly limited, but a linear motor, for example, is used.
[0039] A laser irradiation unit 210 is provided above the chuck 200. The laser irradiation unit 210 includes a laser head 211, an optical system 212, and a lens 213.
[0040] The laser head 211 has a laser oscillator (not shown) that oscillates a laser beam in pulses. This laser beam is a so-called pulse laser. As described above, the laser beam is a CO 2 Laser light, CO 2 The wavelength of the laser light is, for example, 8.9 μm to 11 μm. The laser head 211 may also include other devices in addition to the laser oscillator, such as an amplifier.
[0041] The optical system 212 may have an optical element (not shown) that controls the intensity and position of the laser light, and an attenuator (not shown) that attenuates the laser light to adjust the output. The optical system 212 may also be configured to be able to control the number and shape of the split laser light.
[0042] The lens 213 irradiates the laminated wafer T held by the chuck 200 with laser light. The laser light emitted from the laser irradiation unit 210 passes through the first wafer W and is irradiated onto the laser absorption layer P. The lens 213 may be configured to be movable in the horizontal direction by a moving mechanism (transporter). The lens 213 is also configured to be movable up and down in the vertical direction by an elevating mechanism (actuator) 214. The elevating mechanism 214 may have any configuration, and may, for example, use a motor-driven ball screw or a piezoelectric element. Alternatively, the optical system 212 may have a galvanometer scanner (not shown), and the lens 213 may scan the laser light.
[0043] An imaging unit 220 is provided above the chuck 200 on the Y-axis positive side of the lens 213. The imaging unit 220 includes at least one camera. An image captured by the imaging unit 220 is output to a control device 91, a control device 190, or a control device 192, which will be described later. The laser irradiation device 90 determines the position of the overlapped wafer T on the chuck 200 based on the image obtained by the imaging unit 220, and aligns the overlapped wafer T based on this.
[0044] Next, a description will be given of wafer processing performed using the thus configured wafer processing system 1. In this embodiment, the first wafer W and the second wafer S are bonded together in a bonding device (not shown) external to the wafer processing system 1 to form an overlapped wafer T in advance.
[0045] First, a description will be given of wafer processing in the first processing system 2. In the first processing system 2, the first wafer W is separated from the overlapped wafer T.
[0046] In the first processing system 2 , first, a FOUP F containing a plurality of overlapped wafers T is placed on the FOUP placement stage 20 of the carry-in / out station 10 .
[0047] Next, the overlapped wafer T is removed from the FOUP F by the wafer transfer device 30 and transferred to the transition stage 50. Subsequently, the overlapped wafer T is transferred to the laser irradiation device 90 by the wafer transfer device 40.
[0048] In the laser irradiation device 90, the overlapped wafer T held by suction on the chuck 200 is subjected to laser processing (Step 1 in FIG. 5).
[0049] In St1, as shown in FIG. 6, the laser irradiating unit 210 applies laser light L(CO 2 The first wafer W is irradiated with pulsed laser light (laser light). At this time, the laser light L passes through the first wafer W from the back surface Wb side of the first wafer W and is absorbed in the laser absorbing layer P. The optical energy of the laser light L absorbed by the laser absorbing layer P is converted into thermal energy. Most of the heat generated in the laser absorbing layer P diffuses toward the first wafer W side, causing the first wafer W to locally expand. The expanded first wafer W has a convex shape, and the laser absorbing layer P is pressed from above (the first wafer W side). As a result, compressive stress is generated in the pressed laser absorbing layer P and tensile stress is generated around the laser absorbing layer P. In this way, the laser light L reduces the bonding strength at the interface between the laser absorbing layer P and the first wafer W. Note that this reduction in bonding strength at the interface between the laser absorbing layer P and the first wafer W is an example of separation of the first wafer W, and other methods may be used for separation. In this embodiment, "decreased bonding strength" refers to a state in which the bonding strength is reduced at least compared to before irradiation with the laser light L, and includes peeling of the laser absorption layer P and the first wafer W.
[0050] In St1, as shown in FIG. 7 , the chuck 200 (superimposed wafer T) is rotated by the rotation mechanism 203, and the chuck 200 is moved in the Y-axis direction by the movement mechanism 204, while the laser absorbing layer P is irradiated with pulsed laser light L. The laser absorbing layer P is then irradiated with the laser light L from the radially outer side toward the inner side or from the radially inner side toward the outer side, resulting in spiral irradiation. The laser light L is irradiated to the entire surface of the laser absorbing layer P along the surface direction, and a separation surface with reduced bonding strength is formed at the interface between the first wafer W and the laser absorbing layer P. Note that in St1, the laser light L may be irradiated concentrically and annularly on the laser absorbing layer P. Alternatively, the laser light L may be irradiated to the laser absorbing layer P in pulsed form while the lens 213 is moved linearly without rotating the chuck 200. In this case, for example, a linear movement mechanism (transporter) may be provided on the lens 213 to move the lens 213 in the horizontal direction, or the laser light from the lens 213 may be scanned by, for example, a galvano scanner.
[0051] When the laser absorption layer P is irradiated with the laser light L in St1, cracks C may occur from the front surface Wa of the first wafer W toward the inside, as shown in Fig. 8. Although the cracks are mainly caused by the irradiation of the laser light L, there may be other causes for the occurrence of the cracks C.
[0052] Next, the overlapped wafer T is transferred by the wafer transfer device 40 to the separation device 110. In the separation device 110, the first wafer W is separated from the overlapped wafer T at a separation surface that is the interface between the first wafer W and the laser absorption layer P, the bonding strength of which has been reduced by the irradiation of the laser light L, as shown in FIG. 9 (St2 in FIG. 5).
[0053] 9( a), the suction chuck 300 suction-holds the back surface Sb of the second wafer S, and the suction pad 310 suction-holds the back surface Wb of the first wafer W. Thereafter, as shown in FIG. 9( b), while the suction pad 310 suction-holds the first wafer W, the suction pad 310 is raised to separate the first wafer W from the laser absorbing layer P. At this time, since the bonding strength at the interface between the laser absorbing layer P and the first wafer W has been reduced by the irradiation of the laser light L as described above, the first wafer W can be separated from the laser absorbing layer P without applying a large load.
[0054] Next, the second wafer S from which the first wafer W has been separated in the separating device 110 is transferred to the cleaning device 100 by the wafer transfer device 40. In the cleaning device 100, the front surface Sa of the second wafer S, which is the surface separated from the first wafer W, specifically the front surface of the laser absorbing layer P, is cleaned (St3 in FIG. 5). Note that in the cleaning device 100, the back surface Sb of the second wafer S may also be cleaned in addition to the front surface of the laser absorbing layer P. Furthermore, separate cleaning units may be provided for cleaning the front surface of the laser absorbing layer P and the back surface Sb of the second wafer S, respectively.
[0055] Next, the second wafer S that has been cleaned by the cleaning apparatus 100 is transferred out of the cleaning apparatus 100 by the wafer transfer apparatus 40 and transferred to the FOUP F on the FOUP mounting table 20 via the transition stage 50 and the wafer transfer apparatus 30 .
[0056] Meanwhile, the first wafer W separated by the separating device 110 is transferred to the reversing device 60 by the wafer transfer device 40. This transfer of the first wafer W by the wafer transfer device 40 may be performed simultaneously with or independently from the transfer of the second wafer S. In the reversing device 60, the front and back surfaces of the first wafer W are reversed so that the front surface Wa faces upward (St4 in FIG. 5 ).
[0057] Next, the first wafer W with its front surface Wa facing upward is transferred by the wafer transfer device 40 to the cleaning device 100. In the cleaning device 100, the front surface Wa of the first wafer W, which is the surface separated from the second wafer S, is cleaned (St5 in FIG. 5 ). Note that in the cleaning device 100, the back surface Wb of the first wafer W may also be cleaned in addition to the front surface Wa. Alternatively, separate cleaning units may be provided for cleaning the front surface Wa and the back surface Wb, respectively.
[0058] Next, the first wafer W cleaned by the cleaning apparatus 100 is transferred by the wafer transfer apparatus 40 to the inspection apparatus 80. In the inspection apparatus 80, the front surface Wa of the first wafer W, i.e., the separation surface, is inspected (St6 in FIG. 5 ). In St6, the entire front surface Wa of the first wafer W is imaged by an imaging unit of the inspection apparatus 80. The image captured by the imaging unit is output to, for example, the control device 192.
[0059] 8, if a crack C occurs on the front surface Wa of the first wafer W, a recess will be formed on the front surface Wa at the position where the crack C occurred. Therefore, the control device 192 identifies the recess as an abnormal portion on the front surface Wa from the image of the front surface Wa of the first wafer W acquired in St6 (St7 in FIG. 5).
[0060] Note that the method for identifying the recesses on the front surface Wa in St 7 is arbitrary. For example, the image of the front surface Wa acquired in St 6 may be compared with an image of the surface of a reference wafer having no recesses formed on its surface, and the recesses may be identified from the difference in gray scale between these images.
[0061] The control device 192 further estimates that the recess identified in St7 is the location where the crack C has occurred (St8 in FIG. 5).
[0062] Next, the first wafer W inspected by the inspection device 80 is transferred to the reversing device 60 by the wafer transfer device 40. In the reversing device 60, the front and back surfaces of the first wafer W are reversed so that the back surface Wb faces upward (St9 in FIG. 5). Note that in St10 described below, when cracks C are detected from the back surface Wb side with the back surface Wb facing downward, the reversing of the front and back surfaces of the first wafer W in St9 may be omitted.
[0063] Next, the first wafer W with its back surface Wb facing upward is transferred by the wafer transfer device 40 to the detection device 70. The detection device 70 irradiates the interior of the first wafer W with detection light from the back surface Wb side, and calculates the depth of the crack C formed on the front surface Wa of the first wafer W based on the detection light reflected from the first wafer W (St10 in FIG. 5 ). In St10, the depth of the crack C at the occurrence position estimated in St8 is calculated. The calculated depth of the crack C is output to, for example, the control device 192.
[0064] The control device 192 determines whether the first wafer W can be reused based on the depth of the crack C calculated in St10 (St11). At this time, a reference value G is used as a reference value for the depth H of the crack C, as shown in Fig. 10. When the thickness required for reusing the first wafer W is defined as a required thickness E and the surface required to ensure the required thickness E is defined as a surface B, the reference value G is set to the distance from the front surface Wa to the surface B.
[0065] In St11, for example, as shown in FIG. 10( a), if the depth H of the crack C is greater than the reference value G, i.e., if the crack C extends from the surface B to the back surface Wb, the first wafer W in which the crack C has occurred is determined to be unreusable. As will be described later, if the front surface Wa is polished and then etched to remove the crack C, the thickness of the first wafer W after removal of the crack C will be smaller than the required thickness E, and therefore the first wafer W cannot be reused. In such a case, it is determined that the subsequent wafer processing, i.e., polishing and etching of the front surface Wa in the second processing system 3, will not be performed (St12 in FIG. 5). The first wafer W determined to be unreusable in this way is then recovered.
[0066] 10B, for example, the first wafer W in which the crack C has occurred is determined to be reusable. Even if the surface Wa is polished and then etched to remove the crack C, the thickness of the first wafer W after removing the crack C can be maintained at the required thickness E, and therefore the first wafer W can be reused.
[0067] Here, the first wafer W determined to be reusable is subjected to polishing and etching of the surface Wa, which will be described later, in the second processing system 3. Therefore, the control device 192 determines the polishing amount and etching amount of the surface Wa based on the depth H of the crack C (St13 in FIG. 5 ). In St13, the polishing amount and etching amount of the surface Wa are determined so as to remove the crack C, and the determined amounts are stored in the control device 192. As described above, polishing in this embodiment includes grinding, and in this case, the grinding amount of the surface Wa is determined in St13. Furthermore, the polishing amount and etching amount in this embodiment correspond to the processing amount of the separation surface in this disclosure.
[0068] For example, when the crack C is removed only by polishing the front surface Wa, the amount of the front surface Wa polished in St13 is determined to be the depth H of the crack C. In addition, the amount of the front surface Wa etched is determined based on the required thickness E required for the first wafer W to be reused.
[0069] On the other hand, for example, when the crack C is removed by polishing and etching the surface Wa, the polishing amount and etching amount are determined in St13 so that the sum of the polishing amount and etching amount of the surface Wa becomes the depth H of the crack C. In such a case, the etching amount may be determined to be constant.
[0070] In addition, if multiple cracks C occur in the first wafer W, in St11, whether the first wafer W can be reused is determined based on the maximum depth H, and further in St13, the amount of polishing and etching of the surface Wa is determined based on the maximum depth H.
[0071] Next, the first wafer W determined to be reusable in St12 is carried out from the inspection device 80 by the wafer transfer device 40, and is transferred to the FOUP F on the FOUP mounting table 20 via the transition stage 50 and the wafer transfer device 30. In this way, the processing in the first processing system 2 is completed.
[0072] Next, a description will be given of wafer processing in the second processing system 3. In the second processing system 3, the front surface Wa of the first wafer W that has been separated in the first processing system 2 and determined to be reusable is polished and etched.
[0073] In the second processing system 3 , first, the FOUP F storing a plurality of first wafers W is placed on the FOUP placement table 130 of the transfer station 120 .
[0074] Next, the first wafer W is removed from the FOUP F by the wafer transfer device 140 and transferred to the transition stage 160. The first wafer W is then transferred to the polishing device 170 by the wafer transfer device 150. In the polishing device 170, the front surface Wa of the first wafer W is polished (St14 in FIG. 5 ). In St14, the polishing amount determined in St13 is output from the control device 192 to the control device 191, and the control device 191 controls the polishing device 170, so that the front surface Wa is polished based on the polishing amount.
[0075] Next, the first wafer W whose front surface Wa has been polished is transferred by the wafer transfer device 150 to the etching device 180. In the etching device 180, the front surface Wa of the first wafer W is etched (St15 in FIG. 5 ). In St15, the etching amount determined in St13 is output from the control device 192 to the control device 191, and the control device 191 controls the etching device 180, so that the front surface Wa is etched based on the etching amount.
[0076] The cracks C generated on the front surface Wa of the first wafer W are removed by polishing in St14 and etching in St15. As a removal method, there are two patterns, as described above.
[0077] In the first pattern, a crack C generated on the surface Wa as shown in Fig. 11(a) is removed by polishing the surface Wa in St14 as shown in Fig. 11(b). That is, the polished surface Q1 is located at the bottom end of the crack C or below the bottom end of the crack C. Thereafter, the surface Wa is etched down to an etching surface (final surface) R1 as shown in Fig. 11(c), and a new surface Wa is planarized.
[0078] In the second pattern, a crack C that has occurred on the surface Wa as shown in Fig. 12(a) is partially removed by polishing the surface Wa in St14 as shown in Fig. 12(b). That is, the polished surface Q2 is located above the lower end of the crack C. Thereafter, the surface Wa is etched up to an etching surface (final surface) R2 as shown in Fig. 12(c), thereby removing the remainder of the crack C and further planarizing a new surface Wa.
[0079] Next, the first wafer W whose front surface Wa has been etched is carried out of the etching apparatus 180 by the wafer transfer device 150, and is transferred to the FOUP F on the FOUP mounting table 130 via the transition stage 160 and the wafer transfer device 140. In this way, the processing in the second processing system 3 is completed, and the series of wafer processing in the wafer processing system 1 is also completed.
[0080] According to the above embodiment, in St10, cracks C occurring on the front surface Wa of the first wafer W are detected and the depth of the cracks C is calculated, and in St11, it is determined whether the first wafer W can be reused based on the calculated depth of the cracks C. Then, for the first wafer W determined to be reusable, the polishing amount and etching amount of the front surface Wa are determined in St13. In such a case, in St14, the front surface Wa is polished based on the determined polishing amount, and in St15, the front surface Wa is etched based on the determined etching amount, so that the polishing and etching can be optimized. Furthermore, because each of the multiple first wafers W to be reused is polished by an optimal polishing amount and etched by an optimal etching amount, the thickness of these first wafers W to be reused can be made uniform.
[0081] Here, in the past, when reusing a first wafer separated from an overlapping wafer, there was no method for determining the polishing amount and etching amount based on cracks. Therefore, for example, even if the surfaces of all first wafers were polished by a predetermined polishing amount and then etched by a predetermined etching amount, cracks could remain. Furthermore, it was not possible to address situations where the polishing amount and etching amount needed to be set according to the depth of the cracks was desired. In this regard, in the present embodiment, the polishing amount and etching amount can be appropriately determined based on the depth of the cracks C, and therefore, as described above, the polishing and etching can be optimized to uniformize the thickness of the first wafers W to be reused.
[0082] In this embodiment, in St13, the polishing amount and etching amount may be determined so that the crack C is removed by polishing only the surface Wa, or the polishing amount and etching amount may be determined so that the crack C is removed by polishing and etching the surface Wa.
[0083] 12 , when a portion of the crack C is removed by polishing the front surface Wa and then the remaining portion of the crack C is removed by etching the front surface Wa, the polishing amount and the etching amount may be the same for multiple first wafers W. For example, when it is determined that the crack C does not extend below the etching surface (final surface) R2, the polishing amount and the etching amount of the front surface Wa may be set in advance.
[0084] Furthermore, according to this embodiment, for the first wafer W determined to be unreusable in St11, it is determined not to perform subsequent polishing and etching in St12. This avoids unnecessary wafer processing, thereby improving the throughput of wafer processing. Furthermore, it also improves the yield of the first wafers W (product wafers) that are reused.
[0085] Furthermore, according to this embodiment, in St11, if the depth H of the crack C is greater than the reference value G, it is determined that the first wafer W in which the crack C occurred cannot be reused. At this time, it is possible to detect a defect in the laser processing in the laser irradiation device 90. As described above, the crack C occurs due to various factors, but is primarily caused by the laser processing. Therefore, in St12, in addition to determining not to perform polishing and etching, the laser processing may also be adjusted. For example, by adjusting the laser processing conditions, such as the output power and pulse interval of the laser light L, the subsequent laser processing of the overlapped wafer T can be performed appropriately.
[0086] If it is determined in St11 that the first wafer W cannot be reused, the control device 192 may issue an alarm (warning) and display it on a screen (not shown), etc. In such a case, the operator can adjust the laser processing described above based on the alarm.
[0087] Furthermore, when it is determined in St11 that the first wafer W cannot be reused, the calculation result of the depth H of the crack C may be output from the control device 192 to the laser irradiation device 90 via the control device 190. For example, if the relationship between the depth H of the crack C and the laser processing conditions, etc. is known in advance, the laser irradiation device 90 can automatically correct and set the laser processing conditions, etc. based on the calculation result of the depth H of the crack C.
[0088] Furthermore, according to this embodiment, in St6, the front surface Wa of the separated first wafer W is inspected to acquire an image of the front surface Wa, in St7, recesses on the front surface Wa are identified based on the acquired image, and further in St8, the recesses are estimated to be the occurrence positions of cracks C. In this case, in St10, it is sufficient to calculate the depth of the cracks C only at the estimated occurrence positions, and therefore the depth of the cracks C can be calculated efficiently.
[0089] Here, for example, as shown in FIG. 13 , multiple cracks C may occur in the first wafer W. FIG. 13 illustrates a case where two cracks C1 and C2 have occurred. In this case, two recesses are identified on the front surface Wa in St7, and the two recesses are estimated as the locations of the cracks C1 and C2 in St8. Furthermore, the depths H1 and H2 of the two cracks C1 and C2 are calculated in St10. Then, in St11, it is determined whether the first wafer W can be reused based on the larger depth H1 of the depths H1 and H2 of the cracks C1 and C2. Furthermore, in St13, the polishing amount and etching amount are determined based on the larger depth H1.
[0090] As described above, since the crack C is mainly generated due to the laser processing, the positions where the crack C is likely to occur on the first wafer W may be determined in advance. Specifically, the positions where the crack C is likely to occur are determined by prediction from past data acquired in advance, and the positions are stored in the control device 192 in association with the laser processing conditions. Then, in St10, the positions where the crack C is likely to occur stored in the control device 192 in correspondence with the laser processing conditions are read out, and the depth of the crack C at the positions where the crack C is likely to occur is calculated. In this example, the inspection of the surface Wa in St6, the identification of the recess in St7, and the estimation of the positions where the crack C is likely to occur in St8 can all be omitted. Furthermore, the inspection device 80 can also be omitted.
[0091] Alternatively, the entire surface Wa of the first wafer W may be inspected to detect cracks C on the entire surface Wa.
[0092] Furthermore, according to this embodiment, in St10, detection light is irradiated into the inside of the first wafer W from the back surface Wb side, and based on the light of the detection light reflected from the first wafer W, cracks C formed on the front surface Wa of the first wafer W are detected and the depth of the cracks C is calculated. The front surface Wa of the separated first wafer W may have irregularities. By inspecting the cracks C from the back surface Wb side in this manner, the depth of the cracks C can be appropriately calculated without being affected by the irregularities. Note that if the front surface Wa is not affected by the irregularities, the cracks C may be detected from the front surface Wa side. In such a case, the process of flipping the first wafer W from the front to back surface in St9 can be omitted.
[0093] Furthermore, for example, the laminated film formed on the front surface Wa of the first wafer W may include a protective film, a peeling-promoting film, or the like. The protective film is a film for protecting the front surface Wa of the first wafer W. The peeling-promoting film is a film for promoting peeling between the first wafer W and the laser absorbing layer P. The protective film or the peeling-promoting film is provided between the front surface Wa and the laser absorbing layer P. In such cases, the protective film or the peeling-promoting film remains on the front surface Wa of the first wafer W after separation. Also, the laser absorbing layer P may be broken to separate the first wafer W from the laminated wafer T, and in such cases, the broken laser absorbing layer P remains on the front surface Wa of the first wafer W. In either case, by inspecting the crack C from the back surface Wb side in St10, the depth of the crack C can be appropriately calculated without being hindered by the protective film or the peeling-promoting film, or the broken laser absorbing layer P.
[0094] In the above embodiment, the depth of the crack C calculated in St10 is output to the control device 192, and in St13 the control device 192 determines the polishing amount and etching amount of the surface Wa, and outputs the polishing amount and etching amount to the polishing device 170 and the etching device 180, respectively, via the control device 191. In this regard, the control device 71 may determine the polishing amount and etching amount of the surface Wa, and output the polishing amount and etching amount to the polishing device 170 and the etching device 180, respectively, via the control device 191. In other words, the exchange of data regarding the polishing amount and etching amount may be output to the control device 191 of the second processing system 3 from either the control device 192 or the control device 71.
[0095] The configuration of the wafer processing system 1 is not limited to the above embodiment. For example, the detection device 70 may be provided in the second processing system 3. Alternatively, the detection device 70 may be provided inside the separation device 110. Furthermore, for example, the inspection device 80 may be provided in the second processing system 3. Alternatively, as described above, the inspection device 80 may be omitted. Furthermore, for example, the first processing system 2 and the second processing system 3 may be configured as an integrated unit.
[0096] In the above embodiment, the laser light L is irradiated onto the laser absorption layer P formed between the first wafer W and the second wafer S, and the first wafer W is separated using the interface between the laser absorption layer P and the first wafer W as the separation surface. However, wafer processing to which the technology of the present disclosure is applied is not limited to this.
[0097] For example, the technology of the present disclosure can be applied to a case where the first wafer W is separated using, as a separation surface, an interface between the laser absorption layer P and the device layer Ds, an interface between the bonding layer Fs and the bonding layer Fw, or the like, instead of separating the first wafer W at the interface between the first wafer W and the laser absorption layer P. Furthermore, for example, the technology of the present disclosure can be applied to a case where the first wafer W is separated from the overlapped wafer T by breaking the laser absorption layer P.
[0098] Furthermore, for example, the technology disclosed herein can also be applied when laser light L is irradiated along the surface direction inside the first wafer W to form a modified surface, and the back surface Sb side is separated using the modified surface as a starting point to thin the first wafer W.
[0099] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims. For example, the components of the above-described embodiments may be arbitrarily combined. Such an arbitrary combination naturally provides the functions and effects of each of the components involved in the combination, and also provides other functions and effects that are apparent to those skilled in the art from the description of this specification.
[0100] Furthermore, the effects described in this specification are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that are apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.
[0101] REFERENCE SIGNS LIST 1 wafer processing system 70 detection device 90 laser irradiation device 110 separation device 71 control device 91 control device 190 control device 191 control device 192 control device 211 laser head 213 lens C crack L laser light S second wafer T overlapped wafer W first wafer
Claims
1. A substrate processing system for processing a laminated substrate formed by bonding a first substrate and a second substrate, comprising: a laser irradiation device including a laser head and a lens for irradiating laser light toward the laminated substrate; a separation device for separating the first substrate from the laminated substrate; and a detection device for detecting cracks that have occurred in the first substrate separated by the separation device and calculating the depth of the cracks.
2. The substrate processing system according to claim 1, wherein the detection device detects the crack from a surface of the first substrate opposite to the separation surface.
3. A substrate processing system as described in claim 1, further comprising a control device, which executes control to determine whether or not the separated first substrate can be reused based on the depth of the crack calculated by the detection device.
4. The substrate processing system according to claim 1, further comprising a control device, wherein the control device issues a warning when the depth of the crack calculated by the detection device is greater than a reference value.
5. A substrate processing system as described in claim 1, comprising: a surface processing device that processes the separated surface of the separated first substrate when the depth of the crack calculated by the detection device is equal to or less than a reference value; and a control device, wherein the control device executes control to determine the processing amount of the separated surface of the first substrate in the surface processing device based on the depth of the crack calculated by the detection device.
6. The substrate processing system of claim 5, wherein the surface processing device includes a polishing device that polishes the separation surface of the first substrate, and an etching device that etches the separation surface of the first substrate polished by the polishing device, and the control device executes control to polish the separation surface of the first substrate in the polishing device so as to remove the cracks until they disappear, and control to etch the separation surface of the first substrate in the etching device.
7. The substrate processing system of claim 5, wherein the surface processing device includes a polishing device that polishes the separation surface of the first substrate, and an etching device that etches the separation surface of the first substrate polished by the polishing device, and the control device executes control to polish the separation surface of the first substrate in the polishing device so as to remove a portion of the crack, and control to etch the separation surface of the first substrate in the etching device so as to remove a remainder of the crack.
8. The substrate processing system according to claim 5, comprising: a first processing system including the laser irradiation device and the separation device; and a second processing system including the surface processing device, wherein the detection device is provided in at least one of the first processing system and the second processing system.
9. A substrate processing system as described in claim 1, comprising an inspection device that images and inspects the separation surface of the separated first substrate, and a control device, wherein the control device performs the following controls: identifying an abnormal portion on the separation surface from the image captured by the inspection device and estimating the abnormal portion as the location where the crack occurred; and calculating the depth of the crack at the location where the crack occurred in the detection device.
10. The substrate processing system according to claim 9, wherein the abnormal portion is a recess, and the control device executes control to cause the detection device to calculate the depth of the crack in the recess that has the deepest depth.
11. A substrate processing system as described in claim 1, comprising a control device which performs the following control: determining a position where the crack is likely to occur on the separation surface of the separated first substrate according to laser processing conditions; and calculating the depth of the crack at the position where the crack is likely to occur in the detection device.
12. A substrate processing method for processing a laminated substrate formed by bonding a first substrate and a second substrate, comprising: irradiating a laser beam along the surface direction of the laminated substrate to form a separation surface; separating the first substrate from the laminated substrate using the separation surface as a base point; and detecting cracks generated on the separation surface of the first substrate and calculating the cracks.
13. The substrate processing method according to claim 12, further comprising: determining whether or not the separated first substrate can be reused based on the calculated depth of the crack.
14. The substrate processing method according to claim 12, further comprising performing at least one of polishing and etching of the separated surface of the separated first substrate when the calculated crack depth is equal to or less than a reference value.
15. The substrate processing method according to claim 14, further comprising determining a processing amount of the separation surface of the first substrate based on the calculated depth of the crack.
16. The method of claim 14, further comprising: polishing the parted surface of the first substrate to remove the cracks until the cracks are eliminated; and etching the parted surface of the first substrate.
17. The substrate processing method of claim 14, comprising: polishing the separation surface of the first substrate to remove a portion of the crack; and etching the separation surface of the first substrate to remove a remainder of the crack.
18. A substrate processing method as described in claim 12, comprising: imaging and inspecting the separation surface of the first substrate; identifying an abnormal portion on the separation surface from the captured image and estimating that the abnormal portion is the location where the crack occurred; and calculating the depth of the crack at the location where the crack occurred.
19. The substrate processing method according to claim 18, wherein the abnormal portion is a recess, and further comprising calculating the depth of the crack in the recess having the deepest depth.
20. The substrate processing method according to claim 12, comprising: determining a position on the separation surface where the crack is likely to occur in accordance with laser processing conditions; and calculating the depth of the crack at the position of occurrence.
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