Electronic apparatus having h5 bridge conversion function
By designing an electronic device that includes a resonant slot, transformer pairs, and a bridge conversion circuit, and utilizing control signal groups and transistor state switching, high-efficiency conversion over a wide output voltage range is achieved, with a load DC voltage gain of 1 to 6 times, thus solving the efficiency and voltage range problems of traditional converters.
Patent Information
- Application Number
- PCT/CN2024/112588
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-08-16
- Publication Date
- 2026-02-19
AI Technical Summary
Traditional LLC topologies require smaller magnetizing inductors and wider frequency modulation ranges to achieve a wide output voltage range, which increases copper losses and makes it difficult for switching elements to achieve zero-voltage switching, thus reducing converter efficiency. Asymmetric half-bridge converters are prone to transformer core magnetic saturation at high output power, making it difficult to achieve high power and ultra-wide output voltage range.
An electronic device comprising a first resonant tank, a second resonant tank, a transformer pair, and a bridge conversion circuit is employed. The voltage magnitude of the primary side square wave signal is changed by a control signal group. The square wave signal is converted into a secondary side square wave signal by the transformer pair and then converted into a load DC voltage by a rectifier circuit. The bridge conversion circuit changes the magnitude of the load DC voltage according to the control signal group and, combined with the on and off states of the transistors in different modes, expands the voltage range.
It achieves high-efficiency conversion over a wide output voltage range, with a load DC voltage gain of 1 to 6 times, improving the converter's efficiency and power density, and solving the shortcomings of traditional converters in terms of voltage range and efficiency.
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Figure CN2024112588_19022026_PF_FP_ABST
Abstract
Description
Electronic device with H5 bridge conversion function TECHNICAL FIELD
[0001] The present application relates to an electronic device, in particular to an electronic device with H5 bridge conversion function. BACKGROUND
[0002] Conventional LLC topology requires small magnetizing inductance and wide frequency modulation range when implementing wide output voltage range. Small magnetizing inductance will cause large magnetizing current and increase copper loss. Wide frequency modulation range will make it difficult for switching elements to achieve zero voltage switching. The above conditions will reduce the conversion efficiency of the converter, and it is difficult to achieve the required voltage range by relying on the conventional LLC resonant converter topology.
[0003] Asymmetrical half-bridge converter (AHB) is suitable for wide output voltage range, but because the transformer magnetizing current has a direct current component, when operating at high output power, it is easy to cause the transformer core to be saturated, making it difficult to achieve high power conversion for this architecture. Some AHB converters are improved for high power operation, but it is difficult to achieve the condition of ultra-wide output voltage range.
[0004] Resonant converters are used in wide range operations, and some studies make the secondary side have both voltage doubling and rectification functions, and switch each other to increase the output voltage range. However, this architecture can only provide a two-fold voltage range.
[0005] SUMMARY
[0006] The electronic device according to an embodiment of the present application includes a first resonant tank, a second resonant tank, a transformer pair, a rectification circuit, and a bridge conversion circuit. The transformer pair is electrically connected to the first resonant tank and the second resonant tank. The rectification circuit is electrically connected to the transformer pair. The bridge conversion circuit includes a first node, a second node, and a third node. The first node is electrically connected to the first resonant tank, the second node is electrically connected to the second resonant tank, and the third node is electrically connected to the transformer pair. The bridge conversion circuit corresponds to output a primary side square wave signal to at least one of the first resonant tank and the second resonant tank according to a control signal group. The transformer pair converts the primary side square wave signal into a secondary side square wave signal. The rectification circuit converts the secondary side square wave signal into a load DC voltage. The bridge conversion circuit corresponds to change the size of the load DC voltage according to the control signal group.
[0007] The electronic device as described above, the transformer pair includes a first transformer and a second transformer. The first transformer is electrically connected to the first resonant tank. The second transformer is electrically connected to the second resonant tank. The primary side ends of the first transformer and the second transformer are commonly electrically connected to the third node. The turns ratio of the second transformer is different from the turns ratio of the first transformer.
[0008] The electronic device as claimed in the above, the first resonance tank comprises a first inductor and a first capacitor. The first inductor is electrically connected to the first transformer. The first capacitor is electrically connected in series between the first inductor and the first node. The first inductor and the first capacitor change the voltage of the primary side square wave signal according to the input frequency of the signals in the control signal group.
[0009] The electronic device as claimed in the above, the second resonance tank comprises a second inductor and a second capacitor. The second inductor is electrically connected to the first transformer. The second capacitor is electrically connected in series between the second inductor and the second node. The second inductor and the second capacitor change the voltage of the primary side square wave signal according to the input frequency of the signals in the control signal group.
[0010] The electronic device as claimed in the above, the bridge conversion circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor is electrically connected between the positive terminal of the input power supply and the first node. The second transistor is electrically connected between the positive terminal of the input power supply and the third node. The third transistor is electrically connected between the second node and the negative terminal of the input power supply. The fourth transistor is electrically connected between the third node and the negative terminal of the input power supply. The fifth transistor is electrically connected between the first node and the second node. The control signal group is used to control the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor respectively.
[0011] The electronic device as claimed in the above, the bridge conversion circuit operates in the first mode, the second mode, the third mode, the fourth mode, the fifth mode, or the sixth mode according to the control signal group.
[0012] The electronic device as claimed in the above, when the bridge conversion circuit operates in the first mode, the control signal group makes the third transistor and the fourth transistor keep in the conducting state, the second transistor keeps in the cut-off state, and the first transistor and the fifth transistor respectively receive the first modulation control signal and the second modulation control signal. The first modulation control signal is complementary to the second modulation control signal.
[0013] The electronic device as claimed in the above, when the bridge conversion circuit operates in the second mode, the control signal group makes the first transistor and the second transistor keep in the conducting state, the fourth transistor keeps in the cut-off state, and the third transistor and the fifth transistor respectively receive the first modulation control signal and the second modulation control signal. The first modulation control signal is complementary to the second modulation control signal.
[0014] The electronic device as claimed in the above, when the bridge conversion circuit operates in the third mode, the control signal group makes the first transistor and the third transistor keep in the conducting state, the fifth transistor keeps in the cut-off state, and the second transistor and the fourth transistor respectively receive the first modulation control signal and the second modulation control signal. The first modulation control signal is complementary to the second modulation control signal. The electronic device as claimed in the above, when the bridge conversion circuit operates in the third mode, the control signal group makes the first transistor and the third transistor keep in the conducting state, the fifth transistor keeps in the cut-off state, and the second transistor and the fourth transistor respectively receive the first modulation control signal and the second modulation control signal. The first modulation control signal is complementary to the second modulation control signal.
[0015] As the electronic device described above, when the bridge conversion circuit operates in the fourth mode, the control signal group causes the third transistor to remain in the on state, the first transistor and the fourth transistor to receive the first modulation control signal, and the second transistor and the fifth transistor to receive the second modulation control signal. The first modulation control signal is complementary to the second modulation control signal.
[0016] As the electronic device described above, when the bridge conversion circuit operates in the fifth mode, the control signal group causes the first transistor to remain in the on state, the fourth transistor and the fifth transistor to receive the first modulation control signal, and the second transistor and the third transistor to receive the second modulation control signal. The first modulation control signal is complementary to the second modulation control signal.
[0017] As the electronic device described above, when the bridge conversion circuit operates in the sixth mode, the control signal group causes the fifth transistor to remain in the on state, the first transistor and the fourth transistor to receive the first modulation control signal, and the second transistor and the third transistor to receive the second modulation control signal. The first modulation control signal is complementary to the second modulation control signal.
[0018] As the electronic device described above, the first resonant tank and the second resonant tank change the voltage of the primary-side square wave signal according to the input duty cycle of the signals in the control signal group.
[0019] As the electronic device described above, the first modulation control signal and the second modulation control signal are frequency modulation control signals.
[0020] As the electronic device described above, when the frequency of the first modulation control signal and the second modulation control signal is less than or equal to a preset frequency, the first modulation control signal and the second modulation control signal are frequency modulation control signals; when the frequency of the first modulation control signal and the second modulation control signal is greater than the preset frequency, the first modulation control signal and the second modulation control signal are pulse width modulation control signals. BRIEF DESCRIPTION OF DRAWINGS
[0021] FIG. 1 is a schematic diagram of an electronic device 100 according to an embodiment of the present application.
[0022] FIG. 2A is a schematic diagram of the electronic device 100 operating in a first mode according to an embodiment of the present application.
[0023] FIG. 2B is a schematic diagram of the electronic device 100 operating in a second mode according to an embodiment of the present application.
[0024] FIG. 2C is a schematic diagram of the electronic device 100 operating in a third mode according to an embodiment of the present application.
[0025] FIG. 2D is a schematic diagram of the electronic device 100 operating in a fourth mode according to an embodiment of the present application.
[0026] FIG. 2E is a schematic diagram of the electronic device 100 operating in a fifth mode, according to an embodiment of the present application.
[0027] FIG. 2F is a schematic diagram of the electronic device 100 operating in a sixth mode, according to an embodiment of the present application.
[0028] FIG. 3 is a graph of gain versus frequency for the electronic device 100 operating in different modes, according to an embodiment of the present application.
[0029] FIG. 4 is a flowchart of a parameter design method for the electronic device 100, according to an embodiment of the present application.
[0030] FIG. 5 is a graph of efficiency versus output voltage for the electronic device 100 operating in frequency modulation, asymmetric control, and burst mode, according to an embodiment of the present application.
[0031] Reference Signs List: 100: electronic device 102: bridge conversion circuit 104: transformer pair 106: rectifier circuit V in : input power source Q p1 : first transistor Q p2 : second transistor Q p3 : third transistor Q p4 : fourth transistor Q p5 : fifth transistor RT1: first resonant tank RT2: second resonant tank T1, T2: transformer n1, n2: turns ratio a: first node b: second node c: third node d, e: node C r,1 ,C r,2 ,C s : capacitor L r,1 ,L r,2 ,L m,1 ,L m,2 : inductor Q s1 ,Q s2 ,Q s3 ,Q s4 : transistor I in ,i Lr1 ,i Lr2 ,i Lm,1 ,i Lm,2 ,i s ,I Load : current R Load : load resistance V Load : load DC voltage 300, 302, 304, 306, 308, 310: curves Mode 1: first mode Mode 2: second mode Mode 3: third mode Mode 4: fourth mode Mode 5: fifth mode Mode 6: sixth mode G max : maximum gain G min: minimum gain S400, S402, S404, S406, S408: steps 500, 502, 504: curve DETAILED DESCRIPTION
[0032] Reference will now be made in detail to the exemplary embodiments of the present application, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
[0033] FIG. 1 is a schematic diagram of an electronic device 100 according to an embodiment of the present application. As shown in FIG. 1, the electronic device 100 includes a first resonant tank RT1, a second resonant tank RT2, a transformer pair 104, a rectifier circuit 106, and a bridge conversion circuit 102. In some embodiments, the first resonant tank RT1 and the second resonant tank RT2 are electrically connected between the bridge conversion circuit 102 and the transformer pair 104. The rectifier circuit 106 is electrically connected to the transformer pair 104. The rectifier circuit 106 is electrically connected to a load resistor R Load . The bridge conversion circuit 102 includes a first node a, a second node b, and a third node c. The first node a is electrically connected to the first resonant tank RT1, the second node b is electrically connected to the second resonant tank RT2, and the third node c is electrically connected to the transformer pair 104.
[0034] In some embodiments, the bridge conversion circuit 102 corresponds to output a primary-side square wave signal to at least one of the first resonant tank RT1 and the second resonant tank RT2 according to a control signal set. The control signal set is used to control a plurality of switching elements included in the bridge conversion circuit 102. The transformer pair 104 converts the primary-side square wave signal to a secondary-side square wave signal. The rectifier circuit 106 converts the secondary-side square wave signal to a load direct current voltage V Load . The bridge conversion circuit 102 corresponds to change a magnitude of the load direct current voltage V Load according to the control signal set. In detail, the transformer pair 102 includes a transformer T1 and a transformer T2. The transformer T1 is electrically connected to the first resonant tank RT1, and the transformer T2 is electrically connected to the second resonant tank RT2. Primary-side ends of the transformer T1 and the transformer T2 are commonly electrically connected to the third node c. In some embodiments, a turns ratio of the transformer T2 is different from a turns ratio of the transformer T1. For example, the turns ratio of the transformer T2 is twice the turns ratio of the transformer T1. For example, if the turns ratio of the primary-side end and the secondary-side end of the transformer T1 is N: 1, the turns ratio of the primary-side end and the secondary-side end of the transformer T2 is 2N: 1.
[0035] In the embodiment of FIG. 1, the first resonant tank RT1 includes an inductor L r,1 and a capacitor C r,1 . The inductor L r,1 is electrically connected to the transformer T1, and the capacitor C r,1Electrically connected in series with inductor L r,1 Between and the first node a. Inductance L r,1 and capacitor C r,1 The voltage magnitude of the primary side wave signal is changed according to the input frequency of the signal in the control signal group. The second resonant tank RT2 includes an inductor L. r,2 and capacitor C r,2 Inductor L r,2 Electrically connected transformer T2, capacitor C r,2 Electrically connected in series with inductor L r,2 And between the second node b. Similarly, the inductance L r,2 and capacitor C r,2 The voltage magnitude of the primary side wave signal is changed according to the input frequency of the signal in the control signal group. In some embodiments, the first resonant tank RT1 and the second resonant tank RT2 change the voltage magnitude of the primary side wave signal according to the input duty cycle of the signal in the control signal group.
[0036] In the embodiment of FIG1, the bridge switching circuit 102 includes a first transistor Q. p1 The second transistor Q p2 The third transistor Q p3 The fourth transistor Q p4 and the fifth transistor Q p5 The first transistor Q p1 Electrically connected to the input power supply V in Between the positive terminal and the first node a. The second transistor Q. p2 Electrically connected to the input power supply V in Between the positive terminal and the third node c. The third transistor Q. p3 Electrically connected to the second node b and the input power supply V in Between the negative terminals. The fourth transistor Q. p4 Electrically connected to the third node c and the input power supply V in Between the negative terminals. The fifth transistor Q. p5 Electrically connected between the first node a and the second node b. The control signal group is used to control the first transistor Q respectively. p1 The second transistor Q p2 The third transistor Q p3 The fourth transistor Q p4 and the fifth transistor Q p5 For example, the control signal group includes a first control signal, a second control signal, a third control signal, a fourth control signal, and a fifth control signal. Each of the first, second, third, fourth, and fifth control signals may be, for example, a low-level voltage, a high-level voltage, a frequency-modulated control signal, or a pulse-width modulated control signal.
[0037] In detail, the bridge switching circuit 102 operates in a first mode, a second mode, a third mode, a fourth mode, a fifth mode, or a sixth mode according to the control signal group. Figure 2A is a schematic diagram of the electronic device 100 operating in the first mode according to an embodiment of the present invention. As shown in Figure 2A, when the bridge switching circuit 102 operates in the first mode, the control signal group causes the third transistor Q to... p3 and the fourth transistor Q p4 The second transistor Q remains in the ON state. p2 The first transistor Q remains in the off state. p1 and the fifth transistor Q p5 The system receives a first modulation control signal and a second modulation control signal, respectively. The first modulation control signal is complementary to the second modulation control signal. For example, when the first modulation control signal is at a low voltage level in a square wave signal, the second modulation control signal is at a high voltage level in a square wave signal. When the bridge switching circuit 102 operates in the first mode, the voltage V between the first node a and the third node c at both ends of the first resonant slot RT1 is... ac Voltage +V in A square wave signal composed of zero voltage. The voltage V between the third node c and the second node b at both ends of the second resonant slot RT2. cb Because the third transistor Q p3 and the fourth transistor Q p4 Conducting and short-circuiting to the input power supply V in The negative terminal, voltage V cb The voltage is zero. Therefore, the bridge switching circuit 102 operating in the first mode is equivalent to the first resonant slot RT1 operating in the half-bridge LLC operating mode. In some embodiments, the first modulation control signal and the second modulation control signal may be, for example, frequency modulation control signals, but the invention is not limited thereto.
[0038] When the first resonant slot RT1 operates in half-bridge LLC mode, the input power supply V in Provide current I in And according to the first transistor Q p1 and the fifth transistor Q p5 The alternating switching generates a flow from the first node a through the capacitor C in the first resonant slot RT1. r,1 and inductor L r,1 current i Lr1 and the current flowing through inductor L m,1 current i Lm,1 The primary winding of transformer T1 induces a current i. Lm,1 This causes a corresponding current i to be generated in the secondary winding of transformer T1. s The rectifier circuit 106 includes transistor Q. s1 Transistor Q s2, transistor Q s3 , and transistor Q s4 . Transistor Q s1 is electrically connected to the secondary side coil of transformer Tl through node d. Transistor Q s3 is electrically connected to node d. Transistor Q s2 is electrically connected to node e and transistor Q s1 . Transistor Q s4 is electrically connected to the secondary side coil of transformer T2 through node e. Current i s flows through transistor Q s1 , transistor Q s2 , transistor Q s3 , and transistor Q s4 after rectification. Current I Load is generated. Current I Load flows through load resistor R Load , generating load DC voltage V Load . Electronic device 100 further includes capacitor C s , which is connected in parallel to load resistor R Load , and has a voltage stabilizing function. When bridge conversion circuit 102 operates in the first mode, the normalized gain of load DC voltage V Load may be, for example, 1. In some embodiments, inductance L m,1 corresponds to the equivalent inductance of transformer Tl, or the magnetizing inductance of transformer Tl.
[0039] Fig. 2B is a schematic diagram of electronic device 100 operating in the second mode, according to an embodiment of the present application. As shown in Fig. 2B, when bridge conversion circuit 102 operates in the second mode, the control signal group causes first transistor Q p1 and second transistor Q p2 to remain in the on state, fourth transistor Q p4 to remain in the off state, and third transistor Q p3 and fifth transistor Q p5 to receive first modulated control signal and second modulated control signal, respectively. First modulated control signal is complementary to second modulated control signal. First modulated control signal is complementary to second modulated control signal. For example, when first modulated control signal is at the voltage high level in a square wave signal, second modulated control signal is at the voltage low level in the square wave signal. When bridge conversion circuit 102 operates in the second mode, voltage V ac between first node a and third node c across first resonant tank RTl. Because first transistor Q p1 and second transistor Q p2 are on and shorted to the positive terminal of input power source V in , voltage V acis zero voltage. The voltage V cb between the third node c and the second node b across the second resonant tank RT2 is voltage +V in comprises a square wave signal with zero voltage. Therefore, the operation of the bridge conversion circuit 102 in the second mode is equivalent to the operation of the second resonant tank RT2 in the half-bridge LLC mode.
[0040] When the second resonant tank RT2 operates in the half-bridge LLC mode, the input power V in provides a current I in , and the alternating switching of the third transistor Q p3 and the fifth transistor Q p5 generates a current i r,2 flowing through the capacitor C r,2 and the inductor L Lr2 in the second resonant tank RT2, and a current i m,2 flowing through the inductor L Lm,2 . The primary side coil of the transformer T1 induces a current i Lm,2 , so that the secondary side coil of the transformer T1 generates a corresponding current i s . After the rectification of the current i s by the transistor Q s1 , the transistor Q s2 , the transistor Q s3 , and the transistor Q s4 , the current flows through the load resistor R Load , and generates a load DC voltage V Load . When the bridge conversion circuit 102 operates in the second mode, the normalized gain of the load DC voltage V Load may be, for example, 2 times. In some embodiments, the inductor L m,2 is the equivalent inductance corresponding to the transformer T2, or the excitation inductance of the transformer T2.
[0041] Fig. 2C is a schematic diagram of the electronic device 100 operating in a third mode according to an embodiment of the present application. As shown in Fig. 2C, when the bridge conversion circuit 102 operates in the third mode, the control signal group causes the first transistor Q p1 and the third transistor Q p3 to remain in the conducting state, the fifth transistor Q p5 to remain in the non-conducting state, and the second transistor Q p2 and the fourth transistor Q p4 to receive the first modulation control signal and the second modulation control signal, respectively. The first modulation control signal is complementary to the second modulation control signal. For example, when the first modulation control signal is at the voltage low level in the square wave signal, the second modulation control signal is at the voltage high level in the square wave signal. When the bridge conversion circuit 102 operates in the third mode, and the second transistor Q p2Turning on and the fourth transistor Q p4 At cutoff, the voltage V between the first node a and the third node c at both ends of the first resonant slot RT1 is... ac Because the first transistor Q p1 Second transistor Q p2 Conducting and short-circuiting to the input power supply V in The positive terminal, voltage V ac The voltage is zero. The voltage V between the third node c and the second node b at both ends of the second resonant slot RT2 is zero. cb Voltage +V in .
[0042] When the bridge converter circuit 102 operates in the third mode, and the fourth transistor Q p4 On and second transistor Q p2 At cutoff, the voltage V between the third node c and the second node b at both ends of the second resonant slot RT2 is... cb Because the third transistor Q p3 and the fourth transistor Q p4 Conducting and short-circuiting to the input power supply V in The negative terminal, voltage V cb The voltage is zero. The voltage V between the first node a and the third node c at both ends of the first resonant slot RT1 is zero. ac Voltage +V in Therefore, the bridge switching circuit 102 operating in the third mode is equivalent to the first resonant slot RT1 and the second resonant slot RT2 operating simultaneously in the half-bridge LLC working mode.
[0043] When the first resonant slot RT1 and the second resonant slot RT2 operate simultaneously in half-bridge LLC mode, the input power supply V in Provide current I in And according to the second transistor Q p2 and the fourth transistor Q p4 The alternating switching generates current flowing from the first node a through the capacitor C in the first resonant slot RT1. r,1 and inductor L r,1 current i Lr1 and the current flowing through inductor L m,1 current i Lm,1 And in the second resonant slot RT2, a flow from the second node b through the capacitor C is generated. r,2 and inductor L r,2 current i Lr2 and the current flowing through inductor L m,2 current i Lm,2 The primary winding of transformer T1 simultaneously induces a current i. Lm,1 Current i Lm,2 This causes a corresponding current i to be generated in the secondary winding of transformer T1. sThe current i s through transistor Q s1 , transistor Q s2 , transistor Q s3 , and transistor Q s4 is rectified and flows through load resistor R Load , generating load DC voltage V Load When the bridge conversion circuit 102 operates in the third mode, the normalized gain of the load DC voltage V Load may be, for example, 3 times.
[0044] Fig. 2D is a schematic diagram of the electronic device 100 operating in a fourth mode according to an embodiment of the present application. As shown in Fig. 2D, when the bridge conversion circuit 102 operates in the fourth mode, the control signal set causes the third transistor Q p3 to remain in the on state, the first transistor Q p1 and the fourth transistor Q p4 receive the first modulated control signal, and the second transistor Q p2 and the fifth transistor Q p5 receive the second modulated control signal. The first modulated control signal is complementary to the second modulated control signal. When the bridge conversion circuit 102 operates in the fourth mode and the first transistor Q p1 and the fourth transistor Q p4 are on, but the second transistor Q p2 and the fifth transistor Q p5 are off, the voltage V ac between the first node a and the third node c across the first resonant tank RT1 is +V in , and the voltage V cb between the third node c and the second node b across the second resonant tank RT2 is zero voltage.
[0045] When the bridge conversion circuit 102 operates in the fourth mode and the second transistor Q p2 and the fifth transistor Q p5 are on, but the first transistor Q p1 and the fourth transistor Q p4 are off, the voltage V ac between the first node a and the third node c across the first resonant tank RT1 is -V in , and the voltage V cb between the third node c and the second node b across the second resonant tank RT2 is +V in . Therefore, the bridge conversion circuit 102 operating in the fourth mode is equivalent to the first resonant tank RT1 operating in the full-bridge LLC mode and the second resonant tank RT2 operating in the half-bridge LLC mode simultaneously. When the bridge conversion circuit 102 operates in the fourth mode, the load DC voltage V LoadThe normalized gain of the load DC voltage V Load may be, for example, 4 times.
[0046] Fig. 2E is a schematic diagram of the electronic device 100 operating in a fifth mode, according to an embodiment of the present application. As shown in Fig. 2E, when the bridge conversion circuit 102 operates in the fifth mode, the set of control signals causes the fifth transistor Q p1 to remain in the on state, the first transistor Q p4 and the fourth transistor Q p5 to receive a first modulated control signal, the second transistor Q p2 and the third transistor Q p3 to receive a second modulated control signal. The first modulated control signal is complementary to the second modulated control signal. When the bridge conversion circuit 102 operates in the fifth mode, and the fourth transistor Q p4 and the fifth transistor Q p5 are on, but the second transistor Q p2 and the third transistor Q p3 are off, the voltage V ac between the first node a and the third node c across the first resonant tank RT1 is a voltage +V in , and the voltage V cb between the third node c and the second node b across the second resonant tank RT2 is a voltage -V in .
[0047] When the bridge conversion circuit 102 operates in the fifth mode, and the second transistor Q p2 and the third transistor Q p3 are on, but the fourth transistor Q p4 and the fifth transistor Q p5 are off, the voltage V ac between the first node a and the third node c across the first resonant tank RT1 is zero voltage, and the voltage V cb between the third node c and the second node b across the second resonant tank RT2 is a voltage +V in . Thus, the bridge conversion circuit 102 operating in the fifth mode is equivalent to the first resonant tank RT1 operating in the half-bridge LLC mode and the second resonant tank RT2 operating in the full-bridge LLC mode simultaneously. When the bridge conversion circuit 102 operates in the fifth mode, the normalized gain of the load DC voltage V Load may be, for example, 5 times.
[0048] Fig. 2F is a schematic diagram of the electronic device 100 operating in a sixth mode, according to an embodiment of the present application. As shown in Fig. 2F, when the bridge conversion circuit 102 operates in the sixth mode, the set of control signals causes the fifth transistor Q p5 to remain in the on state, the first transistor Q p1 and the fourth transistor Q p4Receives the first modulation control signal, and the second transistor Q p2 and the third transistor Q p3 The second modulation control signal is received. The first modulation control signal is complementary to the second modulation control signal. When the bridge switching circuit 102 operates in the sixth mode, and the first transistor Q... p1 and the fourth transistor Q p4 The second transistor Q is turned on, but it is not. p2 and the third transistor Q p3 At cutoff, the voltage V between the first node a and the third node c at both ends of the first resonant slot RT1 is... ac Voltage +V in And the voltage V between the third node c and the second node b at both ends of the second resonant slot RT2 cb Voltage -V in .
[0049] When the bridge converter circuit 102 operates in the sixth mode, and the second transistor Q p2 and the third transistor Q p3 The transistor is on, but the first transistor Q is not. p1 and the fourth transistor Q p4 At cutoff, the voltage V between the first node a and the third node c at both ends of the first resonant slot RT1 is... ac Voltage -V in And the voltage V between the third node c and the second node b at both ends of the second resonant slot RT2 cb Voltage +V in Therefore, the bridge converter circuit 102 operating in the sixth mode is equivalent to the first resonant slot RT1 and the second resonant slot RT2 simultaneously operating in full-bridge LLC mode. When the bridge converter circuit 102 operates in the sixth mode, the load DC voltage V Load The normalized gain can be, for example, 6 times.
[0050] Table 1 shows the maximum and minimum output voltage gain of the bridge converter circuit 102 in each mode according to an embodiment of the present invention.
[0051] Table 1
[0052] As shown in Table 1, the maximum gain G 1,max This represents the maximum normalized gain that the first resonant slot RT1 can provide. Minimum gain G 1,min This represents the minimum normalized gain that the first resonant slot RT1 can provide. Maximum gain G 2,max This represents the maximum normalized gain that the second resonant slot RT2 can provide. Minimum gain G 2,minrepresent the minimum normalized gain that can be provided by the second resonant tank RT2. The turns ratio n1 is the turns ratio of the primary side to the secondary side of transformer T1. The turns ratio n2 is the turns ratio of the primary side to the secondary side of transformer T2. The bridge converter circuit 102 of the present application uses pulse frequency modulation control to vary the resonant tank AC impedance by adjusting the operating frequency at a fixed pulse width to achieve the effect of output voltage (i.e. load DC voltage V Load ) regulation.
[0053] Figure 3 is a graph of the gain versus frequency of the electronic device 100 operating in different modes according to an embodiment of the present application. As shown in Figure 3, the maximum normalized gain of the electronic device 100 operating in different modes is 8.4 and the minimum normalized gain is 0.7. In detail, curve 300 is the gain versus frequency of the bridge converter circuit 102 operating in the first mode (Mode 1). Curve 302 is the gain versus frequency of the bridge converter circuit 102 operating in the second mode (Mode 2). Curve 304 is the gain versus frequency of the bridge converter circuit 102 operating in the third mode (Mode 3). Curve 306 is the gain versus frequency of the bridge converter circuit 102 operating in the fourth mode (Mode 4). Curve 308 is the gain versus frequency of the bridge converter circuit 102 operating in the fifth mode (Mode 5). Curve 310 is the gain versus frequency of the bridge converter circuit 102 operating in the sixth mode (Mode 6). In other words, the maximum normalized gain (e.g. 8.4) of the electronic device 100 operating in different modes is derived from the bridge converter circuit 102 operating in the sixth mode, and the minimum normalized gain (0.7) of the electronic device 100 operating in different modes is derived from the bridge converter circuit 102 operating in the first mode.
[0054] As shown in Figure 3, when the bridge converter circuit 102 operates in the first mode, the maximum gain of the electronic device 100 is G max 1.25 and the minimum gain is G min 0.7. When the bridge converter circuit 102 operates in the second mode, the maximum normalized gain of the electronic device 100 is G max 2.5 and the minimum normalized gain is G min 1.25. When the bridge converter circuit 102 operates in the third mode, the maximum normalized gain of the electronic device 100 is G max 3.9 and the minimum normalized gain is G min 2.5. When the bridge converter circuit 102 operates in the fourth mode, the maximum normalized gain of the electronic device 100 is G max 5 and the minimum normalized gain is G minGmax= 3.9. When the bridge conversion circuit 102 operates in the fifth mode, the maximum normalized gain of the electronic device 100 is G max Gmin= 6. The minimum normalized gain is G min Gmax= 5. When the bridge conversion circuit 102 operates in the sixth mode, the maximum normalized gain of the electronic device 100 is G max Gmin= 8.4. The minimum normalized gain is G min Gmax= 6.
[0055] Fig. 4 is a flowchart of a parameter design method of the electronic device 100 according to an embodiment of the present application. As shown in Fig. 4, the present application first sets the resonance frequencies f r1 of the first resonant tank RT1 and the second resonant tank RT2 (step S400). Next, the present application sets the turns ratio n1 of the transformer T1 and the turns ratio n2 of the transformer T2 (step S402). Then, the present application calculates the magnetizing inductance L m of the transformer T1 and the transformer T2 (step S404). The present application then sets the inductance ratio K and the quality factor Q (step S406). Finally, in step S408, the present application determines whether the electronic device 100 can achieve the required output voltage (e.g., the load DC voltage V Load ) within the operating frequency range. If the output voltage can be achieved within the operating frequency range, the present application ends the parameter design flow. If the output voltage cannot be achieved within the operating frequency range, the present application returns to step S406, i.e., the inductance ratio K and the quality factor Q are re-set until the output voltage can be achieved within the operating frequency range. In some embodiments, the operating frequency range can be, for example, 300 ± 60 kilohertz (KHz), but the present application is not limited thereto.
[0056] FIG. 5 is a graph of efficiency versus output voltage for the electronic device 100 of an embodiment of the present application operating in frequency modulation, asymmetric control, and burst mode. As shown in FIG. 5, curve 502 is a graph of efficiency versus output voltage for the electronic device 100 operating in frequency modulation with the first modulation control signal and a second modulation control signal. Curve 500 is a graph of efficiency versus output voltage for the electronic device 100 operating in burst mode with the first modulation control signal and a second modulation control signal. Curve 504 is a graph of efficiency versus output voltage for the electronic device 100 operating in asymmetric control with the first modulation control signal and a second modulation control signal. In some embodiments, the electronic device 100 of the present application uses asymmetric control with a fixed operating frequency plus duty cycle modulation (pulse width modulation) to vary the effective voltage across the first resonant tank RT1 and the second resonant tank RT2 to adjust the output voltage gain when the electronic device 100 is adjusted for output voltage gain with a fixed duty cycle of 0.5 plus frequency modulation. Conventional resonant converters increase the operating frequency range to achieve a wide range of voltage gain and increase the operating frequency to reduce the voltage gain to achieve low voltage output.
[0057] However, when the operating frequency is far from the resonant frequency, it is not only difficult to change the voltage gain, but also reduces the circuit efficiency. In order to reduce the voltage gain, the burst mode is also a commonly used control method, but it needs accurate execution of voltage feedback and is relatively complex in program programming. Based on the above, when the frequency modulation of the electronic device 100 is to the specified frequency, the program writing of the asymmetric control is rewritten to reduce the voltage gain, so that in the case of obtaining the same output voltage, the asymmetric control method can obtain higher efficiency than the frequency modulation and the burst mode. For example, since the voltage gain changes little after the operating frequency is higher than 360KHz, the electronic device 100 of the present application changes to asymmetric control after frequency modulation to 360KHz, that is, adjusts the duty cycle (i.e. pulse width), but the present application is not limited thereto. For example, when the frequency of the first modulation control signal and the second modulation control signal in the electronic device 100 is less than or equal to a predetermined frequency, the first modulation control signal and the second modulation control signal are frequency modulation control signals. When the frequency of the first modulation control signal and the second modulation control signal in the electronic device 100 is greater than the predetermined frequency, the first modulation control signal and the second modulation control signal are pulse width modulation control signals (at this time the frequency is fixed). For example, when the electronic device 100 uses asymmetric control, the bridge conversion circuit 102 outputs a primary side square wave signal with a duty cycle of A to the first resonant tank RT1, but outputs a primary side square wave signal with a duty cycle of B to the second resonant tank RT2. In some embodiments, the duty cycle A is less than the duty cycle B, but the present application is not limited thereto. In some embodiments, the present application adjusts the duty cycle of the control signal group input to each transistor in the bridge conversion circuit 102 using a proportional integral (PI) controller, but the present application is not limited thereto. Each transistor in the bridge conversion circuit 102 may, for example, be an N-type metal oxide semiconductor field effect transistor (MOSFET), but the present application is not limited thereto.
[0058] While the present disclosure has been described above with reference to specific embodiments thereof, it is to be understood that the above description is not intended to limit the application. Various modifications thereof will be apparent to those skilled in the art without departing from the scope and spirit of the present disclosure. Accordingly, the scope and spirit of the present disclosure are to be defined by the following claims and their equivalents. Although the present disclosure has been described with one or more implementations, one skilled in the art will be able to make modifications and variations in form and details without departing from the scope and spirit of the described implementations. In their inventor's intent to ensure that the present disclosure fully covers all of the generic equivalents of the implementations described and their equivalents, it is intended that the scope of the present disclosure should not be limited by the above description but should be defined by the following claims and their equivalents. Furthermore, although a particular feature of the present disclosure has been described with reference to a number of implementations, the feature can be combined with one or more other features to form possible implementations of the present disclosure, as can be desired and advantageous for any given or particular application.
[0059] The terminology used in the description herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used in this description and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, to the extent that the terms "including", "contains", "containing", "have", "has", "having", or variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term "comprising"
Claims
1. An electronic device, comprising: a first resonant tank; a second resonant tank; a transformer pair electrically connected to the first resonant tank and the second resonant tank; a rectifier circuit electrically connected to the transformer pair; a bridge converter circuit comprising a first node, a second node, and a third node, wherein the first node is electrically connected to the first resonant tank, the second node is electrically connected to the second resonant tank, and the third node is electrically connected to the transformer pair; the bridge converter circuit is configured to output a primary side square wave signal to at least one of the first resonant tank and the second resonant tank according to a control signal set, wherein the transformer pair is configured to convert the primary side square wave signal to a secondary side square wave signal; the rectifier circuit is configured to convert the secondary side square wave signal to a load DC voltage; wherein the bridge converter circuit is configured to vary the load DC voltage according to the control signal set. 2.The electronic device of claim 1, wherein, the transformer pair comprises: a first transformer electrically connected to the first resonant tank; a second transformer electrically connected to the second resonant tank; wherein a primary side end of the first transformer and a primary side end of the second transformer are commonly electrically connected to the third node; wherein a turns ratio of the second transformer is different from a turns ratio of the first transformer. 3.The electronic device of claim 2, wherein, the first resonant tank comprises: a first inductor electrically connected to the first transformer; a first capacitor electrically connected in series between the first inductor and the first node; wherein the first inductor and the first capacitor are configured to vary a voltage of the primary side square wave signal according to an input frequency of signals in the control signal set. 4.The electronic device of claim 3, wherein, the second resonant tank comprises: a second inductor electrically connected to the second transformer; a second capacitor electrically connected in series between the second inductor and the second node; wherein the second inductor and the second capacitor are configured to vary a voltage of the primary side square wave signal according to an input frequency of signals in the control signal set. 5.The electronic device of claim 1, wherein, the bridge converter circuit comprises: a first transistor electrically connected between a positive terminal of an input power supply and the first node; a second transistor electrically connected between the positive terminal of the input power supply and the third node; a third transistor electrically connected between the second node and a negative terminal of the input power supply; a fourth transistor electrically connected between the third node and the negative terminal of the input power supply; and a fifth transistor electrically connected between the first node and the second node; wherein the control signal set is configured to control the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor, respectively. 6.The electronic device of claim 5, wherein, the bridge converter circuit is configured to operate in a first mode, a second mode, a third mode, a fourth mode, a fifth mode, or a sixth mode according to the control signal set. 7.The electronic device of claim 6, wherein, when the bridge converter circuit operates in the first mode, the control signal set is configured to keep the third transistor and the fourth transistor in a conductive state, keep the second transistor in a non-conductive state, and cause the first transistor and the fifth transistor to receive a first modulation control signal and a second modulation control signal, respectively; wherein the first modulation control signal is complementary to the second modulation control signal. 8.The electronic device of claim 6, wherein, When the bridge-type conversion circuit operates in the second mode, the control signal set causes the first transistor and the second transistor to remain in the on state, the fourth transistor to remain in the off state, and the third transistor and the fifth transistor to respectively receive a first modulation control signal and a second modulation control signal; wherein the first modulation control signal is complementary to the second modulation control signal. 9.The electronic device of claim 6, wherein, When the bridge-type conversion circuit operates in the third mode, the control signal set causes the first transistor and the third transistor to remain in the on state, the fifth transistor to remain in the off state, and the second transistor and the fourth transistor to respectively receive a first modulation control signal and a second modulation control signal; wherein the first modulation control signal is complementary to the second modulation control signal. 10.The electronic device of claim 6, wherein, When the bridge-type conversion circuit operates in the fourth mode, the control signal set causes the third transistor to remain in the on state, the first transistor and the fourth transistor to receive a first modulation control signal, and the second transistor and the fifth transistor to receive a second modulation control signal; wherein the first modulation control signal is complementary to the second modulation control signal. 11.The electronic device of claim 6, wherein, When the bridge-type conversion circuit operates in the fifth mode, the control signal set causes the first transistor to remain in the on state, the fourth transistor and the fifth transistor to receive a first modulation control signal, and the second transistor and the third transistor to receive a second modulation control signal; wherein the first modulation control signal is complementary to the second modulation control signal. 12.The electronic device of claim 6, wherein, When the bridge-type conversion circuit operates in the sixth mode, the control signal set causes the fifth transistor to remain in the on state, the first transistor and the fourth transistor to receive a first modulation control signal, and the second transistor and the third transistor to receive a second modulation control signal; wherein the first modulation control signal is complementary to the second modulation control signal. 13.The electronic device of claim 1, wherein, The first resonant tank and the second resonant tank change the voltage of the primary-side square wave signal according to the input duty cycle of the signals in the control signal set.
14. The electronic device of any one of claims 7-12, wherein, The first modulation control signal and the second modulation control signal are frequency modulation control signals.
15. The electronic device of any one of claims 7-12, wherein, When the frequency of the first modulation control signal and the second modulation control signal is less than or equal to a preset frequency, the first modulation control signal and the second modulation control signal are frequency modulation control signals; when the frequency of the first modulation control signal and the second modulation control signal is greater than the preset frequency, the first modulation control signal and the second modulation control signal are pulse width modulation control signals.
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