Display panel and display apparatus

By setting a grating structure in the insulating layer of the display panel to block large-angle light, the color shift problem caused by thin-film transistor leakage is solved, thus improving the display effect.

WO2026036484A1PCT designated stage Publication Date: 2026-02-19WUHAN TIANMA MICRO ELECTRONICS CO LTD
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Patent Information

Application Number
PCT/CN2024/121606
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-08-13
Filing Date
2024-09-27
Publication Date
2026-02-19

AI Technical Summary

Technical Problem

The display panel suffers from color shift due to leakage of thin-film transistors under sunlight or ambient light, affecting the display effect.

Method used

A grating structure is set in a portion of the insulating layer between the pixel circuit layer and the light-emitting functional layer. The periodically arranged light-shielding and light-transmitting parts block light rays incident at large angles, preventing light from shining on the active layer of the thin-film transistor and reducing light leakage.

Benefits of technology

It effectively reduces light leakage of thin-film transistors, improves the display effect of the display panel, and avoids color deviation problems.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display panel and a display apparatus. The display panel (200) comprises: a base substrate (20), and a pixel circuit layer (30) and a light-emitting functional layer (50) that are sequentially stacked on one side of the base substrate (20), wherein the pixel circuit layer (30) comprises a plurality of pixel circuits, each pixel circuit comprising a plurality of thin film transistors (31); and an insulating layer (40) located between the pixel circuit layer (30) and the light-emitting functional layer (50), wherein a grating structure (41) is provided in at least part of the region of the insulating layer (40). The grating structure (41) comprises a plurality of light-shielding portions (41a) and light-transmitting portions (41b) that are arranged periodically in a first direction, wherein the first direction is parallel to the plane where the base substrate (20) is located. By means of providing a grating structure in at least part of the region of an insulating layer between a pixel circuit layer and a light-emitting functional layer, the grating structure is used to reduce the interference of external light to thin film transistors, thereby mitigating the problem of color shift caused by a light leakage current in a driving transistor.
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Description

Display panel and display device

[0001] The present application claims priority to the Chinese patent application No. 202411112674.0, filed on August 13, 2024, to the Chinese Patent Office, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the display technical field, for example, to a display panel and a display device. BACKGROUND

[0003] At present, display panel products have the phenomenon of red emission under sunlight or external light due to the leakage current of the thin film transistor (TFT) of the display panel, which affects the display effect and application of the display panel.

[0004] SUMMARY

[0005] The present application provides a display panel and a display device, which are provided with a grating structure in at least part of the area of the insulating layer between the pixel circuit layer and the light-emitting functional layer, so as to reduce the interference of external light on the thin film transistor by using the grating structure, and solve the problem of color deviation caused by the light leakage current of the driving transistor.

[0006] In a first aspect, the embodiments of the present application provide a display panel, comprising a substrate and a pixel circuit layer and a light-emitting functional layer which are sequentially stacked on one side of the substrate, the pixel circuit layer comprising a plurality of pixel circuits, and the pixel circuit comprising a plurality of thin film transistors.

[0007] An insulating layer is located between the pixel circuit layer and the light-emitting functional layer, and the insulating layer is provided with a grating structure in at least part of the area.

[0008] The grating structure comprises a plurality of light-shielding portions and light-transmitting portions which are periodically arranged along a first direction, and the first direction is parallel to the plane in which the substrate is located.

[0009] In a second aspect, the embodiments of the present application also provide a display device, which comprises the display panel provided in the first aspect.

[0010] The display panel provided by the embodiments of the present application is provided with a grating structure in at least part of the area of the insulating layer between the pixel circuit layer and the light-emitting functional layer, so as to block the light incident at a large angle from the outside by using the periodically arranged grating structure, so that the active layer of the thin film transistor of the pixel circuit layer cannot be irradiated by the light at a large angle, the interference of external light on the thin film transistor is reduced, and the problem of color deviation caused by the insufficient shielding of the metal layer to the light at a large angle and the light leakage current of the driving transistor is solved, thereby improving the display effect of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0011] Fig. 1 is a schematic cross-sectional view of a display panel according to an embodiment;

[0012] Fig. 2 is a schematic plan view of a display panel according to an embodiment;

[0013] Fig. 3 is a schematic cross-sectional view of a display panel according to an embodiment;

[0014] Fig. 4 is another schematic cross-sectional view of a display panel according to an embodiment;

[0015] Fig. 5 is a schematic enlarged view of a grating structure in the M region of Fig. 3;

[0016] Fig. 6 is a schematic enlarged view of a grating structure in the M region of Fig. 3;

[0017] Fig. 7 is a schematic enlarged view of a grating structure in the M region of Fig. 3;

[0018] Fig. 8 is a schematic enlarged view of a grating structure in the M region of Fig. 3;

[0019] Fig. 9 is a schematic enlarged view of a grating structure in the M region of Fig. 3;

[0020] Fig. 10 is a schematic enlarged plan view of a display panel in the N region of Fig. 2;

[0021] Fig. 11 is a schematic enlarged plan view of another display panel in the N region of Fig. 2;

[0022] Fig. 12 is a schematic cross-sectional view of a light shielding portion of a grating structure according to an embodiment;

[0023] Figs. 13 and 14 are schematic cross-sectional views of light shielding portions of other grating structures according to embodiments;

[0024] Fig. 15 is a schematic cross-sectional view of another display panel according to an embodiment;

[0025] Fig. 16 is a schematic cross-sectional view of another display panel according to an embodiment;

[0026] Fig. 17 is a schematic cross-sectional view of another display panel according to an embodiment;

[0027] Fig. 18 is a schematic cross-sectional view of another display panel according to an embodiment;

[0028] Fig. 19 is a schematic cross-sectional view of another display panel according to an embodiment;

[0029] Fig. 20 is a schematic circuit structure of a 7T1C pixel circuit according to an embodiment;

[0030] FIG. 21 is a circuit layout of an actual film layer structure of the pixel circuit in FIG. 17;

[0031] FIG. 22 is a top view of a display device according to an embodiment of the present application. DETAILED DESCRIPTION

[0032] FIG. 1 is a cross-sectional view of a display panel according to an embodiment of the present application. As shown in FIG. 1, a display panel 100 provided by the related art, during display, due to external light S0 incident into the display panel 100, the active layer of a thin film transistor (TFT) in a driving circuit film layer 102 is irradiated, and is prone to photoeffect, such as generation of a leakage current, causing a driving voltage to decrease, and further causing the luminance of a light emitting device 10 to decrease, and after the light emitted by the light emitting device 10 is mixed, color cast is generated, affecting the display effect of the display panel.

[0033] In some applications, in combination with FIG. 1, a metal film layer such as an anode metal layer RE of the light emitting device 10 or other metal wire layers (such as a signal line in the driving circuit film layer) is often used for shielding, however, the shielding of the metal film layer is limited in size, and the current shielding design can only shield light with a small incident angle a, such as sunlight with an incident angle a < 45°, when the incident angle a > 45°, the sunlight can be obliquely incident into the TFT from the gap of the metal film layer, and then cause the TFT to leak, that is, the metal film layer cannot achieve full-area shielding, and the problem of color cast under irradiation still exists, and ultimately the display of the display panel 100 is affected.

[0034] The film layer of the display panel 100 also includes other film layers, such as a substrate 101, a driving circuit layer 102, a light emitting functional layer 103, an encapsulation layer, and the like, which are not shown one by one here.

[0035] In FIG. 1, the angle between the external light S0 and the normal line of the plane on which the display panel 100 is located is the incident angle a.

[0036] Based on the above problems, the present application provides a display panel, which includes a substrate and a pixel circuit layer and a light emitting functional layer stacked in sequence on one side of the substrate, the pixel circuit layer includes a plurality of pixel circuits, and each pixel circuit includes a plurality of thin film transistors; an insulating layer between the pixel circuit layer and the light emitting functional layer, at least part of the area of the insulating layer is provided with a grating structure; the grating structure includes a plurality of light shielding portions and light transmitting portions arranged periodically along a first direction, and the first direction is parallel to the plane on which the substrate is located.

[0037] The application is provided with a grating structure in at least part of the area of the insulating layer between the pixel circuit layer and the light-emitting functional layer. The grating structure arranged periodically blocks the light rays with large viewing angles from the outside, so that the light rays with large angles cannot irradiate the active layer of the thin film transistor of the pixel circuit layer, reducing the interference of the outside light rays on the thin film transistor, thereby solving the problem of color deviation caused by the insufficient shielding of the metal layer to the light rays with large angles, and ensuring the normal display of the display panel.

[0038] The embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0039] FIG. 2 is a top view of a display panel according to an embodiment of the present application; FIG. 3 is a cross-sectional view of a display panel along the direction aa' in FIG. 2; and FIG. 4 is a cross-sectional view of a display panel along the direction aa' in FIG. 2. In combination with FIGS. 2-4, the display panel 200 provided by the embodiments of the present application includes a substrate 20 and a pixel circuit layer 30 and a light-emitting functional layer 50 stacked in sequence on one side of the substrate 20, the pixel circuit layer 30 includes a plurality of pixel circuits, the pixel circuit includes a plurality of thin film transistors 31, an insulating layer 40 is located between the pixel circuit layer 30 and the light-emitting functional layer 50, at least part of the area of the insulating layer 40 is provided with a grating structure 41, and the grating structure 41 includes a plurality of light-shielding portions 41a and light-transmitting portions 41b arranged periodically along a first direction (X direction or Y direction in the figure).

[0040] The first direction (X direction or Y direction in the figure) is parallel to the plane in which the substrate 20 is located, and only the X direction is taken as an example for illustrative purposes in the accompanying drawings of the present application.

[0041] Optionally, referring to FIG. 2, the display panel 200 includes an organic light-emitting diode (OLED) display panel, an active-matrix organic light-emitting diode (AMOLED) display panel, a quantum dot light-emitting diode (QLED) display panel, a light-emitting diode (LED) display panel, a micro light-emitting diode (Micro LED) display panel, a mini light-emitting diode (Mini LED) display panel, etc.

[0042] The display panel 200 includes an active area (AA) for normal display of a picture and a non-active area (NA) at least partially surrounding the active area AA, such as a peripheral wiring area, for arrangement of signal lines and packaging of the display panel.

[0043] Referring to FIGS. 3 and 4, the substrate 20 of the display panel 200 can be a rigid material such as glass or a silicon wafer, or a flexible material such as ultra-thin glass, a metal foil, or a polymer plastic material. The flexible or rigid substrate 20 can block oxygen and moisture, preventing diffusion of moisture or impurities into the interior of the display panel through the substrate 20. A pixel circuit layer 30 and a light-emitting functional layer 50 are provided on one side of the substrate 20. The pixel circuit layer 30 includes a pixel circuit, which can be a 2T1C, 4T1C, 7T1C, 7T2C, 8T1C, or 8T2C circuit structure. The pixel circuit includes a plurality of thin film transistors (TFTs) 31, a storage capacitor, and a metal wiring, and one electrode of the thin film transistor 31 is electrically connected to one electrode of a light-emitting element 51 in the light-emitting functional layer 50. The pixel circuit layer 30 is configured to supply a driving voltage to the light-emitting element 51 to drive the light-emitting element 51 to emit light.

[0044] For example, the drain electrode of the thin film transistor 31 is electrically connected to the anode of the light-emitting element 51.

[0045] The grating refers to an optical device composed of a large number of parallel slits with equal width and equal spacing.

[0046] Referring back to FIGS. 3 and 4, at least one insulating layer 40 is further included between the pixel circuit layer 30 and the light-emitting functional layer 50. The insulating layer 40 can be an organic layer such as polyimide, polyethylene naphthalate, polycarbonate, polyarylate, and polyethersulfone. A grating structure 41 is provided in at least a portion of the insulating layer 40. The grating structure 41 is composed of a plurality of light-blocking portions 41a and light-transmitting portions 41b periodically arranged in the X direction. The light-blocking portions 41a refer to regions through which light can pass, and the light-transmitting portions 41b refer to regions through which light cannot pass.

[0047] The grating structure 41 is arranged in the backlight area of the light-emitting functional layer 50, that is, the side away from the light-emitting side. On the one hand, the grating structure 41 can avoid blocking the normal light-emitting of the light-emitting functional layer 50. On the other hand, when external light S0 is incident on the inside of the display panel 200 at a large viewing angle β, the light-blocking part 41a has an absorption or blocking effect on the light at the large viewing angle β, which can block the light from shining on the thin film transistor 31 in the pixel circuit layer 30, avoid the light leakage of the thin film transistor 31, ensure the stability of the driving voltage and the light-emitting brightness of the light-emitting element 51, and ensure the normal color mixing of the light-emitting element 51. The range of the large-angle light blocking is improved, the color cast problem of the display panel 200 is improved, and the normal display of the display panel 200 is ensured.

[0048] In the structures shown in FIGS. 3 and 4, β≥α>45°. As shown in FIG. 3, the grating structure 41 can be arranged in the entire insulating layer 40. Alternatively, the grating structure 41 can be arranged in the central thickness area of the insulating layer 40 to block the light at a large viewing angle.

[0049] The display panel 200 provided in the embodiments of the present application further includes other film layers, such as an encapsulating layer, and the like. The multiple film layers jointly function to realize the normal display of the display panel.

[0050] In summary, the display panel provided in the embodiments of the present application has the grating structure arranged in at least part of the area between the pixel circuit layer and the light-emitting functional layer. The grating structure arranged periodically blocks the external light at a large viewing angle, so that the light at a large viewing angle cannot shine on the active layer of the thin film transistor of the pixel circuit layer, and the interference of the external light on the thin film transistor is reduced. Thus, the problem of color cast caused by the insufficient blocking of the metal layer on the light at a large viewing angle and the light leakage of the driving transistor is solved, and the display effect of the display panel is improved.

[0051] Based on the above embodiments, referring to FIGS. 3 and 4, the grating structure 41 is arranged in the Z direction above the thin film transistor 31. The light-transmitting part 41b of the grating structure 41 can absorb or block the external light at a small viewing angle α and the external light at a large viewing angle β. Compared with the structure without the grating structure 41 arranged above the thin film transistor 31 in FIGS. 3 and / or 4, the interference of the external light S0 on the thin film transistor 31 can be avoided, the light leakage of the thin film transistor 31 is reduced, the color cast is improved, and thus the display effect is improved.

[0052] Optionally, in FIGS. 3 and 4, at least part of the grating structure 41 is arranged above the thin film transistor 31 in the Z direction. The light-transmitting part 41b of the grating structure 41 can absorb or block the external light at a small viewing angle α and the external light at a large viewing angle β. Compared with the structure without the grating structure 41 arranged above the thin film transistor 31 in FIGS. 3 and / or 4, the interference of the external light S0 on the thin film transistor 31 can be avoided, the light leakage of the thin film transistor 31 is reduced, the color cast is improved, and thus the display effect is improved.

[0053] Fig. 5 is an enlarged schematic view of the grating structure in the M region of Fig. 3; Fig. 6 is an enlarged schematic view of the grating structure in the M region of Fig. 3; Fig. 7 is an enlarged schematic view of the grating structure in the M region of Fig. 3; Fig. 8 is an enlarged schematic view of the grating structure in the M region of Fig. 3; and Fig. 9 is an enlarged schematic view of the grating structure in the M region of Fig. 3.

[0054] On the basis of the above-described embodiments, referring to Figs. 3-6, the distance between two adjacent light shielding portions 41a along the first direction (X direction in the figure) is L; and the height of the light shielding portion 41a along the second direction (Z direction in the figure) is H, where H≥L, and the second direction (Z direction in the figure) is perpendicular to the plane (XY plane in the figure) in which the substrate 20 lies.

[0055] Optionally, referring to Fig. 5, the shielding angle range θ of the light shielding portion 41a satisfies tan θ = H / L. For example, referring to Fig. 6, when H = L, the incident angle θ" is the critical angle at which the light shielding portion 41a shields external light, θ" = 45°, θ' < θ" < θ"' ≤ 90°, that is, light with an incident angle in the range of 0-θ" is transmitted through the light transmitting portion 41b between two adjacent light shielding portions 41a, and light with an incident angle in the range of θ"-θ"' is shielded by the light shielding portion 41a. Thus, the shielding angle range θ of the light shielding portion 41a is [45°, 90°].

[0056] Referring to Fig. 7, when H > L, the incident angle θ"" is the critical angle at which the light shielding portion 41a shields external light, that is, light with an incident angle in the range of 0-θ"" is transmitted through the light transmitting portion 41b between two adjacent light shielding portions 41a, and light with an incident angle in the range of θ""-θ"' is shielded by the light shielding portion 41a. Here, θ"' < θ" < θ"" ≤ 90°, θ" = 45°, and thus the shielding angle range θ of the light shielding portion 41a is [θ"", 90°]. By setting H≥L, the light shielding portion 41a has a large shielding angle range for external light with an incident angle greater than or equal to 45°, and has a good shielding effect.

[0057] Referring to Fig. 8, when H < L, the incident angle θ""' is the critical angle at which the light shielding portion 41a shields external light, that is, light with an incident angle in the range of 0-θ""' is transmitted through the light transmitting portion 41b between two adjacent light shielding portions 41a, and light with an incident angle in the range of θ""'-θ"' is shielded by the light shielding portion 41a. Here, θ' < θ" < θ""' < θ"' ≤ 90°, θ" = 45°, and the shielding angle range θ of the light shielding portion 41a is [θ""', 90°]. With this structure, the light shielding portion 41a has a small shielding angle range for external light with an incident angle greater than or equal to 45°, and has a poor shielding effect.

[0058] On the basis of the above embodiments, and with continued reference to FIGS. 3-9, the light-blocking portion 41a is formed by doping a nano-carbon black material in the insulating layer 40.

[0059] Optionally, referring to FIGS. 3-9, a nano-carbon black material can be doped in the insulating layer 40 to form periodically arranged light-blocking portions 41a, which use black grating settings to block light, absorb and block external light, and reduce the interference of external light S0 on the thin-film transistor 31.

[0060] In other embodiments, the material of the light-blocking portion 41a can also be a black light-absorbing material, such as ink.

[0061] As an example, with continued reference to FIG. 3, the thickness of the insulating layer 40 in the display panel 200 is 2.0 μm, and a grating structure 41 with H=L=2.0 μm is set in the layer using a nano-carbon black structure as the material, which can block external light S0 with an incident angle greater than or equal to 45°.

[0062] On the basis of the above embodiments, and with reference to FIGS. 3 and 9, the light-blocking portion 41a has a trapezoidal shape in the orthographic projection of the first cross section, and the length of the base of the trapezoid near the light-emitting functional layer 50 is less than the length of the base of the trapezoid near the pixel circuit layer 30. The first cross section (the XZ plane in the figure) is parallel to the first direction X and perpendicular to the plane of the substrate 20.

[0063] The grating height refers to the height of the opaque region, i.e., the height of the light-blocking portion 41a in the Z direction in the figure.

[0064] Optionally, referring to FIG. 9, on the basis of the above embodiments provided with H>L, the grating height of the light-blocking portion 41a can also be designed rationally, i.e., the cross section of the light-blocking portion 41a in the XZ plane in the figure is trapezoidal, which can also be understood as the light-blocking cross section of the light-blocking portion 41a in the XY plane in the figure being small at the bottom and large at the top. Light with a small viewing angle is blocked at the bottom of the light-blocking portion 41a, and light with a large viewing angle is blocked at the top of the light-blocking portion 41a. This design ensures a large light-blocking angle range while making the bottom of the light-blocking portion 41a large, which is conducive to blocking stray light, reflected light, refracted light, etc., thereby reducing the entry of external light into the pixel circuit layer 30.

[0065] FIG. 10 is an enlarged top view of a display panel in the N region in FIG. 2.

[0066] On the basis of the above embodiments, referring to FIG. 10, the grating structure 41 includes a one-dimensional grating.

[0067] The one-dimensional grating refers to a periodic structure with only one arrangement direction, such as parallelly arranged equidistant obstacles or transparent bands with equal width and equidistant spacing.

[0068] Optionally, referring to FIG. 10, the one-dimensional grating arranged periodically is used to shield the large-view-angle light incident along the X direction in the figure and reduce the interference of external light S0 on the thin-film transistor 31.

[0069] FIG. 11 is an enlarged top view of another display panel of the N area in FIG. 2.

[0070] Based on the above embodiments, referring to FIG. 11, the grating structure 41 includes a two-dimensional grating, the first direction X includes at least a first sub-direction X1 and a second sub-direction X2 intersecting with each other; along the first sub-direction X, the light-shielding part 41a and the light-transmitting part 41b are arranged along a first period d1; and along the second sub-direction X2, the light-shielding part 41a and the light-transmitting part 41b are arranged along a second period d2.

[0071] In FIG. 11, the first sub-direction X1 can also be understood as an arbitrary direction parallel to the plane where the substrate 20 is located, that is, the X direction in the above embodiments; and the second sub-direction X2 can also be understood as a direction parallel to the plane where the substrate 20 is located and intersecting with the first sub-direction X1, that is, the Y direction in the above embodiments.

[0072] In some embodiments, as shown in FIG. 11, the first sub-direction X1 and the second sub-direction X2 are orthogonal.

[0073] The two-dimensional grating refers to a periodic structure with two arrangement directions, such as equidistant obstacles arranged in parallel and vertical directions or transparent bands with equal width and equidistant spacing, which is composed of a series of parallel lines or uneven surfaces.

[0074] The grating period refers to the length from one refractive index change point to an adjacent refractive index change point. The grating period is related to the grating constant d, which is an important parameter of the grating and represents the distance between two grating lines.

[0075] Referring to FIG. 11, the sum of the lengths of adjacent light-shielding part 41a and light-transmitting part 41b is set as the first period d1 along the X1 direction in the figure, which is conducive to shielding the large-view-angle light incident along the X1 direction in the figure; and the sum of the lengths of adjacent light-shielding part 41a and light-transmitting part 41b is set as the second period d2 along the X2 direction in the figure, which is conducive to shielding the large-view-angle light incident along the X2 direction in the figure, thereby comprehensively improving the blocking of the grating structure 41 to the large-view-angle light incident at various angles, avoiding the interference of external light on the thin-film transistor 31, further improving the color cast problem, and improving the display effect.

[0076] In some embodiments, continuing to refer to FIG. 11, the first period d1 is set to be equal to the second period d2.

[0077] Optionally, continuing to refer to FIG. 11, the first period d1 of the grating structure 41 along the X1 direction in the figure is equal to the second period d2 along the X2 direction in the figure, which on one hand helps to reduce the difficulty of preparing the two-dimensional grating, and reduce the projection area of the light shielding part 41a on the substrate 20, and is flexibly arranged in the insulating layer 40; on the other hand, it is beneficial to uniformly shield the external light of each angle of incidence with the light shielding part 41a as the center axis, and reduce the possibility of the external light reaching the thin film transistor 31, thereby avoiding the interference of residual light on the thin film transistor 31.

[0078] On the basis of the above-mentioned embodiments, the orthogonal projection of the light shielding part of the grating structure on the substrate can also be designed to shield the external light of each angle of incidence.

[0079] FIG. 12 is a cross-sectional view of a light shielding part of a grating structure provided by the present application.

[0080] In some embodiments, continuing to refer to FIG. 12, the orthogonal projection shape of the light shielding part 41a of the grating structure 41 on the substrate 20 is a plurality of densely arranged polygons.

[0081] Optionally, referring to FIG. 12, the two adjacent light shielding parts 41a can also be densely arranged to reduce the orthogonal projection area of the light transmission part 41b on the substrate 20, such as the densely arranged cross section of the light shielding part 41a adopting a regular hexagon, forming a shielding barrier to block the light of each angle of incidence.

[0082] FIGS. 13-14 are cross-sectional views of light shielding parts of two other grating structures provided by the present application.

[0083] In some embodiments, continuing to refer to FIGS. 10-14, the polygon includes a regular triangle, a parallelogram or a regular hexagon.

[0084] Optionally, the size and position of the light shielding part 41a of the grating structure 41 can be reasonably set according to the position of the thin film transistor 31 in the pixel circuit layer 30, the size and position of the light emitting element 51 in the light emitting functional layer 50, etc. For example, as shown in FIG. 10, the orthogonal projection of the light shielding part 41a on the substrate 20 is a rectangle; as shown in FIG. 11, the orthogonal projection of the light shielding part 41a on the substrate 20 is a square; as shown in FIG. 12, the orthogonal projection of the light shielding part 41a on the substrate 20 is a regular hexagon; as shown in FIG. 13, the orthogonal projection of the light shielding part 41a on the substrate 20 is a regular triangle; as shown in FIG. 14, the orthogonal projection of the light shielding part 41a on the substrate 20 is a circle, etc.

[0085] The same or different grating structure 41 can be designed in different regions of the display panel 200. For example, in the region where the thin film transistors 31 are densely arranged, more densely arranged light shielding portions 41a are arranged; in the region where the thin film transistors 31 are sparse, the light shielding portions 41a are arranged only above the thin film transistors 31, and the like, so as to reduce the process preparation difficulty, production cost and the like.

[0086] In this way, by reasonably setting the size and position of the light shielding portion 41a, the light shielding portion 41a can shield more light incident from the outside at different viewing angles, and at the same time adapt to the structure of the thin film transistors 31 and the light emitting elements 51 in different regions of the display panel 200, thereby reducing the preparation cost of the display panel and the like.

[0087] FIG. 15 is a cross-sectional view of another display panel along the direction aa' in FIG. 2; and FIG. 16 is a cross-sectional view of another display panel along the direction aa' in FIG. 2.

[0088] On the basis of the above-mentioned embodiments, the display panel 200 further comprises a planarization layer 60 between the pixel circuit layer 30 and the light emitting functional layer 50. The planarization layer has a planarization effect, and the material thereof can include an organic material such as benzocyclobutene or acrylic acid, or an inorganic material such as silicon nitride, and can be a single layer, a double layer or a multi-layer structure.

[0089] In some embodiments, as shown in FIG. 15, the insulating layer 40 is between the planarization layer 60 and the pixel circuit layer 30; in some embodiments, as shown in FIG. 16, the insulating layer 40 is between the planarization layer 60 and the light emitting functional layer 50.

[0090] Optionally, as shown in FIG. 15, the insulating layer 40 can be an insulating film layer closest to the light emitting functional layer 50 in the pixel circuit layer 30; as shown in FIG. 16, it can also be an additional insulating layer on the surface of the pixel circuit layer 30 before the planarization layer 60 is prepared, and the material thereof includes an inorganic material such as silicon oxide or silicon nitride, or an organic material. By arranging the grating structure 41 in at least part of the region of the insulating layer 40, the light S0 from the outside in the range from small viewing angle to large viewing angle can be shielded, and the light leakage phenomenon of the thin film transistor 31 can be reduced.

[0091] On the basis of the above-mentioned embodiments, as shown in FIGS. 3 and 4, the display panel 200 further comprises a planarization layer 60 between the pixel circuit layer 30 and the light emitting functional layer 50, and the insulating layer 40 is multiplexed as the planarization layer 60.

[0092] Optionally, continuing to refer to FIG. 3, the grating structure 41 penetrates the planarization layer 60 along the Z direction in the figure and is arranged in at least a partial region of the planarization layer 60; continuing to refer to FIG. 4, the grating structure 41 is located in a central region of the planarization layer 60 along the Z direction in the figure. In this way, without adding a new functional film layer, the grating structure 41 is arranged in the existing planarization layer 60 to form a barrier to external light S0 for the pixel circuit layer 30 and the light-emitting functional layer 50, which is conducive to controlling the thickness of the display panel 200, reducing the number of film layers, and meeting the requirements of the display panel 20 for ultra-thin applications.

[0093] FIG. 17 is a schematic cross-sectional view of another display panel along the aa' direction in FIG. 2; FIG. 18 is a schematic cross-sectional view of another display panel along the aa' direction in FIG. 2; and FIG. 19 is a schematic cross-sectional view of another display panel along the aa' direction in FIG. 2.

[0094] On the basis of the above-described embodiments, referring to FIGS. 17 and 18, the display panel 200 further includes a light-blocking metal layer 70 located on the side of the thin-film transistor 31 close to the light-emitting functional layer 50; the light-blocking metal layer 70 at least partially overlaps the at least partial projection of the thin-film transistor 31 on the substrate 20 in the orthographic projection of the substrate 20; and the light-blocking metal layer 70 at least partially overlaps the grating structure 41 in the orthographic projection of the substrate 20.

[0095] Optionally, referring to FIGS. 17 and 18, on the basis of the grating structure 41 arranged between the pixel circuit layer 30 and the light-emitting functional layer 50, the light-blocking metal layer 70 can be additionally arranged between the pixel circuit layer 30 and the light-emitting functional layer 50 to strengthen the blocking of external incident light and prevent light from entering the pixel circuit layer 30.

[0096] On the basis of the above-described embodiments, continuing to refer to FIGS. 17 and 18, the light-emitting functional layer 50 includes a plurality of light-emitting elements 51, and each light-emitting element 51 includes a first electrode layer 51a, a light-emitting layer 51b, and a second electrode layer 51c arranged in sequence away from the substrate 20; and the pixel circuit layer 30 includes at least two metal wiring layers 31. Among them, the first metal wiring layer 32 is the metal wiring layer 31 closest to the light-emitting functional layer 50 in the pixel circuit layer 30.

[0097] Optionally, as shown in FIGS. 17-19, the light emitting element 51 is taken as an example of an OLED, the first electrode layer 51a can be an anode of the light emitting element 51, the second electrode layer 51c can be a cathode of the light emitting element 51, the second electrode layer 51c can be a whole layer structure or a non-whole layer structure, the first electrode layer 51a and the second electrode layer 51c can adopt a transparent conductive material, for example, indium tin oxide (ITO), indium zinc oxide (IZO), ITO / Ag / ITO, etc.; or the materials of the first electrode layer 51a and the second electrode layer 51c are different, the second electrode layer 51c adopts a transparent conductive material, and the first electrode layer 51a can adopt a metal such as aluminum (Al), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo), etc., an alloy thereof. The light emitting material of the light emitting layer 51b can be a low-molecular or high-molecular organic material.

[0098] In some embodiments, the structure of the pixel circuit layer 30 is described below taking a top gate type thin film transistor of an OLED display panel in FIG. 17 as an example, the pixel circuit layer 30 of the display panel 200 further includes an active layer 311 on the substrate 20, a gate insulating layer 312 on the active layer 311, a gate 313 on the gate insulating layer 312, a first interlayer insulating layer 314 on the gate 313, a capacitor layer 315 above the first interlayer insulating layer 314, a second interlayer insulating layer 316 above the capacitor layer 315, wherein the interlayer insulating layer can be formed of an inorganic layer insulating such as silicon oxide or silicon nitride, a source electrode 317 and a drain electrode 318 on the second interlayer insulating layer 316, the source electrode 317 and the drain electrode 318 are respectively electrically connected to the source region and the drain region through contact holes, the source electrode 317 and the drain electrode 318 can be a metal such as Cr, Pt, Ru, Au, Ag, Mo, Al, W, Cu and / or AlNd, or a metal or conductive oxide including ITO, GIZO, GZO, IZO (InZnO) or AZO (AlZnO), a passivation layer 319 and the insulating layer 40 and the planarization layer 60 on the source electrode 317 and the drain electrode 318 of the thin film transistor 31.

[0099] The first electrode layer 51a is electrically connected to one pole of the thin film transistor 31 through a via D of the insulating layer 40. In the example of FIG. 17, the drain electrode 318 of the thin film transistor 31 is electrically connected to the first electrode layer 51a (anode) of the light emitting element 51 through the via D. The pixel circuit layer 30 generally includes at least two metal wiring layers, for example, a bottom metal wiring layer on which the gate electrode 313 is located, for setting a scan signal line and transmitting a scan signal; a middle metal wiring layer on which the source electrode 317 and the drain electrode 318 are located, for setting a data signal line and transmitting a data signal; and at least one first metal wiring layer 32 between the drain electrode 318 and the first electrode layer 51a (anode), for ensuring the transmission of a current signal through the via and realizing the driving of the light emitting element 51 to emit light.

[0100] In some embodiments, as shown in FIG. 17, the light shielding metal layer 70 is in the same layer as the first electrode layer 51a.

[0101] Optionally, as shown in FIG. 17, the light shielding metal layer 70 can be prepared at the same time as the first electrode layer 51a by using a “patterning” preparation process, so as to obtain a shielding barrier in which the light shielding metal layer 70 is above the grating structure 41 and the grating structure 41 is below the light shielding metal layer 70. The light shielding metal layer 70 first blocks the external incident light, and the grating structure 41 blocks the external incident light that leaks into the light shielding metal layer 70.

[0102] In some embodiments, as shown in FIG. 18, the light shielding metal layer 70 is in the same layer as the first metal wiring layer 32.

[0103] Optionally, as shown in FIG. 18, the light shielding metal layer 70 can be prepared at the same time as the first metal wiring layer 32 by using a “patterning” preparation process, so as to obtain a shielding barrier in which the light shielding metal layer 70 is below the grating structure 41 and the grating structure 41 is above the light shielding metal layer 70. The grating structure 41 first blocks the external incident light, and the light shielding metal layer 70 blocks the external incident light that leaks into the grating structure 41.

[0104] In some embodiments, as shown in FIG. 19, part of the light shielding metal layer 70 is in the same layer as the first electrode layer 51a, and part of the light shielding metal layer 70 is in the same layer as the first metal wiring layer 32.

[0105] As shown in FIG. 19, the light shielding metal layer 70 and the first metal wiring layer 32 and the first electrode layer 51a can be prepared at the same time by using a “patterning” preparation process, so as to obtain a shielding barrier in which the light shielding metal layer 70 and the grating structure 41 overlap and interleave with each other in the Z direction and block the external incident light.

[0106] As in the above embodiments, the light shielding metal layer 70 and the grating structure 41 play a double-layer shielding role, strengthen the blocking of the external light, and maximize the reduction of the incidence of the external light into the pixel circuit layer 30, thereby improving the light leakage and color deviation problems.

[0107] The "patterned" in the present disclosure refers to a non-integer layer structure, i.e. a structure formed by first forming an integer layer of material and then carving out a specific shape during the manufacturing process; or a pattern structure formed by first forming an integer layer of material and then shaping by other manufacturing processes during the manufacturing process.

[0108] FIG. 20 is a schematic diagram of a circuit structure of a 7T1C pixel circuit provided in the present disclosure; and FIG. 21 is a circuit layout of an actual film layer structure of the pixel circuit in FIG. 20.

[0109] On the basis of the above embodiments, with continued reference to FIGS. 3, 4, 15-21, the thin film transistor 31 includes a driving transistor T3 and a threshold compensation transistor T4; the first end 1 of the driving transistor T3 is electrically connected to the first end 1 of the threshold compensation transistor T4, and the control end 2 of the driving transistor T3 is electrically connected to the second end of the threshold compensation transistor T4; the threshold compensation transistor T4 is configured to perform threshold compensation on the driving transistor T3; and the light grating structure 41 at least partially overlaps the threshold compensation transistor T4 in the orthographic projection of the substrate 20.

[0110] For example, referring to FIG. 20, the pixel circuit provided in the present embodiment includes 7 transistors and one capacitor (7T1C), namely, a first transistor T1, a second transistor T2, a driving transistor T3, a threshold compensation transistor T4, a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7, and a storage capacitor Cst. As shown in FIGS. 17 and 21, the pixel circuit provided in the present embodiment includes, which are sequentially stacked on one side of the substrate 20, an active layer 311, a bottom metal wiring layer 33, an intermediate metal wiring layer 34, and a first metal wiring layer 32. The active layer 311 is configured to form the conductive channels of the first transistor T1, the second transistor T2, the driving transistor T3, the threshold compensation transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7. The first scan signal line Scan1, the second scan signal line Scan2, the enable signal line Emit, and the second plate of the storage capacitor Cst are disposed on the bottom metal wiring layer 33. The first reference signal line Ref1, the second reference signal line Ref2, and the first plate of the storage capacitor Cst are disposed on the intermediate metal wiring layer 34. The data signal line Data and the first power signal line PVDD are disposed on the first metal wiring layer 32. The different layers can be electrically connected through vias. In FIG. 21, the driving circuit structure of one OLED is exemplarily shown, and the insulating layers between the layers are omitted. 35 is the anode output end of the light emitting element 51, and 35 is electrically connected to the first electrode layer 51a.

[0111] Optionally, taking 7T1C as an example, when the threshold compensation transistor T4 has a leakage current, the N1 node in the driving circuit is prone to rising in potential, resulting in a decrease in the driving voltage of the light emitting element 51, and further resulting in a decrease in the luminance of the light emitting element 51, which causes color cast after the light emitted by the light emitting element 51 is mixed.

[0112] Based on this, as shown in FIGS. 3-4 and 15-19, the grating structure 41 is arranged such that the orthogonal projection of the grating structure 41 on the substrate 20 at least partially overlaps the orthogonal projection of the threshold compensation transistor T4 on the substrate 20, so as to shield the external light incident above the threshold compensation transistor T4, and to avoid the light leakage of the threshold compensation transistor T4 to the greatest extent.

[0113] In other embodiments, such as 2T1C, 4T1C, 7T2C, 8T1C, 8T2C, and the like, grating structures are additionally arranged above at least the transistors prone to leakage, so as to minimize the color cast problem caused by the light leakage, and to ensure normal display of the display panel.

[0114] Based on the same application concept, the embodiments of the present application also provide a display device. FIG. 22 is a top view of a display device provided by the embodiments of the present application. As shown in FIG. 22, the display device includes any one of the display panels provided by the above embodiments. For example, as shown in FIG. 22, the display device 300 includes the display panel 200. Therefore, the display device also has the beneficial effects of the display panel in the above embodiments, and the same parts can be understood with reference to the above explanation and description of the display panel, which will not be repeated here.

[0115] The display device 300 provided by the embodiments of the present application can be a mobile phone as shown in FIG. 22, or any electronic product having a display function, including the following categories: television, notebook computer, desktop display, tablet computer, digital camera, smart bracelet, smart glasses, vehicle-mounted display, industrial control equipment, medical display screen, touch interaction terminal, and the like.

Claims

1. A display panel, characterized by, The substrate substrate and the pixel circuit layer and the light-emitting functional layer sequentially stacked on one side of the substrate substrate, the pixel circuit layer includes a plurality of pixel circuits, the pixel circuit includes a plurality of thin film transistors; The insulating layer between the pixel circuit layer and the light-emitting functional layer, at least part of the area of the insulating layer is provided with a grating structure; The grating structure includes a plurality of light shielding parts and light transmitting parts arranged periodically along the first direction, the first direction is parallel to the plane where the substrate substrate is located.

2. The display panel of claim 1, wherein, The grating structure in the substrate substrate orthographic projection and at least part of the thin film transistor in the substrate substrate orthographic projection at least part of the overlap.

3. The display panel of claim 1, wherein, Along the first direction, the distance between the two adjacent light shielding parts is L; along the second direction, the height of the light shielding part is H, Wherein, H≥L, the second direction is perpendicular to the plane where the substrate substrate is located.

4. The display panel of claim 1, wherein, The grating structure includes one-dimensional grating.

5. The display panel of claim 1, wherein, The grating structure includes two-dimensional grating, the first direction includes at least first sub direction and second sub direction which intersect with each other; Along the first sub direction, the light shielding part and the light transmitting part are arranged along the first period; Along the second sub direction, the light shielding part and the light transmitting part are arranged along the second period.

6. The display panel of claim 5, wherein, The first period is equal to the second period.

7. The display panel of claim 5, wherein, The light shielding part of the grating structure in the substrate substrate orthographic projection shape is a plurality of polygons arranged densely.

8. The display panel of claim 7, wherein, The polygon includes an equilateral triangle, a parallelogram or an equilateral hexagon.

9. The display panel of claim 1, wherein, The light shielding part in the first section orthographic projection shape is a trapezoid, the length of the bottom side of the trapezoid close to the light-emitting functional layer side is less than the length of the bottom side of the trapezoid close to the pixel circuit layer side; Wherein, the first section is parallel to the first direction and perpendicular to the plane where the substrate substrate is located.

10. The display panel of claim 1, wherein, Further comprising a planarization layer between the pixel circuit layer and the light-emitting functional layer; The insulating layer is located between the planarization layer and the pixel circuit layer; Or, the insulating layer is located between the planarization layer and the light-emitting functional layer.

11. The display panel of claim 1, wherein, Further comprising a planarization layer between the pixel circuit layer and the light-emitting functional layer, the insulating layer is multiplexed as the planarization layer.

12. The display panel of claim 1, wherein, Further comprising a light shielding metal layer located on the side of the thin film transistor close to the light-emitting functional layer; The light shielding metal layer in the substrate substrate orthographic projection and at least part of the thin film transistor in the substrate substrate orthographic projection at least part of the overlap; the light shielding metal layer in the substrate substrate orthographic projection and the grating structure in the substrate substrate orthographic projection at least part of the overlap.

13. The display panel of claim 12, wherein, The light-emitting functional layer includes a plurality of light-emitting elements, the light-emitting element includes a first electrode layer, a light-emitting layer and a second electrode layer arranged sequentially away from the substrate substrate; the pixel circuit layer includes at least two metal wiring layers; The light shielding metal layer is in the same layer with at least one of the first electrode layer and the first metal wiring layer; Wherein, the first metal wiring layer is the metal wiring layer closest to the light-emitting functional layer in the pixel circuit layer.

14. The display panel of claim 13, wherein, The first electrode layer is electrically connected to one pole of the thin film transistor through the via of the insulating layer.

15. The display panel of claim 1, wherein, The thin film transistor includes a drive transistor and a threshold compensation transistor; A first end of the driving transistor is electrically connected with a first end of the threshold compensation transistor, and a control end of the driving transistor is electrically connected with a second end of the threshold compensation transistor; the threshold compensation transistor is arranged to perform threshold compensation on the driving transistor. The grating structure at least partially overlaps with the threshold compensation transistor at the orthographic projection of the substrate.

16. The display panel of claim 1, wherein, The light-shielding part is formed by doping nanometer carbon black material in the insulating layer.

17. A display device comprising: The display panel comprises the display panel of any one of claims 1-16.

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