Semiconductor device and forming method therefor

Abstract

A semiconductor device and a forming method therefor. The method comprises: providing a semiconductor substrate, wherein the semiconductor substrate has a front surface and a back surface; performing comprehensive ion implantation of a first doping type on the semiconductor substrate from the front surface of the semiconductor substrate, so as to obtain a comprehensively doped region; forming a plurality of spaced inversion isolation doped regions of a second doping type in the comprehensively doped region, wherein the second doping type is different from the first doping type; and forming back isolation structures on the back surface of the semiconductor substrate, wherein the back isolation structures are in one-to-one correspondence with the inversion isolation doped regions, and each back isolation structure extends into the corresponding inversion isolation doped region. The present invention can improve the full well capacity while maintaining effective isolation, and can also reduce one layer of mask and corresponding photolithography steps thereof.

Description

Semiconductor devices and their fabrication methods

[0001] This application claims priority to Chinese Patent Application No. CN202411180735.7, filed on August 26, 2024, entitled "Semiconductor Device and Method of Forming the Same", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor device and a method for forming the same. Background Technology

[0003] In an image sensor, photodiodes are arranged in a matrix within a pixel array, with each photodiode corresponding to a pixel in the array. This arrangement enables the sensor to capture light signals from a two-dimensional image and convert them into electrical signals for subsequent processing. Isolation structures exist between adjacent pixels to achieve electrical isolation and prevent interference between the light and electrical signals of adjacent pixels.

[0004] The full-well capacity (FWC) of a photodiode refers to the maximum amount of detectable signal that each pixel can hold; in other words, how many electrons can physically be placed in the pixel's storage area and still be accurately read. This parameter is limited by the physical structure of the pixel and is one of the important indicators for measuring the performance of an image sensor. A higher full-well capacity generally means that the image sensor has a higher dynamic range and can accurately capture image details over a wider range of illumination.

[0005] With the development of image sensor technology, pixel sizes are continuously shrinking to meet the demands for device miniaturization and high resolution. However, the reduction in pixel size is often accompanied by a decrease in full-well capacity, because smaller pixel sizes limit the photodiode's ability to store electrons. In existing technologies, due to limitations in pixel size, photodiodes have low full-well capacities, making it difficult to meet device requirements. Summary of the Invention

[0006] The present invention provides a semiconductor device and a method for forming the same, which can improve the full-well capacity while maintaining effective isolation, and can also reduce the number of photomasks and the corresponding photolithography steps.

[0007] One aspect of this invention relates to a method for forming a semiconductor device, comprising: providing a semiconductor substrate having a front side and a back side; performing a first type of blanket implantation on the semiconductor substrate from the front side to obtain a fully doped region; forming a plurality of spaced inversion isolation doped regions of a second type of doping within the fully doped region, the second type of doping being different from the first type of doping; and forming a back isolation structure on the back side of the semiconductor substrate, the back isolation structure corresponding one-to-one with the inversion isolation doped region, and each back isolation structure extending into the corresponding inversion isolation doped region.

[0008] Optionally, the depth of the inversion isolation doped region is less than the depth of the fully doped region.

[0009] Optionally, before forming a backside isolation structure on the back side of the semiconductor substrate, the method further includes: bonding the front side of the semiconductor substrate to a carrier wafer; thinning the semiconductor substrate from the back side; wherein the backside isolation structure is formed on the back side of the thinned semiconductor substrate; and the sum of the depth of the backside isolation structure and the depth of the inversion isolation doped region is greater than the depth of the thinned semiconductor substrate.

[0010] Optionally, the semiconductor substrate may be thinned, including thinning the semiconductor substrate until the thickness of the semiconductor substrate is less than the implantation depth of full-scale ion implantation of the first doping type.

[0011] Optionally, the depth of the back isolation structure is greater than or equal to half the thickness of the thinned semiconductor substrate; and / or, the depth of the inversion isolation doped region is less than or equal to half the thickness of the thinned semiconductor substrate.

[0012] Optionally, the thickness of the semiconductor substrate after the thinning process is selected from [1μm, 5μm]; the depth of the back isolation structure is selected from [0.5μm, 5μm].

[0013] Optionally, the first doping type is N-type and the second doping type is P-type.

[0014] Optionally, the semiconductor substrate is subjected to full-scale ion implantation of a first doping type using a first doping concentration, and an inversion isolation doped region of a second doping type is formed using a second doping concentration; wherein the second doping concentration is greater than twice the first doping concentration.

[0015] Optionally, a back isolation structure is formed on the back side of the semiconductor substrate, including: forming a back trench on the back side of the thinned semiconductor substrate; and sequentially forming one or more stacked layers in the back trench: a high-K material layer and an aluminum oxide layer.

[0016] Optionally, the high-K value material layer includes one or more stacked layers of the following: HfO2, La2O3, HfSiON, HfAlO2, ZrO2, Al2O3, and HfSiO4.

[0017] Optionally, the semiconductor substrate is subjected to full-scale ion implantation of a first doping type, comprising: the full-scale ion implantation of the first doping type is implemented using a multi-round ion implantation process; wherein each round of ion implantation process has its own implantation depth.

[0018] Another aspect of this invention relates to a semiconductor device, comprising: a semiconductor substrate having a front side and a back side; a fully doped region located on the front side of the semiconductor substrate, the fully doped region having a first doping type; a plurality of spaced inversion isolation doped regions located within the fully doped region, the inversion isolation doped regions having a second doping type, and the second doping type being different from the first doping type; and a back isolation structure located on the back side of the semiconductor substrate, corresponding one-to-one with the inversion isolation doped regions, and each back isolation structure extending into the corresponding inversion isolation doped region.

[0019] Optionally, the depth of the inversion isolation doped region is less than the depth of the fully doped region.

[0020] Optionally, the semiconductor substrate is a thinned semiconductor substrate; wherein a portion of the fully doped region is removed in the depth direction.

[0021] Optionally, the depth of the back isolation structure is greater than or equal to half the thickness of the thinned semiconductor substrate; and / or, the depth of the inversion isolation doped region is less than or equal to half the thickness of the thinned semiconductor substrate.

[0022] Optionally, the first doping type is N-type and the second doping type is P-type.

[0023] Optionally, the semiconductor substrate has a first doping concentration, and the inversion isolation doped region has a second doping concentration; wherein the second doping concentration is greater than twice the first doping concentration.

[0024] Optionally, the back isolation structure includes: a back trench; and one or more stacked layers formed sequentially within the back trench: a high-K material layer and an alumina layer.

[0025] Optionally, the high-K value material layer includes one or more stacked layers of the following: HfO2, La2O3, HfSiON, HfAlO2, ZrO2, Al2O3, and HfSiO4.

[0026] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0027] In this embodiment of the invention, a semiconductor substrate is provided, having a front side and a back side. A first type of full-area ion implantation is performed on the semiconductor substrate from the front side to obtain a fully doped region. Multiple spaced inversion isolation doped regions of a second type, different from the first type, are formed within the fully doped region. A back isolation structure is formed on the back side of the semiconductor substrate, each corresponding to one of the inversion isolation doped regions, with each back isolation structure extending into its corresponding inversion isolation doped region. Using this scheme, by forming a fully doped region, the area for forming a photodiode can be effectively expanded, thereby increasing the full-well capacity of the subsequently formed photodiode. Furthermore, by forming inversion isolation doped regions, a photodiode can be formed within the fully doped region. Then, by forming back isolation structures extending into the corresponding inversion isolation doped regions, the inversion isolation doped regions and the back isolation structures can be combined to achieve full isolation between adjacent photodiodes, thereby improving the full-well capacity while maintaining effective isolation.

[0028] Furthermore, compared to existing technologies that first form the photodiode doped region in a semiconductor substrate through ion implantation and then form the isolation structure doped region in the semiconductor substrate through ion implantation, both of which involve forming patterns corresponding to the photodiode doped region or the isolation structure doped region on photoresist using photolithography, in this embodiment of the invention, the photodiode doped region uses full-area ion implantation, which can reduce one mask layer and its corresponding photolithography steps, effectively reducing production costs and improving production efficiency.

[0029] Furthermore, the depth of the inversion isolation doped region is less than the depth of the fully doped region. By using an ion implantation depth that is shallower than that of the fully doped region, the volume of the isolation structure between pixels is reduced, and the reduced portion is converted into an increase in the volume of the photodiode, thereby increasing the electron storage capacity of the photodiode and improving the full-well capacity of the photodiode.

[0030] Furthermore, the comprehensive ion implantation of the first doping type is achieved using a multiple ion implantation step process. By employing a separate implantation depth in each ion implantation step, the concentration distribution of the dopant can be precisely controlled, thereby optimizing the electrical performance of the device and helping to reduce device defects and improve yield. Attached Figure Description

[0031] Figures 1 to 3 are schematic diagrams of the cross-sectional structure of a semiconductor device in a prior art method for forming a semiconductor device.

[0032] Figure 4 is a flowchart of a method for forming a semiconductor device according to an embodiment of the present invention;

[0033] Figures 5 to 7 are schematic diagrams of the cross-sectional structure of the device corresponding to each step in the method for forming a semiconductor device according to an embodiment of the present invention.

[0034] Explanation of reference numerals in the attached figures: 100: Semiconductor substrate; 101: First photoresist layer; 102: Photodiode doped region; 110: Second photoresist layer; 111: Isolation structure doped region; 120: Back isolation structure; 200: Semiconductor substrate; 201: Fully doped region; 210: Photoresist layer; 211: Inversion isolation doped region; 220: Back isolation structure. Detailed Implementation

[0035] In image sensors, effective isolation structures are needed between adjacent pixels to prevent electrical interference and optical crosstalk. Isolation wells achieve this by altering the conductivity type between adjacent pixel units, thereby improving the imaging quality and reliability of the image sensor. Furthermore, isolation wells can be used in conjunction with deep trench isolation (DTI) technology to achieve even more effective isolation.

[0036] Figures 1 to 3 are schematic diagrams of the cross-sectional structure of a semiconductor device in a prior art method for forming a semiconductor device.

[0037] Referring to FIG1, a semiconductor substrate 100 is provided, the semiconductor substrate 100 having a front side and a back side. A photodiode doped region 102 is formed on the front side of the semiconductor substrate 100.

[0038] In some embodiments where the photodiode doped region 102 is formed, a patterned first photoresist layer 101 may be formed first, and then a plurality of photodiode doped regions 102 may be formed in the semiconductor substrate 100 using the first photoresist layer 101 as a mask.

[0039] Referring to Figure 2, an isolation structure doped region 111 is formed on the front side of the semiconductor substrate 100.

[0040] The isolation structure doped region 111 can be spaced apart from the photodiode doped region 102 to isolate adjacent photodiode doped regions 102.

[0041] In some embodiments that form the isolation structure doped region 111, a patterned second photoresist layer 110 may be formed first, and then the isolation structure doped region 111 may be formed in the semiconductor substrate 100 using the second photoresist layer 110 as a mask.

[0042] The doping type of the isolation structure doped region 111 is different from that of the photodiode doped region 102.

[0043] Referring to FIG3, a back isolation structure 120 is formed on the back side of the semiconductor substrate 100.

[0044] The back isolation structure 120 can be spaced apart from the photodiode doped region 102 to isolate adjacent photodiode doped regions 102.

[0045] In other words, the photodiode doped region 102 is used to form the photodiode, and the isolation structure doped region 111 and the back isolation structure 120 serve as the isolation structure between adjacent photodiodes.

[0046] The inventors of this invention discovered through research that, in the prior art, while the pixel size of image sensors has been reduced, the size of photodiodes has also been limited, making it difficult to increase the full-well capacity.

[0047] The inventors of this invention have further discovered through research that if the width of the doped region of the photodiode is increased by reducing the width of the doped region of the isolation structure, thereby increasing the full-well capacity, the isolation effect of the doped region of the isolation structure may deteriorate, and in severe cases, image defects may occur, such as color mixing or color dispersion.

[0048] The inventors of this invention further discovered through research that if the doped region of the isolation structure is removed and only the back isolation structure is used for isolation, the semiconductor substrate may break along the trench of the back isolation structure due to excessive trench depth during the formation of the back isolation structure.

[0049] Furthermore, the inventors of this invention have discovered through further research that the formation of photodiodes and isolation structures requires the formation of photoresist patterns on semiconductor substrates through photolithography, which is a complex process that results in high production costs.

[0050] In this embodiment of the invention, a semiconductor substrate is provided, having a front side and a back side. A first type of full-area ion implantation is performed on the semiconductor substrate from the front side to obtain a fully doped region. Multiple spaced inversion isolation doped regions of a second type, different from the first type, are formed within the fully doped region. A back isolation structure is formed on the back side of the semiconductor substrate, each corresponding to one of the inversion isolation doped regions, with each back isolation structure extending into its corresponding inversion isolation doped region. Using this scheme, by forming a fully doped region, the area for forming a photodiode can be effectively expanded, thereby increasing the full-well capacity of the subsequently formed photodiode. Furthermore, by forming inversion isolation doped regions, a photodiode can be formed within the fully doped region. Then, by forming back isolation structures extending into the corresponding inversion isolation doped regions, the inversion isolation doped regions and the back isolation structures can be combined to achieve full isolation between adjacent photodiodes, thereby improving the full-well capacity while maintaining effective isolation. Furthermore, compared to existing technologies that first form the photodiode doped region in a semiconductor substrate through ion implantation and then form the isolation structure doped region in the semiconductor substrate through ion implantation, both of which involve forming patterns corresponding to the photodiode doped region or the isolation structure doped region on photoresist using photolithography, in this embodiment of the invention, the photodiode doped region uses full-area ion implantation, which can reduce one mask layer and its corresponding photolithography steps, effectively reducing production costs and improving production efficiency.

[0051] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0052] Referring to Figure 4, which is a flowchart of a method for forming a semiconductor device according to an embodiment of the present invention, the method for forming the semiconductor device may include steps S41 to S44:

[0053] Step S41: Provide a semiconductor substrate having a front side and a back side;

[0054] Step S42: Perform full-scale ion implantation of the semiconductor substrate from the front side of the semiconductor substrate to obtain a fully doped region;

[0055] Step S43: Form multiple spaced inversion isolation doped regions of a second doping type within the fully doped region, wherein the second doping type is different from the first doping type;

[0056] Step S44: A back isolation structure is formed on the back side of the semiconductor substrate. The back isolation structure corresponds one-to-one with the inversion isolation doped region, and each back isolation structure extends into the corresponding inversion isolation doped region.

[0057] The steps described above are explained below with reference to Figures 5 to 7.

[0058] Figures 5 to 7 are schematic diagrams of the cross-sectional structure of the device corresponding to each step in the method for forming a semiconductor device according to an embodiment of the present invention.

[0059] Referring to FIG5, a semiconductor substrate 200 is provided, the semiconductor substrate 200 having a front side and a back side. A first type of full-area ion implantation of the semiconductor substrate 200 is performed on the semiconductor substrate 200 from the front side to obtain a fully doped region 201.

[0060] In specific implementations, the semiconductor substrate 200 may be a silicon substrate, or the material of the semiconductor substrate 200 may also be germanium, silicon germanide, silicon carbide, gallium arsenide or indium gallium. The semiconductor substrate 200 may also be a silicon substrate on an insulator surface or a germanium substrate on an insulator surface, or a substrate with an epitaxy layer (Epi layer) grown on it.

[0061] In some embodiments, the first doping type may be N-type doping, and the doping ion may be an N-type ion, such as P, As, or Sb.

[0062] In other embodiments, the first doping type may be P-type doping, and the doping ion may be a P-type ion, such as B, Ga, or In.

[0063] Blank implantation can directly implant doped ions into a semiconductor substrate 200 without relying on a patterned mask. In other words, a fully doped region 201 is formed by using a full ion implantation process. The fully doped region 201 is used to form a photodiode, which can reduce one mask and its corresponding photolithography step.

[0064] In one specific embodiment, the full-scale ion implantation of the first doping type can be achieved using a multi-round ion implantation process, which helps to improve the uniformity and depth of the formed full-scale doped region.

[0065] In some embodiments, the implantation depth can vary from shallow to deep in at least a portion of the ion implantation processes. By controlling the implantation depth of each ion implantation process, the dopant concentration distribution can be precisely controlled, thereby optimizing the electrical performance of the device and helping to reduce device defects and improve yield.

[0066] In this embodiment of the invention, a fully doped region 201 is formed using a first doping type of full-area ion implantation process. The fully doped region 201 is used to form a photodiode. Since the full-area ion implantation covers the front side of the semiconductor substrate 200, there is no need to form a photoresist layer as a barrier layer. Compared with the step of forming the photodiode doped region 102 in the prior art, a mask and its corresponding photolithography step can be reduced, which effectively reduces production costs and improves production efficiency.

[0067] Referring to FIG6, a plurality of spaced inversion isolation doped regions 211 of a second doping type are formed within the fully doped region 201, the second doping type being different from the first doping type.

[0068] Specifically, a patterned photoresist layer 210 can be formed on the front side of the semiconductor substrate 200 as a barrier layer for the ion implantation process, and an inversion isolation doped region 211 can be formed through the ion implantation process.

[0069] In one embodiment of the present invention, the first doping type is N-type and the second doping type is P-type.

[0070] In specific implementation, if the first doping type is N-type, the second doping type can be P-type; if the first doping type is P-type, the second doping type can be N-type.

[0071] In this embodiment of the invention, by using N-type as the first doping type and P-type as the second doping type, more N-type doped ions can be used as the main charge carriers, which helps to improve the electrical performance of the device.

[0072] In one specific embodiment, the second doping concentration is greater than twice the first doping concentration.

[0073] Specifically, the inverse isolation doped region 211 is formed by doping the doped region with dopants of the first doping type to the second doping type by doping with dopants of the second doping type.

[0074] The inversion isolation doped region 211 is used to achieve isolation between adjacent photodiodes. A larger doping concentration is required to overcome the influence of doped ions of the existing first doping type. In this embodiment of the invention, the isolation effect can be met by using at least double the doping concentration.

[0075] Furthermore, the depth of the inversion isolation doped region 211 is less than the depth of the fully doped region 201. The direction of this depth is perpendicular to the surface of the semiconductor substrate 200.

[0076] In practical implementation, by setting the depth of the inversion isolation doped region 211 to be smaller, the area of ​​the photodiode isolated by the inversion isolation doped region 211 can be reduced, and the area of ​​the photodiode subsequently isolated by the back isolation structure can be relatively increased. Since the isolation capability of the back isolation structure is often stronger than that of the inversion isolation doped region 211, it is possible to use a narrower back isolation structure to achieve a similar isolation effect, which is equivalent to increasing the area of ​​the photodiode isolated by the back isolation structure and improving the full-well capacity.

[0077] In one specific embodiment, a semiconductor device structure and a metal interconnect structure can be formed on the front side of the semiconductor substrate 200, and the metal interconnect structure is electrically connected to the semiconductor device structure.

[0078] It should be noted that, in this embodiment of the invention, the processing performed on the front side of the semiconductor substrate 200 may also include any conventional processing of existing image sensors, and this embodiment of the invention does not limit this.

[0079] Referring to FIG7, a back isolation structure 220 is formed on the back side of the semiconductor substrate 200. The back isolation structure 220 corresponds one-to-one with the inversion isolation doped region 211, and each back isolation structure 220 extends into the corresponding inversion isolation doped region 211.

[0080] It should be noted that by extending each back isolation structure 220 into the corresponding inversion isolation doped region 211, complete isolation of adjacent photodiodes can be achieved.

[0081] Specifically, before forming the back isolation structure 220 on the back side of the semiconductor substrate 200, the process may further include: bonding the front side of the semiconductor substrate 200 to a carrier wafer, and thinning the semiconductor substrate 200 from the back side. The back isolation structure 220 is formed on the back side of the thinned semiconductor substrate 200, and the sum of the depth of the back isolation structure 220 and the depth of the inversion isolation doped region 211 is greater than the depth of the thinned semiconductor substrate 200.

[0082] More specifically, the step of thinning the semiconductor substrate 200 may include: thinning the semiconductor substrate 200 until the thickness of the semiconductor substrate 200 is less than the implantation depth of full-scale ion implantation of the first doping type.

[0083] It should be noted that the fully doped region 201 formed by the first type of doping through full ion implantation is used to form a photodiode. After thinning from the back side of the semiconductor substrate 200, the fully doped region 201 can be exposed.

[0084] In one specific embodiment, the depth of the back isolation structure 220 is greater than or equal to half the thickness of the thinned semiconductor substrate 200, and / or the depth of the inversion isolation doped region 211 is less than or equal to half the thickness of the thinned semiconductor substrate 200.

[0085] Specifically, while meeting the isolation requirements, the isolation ratio of the back isolation structure 220 in depth can be increased as much as possible, and / or the isolation ratio of the inversion isolation doped region 211 in depth can be reduced. As mentioned above, since the isolation capability of the back isolation structure 220 is often stronger than that of the inversion isolation doped region 211, it is possible to use a narrower back isolation structure to obtain a similar isolation effect, which is equivalent to increasing the area of ​​the photodiode isolated by the back isolation structure.

[0086] The depth is perpendicular to the surface of the semiconductor substrate 200, and the thickness is perpendicular to the surface of the semiconductor substrate 200.

[0087] It is understood that the thickness of the thinned semiconductor substrate 200 cannot be too thin, otherwise the thickness of the photodiode will be reduced, thereby reducing the full-well capacity; the thickness of the thinned semiconductor substrate 200 cannot be too thick, otherwise it will be difficult to extend the back isolation structure 220 into the corresponding inversion isolation doped region 211 when the back isolation structure 220 is subsequently formed.

[0088] In one specific embodiment, the thickness of the semiconductor substrate 200 after the thinning process can be selected from [1μm, 5μm], and the depth of the back isolation structure can be selected from [0.5μm, 5μm].

[0089] In this embodiment of the invention, by thinning the semiconductor substrate 200, the thickness of the semiconductor substrate 200 can be reduced, which helps to reduce the difficulty of extending the back isolation structure 220 into the corresponding inversion isolation doped region 211.

[0090] Specifically, a back isolation structure 220 is formed on the back side of the semiconductor substrate 200, including: forming a back trench on the back side of the thinned semiconductor substrate 200; and sequentially forming one or more stacked layers in the back trench: a high-k dielectric material layer and an aluminum oxide layer. The high-k dielectric material helps stabilize the potential; therefore, filling the back trench with a high-k dielectric material can achieve better device performance.

[0091] More specifically, based on the dielectric constant K, dielectrics can be divided into two categories: high-K dielectrics and low-K dielectrics. A dielectric constant K > 3.9 is classified as high-K, while K ≤ 3.9 is classified as low-K. The dielectric constant (K value) of alumina (Al₂O₃) is 39.922.

[0092] In this embodiment of the invention, the high K-value material layer may include one or more of the following stacked layers: HfO2, La2O3, HfSiON, HfAlO2, ZrO2, Al2O3, and HfSiO4.

[0093] It should be noted that, in this embodiment of the invention, after forming the back isolation structure 220, the processing technology performed on the semiconductor substrate 200 can be any conventional processing technology of existing image sensors, and this embodiment of the invention does not limit it.

[0094] By employing the embodiments of the present invention, by forming a fully doped region 201, the area size for forming a photodiode can be effectively expanded, thereby improving the full-well capacity of the subsequently formed photodiode; and by forming an inversion isolation doped region 211, a photodiode can be formed within the fully doped region 201; then by forming a back isolation structure 220 extending into the corresponding inversion isolation doped region 211, the inversion isolation doped region 211 and the back isolation structure 220 can be combined to achieve full isolation between adjacent photodiodes, thereby improving the full-well capacity while maintaining effective isolation.

[0095] Furthermore, the width of the inversion isolation doped region 211 is wider than the width of the back isolation structure 220.

[0096] In one specific embodiment, the width of the inversion isolation doped region 211 can be selected from [0.1 μm, 0.7 μm], for example from [0.2 μm, 0.6 μm], for example 0.4 μm.

[0097] The width of the back isolation structure 220 can be selected from [0.05μm, 0.15μm], for example from [0.08μm, 0.12μm], for example 0.1μm.

[0098] Specifically, the isolation capability of the back isolation structure 220 is stronger than that of the inversion isolation doped region 211. By using a narrower back isolation structure 220, both a better isolation effect can be obtained and the area of ​​the photodiode isolated by the back isolation structure 220 can be increased.

[0099] In other words, by using an ion implantation depth that is shallower than that of the fully doped region 201, the volume of the isolation structure between pixels can be reduced, and the reduced portion is converted into an increase in the volume of the photodiode, which in turn increases the capacity of the photodiode to store electrons and improves the full-well capacity of the photodiode.

[0100] In this embodiment of the invention, a semiconductor device is also provided. Referring to FIG7, the semiconductor device may include: a semiconductor substrate 200 having a front side and a back side; a fully doped region 201 located on the front side of the semiconductor substrate 200, the fully doped region 201 having a first doping type; a plurality of spaced inversion isolation doped regions 211 located within the fully doped region 201, the inversion isolation doped regions 211 having a second doping type, and the second doping type being different from the first doping type; and a back isolation structure 220 located on the back side of the semiconductor substrate 200, corresponding one-to-one with the inversion isolation doped regions 211, and each back isolation structure 220 extending into the corresponding inversion isolation doped region 211.

[0101] Furthermore, the depth of the inversion isolation doped region 211 is less than the depth of the fully doped region 201.

[0102] Furthermore, the semiconductor substrate 200 is a thinned semiconductor substrate; wherein a portion of the fully doped region 201 is removed in the depth direction.

[0103] Furthermore, the depth of the back isolation structure 220 is greater than or equal to half the thickness of the thinned semiconductor substrate 200; and / or, the depth of the inversion isolation doped region 211 is less than or equal to half the thickness of the thinned semiconductor substrate 200.

[0104] Furthermore, the first doping type is N-type, and the second doping type is P-type.

[0105] Furthermore, the semiconductor substrate 200 has a first doping concentration, and the inversion isolation doped region 211 has a second doping concentration; wherein the second doping concentration is greater than twice the first doping concentration.

[0106] Furthermore, the back isolation structure 220 includes: a back trench; and one or more stacked layers formed sequentially within the back trench: a high-K value material layer and an alumina layer.

[0107] Furthermore, the high-K value material layer includes one or more stacked layers of the following: HfO2, La2O3, HfSiON, HfAlO2, ZrO2, Al2O3, and HfSiO4.

[0108] For the principles, specific implementation, and beneficial effects of this semiconductor device, please refer to the previous text and the relevant descriptions of the semiconductor device formation method shown in Figures 4 to 7. They will not be repeated here.

[0109] It should be understood that the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. Additionally, the character " / " in this document indicates that the preceding and following related objects are in an "or" relationship. As used herein, unless explicitly stated otherwise, the term "or" covers all possible combinations unless impractical. For example, if a component is declared to include A or B, then unless explicitly stated otherwise or impractical, the component can include A, or B, or A and B. As a second example, if a component is declared to include A, B, or C, then unless explicitly stated otherwise or impractical, the component can include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0110] In the embodiments of this application, "multiple" refers to two or more.

[0111] Relational terms appearing in the embodiments of this application, such as "first," "second," etc., are used only to distinguish an entity or operation from another entity or operation, without requiring or implying any actual relationship or order between these entities or operations. Furthermore, the words "comprising," "having," and "including," as well as other similar forms, are intended to be equivalent in meaning and are open-ended; one or more items following any of these words do not imply an exhaustive list of such items or that they are limited to only the listed items.

[0112] It should be noted that the sequence number of each step in this embodiment does not represent a limitation on the execution order of each step.

[0113] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor device, characterized in that, include: A semiconductor substrate is provided, the semiconductor substrate having a front side and a back side; A first type of full-scale ion implantation of the semiconductor substrate is performed on the front side of the semiconductor substrate to obtain a fully doped region; Multiple spaced inverse isolation doped regions of a second doping type are formed within the fully doped region, the second doping type being different from the first doping type; A back isolation structure is formed on the back side of the semiconductor substrate. The back isolation structure corresponds one-to-one with the inversion isolation doped region, and each back isolation structure extends into the corresponding inversion isolation doped region.

2. The method according to claim 1, characterized in that, The depth of the inverse isolation doped region is less than the depth of the fully doped region.

3. The method according to claim 1, characterized in that, Before forming a back-side isolation structure on the back side of the semiconductor substrate, the method further includes: The front side of the semiconductor substrate is bonded to the carrier wafer; The semiconductor substrate is thinned from its back side. The back-side isolation structure is formed on the back side of the thinned semiconductor substrate; The sum of the depth of the back isolation structure and the depth of the inversion isolation doped region is greater than the depth of the semiconductor substrate after thinning.

4. The method according to claim 3, characterized in that, The semiconductor substrate is thinned, including: The semiconductor substrate is thinned until its thickness is less than the implantation depth of full-scale ion implantation of the first doping type.

5. The method according to claim 3, characterized in that, The depth of the back isolation structure is greater than or equal to half the thickness of the semiconductor substrate after thinning. And / or, the depth of the inversion isolation doped region is less than or equal to half the thickness of the semiconductor substrate after thinning.

6. The method according to claim 5, characterized in that, The thickness of the semiconductor substrate after the thinning process is selected from: [1μm, 5μm]; The depth of the back isolation structure is selected from: [0.5μm, 5μm].

7. The method according to claim 1, characterized in that, The first doping type is N-type, and the second doping type is P-type.

8. The method according to claim 1, characterized in that, The semiconductor substrate is subjected to full-scale ion implantation of a first doping type using a first doping concentration, and an inversion isolation doped region of a second doping type is formed using a second doping concentration. The second doping concentration is greater than twice the first doping concentration.

9. The method according to claim 1, characterized in that, A back-side isolation structure is formed on the back side of the semiconductor substrate, including: A back trench is formed on the back side of the thinned semiconductor substrate; One or more of the following stacked layers are sequentially formed within the back trench: High K-value material layer and alumina layer.

10. The method according to claim 9, characterized in that, The high K-value material layer includes one or more stacked layers of the following: HfO2, La2O3, HfSiON, HfAlO2, ZrO2, Al2O3, and HfSiO4.

11. The method according to claim 1, characterized in that, Performing full-scale ion implantation of the semiconductor substrate with a first doping type includes: The full-scale ion implantation of the first doping type is achieved using a multi-round ion implantation process; Each round of ion implantation process has its own implantation depth.

12. A semiconductor device, characterized in that, include: A semiconductor substrate having a front side and a back side; A fully doped region is located on the front side of the semiconductor substrate, and the fully doped region has a first doping type; Multiple spaced inversion isolation doped regions are located within the fully doped region, and the inversion isolation doped regions have a second doping type, which is different from the first doping type. The back isolation structure is located on the back side of the semiconductor substrate and corresponds one-to-one with the inversion isolation doped region, with each back isolation structure extending into the corresponding inversion isolation doped region.

13. The semiconductor device according to claim 12, characterized in that, The depth of the inverse isolation doped region is less than the depth of the fully doped region.

14. The semiconductor device according to claim 12, characterized in that, The semiconductor substrate is a thinned semiconductor substrate; In this process, a portion of the fully doped region is removed in the depth direction.

15. The semiconductor device according to claim 12, characterized in that, The depth of the back isolation structure is greater than or equal to half the thickness of the semiconductor substrate after thinning. And / or, the depth of the inversion isolation doped region is less than or equal to half the thickness of the semiconductor substrate after thinning.

16. The semiconductor device according to claim 12, characterized in that, The first doping type is N-type, and the second doping type is P-type.

17. The semiconductor device according to claim 12, characterized in that, The semiconductor substrate has a first doping concentration, and the inversion isolation doped region has a second doping concentration; The second doping concentration is greater than twice the first doping concentration.

18. The semiconductor device according to claim 12, characterized in that, The back-side isolation structure includes: Back groove; The following one or more stacked layers, formed sequentially, are located within the back trench: High K-value material layer and alumina layer.

19. The semiconductor device according to claim 18, characterized in that, The high K-value material layer includes one or more stacked layers of the following: HfO2, La2O3, HfSiON, HfAlO2, ZrO2, Al2O3, and HfSiO4.

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