Radio-frequency switch circuit for implementing harmonic compensation, chip, and electronic device

Abstract

Disclosed in the present invention are a radio-frequency switch circuit for implementing harmonic compensation, a chip, and an electronic device. The radio-frequency switch circuit comprises a switch unit, a gate bias unit, a body terminal bias unit, a source-drain bias unit, a harmonic compensation unit, and a compensation bias unit. The gate bias unit, the body terminal bias unit, and the source-drain bias unit are connected to the switch unit to provide bias voltage for the switch unit; the harmonic compensation unit is connected to the switch unit and is used for compensating for harmonic components generated by the switch unit; and the compensation bias unit is connected to the harmonic compensation unit to provide compensation bias voltage for the harmonic compensation unit. When the radio-frequency switch circuit is in an off state, harmonic components generated by the harmonic compensation unit compensate for and cancel the harmonic components generated by the switch unit, thereby improving the harmonic performance of the radio-frequency switch circuit.

Description

A radio frequency switching circuit, chip, and electronic device for achieving harmonic compensation. Technical Field

[0001] This invention relates to a radio frequency switch circuit for implementing harmonic compensation, and also to an integrated circuit chip including the radio frequency switch circuit and corresponding electronic equipment, belonging to the field of radio frequency integrated circuit technology. Background Technology

[0002] As a crucial component of the RF front-end module, the RF switching circuit accurately switches the transmission path of RF signals, selecting the appropriate RF path. In wireless communication systems sharing an antenna, it enables the reception and transmission of RF signals. RF transceivers are typically located at the front end of wireless communication equipment, and the harmonic processing capability of the RF switching circuit directly affects the signal processing capability of the RF transceiver. Therefore, improving the harmonic performance of the RF switching circuit is essential for high-performance RF transceivers.

[0003] In the prior art, a typical radio frequency (RF) switch circuit is shown in Figure 1. To improve the withstand voltage capability of the RF switch circuit, the RF switch circuit usually adopts a stacked structure consisting of multiple levels of switching transistors M1 to M2. N A series-connected bias resistor R is formed and connected to the gate of each switching transistor. G The bias resistor R forms the gate bias network and is connected to the body terminal of each switching transistor. B The biasing network is formed by biasing resistors R connected to the source and drain of each switching transistor. ds This forms the source-drain bias network. The RF switching circuit adjusts the gate bias voltage V... GC and body terminal bias voltage V BC The magnitude of the transistors controls their on / off state. When used for antenna impedance tuning, the RF switching circuit is typically in the off state. In this off state, due to the inherent nonlinearity of the stacked transistors, as the antenna input power increases, the stacked transistors generate a large number of unwanted harmonics. These harmonics are transmitted from the RF switching circuit to the receiver circuit, thus degrading receiver noise or antenna efficiency.

[0004] Chinese patent application No. 202211093483.5 discloses a radio frequency (RF) switch circuit for optimizing third harmonics. This RF switch circuit includes a harmonic compensation circuit and a power detection bias circuit. The harmonic compensation circuit consists of three sub-modules connected in series: a bias diode compensation branch and two series-connected switch branches. The series-connected switch branches are composed of a gate common terminal resistor and M-stage switching units. Each switching unit includes a switching transistor, a bias transistor, a source-drain resistor, and a gate bias resistor. The power detection bias circuit provides different bias voltage values ​​based on the power of the input signal to the RF switch circuit to obtain corresponding harmonic compensation. Summary of the Invention

[0005] The primary technical problem to be solved by this invention is to provide a radio frequency switching circuit for achieving harmonic compensation.

[0006] Another technical problem to be solved by the present invention is to provide an integrated circuit chip including the radio frequency switch circuit and a corresponding electronic device.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] According to a first aspect of the present invention, a radio frequency switching circuit for implementing harmonic compensation is provided, comprising a switching unit, a gate bias unit, a body bias unit, a source-drain bias unit, a harmonic compensation unit, and a compensation bias unit, wherein:

[0009] The switching unit is used to connect or disconnect the transmission path of radio frequency signals;

[0010] The gate bias unit, the body bias unit, and the source-drain bias unit are connected to the switching unit to provide the switching unit with gate bias voltage, body bias voltage, and source-drain bias voltage.

[0011] The harmonic compensation unit is connected to the switching unit and is used to compensate for the harmonic components generated by the switching unit;

[0012] The compensation bias unit is connected to the harmonic compensation unit and provides a compensation bias voltage to the harmonic compensation unit.

[0013] When the radio frequency switch circuit is in the off state, the harmonic components generated by the harmonic compensation unit compensate for and cancel the harmonic components generated by the switch unit.

[0014] Optionally, the switching unit is composed of N switching transistors stacked in sequence with their source and drain connected. The source of the first switching transistor is connected to the radio frequency signal input terminal, and the drain of the Nth switching transistor is connected to the radio frequency signal output terminal, where N is a positive integer greater than or equal to 2.

[0015] Optionally, the harmonic compensation unit is composed of N compensation modules connected in series. The first and second ends of each compensation module are connected to the source and drain of a corresponding switching transistor in the switching unit. The bias end of each compensation module is connected to the compensation bias unit.

[0016] Optionally, the compensation module includes a first NMOS transistor, a second NMOS transistor, and a diode branch consisting of X diodes connected in series; wherein,

[0017] The gate of the first NMOS transistor is used as the first terminal, and the gate of the second NMOS transistor is used as the second terminal, which are connected to the source and drain of a corresponding switching transistor in the switching unit; the body terminals of the first NMOS transistor and the second NMOS transistor are connected in parallel with their own sources and then connected to the negative terminal of the diode branch; the drains of the first NMOS transistor and the second NMOS transistor are connected to the positive terminal of the diode branch and then used as bias terminals, which are connected to the first terminal of the corresponding compensation bias resistor in the compensation bias unit; where X is a positive integer.

[0018] Optionally, when the radio frequency switch circuit is in the on state, the compensation module is equivalent to a small amount of parasitic capacitance.

[0019] Optionally, when the size of the first NMOS transistor and the second NMOS transistor in the compensation module is 1 / 20 of the size of the switching transistor, the equivalent micro-parasitic capacitance of the compensation module is 1 / 40 of the source-drain parasitic capacitance of the switching transistor itself.

[0020] Optionally, when the RF switch circuit is in the off state, the first NMOS transistor and the second NMOS transistor in the compensation module alternately generate harmonic components in the positive half-cycle and the negative half-cycle to compensate for and cancel the harmonic components generated by the switch transistor.

[0021] Optionally, the magnitude of the compensated harmonic components can be adjusted by adjusting the on or off state of the diode branch in the compensation module, in conjunction with adjusting the number of diodes and / or the magnitude of the compensation bias voltage.

[0022] Optionally, the compensation bias unit is composed of N compensation bias resistors connected in series, wherein the first end of each of the N compensation bias resistors is connected to the bias end of a corresponding compensation module in the harmonic compensation unit, and the second end of the Nth compensation bias resistor is connected to the compensation bias voltage end.

[0023] Optionally, the gate bias unit is composed of N gate bias resistors connected in series, and the first end of each of the N gate bias resistors is connected to the gate of a corresponding switching transistor in the switching unit, and the second end of the Nth gate bias resistor is connected to the gate bias voltage terminal.

[0024] Optionally, the body-end biasing unit is composed of N body-end biasing resistors connected in series, wherein the first end of each of the N body-end biasing resistors is connected to the body end of a corresponding switching transistor in the switching unit, and the second end of the Nth body-end biasing resistor is connected to the body-end biasing voltage terminal.

[0025] Optionally, the source-drain bias unit is composed of N source-drain bias resistors connected in series, wherein the two ends of each source-drain bias resistor are connected to the source and drain of a corresponding switching transistor in the switching unit.

[0026] According to a second aspect of the present invention, an integrated circuit chip is provided, which includes the radio frequency switch circuit for implementing harmonic compensation described above.

[0027] According to a third aspect of the present invention, an electronic device is provided, which includes the radio frequency switching circuit described above for implementing harmonic compensation.

[0028] Compared with existing technologies, the RF switch circuit for harmonic compensation provided by this invention employs a technical solution where the compensation module in the harmonic compensation unit is correspondingly connected to the switching transistor in the switching unit. This allows the harmonic components generated by the harmonic compensation unit to compensate for or cancel the unwanted harmonic components generated by the switching unit, thereby improving the harmonic performance of the RF switch circuit. Therefore, the RF switch circuit for harmonic compensation provided by this invention has the advantages of ingenious and reasonable circuit design, low cost, and excellent harmonic performance. Attached Figure Description

[0029] Figure 1 is a circuit diagram of a typical radio frequency switch circuit in the prior art;

[0030] Figure 2 is a schematic diagram of the radio frequency switch circuit for harmonic compensation in an embodiment of the present invention.

[0031] Figure 3 is a graph showing the changes in the source voltage and drain voltage of the first switching transistor in the off state of the radio frequency switching circuit in an embodiment of the present invention.

[0032] Figure 4 is a graph showing the change in drain voltage of the first NMOS transistor and the second NMOS transistor in the compensation module when the RF switch circuit is in the off state in an embodiment of the present invention.

[0033] Figure 5 is a graph showing the change in gate-drain voltage of the first NMOS transistor and the second NMOS transistor in the compensation module when the RF switch circuit is in the off state in an embodiment of the present invention.

[0034] Figure 6 is a graph showing the change in gate-source voltage of the first NMOS transistor and the second NMOS transistor in the compensation module when the RF switch circuit is in the off state in an embodiment of the present invention.

[0035] Figure 7 is a simulation comparison diagram of the prior art solution and the technical solution provided in the embodiment of the present invention on the third harmonic.

[0036] Figure 8 is a schematic diagram of an electronic device using the radio frequency switching circuit provided by the present invention. Detailed Implementation

[0037] The technical content of the present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0038] As shown in Figure 2, an embodiment of the present invention provides a radio frequency switch circuit for harmonic compensation, including a switch unit 100, a gate bias unit 200, a body bias unit 300, a source-drain bias unit 400, a harmonic compensation unit 500, and a compensation bias unit 600. The gate bias unit, body bias unit, and source-drain bias unit are respectively connected to the switch unit, providing the switch unit with a gate bias voltage, a body bias voltage, and a source-drain bias voltage, respectively. The harmonic compensation unit is connected to the switch unit and is used to compensate for harmonic components generated by the switch unit. The compensation bias unit is connected to the harmonic compensation unit and provides a compensation bias voltage to the harmonic compensation unit.

[0039] The switching unit 100 is used to connect or disconnect the transmission path of radio frequency signals; the switching unit consists of N switching transistors M1 to M2. N The transistors are stacked in sequence with their source and drain connected. The source of the first switching transistor M1 is connected to the RF signal input terminal RFin. The Nth switching transistor M... N The drain of the signal is connected to the RF signal output terminal RFout; where N is a positive integer greater than or equal to 2.

[0040] When the RF switch circuit is in the off state, the harmonic components generated by the harmonic compensation unit compensate for and cancel the harmonic components generated by the switch unit.

[0041] As shown in Figure 2, in one embodiment of the present invention, the gate biasing unit 200 consists of N gate biasing resistors R G They are connected in series, and there are N gate bias resistors R G The first terminal of each of them is connected to the gate of the corresponding switching transistor in the switching unit, and the Nth gate bias resistor R GThe second terminal is connected to the gate bias voltage (V GC The GC terminal is connected to provide gate bias voltage for the N switching transistors in the switching unit.

[0042] The body-end biasing unit 300 consists of N body-end biasing resistors R B They are connected in series, and N terminal bias resistors R are used. B Each of the Nth transistors has its first terminal connected to the body terminal of a corresponding switching transistor in the switching unit, and the Nth body terminal bias resistor R B The second terminal and the body terminal bias voltage (V) BC The BC terminal is connected to provide body bias voltage for the N switching transistors in the switching unit.

[0043] The source-drain bias unit 400 is composed of N source-drain bias resistors Rds connected in series. Each source-drain bias resistor Rds is connected to the source and drain of a corresponding switching transistor in the switching unit, which is used to provide a bias voltage between the source and drain of the N switching transistors in the switching unit.

[0044] The harmonic compensation unit 500 is composed of N compensation modules connected in series. The first and second terminals of each compensation module are connected to the source and drain of a corresponding switching transistor in the switching unit to compensate for the harmonic components generated by the N switching transistors in the switching unit. The bias terminal of each compensation module is connected to the compensation bias unit.

[0045] Each compensation module includes a first NMOS transistor, a second NMOS transistor, and a diode branch consisting of X diodes connected in series, where X is a positive integer and X≥1. The gate of the first NMOS transistor (as its first terminal) and the gate of the second NMOS transistor (as its second terminal) are connected to the source and drain of the corresponding switching transistor in the switching unit, respectively. The body terminals of the first and second NMOS transistors are connected in parallel with their respective sources and then connected together to the negative terminal of the diode branch. The drains of both the first and second NMOS transistors are connected to the positive terminal of the diode branch and then serve as bias terminals connected to the first terminal of the corresponding compensation bias resistor in the compensation bias unit.

[0046] The compensation bias unit 600 consists of N compensation bias resistors R N They are connected in series, and there are N compensation bias resistors R. N Each of the following components has its first terminal connected to the bias terminal of a corresponding compensation module in the harmonic compensation unit, and the Nth compensation bias resistor R... N The second terminal is connected to the compensation bias voltage (V NC The NC connection is used to provide compensation bias voltage for the N compensation modules in the harmonic compensation unit.

[0047] In one embodiment of the present invention, when the radio frequency switch circuit is in the on state, the gate bias voltage V GC The voltage is 3V, and the body terminal bias voltage is V. BC The voltage is 0V, and the compensation bias voltage is V. NC -1V. The N switching transistors M1 to M2 in the switching unit. N After all transistors are turned on, the transmission path of the radio frequency signal from the input terminal RFin to the output terminal RFout is established. At this time, each of the N compensation modules in the harmonic compensation unit can be equivalent to a small parasitic capacitance. Optionally, when the size of the first NMOS transistor and the second NMOS transistor in the compensation module is 1 / 20 of the size of the switching transistor, the equivalent small parasitic capacitance of each compensation module is 1 / 40 of the source-drain parasitic capacitance of the switching transistor itself.

[0048] The following analysis uses the compensation module corresponding to the first switching transistor M1 as an example. Since the DC potential of both the source S1 and drain D1 of the first switching transistor M1 is 0V, the first NMOS transistor M in the compensation module... 11 The second NMOS transistor M 12 The gate DC potential of the first NMOS transistor is 0V. 11 The second NMOS transistor M 12 Drain D 11 D 12 The DC potential is determined by the compensation bias voltage V. NC The DC potential is determined to be -1V. Therefore, the diode branch is in the off state, and the first NMOS transistor M... 11 The second NMOS transistor M 12 In the off state. The first NMOS transistor M... 11 The second NMOS transistor M 12 Gate drain voltage V GD The voltage is 1V, and the gate and drain are equivalent to a reverse-biased parasitic capacitance. The gate-source voltage V GS At 0V, there is no equivalent reverse-biased parasitic capacitance between the gate and source. Furthermore, through design, the first NMOS transistor M in the compensation module... 11 The second NMOS transistor M 12 The size of the compensation module is 1 / 20 or less of the size of the first switching transistor M1, so that the equivalent small parasitic capacitance of each compensation module is 1 / 40 or less of the source-drain parasitic capacitance of the switching transistor itself. Its influence on the on-resistance of the switching transistor is negligible. Therefore, the harmonic compensation method in this embodiment will not introduce a negative impact on the conduction state of the RF switching circuit.

[0049] In one embodiment of the present invention, when the radio frequency switch circuit is in the off state, the gate bias voltage VGC -3V, body terminal bias voltage V BC -3V, compensation bias voltage V NC The voltage is -1V. Assuming the RF switching circuit is used for antenna impedance tuning, the signal at the antenna end is typically a sinusoidal signal. The first and second NMOS transistors in the compensation module alternately generate harmonic components during the positive and negative half-cycles to compensate for and cancel the harmonic components generated by the switching transistors. This will be explained in detail below.

[0050] In this embodiment, it is assumed that N=20 and X=1, that is, the switching unit consists of 20 switching transistors M1 to M2. 20 The transistors are stacked sequentially with source and drain connections. The diode branch in the compensation module contains only one diode. Assume the voltage distribution of the 20 stacked switching transistors is even, and each transistor has a maximum withstand voltage of 4V. When the first switching transistor M1 reaches its maximum withstand voltage, its source voltage V... S1 and drain voltage V D1 The variation curve of the source voltage V is shown in Figure 3. S1 The swing is 80V, and the drain voltage V D1 The swing amplitude is 76V, and the DC potential is 0V.

[0051] At this point, taking the compensation module corresponding to the first switching transistor M1 as an example in the harmonic compensation unit, the analysis and explanation will be carried out. Since the first NMOS transistor M... 11 The second NMOS transistor M 12 The dimensions are equal, therefore, the first NMOS transistor M... 11 The gate-drain parasitic capacitance Cgd11 and the second NMOS transistor M 12 The gate-drain parasitic capacitances Cgd12 are equal; therefore, the first NMOS transistor M... 11 The second NMOS transistor M 12 Drain D 11 D 12 The AC voltage is half the sum of the AC voltage at the source and drain of the first switching transistor M1. The first NMOS transistor M... 11 The second NMOS transistor M 12 Drain D 11 D 12 The DC voltage is the compensation bias voltage V. NC That is, -1V. Drain D 11 and D 12 The voltage satisfies the following formula:

[0052] Among them, v D11 v D12 The first NMOS transistor M 11 The second NMOS transistor M12 The voltage at the drain, v S1 v D1 These are the source AC voltage and drain AC voltage of the first switching transistor M1, respectively. NC To compensate for the bias voltage.

[0053] First NMOS transistor M 11 The second NMOS transistor M 12 The change curve of the drain voltage is shown in Figure 4. According to formula (1), its voltage swing is 78V and the DC voltage is -1V.

[0054] First NMOS transistor M 11 Gate drain voltage v GD11 It can be represented as: v GD11 =v G11 -v D11 =v S1 -v D11 (2)

[0055] Among them, v G11 For the first NMOS transistor M 11 The gate voltage.

[0056] Substituting formula (1) into formula (2) and rearranging, we get:

[0057] From formula (3), it can be seen that the first NMOS transistor M 11 The gate-drain voltage swing is 2V, and the DC voltage is 1V. Similarly, the second NMOS transistor M can be obtained. 12 Gate drain voltage v GD12 For: v GD12 =v G12 -v D12 =v D1 -v D11 (4)

[0058] Among them, v G12 For the second NMOS transistor M 12 The gate voltage.

[0059] From formula (5), it can be seen that the second NMOS transistor M 12 The gate-drain voltage swing is 2V, and the DC voltage is 1V. As shown in Figure 5, the first NMOS transistor M... 11 Gate drain voltage v GD11 With the second NMOS transistor M 12 Gate drain voltage v GD12 The phases are opposite.

[0060] Assuming the diode branch is not considered, the first NMOS transistor M 11 Gate-source voltage v GS11 It can be represented as: v GS11 =v G11 -v S11 =v S1 -v S11 (6)

[0061] Among them, v S11 For the first NMOS transistor M 11 The source voltage.

[0062] Will Substituting into formula (6) and rearranging, we get:

[0063] Similarly, the second NMOS transistor M can be obtained. 12 Gate-source voltage v GS12 for:

[0064] From formulas (7) and (8), it can be seen that the first NMOS transistor M 11 Gate-source voltage v GS11 Second NMOS transistor M 12 Gate-source voltage v GS12 The AC voltage swing is 2V and the DC voltage is 0V, as shown in Figure 6. The two are out of phase.

[0065] Based on the above analysis and as shown in Figures 5 and 6, it can be seen that the first NMOS transistor M... 11 Gate drain voltage v GD11 Always higher than the gate-source voltage v GS11 The voltage difference is 1V; the second NMOS transistor M 12 Gate drain voltage v GD12 Always higher than the gate-source voltage v GS12 The voltage difference is 1V; this voltage difference is the compensation bias voltage V. NC The absolute value of 1V is greater than the conduction threshold voltage of the diode branch. Therefore, the diode branch in the compensation module conducts, causing the first NMOS transistor M to... 11 The second NMOS transistor M 12 The source voltage changes in response to the change in the drain voltage.

[0066] When the RF switching circuit is in the off state, the sinusoidal RF signal at the input terminal RFin oscillates between the source and drain of the N switching transistors in the switching unit. Due to the parasitic capacitance between the source and drain of each of the N switching transistors, a large number of undesirable harmonics are generated, causing nonlinearity in the RF switching circuit and degrading performance indicators such as receiver noise or antenna efficiency. At this time, in the harmonic compensation unit, with the diode branch in the on state, the first NMOS transistor M... 11 The second NMOS transistor M 12 The source voltage changes in response to the drain voltage, due to the first NMOS transistor M 11 The second NMOS transistor M 12 The phase of the harmonic components generated by the parasitic capacitance between the source and drain is opposite to the phase of the harmonic components generated by the switching transistor. Therefore, it can compensate for the unwanted harmonic components generated by the switching transistor, and some harmonics are compensated and canceled out.

[0067] Specifically, the greater the AC voltage difference between the source and drain of each switching transistor in the switching unit, the more unwanted harmonics are introduced by the parasitic capacitance of each switching transistor. Simultaneously, in each compensation module of the harmonic compensation unit, the first NMOS transistor M... 11 The second NMOS transistor M 12 The larger the gate-drain voltage and gate-source voltage, the larger the gate-drain parasitic capacitances Cgd11 and Cgd12, and the gate-source parasitic capacitances Cgs11 and Cgs12, resulting in a larger compensation harmonic component. For example, as shown in Figures 3 and 5, at the peak of the positive half-cycle of the sine wave, i.e., t = 0.25us, the voltage swing between the source and drain of the switching transistor reaches its maximum value of 4V, the absolute value of the AC voltage at the source of the switching transistor is 80V, and the absolute value of the AC voltage at the drain is 76V, resulting in a large unwanted harmonic generated by the switching transistor. At this time, in the compensation module, the first NMOS transistor M... 11 Gate drain voltage v GD11 3V, second NMOS transistor M 12 Gate drain voltage v GD12 It is -1V, and at the same time, due to the first NMOS transistor M 11 The second NMOS transistor M 12 The source voltage changes in accordance with the drain voltage, therefore, the first NMOS transistor M... 11 Gate-source voltage v GS11 Also 3V, the second NMOS transistor M 12 Gate-source voltage v GS12 It is also -1V, therefore, the first NMOS transistor M 11 At this time, more harmonic components are generated, and the second NMOS transistor M... 12At this point, harmonics are essentially not generated. At the peak of the negative half-cycle of the sine wave, i.e., t = 0.75µs, the voltage swing between the source and drain of the switching transistor also reaches its maximum value of 4V. The absolute value of the AC voltage at the source of the switching transistor is 80V, and the absolute value of the AC voltage at the drain is 76V. The unwanted harmonic components generated by the switching transistor are the same as those at the peak of the positive half-cycle. At this time, in the compensation module, the first NMOS transistor M... 11 Gate drain voltage v GD11 -1V, second NMOS transistor M 12 Gate drain voltage v GD12 It is 3V, and at the same time, due to the first NMOS transistor M 11 The second NMOS transistor M 12 The source voltage changes in accordance with the drain voltage, therefore, the first NMOS transistor M... 11 Gate-source voltage v GS11 Also -1V, the second NMOS transistor M 12 Gate-source voltage v GS12 Also 3V, therefore, the second NMOS transistor M 12 At this time, a large number of harmonic components are generated, and the first NMOS transistor M... 11 At this point, virtually no harmonics are generated. In other words, the harmonics generated by the N compensation modules in the harmonic compensation unit during the negative half-cycle of the sine wave are the same as those generated during the positive half-cycle, and are all used to cancel out the unwanted harmonic components generated by the switching transistor.

[0068] In other embodiments of the present invention, assuming that in the above parameter settings, the compensation bias voltage V NC If not set to -1V, the number of diodes X in the diode branch of the compensation module will not be 1. When the compensation bias voltage V... NC When the absolute value of the voltage does not reach the conduction threshold voltage of the diode branch in the compensation module, the diode branch is in the off state, and the first NMOS transistor M in the compensation module... 11 The second NMOS transistor M 12 The source voltage no longer changes with the drain voltage, and the source DC voltage is 0V. At this time, the first NMOS transistor M... 11 Gate-source voltage v GS11 Second NMOS transistor M 12 Gate-source voltage v GS12 As shown in Figure 6, at the peak of the positive half-cycle of the sine wave, i.e., t = 0.25us, the first NMOS transistor M... 11 Gate drain voltage v GD11 3V, second NMOS transistor M 12 Gate drain voltage v GD12 The voltage is -1V, while at the same time, the first NMOS transistor M... 11 Gate-source voltage v GS112V, second NMOS transistor M 12 Gate-source voltage v GS12 The voltage is -2V, therefore, compared to the diode in the on state, the first NMOS transistor M... 11 At this point, the harmonic components are reduced, and the second NMOS transistor M... 12 At this point, harmonics are still virtually nonexistent. Similarly, at the peak of the negative half-cycle of the sine wave, i.e., t = 0.75µs, the first NMOS transistor M... 11 Gate drain voltage v GD11 -1V, second NMOS transistor M 12 Gate drain voltage v GD12 The voltage is 3V, and at the same time, the first NMOS transistor M... 11 Gate drain voltage v GD11 -2V, the second NMOS transistor M 12 Gate drain voltage v GD12 Since the voltage is 2V, compared to the diode in the on state, the second NMOS transistor M... 12 At this time, the harmonic components are reduced. The first NMOS transistor M 11 At this point, harmonics are essentially not generated. As the above analysis shows, by adjusting the on / off state of the diode branches in the compensation module, including adjusting the number of diodes and / or the compensation bias voltage V... NC The size of the value can be adjusted to compensate for the magnitude of the harmonic components.

[0069] The specific structure and working principle of a radio frequency switch circuit for harmonic compensation provided by the embodiments of the present invention have been described in detail above. In order to verify the superiority of the radio frequency switch circuit provided by the embodiments of the present invention in terms of harmonic performance, the inventors conducted a simulation comparison test of the third harmonic of the technical solution in this embodiment and the prior art solution shown in Figure 1. The simulation test results are shown in Figure 7.

[0070] In Figure 7, the X-axis represents the input power of the RF circuit, and the Y-axis represents the third harmonic component, both in dBm. As can be seen from Figure 7, when the input power of the RF signal increases to 48 dBm, the third harmonic generated by the RF switching circuit in the prior art is -28 dBm, while the third harmonic generated by the RF switching circuit provided in this embodiment of the invention is -42 dBm. Compared with the prior art, the technical solution provided in this embodiment of the invention achieves a 14 dB compensation optimization for the third harmonic, demonstrating a significant harmonic compensation effect. This can significantly improve the efficiency of the antenna under high-power operating conditions, thereby enhancing the performance and reliability of the wireless communication system.

[0071] It should be noted that the above embodiments are merely illustrative examples. In other embodiments of the present invention, the circuit structures of the gate bias unit 200, body bias unit 300, source-drain bias unit 400, and compensation bias unit 600 can be implemented in other ways to achieve the corresponding biasing function, and the present invention does not limit this.

[0072] Based on the aforementioned RF switch circuit, this embodiment of the invention further provides an integrated circuit chip. This integrated circuit chip includes the aforementioned RF switch circuit for harmonic compensation, and is used as an important component of the RF front-end module in a wireless communication system. Its function is to accurately switch the transmission path of RF signals and select the appropriate RF path. In the case of a shared antenna in a wireless communication system, it can realize the reception and transmission of RF signals; it can also be used for antenna impedance tuning to improve antenna efficiency. The specific structure of the RF switch circuit for harmonic compensation in this integrated circuit chip will not be described in detail here.

[0073] Furthermore, the radio frequency switching circuit for harmonic compensation provided by this invention can be used in electronic devices as an important component of communication systems. The electronic devices referred to here are computer devices that can be used in mobile environments and support multiple communication standards such as GSM, EDGE, CDMA, TD-SCDMA, WCDMA, TDD-LTE, FDD-LTE, and NR, including mobile phones, laptops, tablets, and in-vehicle computers. In addition, the technical solution provided by this invention is also applicable to other applications of radio frequency integrated circuits, such as communication base stations and intelligent connected vehicles.

[0074] In one embodiment of the present invention, as shown in FIG8, the electronic device includes at least a processor, a memory, and a communication component, and may further include a sensor component, a power supply component, a multimedia component, and an input / output interface as needed. The memory, communication component, sensor component, power supply component, multimedia component, and input / output interface are all connected to the processor. The memory can be a static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, etc. The processor can be a central processing unit (CPU), graphics processing unit (GPU), field-programmable gate array (FPGA), application-specific integrated circuit (ASIC), digital signal processing (DSP) chip, etc. Other communication components, sensor components, power supply components, multimedia components, etc., can be implemented using general-purpose components, and will not be specifically described here.

[0075] In summary, compared with existing technologies, the RF switch circuit for harmonic compensation provided by this invention, through a technical solution that connects the compensation module in the harmonic compensation unit to the switching transistor in the switching unit, enables the harmonic components generated by the harmonic compensation unit to compensate for or cancel the unwanted harmonic components generated by the switching unit, thereby improving the harmonic performance of the RF switch circuit. Therefore, the RF switch circuit for harmonic compensation provided by this invention has the advantages of ingenious and reasonable circuit design, low cost, and excellent harmonic performance.

[0076] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0077] The radio frequency switch circuit, chip, and electronic device for harmonic compensation provided by this invention have been described in detail above. Any obvious modifications made by those skilled in the art without departing from the essence of this invention will constitute an infringement of the patent rights of this invention and will incur corresponding legal liability.

Claims

1. A radio frequency switching circuit for harmonic compensation, characterized in that, It includes a switching unit, a gate bias unit, a body bias unit, a source-drain bias unit, a harmonic compensation unit, and a compensation bias unit, wherein: The switching unit is used to connect or disconnect the transmission path of radio frequency signals; The gate bias unit, the body bias unit, and the source-drain bias unit are connected to the switching unit to provide the switching unit with gate bias voltage, body bias voltage, and source-drain bias voltage. The harmonic compensation unit is connected to the switching unit and is used to compensate for the harmonic components generated by the switching unit; The compensation bias unit is connected to the harmonic compensation unit and provides a compensation bias voltage to the harmonic compensation unit. When the radio frequency switch circuit is in the off state, the harmonic components generated by the harmonic compensation unit compensate for and cancel the harmonic components generated by the switch unit.

2. The radio frequency switching circuit for harmonic compensation as described in claim 1, characterized in that, The switching unit is composed of N switching transistors stacked in sequence with their source and drain connected. The source of the first switching transistor is connected to the radio frequency signal input terminal, and the drain of the Nth switching transistor is connected to the radio frequency signal output terminal, where N is a positive integer greater than or equal to 2.

3. The radio frequency switching circuit for harmonic compensation as described in claim 1, characterized in that, The harmonic compensation unit is composed of N compensation modules connected in series. The first and second terminals of each compensation module are connected to the source and drain of a corresponding switching transistor in the switching unit. The bias terminal of each compensation module is connected to the compensation bias unit. N is a positive integer greater than or equal to 2.

4. The radio frequency switching circuit for harmonic compensation as described in claim 3, characterized in that, The compensation module includes a first NMOS transistor, a second NMOS transistor, and a diode branch consisting of X diodes connected in series. Wherein: the gate of the first NMOS transistor is used as the first terminal, and the gate of the second NMOS transistor is used as the second terminal, which are connected to the source and drain of a corresponding switching transistor in the switching unit; the body terminals of the first NMOS transistor and the second NMOS transistor are connected in parallel with their own sources and then connected to the negative terminal of the diode branch; and the drains of the first NMOS transistor and the second NMOS transistor are connected to the positive terminal of the diode branch and then used as bias terminals, which are connected to the first terminal of the corresponding compensation bias resistor in the compensation bias unit; where X is a positive integer.

5. The radio frequency switching circuit for harmonic compensation as described in claim 3 or 4, characterized in that, When the radio frequency switch circuit is in the ON state, the compensation module is equivalent to a small amount of parasitic capacitance.

6. The radio frequency switching circuit for harmonic compensation as described in claim 5, characterized in that, When the size of the first NMOS transistor and the second NMOS transistor in the compensation module is 1 / 20 of the size of the switching transistor, the equivalent micro-parasitic capacitance of the compensation module is 1 / 40 of the source-drain parasitic capacitance of the switching transistor itself.

7. The radio frequency switching circuit for harmonic compensation as described in claim 3 or 4, characterized in that, When the RF switch circuit is in the off state, the first NMOS transistor and the second NMOS transistor in the compensation module alternately generate harmonic components in the positive half-cycle and the negative half-cycle to compensate for and cancel the harmonic components generated by the switch transistor.

8. The radio frequency switching circuit for harmonic compensation as described in claim 3 or 4, characterized in that, By adjusting the on or off state of the diode branch in the compensation module, and in conjunction with adjusting the number of diodes and / or the magnitude of the compensation bias voltage, the magnitude of the compensation harmonic components can be adjusted.

9. The radio frequency switching circuit for harmonic compensation as described in claim 1, characterized in that, The compensation bias unit is composed of N compensation bias resistors connected in series. The first end of each of the N compensation bias resistors is connected to the bias end of a corresponding compensation module in the harmonic compensation unit, and the second end of the Nth compensation bias resistor is connected to the compensation bias voltage end. N is a positive integer greater than or equal to 2.

10. The radio frequency switching circuit for harmonic compensation as described in claim 1, characterized in that, The gate bias unit is composed of N gate bias resistors connected in series. The first end of each of the N gate bias resistors is connected to the gate of a corresponding switching transistor in the switching unit, and the second end of the Nth gate bias resistor is connected to the gate bias voltage terminal. N is a positive integer greater than or equal to 2.

11. The radio frequency switching circuit for harmonic compensation as described in claim 1, characterized in that, The body-end bias unit is composed of N body-end bias resistors connected in series. The first end of each of the N body-end bias resistors is connected to the body end of a corresponding switching transistor in the switching unit, and the second end of the Nth body-end bias resistor is connected to the body-end bias voltage terminal. N is a positive integer greater than or equal to 2.

12. The radio frequency switching circuit for harmonic compensation as described in claim 1, characterized in that: The source-drain bias unit is composed of N source-drain bias resistors connected in series. The two ends of each source-drain bias resistor are connected to the source and drain of a corresponding switching transistor in the switching unit.

13. An integrated circuit chip, characterized in that, Includes the radio frequency switching circuit for harmonic compensation as described in any one of claims 1 to 12.

14. An electronic device, characterized in that, Includes the radio frequency switching circuit for harmonic compensation as described in any one of claims 1 to 12.

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