Amplifier circuit

The amplifier circuit addresses the challenge of load fluctuations by switching between balanced and differential modes using phase shift circuits, achieving low loss and stable output power.

WO2026048131A1PCT designated stage Publication Date: 2026-03-05MURATA MFG CO LTD
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Patent Information

Application Number
PCT/JP2025/015407
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-08-28
Filing Date
2025-04-21
Publication Date
2026-03-05

AI Technical Summary

Technical Problem

Existing amplifier circuits struggle to selectively achieve low loss and suppress fluctuations in output power in response to load fluctuations.

Method used

The amplifier circuit incorporates a splitter, power amplifiers, transformers, and phase shift circuits to switch between modes that provide phase differences of +90°, +180°, -90°, and -180°, allowing it to operate in balanced or differential modes to manage load impedance fluctuations.

Benefits of technology

The circuit can selectively reduce loss and suppress output power fluctuations, offering low-noise and low-loss signal transmission based on required specifications.

✦ Generated by Eureka AI based on patent content.

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Abstract

An amplifier circuit (1) comprises: a branching filter (10) that switches the phase difference between signals at output terminals (102 and 103) between 90° and 180° and outputs the signals; a power amplifier (21) having an input terminal connected to the output terminal (102); a power amplifier (22) having an input terminal connected to the output terminal (103); a transformer (50) having an input coil (51) and an output coil (52); a -45° phase shift circuit (31) connected to a first path connecting the output terminal of the power amplifier (21) and one end of the input coil (51); a switch (41) connected in parallel to the -45° phase shift circuit (31); a +45° phase shift circuit (32) connected to a second path connecting the output terminal of the power amplifier (22) and the other end of the input coil (51); and a switch (42) connected in parallel to the +45° phase shift circuit (32).
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Description

Amplification circuit

[0001] The present invention relates to an amplifier circuit.

[0002] Patent Document 1 discloses an amplifier circuit including a carrier amplifier circuit, a peak amplifier circuit, and an impedance converter connected between the carrier amplifier circuit, the peak amplifier circuit, and a combining point.

[0003] Japanese Patent Application Laid-Open No. 2006-345341

[0004] However, with the amplifier circuit disclosed in Patent Document 1, it is difficult to selectively achieve low loss and suppress fluctuations in output power in response to load fluctuations in accordance with required specifications.

[0005] The present invention has been made to solve the above-mentioned problems, and aims to provide an amplifier circuit that can selectively reduce loss and suppress fluctuations in output power due to load fluctuations according to required specifications.

[0006] In order to achieve the above object, an amplifier circuit according to one aspect of the present invention includes a splitter having a first input terminal, a first output terminal, and a second output terminal, and configured to split a signal input to the first input terminal and switch between (1) a first mode in which a first signal is output from the first output terminal and a second signal, the second signal having a phase difference of +90° with respect to the first signal, and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal, the phase difference of +180° with respect to the third signal, and The power amplifier includes a first power amplifier connected to the output terminal, a second power amplifier having an input terminal connected to the second output terminal, a first transformer having a first input coil and a first output coil, a first -45° phase shift circuit connected to a first path connecting the output terminal of the first power amplifier and one end of the first input coil, a first switch connected in parallel to the first -45° phase shift circuit, a first +45° phase shift circuit connected to a second path connecting the output terminal of the second power amplifier and the other end of the first input coil, and a second switch connected in parallel to the first +45° phase shift circuit.

[0007] Also, an amplifier circuit according to one aspect of the present invention includes a splitter having a first input terminal, a first output terminal, and a second output terminal, and configured to split a signal input to the first input terminal and switch between (1) a first mode in which a first signal is output from the first output terminal and a second signal, the second signal having a phase difference of +90° with respect to the first signal, and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal, the phase difference of +180° with respect to the third signal, and the first power amplifier having an input terminal connected to the first output terminal, a second power amplifier having an input terminal connected to the second output terminal, a first transformer having a first input coil and a first output coil, a first switch connected to a first path connecting the output terminal of the first power amplifier and one end of the first input coil, a first -45° phase shift circuit connected between the first switch and ground, a second switch connected to a second path connecting the output terminal of the second power amplifier and the other end of the first input coil, and a first +45° phase shift circuit connected between the second switch and ground.

[0008] Moreover, an amplifier circuit according to one aspect of the present invention includes a branching filter having a first input terminal, a first output terminal, and a second output terminal, and configured to branch a signal input to the first input terminal and switch between (1) a first mode in which a first signal is output from the first output terminal and a second signal is output from the second output terminal, the second signal having a phase difference of -90° relative to the first signal, and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal is output from the second output terminal, the fourth signal having a phase difference of -180° relative to the third signal; a first power amplifier having an input terminal connected to the first output terminal; a second power amplifier having an input terminal connected to the second output terminal; a first transformer having a first input coil and a first output coil; a -90° phase shift circuit connected to a path connecting the output terminal of the second power amplifier and one end of the first input coil; and a first switch connected to the -90° phase shift circuit, wherein the output terminal of the first power amplifier is connected to the other end of the first input coil.

[0009] According to the present invention, it is possible to provide an amplifier circuit that can selectively achieve low loss and suppress fluctuations in output power due to load fluctuations in accordance with required specifications.

[0010] FIG. 1 is a circuit configuration diagram of an amplifier circuit according to an embodiment. FIG. 2 is a circuit configuration diagram of a duplexer according to an embodiment. FIG. 3 is a circuit configuration diagram of a duplexer according to a first modified example of the embodiment. FIG. 4A is a diagram illustrating a first example of a circuit configuration of a −45° phase shift circuit according to an embodiment. FIG. 4B is a diagram illustrating a second example of a circuit configuration of a −45° phase shift circuit according to an embodiment. FIG. 4C is a diagram illustrating a third example of a circuit configuration of a −45° phase shift circuit according to an embodiment. FIG. 5A is a diagram illustrating a first example of a circuit configuration of a +45° phase shift circuit according to an embodiment. FIG. 5B is a diagram illustrating a second example of a circuit configuration of a +45° phase shift circuit according to an embodiment. FIG. 5C is a diagram illustrating a third example of a circuit configuration of a +45° phase shift circuit according to an embodiment. FIG. 6A is a circuit state diagram of an amplifier circuit according to an embodiment in a balanced mode. FIG. 6B is a circuit state diagram of an amplifier circuit according to an embodiment in a differential mode. FIG. 7 is a diagram illustrating output power characteristics in a balanced mode and a differential mode. FIG. 8 is a circuit configuration diagram of an amplifier circuit according to a second modified example of the embodiment. 9A is a circuit state diagram of an amplifier circuit according to a third modification of the embodiment in a balanced mode. FIG. 9B is a circuit state diagram of the amplifier circuit according to the third modification of the embodiment in a differential mode. FIG. 10 is a circuit configuration diagram of an amplifier circuit according to a fourth modification of the embodiment. FIG. 11A is a circuit state diagram of an amplifier circuit according to a fifth modification of the embodiment in a balanced mode. FIG. 11B is a circuit state diagram of the amplifier circuit according to the fifth modification of the embodiment in a differential mode. FIG. 12A is a circuit state diagram of an amplifier circuit according to a sixth modification of the embodiment in a balanced mode. FIG. 12B is a circuit state diagram of the amplifier circuit according to the sixth modification of the embodiment in a differential mode.

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The embodiments and modifications described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, arrangements and connection forms of the components shown in the following embodiments and modifications are merely examples and are not intended to limit the present invention.

[0012] It should be noted that the drawings are schematic diagrams in which emphasis, omission, or adjustment of proportions has been appropriately made to illustrate the present invention, and are not necessarily strictly illustrated, and may differ from the actual shapes, positional relationships, and proportions. In the drawings, the same reference numerals are used to denote substantially the same components, and redundant explanations may be omitted or simplified.

[0013] Furthermore, in this disclosure, terms indicating the relationship between elements, such as parallel and perpendicular, terms indicating the shape of elements, such as rectangular, and numerical ranges do not only represent strict meanings, but also include substantially equivalent ranges, for example, differences of a few percent.

[0014] In the circuit configuration of the present disclosure, "connected" includes not only direct connection by connection terminals and / or wiring conductors, but also electrical connection via other circuit elements. "Connected between A and B" means connected to both A and B between A and B.

[0015] In addition, in this disclosure, a "path" means a transmission line composed of a wiring through which a high-frequency signal propagates, an electrode directly connected to the wiring, and a terminal directly connected to the wiring or the electrode.

[0016] In addition, in this disclosure, "component A is arranged in series on path B" means that both the signal input terminal and the signal output terminal of component A are connected to wiring, electrodes, or terminals that make up path B.

[0017] In the present invention, the terms "terminal," "input end," and "output end" refer to the points at which conductors within elements terminate. However, if the impedance of the conductor between elements is sufficiently low, a terminal is interpreted as any point on the conductor between elements or the entire conductor, not just a single point.

[0018] The "passband of a filter" is defined as the portion of the frequency spectrum transmitted by the filter over which the output power is not attenuated by more than 3 dB below the maximum output power. The upper and lower ends of the passband of a bandpass filter are therefore identified as the higher and lower frequencies of the two points at which the output power is attenuated by 3 dB below the maximum output power.

[0019] The term "transmission band" refers to a frequency band used for transmission in a communication device. The term "reception band" refers to a frequency band used for reception in a communication device. For example, in frequency division duplex (FDD), different frequency bands are used as the transmission band and the reception band, while in time division duplex (TDD), the same frequency band is used as the transmission band and the reception band. In particular, in FDD, when a communication device is implemented in a user equipment (UE) of a cellular network, an uplink operation band is used as the transmission band, and a downlink operation band is used as the reception band. Conversely, when a communication device is implemented as a base station (BS) of a cellular network, the downlink band is used as the transmission band, and the uplink band is used as the reception band.

[0020] The "phase shift" ("pass phase") between two terminals of a high-frequency signal can be obtained by applying a measurement RF probe to the two terminals and measuring the pass characteristic (S21) with a network analyzer. The "reflection phase" of a high-frequency signal at one terminal can be obtained by applying a measurement RF probe to the one terminal and measuring the pass characteristic (S11) with a network analyzer.

[0021] In the present invention, the numerical values ​​of the phase, phase shift (passing phase), reflection phase, and phase difference do not only represent the strict meaning, but also include a substantially equivalent range, for example, including a difference of about 30%.

[0022] (Embodiment) [1 Circuit Configuration of Amplifier Circuit 1] The circuit configuration of an amplifier circuit 1 according to this embodiment will be described. Fig. 1 is a circuit configuration diagram of the amplifier circuit 1 according to the embodiment. As shown in the figure, the amplifier circuit 1 includes a duplexer 10, power amplifiers 21 and 22, a transformer 50, a -45° phase shift circuit 31, a +45° phase shift circuit 32, switches 41, 42, and 43, and filters 61, 62, and 63.

[0023] The duplexer 10 has an input terminal 101 (first input terminal), an output terminal 102 (first output terminal), and an output terminal 103 (second output terminal). The duplexer 10 is configured to demultiplex an input signal input to the input terminal 101 and switch between two modes: (1) a first mode in which a first signal is output from the output terminal 102 and a second signal, the second signal having a phase difference of +90° relative to the first signal, is output from the output terminal 103; and (2) a second mode in which a third signal is output from the output terminal 102 and a fourth signal, the second signal having a phase difference of +180° relative to the third signal, is output from the output terminal 103. In this embodiment, in the first mode, the phase of the second signal is +90° relative to the phase of the first signal. In the second mode, the phase of the fourth signal is +180° relative to the phase of the third signal. Each of the input terminal 101 and the output terminals 102 and 103 may be a metal conductor such as a metal electrode or a metal bump, or may be a point (node) on a metal wiring. Here, a specific example of the circuit configuration of the duplexer 10 will be described.

[0024] 2 is a circuit diagram of a duplexer 10 according to an embodiment. As shown in the figure, the duplexer 10 includes a transformer 150, a +45° phase-shift circuit 131, a −45° phase-shift circuit 132, switches 141 and 142, an input terminal 101, and output terminals 102 and 103.

[0025] The transformer 150 is an example of a second transformer and includes an input coil 151 and an output coil 152. The input coil 151 is an example of a second input coil, and has one end connected to the input terminal 101 and the other end connected to ground. The output coil 152 is an example of a second output coil, and has one end connected to the +45° phase shift circuit 131 and the switch 141, and the other end connected to the −45° phase shift circuit 132 and the switch 142.

[0026] The +45° phase-shift circuit 131 is an example of a second +45° phase-shift circuit, and is connected between one end of the output coil 152 and the output terminal 102. The +45° phase-shift circuit 131 is configured to advance the signal output from the output terminal by 45° relative to the signal input from the input terminal. The switch 141 is an example of a fourth switch, and is connected in parallel to the +45° phase-shift circuit 131.

[0027] The −45° phase shift circuit 132 is an example of a second −45° phase shift circuit, and is connected between the other end of the output coil 152 and the output terminal 103. The −45° phase shift circuit 132 is configured to delay the signal output from the output terminal by 45° relative to the signal input from the input terminal. The switch 142 is an example of a fifth switch, and is connected in parallel to the −45° phase shift circuit 132.

[0028] According to the above-described configuration of the duplexer 10, in the first mode, both switches 141 and 142 are non-conductive, and the phase of the first signal is +45° relative to the phase of the input signal, and the phase of the second signal is -225° relative to the phase of the input signal. That is, in the first mode, the phase of the second signal is +90° relative to the phase of the first signal. In addition, in the second mode, both switches 141 and 142 are conductive, and the phase of the third signal is 0° relative to the phase of the input signal, and the phase of the fourth signal is -180° relative to the phase of the input signal. That is, in the second mode, the phase of the fourth signal is +180° relative to the phase of the third signal.

[0029] Note that the duplexer 10 is not limited to the circuit configuration described above. Fig. 3 is a circuit configuration diagram of a duplexer 10A according to a first modification of the embodiment. As shown in the figure, the duplexer 10A includes a transformer 160, a 90° hybrid circuit 170, switches 143, 144, 145, 146, 147, and 148, an input terminal 101, and output terminals 102 and 103.

[0030] Transformer 160 is an example of a third transformer and includes input coil 161 and output coil 162. Input coil 161 is an example of a third input coil, and one end is connected to input terminal 101 via switch 143 and the other end is connected to ground. Output coil 162 is an example of a third output coil, and one end is connected to output terminal 102 via switch 145 and the other end is connected to output terminal 103 via switch 147.

[0031] The 90° hybrid circuit 170 has an input terminal, a resistive termination, a first output terminal, a second output terminal, and transmission lines 171 and 172, and the input terminal is connected to the input terminal 101 via a switch 144, the resistive termination is connected to ground via a resistive element, the first output terminal is connected to the output terminal 102 via a switch 146, and the second output terminal is connected to the output terminal 103 via a switch 148.

[0032] The switch 143 is an example of a sixth switch and is connected between the input terminal 101 and one end of the input coil 161. The switch 144 is an example of a seventh switch and is connected between the input terminal 101 and an input end of the 90° hybrid circuit 170. The switch 145 is an example of an eighth switch and is connected between one end of the output coil 162 and the output terminal 102. The switch 146 is an example of a ninth switch and is connected between a first output end of the 90° hybrid circuit 170 and the output terminal 102. The switch 147 is an example of a tenth switch and is connected between the other end of the output coil 162 and the output terminal 103. The switch 148 is an example of an eleventh switch and is connected between a second output end of the 90° hybrid circuit 170 and the output terminal 103.

[0033] According to the above-described configuration of the duplexer 10A, in the first mode, switches 144, 146, and 148 are conductive, and switches 143, 145, and 147 are non-conductive, so that the phase of the first signal is −90° relative to the phase of the input signal, and the phase of the second signal is 0° relative to the phase of the input signal. That is, in the first mode, the phase of the second signal is +90° relative to the phase of the first signal. In the second mode, switches 144, 146, and 148 are non-conductive, and switches 143, 145, and 147 are conductive, so that the phase of the third signal is 0° relative to the phase of the input signal, and the phase of the fourth signal is −180° relative to the phase of the input signal. That is, in the second mode, the phase of the fourth signal is +180° relative to the phase of the third signal.

[0034] Next, returning to FIG. 1, the amplifier circuit 1 will be described.

[0035] The power amplifier 21 is an example of a first power amplifier, includes an amplifying transistor, has an input terminal connected to the output terminal 102 , and has an output terminal connected to the −45° phase shift circuit 31 and the switch 41 .

[0036] The power amplifier 22 is an example of a second power amplifier, includes an amplifying transistor, has an input terminal connected to the output terminal 103, and has an output terminal connected to the +45° phase shift circuit 32 and the switch .

[0037] The amplifying transistors included in each of the power amplifiers 21 and 22 are, for example, bipolar transistors such as heterojunction bipolar transistors (HBTs) or field-effect transistors such as metal-oxide-semiconductor field-effect transistors (MOSFETs). If the amplifying transistors are bipolar transistors, the input terminals of the power amplifiers 21 and 22 are, for example, base terminals of the bipolar transistors, and the output terminals of the power amplifiers 21 and 22 are, for example, collector terminals of the bipolar transistors. If the amplifying transistors are field-effect transistors, the input terminals of the power amplifiers 21 and 22 are, for example, gate terminals of the field-effect transistors, and the output terminals of the power amplifiers 21 and 22 are, for example, drain terminals of the field-effect transistors.

[0038] The transformer 50 is an example of a first transformer and includes an input coil 51 and an output coil 52. The input coil 51 is an example of a first input coil, and one end is connected to the output terminal of the power amplifier 21 via a −45° phase shift circuit 31 and a switch 41, and the other end is connected to the output terminal of the power amplifier 22 via a +45° phase shift circuit 32 and a switch 42. The output coil 52 is an example of a first output coil, and one end is connected to the filters 61 to 63 via a switch 43, and the other end is connected to ground.

[0039] The −45° phase-shift circuit 31 is an example of a first −45° phase-shift circuit, and is connected to a first path connecting the output end of the power amplifier 21 and one end of the input coil 51, and is configured to delay a signal output from the output end by 45° relative to a signal input from the input end. The switch 41 is an example of a first switch, and is connected in parallel to the −45° phase-shift circuit 31.

[0040] The +45° phase-shift circuit 32 is an example of a first +45° phase-shift circuit, and is connected to a second path connecting the output end of the power amplifier 22 and the other end of the input coil 51. The switch 42 is an example of a second switch, and is connected in parallel to the +45° phase-shift circuit 32.

[0041] Here, specific examples of circuit configurations of the −45° phase shift circuits 31 and 132 will be described. Fig. 4A is a diagram showing a first example of the circuit configuration of the −45° phase shift circuits 31 and 132 according to an embodiment. Fig. 4B is a diagram showing a second example of the circuit configuration of the −45° phase shift circuits 31 and 132 according to an embodiment. Fig. 4C is a diagram showing a third example of the circuit configuration of the −45° phase shift circuits 31 and 132 according to an embodiment.

[0042] 4A, the −45° phase-shift circuit 31 includes, for example, an inductor connected in series to a path connecting the input / output terminals 311 and 312, and a capacitor connected between the path and ground. With the above configuration, the −45° phase-shift circuit 31 forms a low-pass filter.

[0043] 4B, the −45° phase shift circuit 31 includes, for example, an inductor arranged in series in a path connecting the input / output terminals 311 and 312. With the above configuration, the −45° phase shift circuit 31 forms a low-pass filter.

[0044] 4C, the −45° phase shift circuit 31 includes, for example, a capacitor connected between ground and a path connecting the input / output terminals 311 and 312. With the above configuration, the −45° phase shift circuit 31 forms a low-pass filter.

[0045] Next, specific examples of circuit configurations of the +45° phase-shift circuits 32 and 131 will be described. Fig. 5A is a diagram showing a first example of the circuit configuration of the +45° phase-shift circuits 32 and 131 according to an embodiment. Fig. 5B is a diagram showing a second example of the circuit configuration of the +45° phase-shift circuits 32 and 131 according to an embodiment. Fig. 5C is a diagram showing a third example of the circuit configuration of the +45° phase-shift circuits 32 and 131 according to an embodiment.

[0046] 5A , the +45° phase-shift circuit 32 includes, for example, a capacitor connected in series to a path connecting the input / output terminals 321 and 322, and an inductor connected between the path and ground. With the above configuration, the +45° phase-shift circuit 32 forms a high-pass filter.

[0047] 5B, the +45° phase shift circuit 32 includes, for example, a capacitor arranged in series in a path connecting the input / output terminals 321 and 322. With the above configuration, the +45° phase shift circuit 32 forms a high-pass filter.

[0048] 5C , the +45° phase-shift circuit 32 includes, for example, an inductor connected between ground and a path connecting the input / output terminals 321 and 322. With the above configuration, the +45° phase-shift circuit 32 forms a high-pass filter.

[0049] Returning to FIG. 1, the amplifier circuit 1 will be described.

[0050] The filter 61 is an example of a first filter and has a pass band that includes the transmission band of band A (first band). The filter 62 is an example of a second filter and has a pass band that includes the transmission band of band B (second band). The filter 63 has a pass band that includes the transmission band of band C.

[0051] Switch 43 is an example of a third switch, and has a common terminal, a first selection terminal, a second selection terminal, and a third selection terminal, with the common terminal connected to one end of output coil 52, the first selection terminal connected to filter 61, the second selection terminal connected to filter 62, and the third selection terminal connected to filter 63.

[0052] According to the above configuration, the amplifier circuit 1 amplifies the signals of band A, band B, and band C, and can transmit each of the signals of band A, band B, and band C individually, or at least two of the three signals simultaneously.

[0053] The amplifier circuit 1 does not necessarily have to include the switch 43 and the filters 61 to 63.

[0054] [2 Amplification Modes of Amplifier Circuit 1] Next, a description will be given of the circuit state for each amplification mode of the amplifier circuit 1 according to the embodiment. The amplifier circuit 1 according to the present embodiment can execute a balanced mode (first mode) in which the phase difference between the output terminals (collector terminals) of the power amplifiers 21 and 22 is 90°, and a differential mode (second mode) in which the phase difference between the output terminals (collector terminals) of the power amplifiers 21 and 22 is 180°.

[0055] 6A is a circuit state diagram of the amplifier circuit 1 according to the embodiment in the balanced mode. In the balanced mode (first mode), the switches 41 and 42 are non-conductive. The duplexer 10 outputs the first signal from the output terminal 102 and the second signal from the output terminal 103 so that the phase of the second signal is +90° relative to the phase of the first signal.

[0056] In the balanced mode, the phase of the first signal at the output terminal 102 is, for example, −45°, and the phase of the second signal at the output terminal 103 is, for example, +45°. As a result, the phase of the first signal at the output terminal of the power amplifier 21 is, for example, −45°, and the phase of the second signal at the output terminal of the power amplifier 22 is, for example, +45°. Because the first signal passes through the −45° phase shift circuit 31, the phase of the first signal at one end of the input coil 51 is, for example, −90°. Also, because the second signal passes through the +45° phase shift circuit 32, the phase of the second signal at the other end of the input coil 51 is, for example, +90°. As a result, the first and second signals are combined in opposite phases by the transformer 50 and output from one end of the output coil 52. As a result, the phase difference between the output terminals of the power amplifiers 21 and 22 is 90°, and therefore the amplifier circuit 1 operates as a balanced amplifier that is resistant to impedance fluctuations in the load connected to the output side of the amplifier circuit 1.

[0057] 6B is a circuit state diagram of the amplifier circuit 1 according to the embodiment in a differential mode. In the differential mode (second mode), the switches 41 and 42 are conductive. The duplexer 10 outputs the third signal from the output terminal 102 and the fourth signal from the output terminal 103 so that the phase of the fourth signal is +180° relative to the phase of the third signal.

[0058] In the differential mode, the phase of the third signal at the output terminal 102 is, for example, −90°, and the phase of the fourth signal at the output terminal 103 is, for example, +90°. As a result, the phase of the third signal at the output end of the power amplifier 21 is, for example, −90°, and the phase of the fourth signal at the output end of the power amplifier 22 is, for example, +90°. Because the third signal bypasses the −45° phase shift circuit 31, the phase of the third signal at one end of the input coil 51 is, for example, −90°. Furthermore, because the fourth signal bypasses the +45° phase shift circuit 32, the phase of the fourth signal at the other end of the input coil 51 is, for example, +90°. As a result, the third and fourth signals are combined in opposite phases by the transformer 50 and output from one end of the output coil 52. According to this, in the amplifier circuit 1, the phase difference between the output terminals of the power amplifiers 21 and 22 is 180°, the third signal does not pass through the −45° phase-shift circuit 31, and the fourth signal does not pass through the +45° phase-shift circuit 32, so that the amplifier circuit 1 operates as a differential amplifier capable of low-noise and low-loss signal transmission, thereby improving the quality of the signal output from the amplifier circuit 1.

[0059] 7 shows the output power characteristics in balanced mode and differential mode. As shown in the figure, in differential mode, the output power of the amplifier circuit 1 fluctuates greatly with changes in load impedance. Large fluctuations in output power result in degradation of amplification efficiency and linearity. In contrast, in balanced mode, fluctuations in the output power of the amplifier circuit 1 with changes in load impedance can be suppressed.

[0060] Therefore, it is possible to provide an amplifier circuit 1 that can select between a balanced mode that can suppress fluctuations in output power in response to fluctuations in load impedance and a differential mode that is low noise and low loss, depending on required specifications.

[0061] In the amplifier circuit 1 according to this embodiment, for example, when a high-frequency signal of a first power class is input to the splitter 10, the balanced mode may be executed, and when a high-frequency signal of a second power class having a maximum output power smaller than the maximum output power allowed for the first power class is input to the splitter 10, the differential mode may be executed.

[0062] When the amplifier circuit 1 transmits a high-frequency signal of the first power class, the temperatures of the power amplifiers 21 and 22 and the filters 61 to 63 rise, and impedance fluctuations due to temperature changes also increase. Therefore, by selecting the balanced mode in this case, fluctuations in output power due to impedance fluctuations can be suppressed. Furthermore, the power handling requirements of the filters 61 to 63 can be relaxed, enabling the filters 61 to 63 to be made smaller. On the other hand, when the amplifier circuit 1 transmits a high-frequency signal of the second power class, by selecting the differential mode, priority can be given to reducing noise and loss in the high-frequency signal.

[0063] The first power class is, for example, PC2, and the second power class is, for example, PC3. The power class is a classification of the output power of a UE defined by the maximum output power, etc., and the smaller the power class value, the higher the power output allowed. For example, in 3GPP (registered trademark), the maximum output power allowed for power class 1 is 31 dBm, the maximum output power allowed for power class 1.5 is 29 dBm, the maximum output power allowed for power class 2 is 26 dBm, and the maximum output power allowed for power class 3 is 23 dBm.

[0064] Furthermore, in the amplifier circuit 1 according to this embodiment, for example, when a signal of band A and a signal of band B are transmitted simultaneously, the balanced mode may be executed, and when the signal of band A is transmitted alone, the differential mode may be executed.

[0065] When the amplifier circuit 1 simultaneously transmits multiple signals, the load impedance fluctuates significantly. Therefore, by selecting the balanced mode, fluctuations in output power due to impedance fluctuations can be suppressed. On the other hand, when the amplifier circuit 1 transmits a single signal, by selecting the differential mode, low noise and low loss of the high-frequency signal can be prioritized.

[0066] Furthermore, in the amplifier circuit 1 according to this embodiment, for example, when a high-frequency signal modulated with a first modulation bandwidth is input to the splitter 10, the balanced mode may be executed, and when a high-frequency signal modulated with a second modulation bandwidth narrower than the first modulation bandwidth is input to the splitter 10, the differential mode may be executed.

[0067] When the amplifier circuit 1 transmits a signal with a relatively wide modulation bandwidth, the load impedance fluctuates greatly. Therefore, in this case, selecting the balanced mode can suppress fluctuations in output power due to impedance fluctuations. On the other hand, when the amplifier circuit 1 transmits a signal with a relatively narrow modulation bandwidth, selecting the differential mode can prioritize low noise and low loss of high-frequency signals.

[0068] [3 Configuration of Amplifier Circuit 1A According to Modification 2] FIG. 8 is a circuit configuration diagram of an amplifier circuit 1A according to Modification 2 of the embodiment. As shown in the figure, the amplifier circuit 1A includes a duplexer 10, power amplifiers 21 and 22, a transformer 50, a −45° phase-shift circuit 31A, a +45° phase-shift circuit 32A, switches 41A, 42A, and 43, and filters 61, 62, and 63. The amplifier circuit 1A according to this modification differs from the amplifier circuit 1 according to the embodiment in the connection configuration of the −45° phase-shift circuit 31A and the +45° phase-shift circuit 32A. Therefore, the following description of the amplifier circuit 1A according to this modification will omit the same configuration as the amplifier circuit 1 according to the embodiment, and will focus on the connection configuration of the −45° phase-shift circuit 31A, the +45° phase-shift circuit 32A, and the switches 41A and 42A, which are different configurations.

[0069] The power amplifier 21 is an example of a first power amplifier, includes an amplifying transistor, has an input terminal connected to the output terminal 102 , and has an output terminal connected to the switch 41A and the transformer 50 .

[0070] The power amplifier 22 is an example of a second power amplifier, includes an amplifying transistor, has an input terminal connected to the output terminal 103 , and has an output terminal connected to the switch 42A and the transformer 50 .

[0071] Transformer 50 is an example of a first transformer and includes an input coil 51 and an output coil 52. Input coil 51 is an example of a first input coil, and one end is connected to the output terminal of power amplifier 21 and switch 41A, and the other end is connected to the output terminal of power amplifier 22 and switch 42A. Output coil 52 is an example of a first output coil, and one end is connected to filters 61 to 63 via switch 43, and the other end is connected to ground.

[0072] The switch 41A is an example of a first switch, and has one end connected to a first path connecting the output end of the power amplifier 21 and one end of the input coil 51, and the other end connected to the −45° phase shift circuit 31A.

[0073] The -45° phase shift circuit 31A is an example of a first -45° phase shift circuit, and is connected between the switch 41A and ground. When the switch 41A is in a conductive state, the -45° phase shift circuit 31A is configured to delay the signal at one end of the input coil 51 by 45° relative to the signal at the output end of the power amplifier 21.

[0074] The switch 42A is an example of a second switch, and one end is connected to a second path connecting the output terminal of the power amplifier 22 and one end of the input coil 51, and the other end is connected to the +45° phase shift circuit 32A.

[0075] The +45° phase shift circuit 32A is an example of a first +45° phase shift circuit, and is connected between the switch 42A and ground, and is configured to advance the signal at the other end of the input coil 51 by 45° relative to the signal at the output end of the power amplifier 22 when the switch 42A is in a conductive state.

[0076] The −45° phase-shift circuit 31A may have a specific circuit configuration such as any one of those shown in Figures 4A to 4C, and the +45° phase-shift circuit 32A may have a specific circuit configuration such as any one of those shown in Figures 5A to 5C.

[0077] According to the above configuration, the amplifier circuit 1A amplifies the signals of band A, band B, and band C, and can transmit each of the signals of band A, band B, and band C individually, or at least two of the three signals simultaneously.

[0078] The amplifier circuit 1A does not necessarily have to include the switch 43 and the filters 61 to 63.

[0079] The amplifier circuit 1A according to this modification can operate in a balanced mode (first mode) in which the phase difference at the output terminals (collector terminals) of the power amplifiers 21 and 22 is 90°, and a differential mode (second mode) in which the phase difference at the output terminals (collector terminals) of the power amplifiers 21 and 22 is 180°.

[0080] In the balanced mode (first mode), switches 41A and 42A are conductive. Also, duplexer 10 outputs the first signal from output terminal 102 and the second signal from output terminal 103 so that the phase of the second signal is +90° relative to the phase of the first signal.

[0081] In the balanced mode, the phase of the first signal at the output terminal 102 is, for example, −45°, and the phase of the second signal at the output terminal 103 is, for example, +45°. As a result, the phase of the first signal at the output terminal of the power amplifier 21 is, for example, −45°, and the phase of the second signal at the output terminal of the power amplifier 22 is, for example, +45°. Because the −45° phase-shift circuit 31A is connected to the first path, the phase of the first signal at one end of the input coil 51 is, for example, −90°. Furthermore, because the +45° phase-shift circuit 32A is connected to the second path, the phase of the second signal at the other end of the input coil 51 is, for example, +90°. As a result, the first and second signals are combined in opposite phases by the transformer 50 and output from one end of the output coil 52. As a result, the phase difference between the output terminals of the power amplifiers 21 and 22 is 90°, and therefore the amplifier circuit 1A operates as a balanced amplifier that is resistant to impedance fluctuations in the load connected to the output side of the amplifier circuit 1A.

[0082] In the differential mode (second mode), switches 41A and 42A are non-conductive. Also, duplexer 10 outputs the third signal from output terminal 102 and the fourth signal from output terminal 103 so that the phase of the fourth signal is +180° relative to the phase of the third signal.

[0083] In the differential mode, the phase of the third signal at the output terminal 102 is, for example, −90°, and the phase of the fourth signal at the output terminal 103 is, for example, +90°. As a result, the phase of the third signal at the output end of the power amplifier 21 is, for example, −90°, and the phase of the fourth signal at the output end of the power amplifier 22 is, for example, +90°. Because the −45° phase shift circuit 31A is not connected to the first path, the phase of the third signal at one end of the input coil 51 is, for example, −90°. Also, because the +45° phase shift circuit 32A is not connected to the second path, the phase of the fourth signal at the other end of the input coil 51 is, for example, +90°. As a result, the third and fourth signals are combined in opposite phases by the transformer 50 and output from one end of the output coil 52. According to this, the phase difference at the output terminals of the power amplifiers 21 and 22 in the amplifier circuit 1A is 180°, the third signal does not pass through the −45° phase shift circuit 31A, and the fourth signal does not pass through the +45° phase shift circuit 32A, so that the amplifier circuit 1A operates as a differential amplifier capable of low-noise and low-loss signal transmission.

[0084] Therefore, it is possible to provide an amplifier circuit 1A that can select, according to required specifications, either a balanced mode that can suppress fluctuations in output power in response to fluctuations in load impedance, or a differential mode that is low noise and low loss.

[0085] [4 Configuration of Amplifier Circuit 1B According to Modification 3] FIG. 9A is a circuit state diagram of amplifier circuit 1B according to Modification 3 of the embodiment in the balanced mode. FIG. 9B is a circuit state diagram of amplifier circuit 1B according to Modification 3 of the embodiment in the differential mode. As shown in FIGS. 9A and 9B , amplifier circuit 1B includes a branching filter 10, power amplifiers 21 and 22, a transformer 50, a quarter-wave transmission line 33, switches 43 and 44, and filters 61, 62, and 63. Compared to amplifier circuit 1 according to the embodiment, amplifier circuit 1B according to this modification differs in that quarter-wave transmission line 33 is provided instead of −45° phase shift circuit 31 and +45° phase shift circuit 32. Therefore, the following description of amplifier circuit 1B according to this modification will omit a description of the same configuration as amplifier circuit 1 according to the embodiment, and will focus on the different configurations of quarter-wave transmission line 33 and switch 44.

[0086] The duplexer 10 has an input terminal 101 (first input terminal), an output terminal 102 (first output terminal), and an output terminal 103 (second output terminal). The duplexer 10 is configured to demultiplex an input signal input to the input terminal 101 and switch between two modes: (1) a first mode in which a first signal is output from the output terminal 102 and a second signal, the second signal having a phase difference of −90° relative to the first signal, is output from the output terminal 103; and (2) a second mode in which a third signal is output from the output terminal 102 and a fourth signal, the second signal having a phase difference of −180° relative to the third signal, is output from the output terminal 103. In this modification, in the first mode, the phase of the second signal is −90° relative to the phase of the first signal. In the second mode, the phase of the fourth signal is −180° relative to the phase of the third signal.

[0087] The power amplifier 21 is an example of a first power amplifier, includes an amplifying transistor, has an input terminal connected to the output terminal 102 , and has an output terminal connected to the other terminal of the input coil 51 .

[0088] The power amplifier 22 is an example of a second power amplifier, includes an amplifying transistor, has an input end connected to the output terminal 103 , and has an output end connected to the quarter-wave transmission line 33 and the switch 44 .

[0089] The transformer 50 is an example of a first transformer and includes an input coil 51 and an output coil 52. The input coil 51 is an example of a first input coil, and one end is connected to the output terminal of the power amplifier 22 via the quarter-wave transmission line 33 and the switch 44, and the other end is connected to the output terminal of the power amplifier 21. The output coil 52 is an example of a first output coil, and one end is connected to the filters 61 to 63 via the switch 43, and the other end is connected to ground.

[0090] The quarter-wave transmission line 33 is an example of a -90° phase shift circuit, and is connected to a path connecting the output end of the power amplifier 22 and one end of the input coil 51, and is configured to delay the signal output from the output end by 90° relative to the signal input from the input end. The switch 44 is an example of a first switch, and is connected in parallel to the quarter-wave transmission line 33. The input end of the quarter-wave transmission line 33 is connected to the output end of the power amplifier 22, and the output end of the quarter-wave transmission line 33 is connected to one end of the input coil 51.

[0091] According to the above configuration, the amplifier circuit 1B amplifies the signals of band A, band B, and band C, and can transmit each of the signals of band A, band B, and band C individually, or at least two of the three signals simultaneously.

[0092] The amplifier circuit 1B does not necessarily have to include the switch 43 and the filters 61 to 63.

[0093] The amplifier circuit 1B according to this modification can operate in a balanced mode (first mode) in which the phase difference at the output terminals (collector terminals) of the power amplifiers 21 and 22 is 90°, and a differential mode (second mode) in which the phase difference at the output terminals (collector terminals) of the power amplifiers 21 and 22 is 180°.

[0094] 9A , in the balanced mode (first mode), switch 44 is in a non-conducting state. Also, duplexer 10 outputs the first signal from output terminal 102 and the second signal from output terminal 103 so that the phase of the second signal is +90° relative to the phase of the first signal.

[0095] In the balanced mode, the phase of the first signal at the output terminal 102 is, for example, +45°, and the phase of the second signal at the output terminal 103 is, for example, −45°. As a result, the phase of the first signal at the output end of the power amplifier 21 is, for example, +45°, and the phase of the second signal at the output end of the power amplifier 22 is, for example, −45°. The phase of the first signal at the other end of the input coil 51 is, for example, +45°. Furthermore, because the second signal passes through the quarter-wave transmission line 33, the phase of the second signal at one end of the input coil 51 is, for example, −135°. As a result, the first and second signals are combined in antiphase by the transformer 50 and output from one end of the output coil 52. As a result, the phase difference between the output ends of the power amplifiers 21 and 22 is 90°, and therefore the amplifier circuit 1B operates as a balanced amplifier that is resistant to impedance fluctuations in the load connected to the output side of the amplifier circuit 1B.

[0096] In the balanced mode, the power amplifier 21 functions as a carrier amplifier, and the power amplifier 22 functions as a peak amplifier. That is, in the balanced mode, the amplifier circuit 1B functions as a Doherty amplifier. As a result, the output impedance of the power amplifier 21 is higher when a small-power signal is input than when a large-power signal is input. That is, when a small-power signal is input, the power amplifier 22 is turned off, and the output impedance of the power amplifier 21 increases, allowing the amplifier circuit 1B to operate with high efficiency. On the other hand, when a large-power signal is input, the power amplifiers 21 and 22 perform a balanced operation, allowing the output of a large-power signal, and the output impedance of the power amplifier 22 is reduced, making it possible to suppress signal distortion.

[0097] 9B , in the differential mode (second mode), switch 44 is in a conductive state. Furthermore, branching filter 10 outputs the third signal from output terminal 102 and the fourth signal from output terminal 103 so that the phase of the fourth signal is −180° relative to the phase of the third signal.

[0098] In the differential mode, the phase of the third signal at output terminal 102 is, for example, +90°, and the phase of the fourth signal at output terminal 103 is, for example, −90°. As a result, the phase of the third signal at the output end of power amplifier 21 is, for example, +90°, and the phase of the fourth signal at the output end of power amplifier 22 is, for example, −90°. The phase of the third signal at the other end of input coil 51 is, for example, +90°. Furthermore, because the fourth signal passes through quarter-wave transmission line 33, the phase of the fourth signal at one end of input coil 51 is, for example, −90°. As a result, the third signal and the fourth signal are combined in antiphase by transformer 50 and output from one end of output coil 52. According to this, in the amplifier circuit 1B, the phase difference at the output ends of the power amplifiers 21 and 22 is 180°, the third signal does not pass through the phase shift circuit, and the fourth signal does not pass through the quarter-wave transmission line 33, so that the amplifier circuit 1B operates as a differential amplifier capable of low-noise and low-loss signal transmission.

[0099] Therefore, it is possible to provide an amplifier circuit 1B that can select, according to required specifications, either a balanced mode that can suppress fluctuations in output power in response to fluctuations in load impedance, or a differential mode that is low noise and low loss.

[0100] In the amplifier circuit 1B of this modified example, for example, when a high-frequency signal of a first power class is input to the splitter 10, the balanced mode may be executed, and when a high-frequency signal of a second power class having a maximum output power smaller than the maximum output power allowed for the first power class is input to the splitter 10, the differential mode may be executed.

[0101] When amplifier circuit 1B transmits a high-frequency signal of the first power class, the temperatures of power amplifiers 21 and 22 and filters 61 to 63 rise, and impedance fluctuations due to temperature changes also increase. Therefore, by selecting the balanced mode in this case, fluctuations in output power due to impedance fluctuations can be suppressed. Furthermore, the power durability of filters 61 to 63 can be relaxed, enabling filters 61 to 63 to be made smaller. On the other hand, when amplifier circuit 1B transmits a high-frequency signal of the second power class, by selecting the differential mode, priority can be given to reducing noise and loss in the high-frequency signal.

[0102] Furthermore, in the amplifier circuit 1B according to this modified example, for example, when a signal of band A and a signal of band B are transmitted simultaneously, the balanced mode may be executed, and when a signal of band A is transmitted alone, the differential mode may be executed.

[0103] When the amplifier circuit 1B simultaneously transmits multiple signals, the load impedance fluctuates significantly. Therefore, by selecting the balanced mode, fluctuations in output power due to impedance fluctuations can be suppressed. On the other hand, when the amplifier circuit 1B transmits a single signal, by selecting the differential mode, low noise and low loss of the high-frequency signal can be prioritized.

[0104] Furthermore, in the amplifier circuit 1B according to this modified example, for example, when a high-frequency signal modulated with a first modulation bandwidth is input to the splitter 10, the balanced mode may be executed, and when a high-frequency signal modulated with a second modulation bandwidth narrower than the first modulation bandwidth is input to the splitter 10, the differential mode may be executed.

[0105] When the amplifier circuit 1B transmits a signal with a relatively wide modulation bandwidth, the load impedance fluctuates greatly. Therefore, in this case, selecting the balanced mode can suppress fluctuations in output power due to impedance fluctuations. On the other hand, when the amplifier circuit 1B transmits a signal with a relatively narrow modulation bandwidth, selecting the differential mode can prioritize low noise and low loss of high-frequency signals.

[0106] In the amplifier circuit 1B according to this modification, the quarter-wave transmission line 33 does not have to be a line that delays the passing phase of the signal by 90°, but may be a −90° phase shift circuit.

[0107] 10 is a circuit diagram of an amplifier circuit 1C according to Modification 4 of the embodiment. The amplifier circuit 1C shown in the figure differs from the amplifier circuit 1B according to Modification 3 only in that a −90° phase shift circuit 33C is provided instead of the quarter-wave transmission line 33. Therefore, the following will describe the amplifier circuit 1C according to Modification 4, focusing only on the configurations of the −90° phase shift circuit 33C and the switch 44C that are different from those of the amplifier circuit 1B according to Modification 3.

[0108] 10, the −90° phase-shift circuit 33C includes an inductor 341 (first inductor) arranged in series in a path connecting the output terminal of the power amplifier 22 and one end of the input coil 51, a capacitor 342 (first capacitor) connected between the output terminal of the power amplifier 22 and the switch 44C, and a capacitor 343 (second capacitor) connected between one end of the input coil 51 and the switch 44C. With the above configuration, the −90° phase-shift circuit 33C forms a low-pass filter.

[0109] The switch 44C is an example of a first switch and is connected between the capacitors 342 and 343 and the ground.

[0110] With the above configuration, when the switch 44C is in a conductive state in the amplifier circuit 1C, the phase of the fourth signal at one end of the input coil 51 becomes +90° (delayed by 90°) relative to the phase at the output end of the power amplifier 22.

[0111] In amplifier circuit 1C, in the balanced mode (first mode), switch 44C is conductive. Furthermore, splitter 10 outputs a first signal from output terminal 102 and a second signal from output terminal 103 so that the phase of the second signal is +90° relative to the phase of the first signal. Since the phase difference between the output ends of power amplifiers 21 and 22 is 90°, amplifier circuit 1C operates as a balanced amplifier that is resistant to impedance fluctuations in the load connected to the output side of amplifier circuit 1C.

[0112] In amplifier circuit 1C, when in differential mode (second mode), switch 44C is non-conductive. Furthermore, splitter 10 outputs a third signal from output terminal 102 and a fourth signal from output terminal 103 so that the phase of the fourth signal is −180° relative to the phase of the third signal. In this manner, amplifier circuit 1C operates as a differential amplifier capable of low-noise, low-loss signal transmission because the phase difference between the output terminals of power amplifiers 21 and 22 is 180°, the third signal does not pass through the phase shift circuit, and the fourth signal does not pass through −90° phase shift circuit 33C.

[0113] [6 Configuration of Amplifier Circuit 1D According to Modification 5] FIG. 11A is a circuit state diagram of amplifier circuit 1D according to Modification 5 of the embodiment in a balanced mode. FIG. 11B is a circuit state diagram of amplifier circuit 1D according to Modification 5 of the embodiment in a differential mode. As shown in FIGS. 11A and 11B , amplifier circuit 1D includes splitter 10, power amplifiers 21 and 22, a transformer 50D, a quarter-wave transmission line 33, switches 43, 44, and 45, and filters 61, 62, and 63. The amplifier circuit 1D according to this modification differs from the amplifier circuit 1B according to Modification 3 in the configuration of the transformer 50D. Therefore, the following description of the amplifier circuit 1D according to this modification will omit a description of the same configuration as that of amplifier circuit 1B according to Modification 3, and will focus on the different configurations of transformer 50D and switch 45.

[0114] The transformer 50D includes an input coil 51 and an output coil 52D. One end of the input coil 51 is connected to the output terminal of the power amplifier 22 via the quarter-wave transmission line 33 and the switch 44, and the other end is connected to the output terminal of the power amplifier 21. One end of the output coil 52D is connected to the filters 61 to 63 via the switch 43, and the other end is connected to ground. In addition, an intermediate node between one end and the other end of the output coil 52D is connected to ground via the switch 45.

[0115] According to the configuration of the transformer 50D and the switch 45, the transformer 50D can change the impedance transformation ratio by switching the switch 45 between conductive and non-conductive states.

[0116] 11A, in the balanced mode, for example, the switch 45 is in a non-conductive state and the impedance transformation ratio is 1:m. On the other hand, in the differential mode, for example, as shown in FIG. 11B, the switch 45 is in a conductive state and the impedance transformation ratio is 1:n (n<m).

[0117] According to this, if the output power (average value) becomes smaller than the output power (average value) in the differential mode as a result of suppressing fluctuations in the output power in the balanced mode, the impedance conversion ratio of the transformer 50D can be increased in the balanced mode to increase the output power (average value). On the other hand, the impedance conversion ratio of the transformer 50D can be decreased in the differential mode to decrease the output power (average value). Therefore, it is possible to balance the output power between the balanced mode and the differential mode.

[0118] [7 Configuration of Amplifier Circuit 1E According to Modification 6] FIG. 12A is a circuit state diagram of amplifier circuit 1E according to Modification 6 of the embodiment in a balanced mode. FIG. 12B is a circuit state diagram of amplifier circuit 1E according to Modification 6 of the embodiment in a differential mode. As shown in FIGS. 12A and 12B , amplifier circuit 1E includes splitter 10, power amplifiers 21 and 22, transformer 50, quarter-wave transmission line 33, switches 44 and 46, and matching circuit 70. Amplifier circuit 1E according to this modification differs from amplifier circuit 1B according to Modification 3 in that switch 46 and matching circuit 70 are added. Therefore, the following description of amplifier circuit 1E according to this modification will omit a description of the same configuration as amplifier circuit 1B according to Modification 3, and will focus on the different configurations of switch 46 and matching circuit 70.

[0119] Although the switch 43 and the filters 61 to 63 are not shown in FIGS. 12A and 12B, the amplifier circuit 1E may include the switch 43 and the filters 61 to 63 on the output side of the switch 46 and the matching circuit 70.

[0120] The matching circuit 70 is an example of an impedance matching circuit, and is connected to one end of the output coil 52. The switch 46 is connected in parallel to the matching circuit 70.

[0121] According to the configuration of the matching circuit 70, it is possible to change the impedance transformation ratio by switching the switch 46 between conductive and non-conductive states.

[0122] 12A, in the balanced mode, for example, the switch 46 is turned on, bypassing the matching circuit 70. On the other hand, in the differential mode, for example, the switch 46 is turned off, allowing the output signal to pass through the matching circuit 70, as shown in FIG.

[0123] According to this, when the (average value of) output power becomes smaller than the (average value of) output power in the differential mode as a result of suppressing fluctuations in output power in the balanced mode, the (average value of) output power can be increased in the balanced mode without attenuating the signal in the matching circuit 70. On the other hand, the (average value of) output power can be reduced in the differential mode by attenuating the signal in the matching circuit 70. Therefore, it is possible to balance the output power between the balanced mode and the differential mode.

[0124] [8 Effects, etc.] As described above, the amplifier circuit 1 according to this embodiment includes a splitter 10 having an input terminal 101 and output terminals 102 and 103, and configured to split a signal input to the input terminal 101 and switch between (1) a balanced mode in which a first signal is output from the output terminal 102 and a second signal having a phase difference of +90° with respect to the first signal is output from the output terminal 103, and (2) a differential mode in which a third signal is output from the output terminal 102 and a fourth signal having a phase difference of +180° with respect to the third signal is output from the output terminal 103. The power amplifier includes a power amplifier connected to a terminal, a power amplifier having an input terminal connected to an output terminal, a transformer having an input coil and an output coil, a -45° phase shift circuit connected to a first path connecting the output terminal of the power amplifier and one end of the input coil, a switch connected in parallel to the -45° phase shift circuit, a +45° phase shift circuit connected to a second path connecting the output terminal of the power amplifier and the other end of the input coil, and a switch connected in parallel to the +45° phase shift circuit.

[0125] According to this, in the balanced mode, the phase difference between the output terminals of the power amplifiers 21 and 22 is 90°, so the amplifier circuit 1 operates as a balanced amplifier that is resistant to impedance fluctuations in the load connected to the output side of the amplifier circuit 1. In the differential mode, the phase difference between the output terminals of the power amplifiers 21 and 22 is 180°, so the third signal does not pass through the −45° phase shift circuit 31 and the fourth signal does not pass through the +45° phase shift circuit 32, so the amplifier circuit 1 operates as a differential amplifier capable of low-noise and low-loss signal transmission. This makes it possible to provide an amplifier circuit 1 that can suppress fluctuations in output power due to fluctuations in load impedance. It is also possible to provide an amplifier circuit 1 that can select between a balanced mode that can suppress fluctuations in output power due to fluctuations in load impedance and a differential mode that is low-noise and low-loss, depending on required specifications.

[0126] Also, for example, in the amplifier circuit 1, in the balanced mode, the switches 41 and 42 are in a non-conductive state, and in the differential mode, the switches 41 and 42 are in a conductive state.

[0127] This makes it possible to switch between the balanced mode and the differential mode with a simplified switch configuration.

[0128] Furthermore, for example, an amplifier circuit 1A according to a second modification includes a splitter 10 having an input terminal 101 and output terminals 102 and 103, and configured to split a signal input to the input terminal 101 and switch between (1) a balanced mode in which a first signal is output from the output terminal 102 and a second signal having a phase difference of +90° with respect to the first signal is output from the output terminal 103, and (2) a differential mode in which a third signal is output from the output terminal 102 and a fourth signal having a phase difference of +180° with respect to the third signal is output from the output terminal 103; 2, a power amplifier 22 having an input end connected to an output terminal 103, a transformer 50 having an input coil 51 and an output coil 52, a switch 41A connected to a first path connecting the output end of the power amplifier 21 and one end of the input coil 51, a -45° phase shift circuit 31A connected between the switch 41A and ground, a switch 42A connected to a second path connecting the output end of the power amplifier 22 and the other end of the input coil 51, and a +45° phase shift circuit 32A connected between the switch 42A and ground.

[0129] According to this, in the balanced mode, the amplifier circuit 1A operates as a balanced amplifier that is resistant to impedance fluctuations of the load connected to the output side of the amplifier circuit 1A because the phase difference between the output terminals of the power amplifiers 21 and 22 is 90°. In the differential mode, the amplifier circuit 1A operates as a differential amplifier that is capable of low-noise, low-loss signal transmission because the phase difference between the output terminals of the power amplifiers 21 and 22 is 180°, and the third signal does not pass through the −45° phase-shift circuit 31A and the fourth signal does not pass through the +45° phase-shift circuit 32A. This provides an amplifier circuit 1A that can suppress fluctuations in output power due to fluctuations in load impedance. Furthermore, it provides an amplifier circuit 1A that can select between a balanced mode that suppresses fluctuations in output power due to fluctuations in load impedance and a differential mode that is low-noise and low-loss, depending on the required specifications.

[0130] Also, for example, in the amplifier circuit 1A, in the balanced mode, the switches 41A and 42A are in a conductive state, and in the differential mode, the switches 41A and 42A are in a non-conductive state.

[0131] This makes it possible to switch between the balanced mode and the differential mode with a simplified switch configuration.

[0132] Also, for example, in the amplifier circuit 1 (1A), the −45° phase shift circuit 31 (31A) is a low-pass filter, and the +45° phase shift circuit 32 (32A) is a high-pass filter.

[0133] This makes it possible to appropriately shift the phase of a signal using a high-pass filter and a low-pass filter with a simplified circuit configuration.

[0134] Furthermore, for example, amplifier circuit 1B according to modification 3 and amplifier circuit 1C according to modification 4 have input terminal 101 and output terminals 102 and 103, and split a signal input to input terminal 101 to output (1) a balanced mode in which a first signal is output from output terminal 102 and a second signal having a phase difference of −90° with respect to the first signal is output from output terminal 103, and (2) a third signal is output from output terminal 102 and a fourth signal having a phase difference of −180° with respect to the third signal is output from output terminal 103. The present invention comprises a splitter (10) configured to switch between a differential mode and a power amplifier (21), an input terminal of which is connected to an output terminal (102), a power amplifier (22) having an input terminal of which is connected to an output terminal (103), a transformer (50) having an input coil (51) and an output coil (52), a -90° phase shift circuit connected to a path connecting the output terminal of the power amplifier (22) and one end of the input coil (51), and a first switch connected to the -90° phase shift circuit, and the output terminal of the power amplifier (21) is connected to the other end of the input coil (51).

[0135] According to this, in balanced mode, the amplifier circuit 1B operates as a balanced amplifier that is resistant to impedance fluctuations of the load connected to the output side of the amplifier circuit 1B because the phase difference between the output terminals of the power amplifiers 21 and 22 is 90°. Furthermore, in balanced mode, the amplifier circuit 1B functions as a Doherty amplifier, and when a low-power signal is input, the output impedance of the power amplifier 21 is high, allowing the amplifier circuit 1B to operate with high efficiency. On the other hand, when a high-power signal is input, the power amplifiers 21 and 22 perform balanced operation, allowing the output of a high-power signal, and the output impedance of the power amplifier 22 is low, allowing signal distortion to be suppressed. In differential mode, the amplifier circuit 1B operates as a differential amplifier capable of low-noise, low-loss signal transmission because the phase difference between the output terminals of the power amplifiers 21 and 22 is 180°. The third signal does not pass through the phase shift circuit, and the fourth signal does not pass through the −90° phase shift circuit. This allows the amplifier circuit 1B to suppress fluctuations in output power due to fluctuations in load impedance. Furthermore, it is possible to provide an amplifier circuit 1B that can select, according to required specifications, either a balanced mode that can suppress fluctuations in output power in response to fluctuations in load impedance, or a differential mode that is low noise and low loss.

[0136] Furthermore, for example, in the amplifier circuit 1B, the switch 44 is connected in parallel to the −90° phase shift circuit.

[0137] For example, in the amplifier circuit 1B, the -90° phase shift circuit is a quarter-wave transmission line 33, one end of which is connected to the output terminal of the power amplifier 22, and the other end of which is connected to one end of the input coil 51.

[0138] This allows the -90° phase shift circuit to be configured using a simplified transmission line.

[0139] Also, for example, in the amplifier circuit 1B, in the balanced mode, the switch 44 is in a non-conductive state, and in the differential mode, the switch 44 is in a conductive state.

[0140] This makes it possible to switch between the balanced mode and the differential mode using a simplified switch circuit.

[0141] Furthermore, for example, in the amplifier circuit 1C, the switch 44C is connected between the −90° phase shift circuit 33C and the ground.

[0142] For example, in the amplifier circuit 1C, the -90° phase shift circuit 33C includes an inductor 341 connected between the output terminal of the power amplifier 22 and one end of the input coil 51, a capacitor 342 connected between the path connecting the output terminal of the power amplifier 22 and the inductor 341 and the switch 44C, and a capacitor 343 connected between the path connecting one end of the input coil 51 and the inductor 341 and the switch 44C.

[0143] This allows the -90° phase shift circuit to be configured using a simplified low-pass filter.

[0144] Also, for example, in the amplifier circuit 1C, in the balanced mode, the switch 44C is in a conductive state, and in the differential mode, the switch 44C is in a non-conductive state.

[0145] This makes it possible to switch between the balanced mode and the differential mode using a simplified switch circuit.

[0146] For example, the amplifier circuits 1, 1A, 1B, and 1C further include a filter 61 having a pass band that includes the transmission band of band A, a filter 62 having a pass band that includes the transmission band of band B, and a switch 43 having a common terminal, a first selection terminal, and a second selection terminal, the common terminal being connected to one end of the output coil 52, the first selection terminal being connected to the filter 61, and the second selection terminal being connected to the filter 62, and the other end of the output coil 52 being connected to ground.

[0147] According to this, the amplifier circuits 1, 1A, 1B, and 1C amplify the signals of band A and band B, and can transmit the signals of band A and band B individually or both signals simultaneously.

[0148] Also, for example, in the amplifier circuits 1, 1A, 1B, and 1C, when a signal of band A and a signal of band B are transmitted simultaneously, the balanced mode is executed, and when a signal of band A is transmitted alone, the differential mode is executed.

[0149] According to this, when the amplifier circuit 1 (or 1A to 1C) simultaneously transmits multiple signals, fluctuations in load impedance become large. In this case, selecting the balanced mode can suppress fluctuations in output power due to impedance fluctuations. On the other hand, when the amplifier circuit 1 (or 1A to 1C) transmits a single signal, selecting the differential mode can prioritize low noise and low loss of high-frequency signals.

[0150] For example, in amplifier circuits 1, 1A, 1B, and 1C, when a high-frequency signal modulated with a first modulation bandwidth is input to splitter 10, the balanced mode is executed, and when a high-frequency signal modulated with a second modulation bandwidth narrower than the first modulation bandwidth is input to splitter 10, the differential mode is executed.

[0151] According to this, when the amplifier circuit 1 (or 1A to 1C) transmits a signal with a relatively wide modulation bandwidth, the load impedance fluctuates greatly. In this case, by selecting the balanced mode, it is possible to suppress fluctuations in output power due to impedance fluctuations. On the other hand, when the amplifier circuit 1 (or 1A to 1C) transmits a signal with a relatively narrow modulation bandwidth, by selecting the differential mode, it is possible to prioritize low noise and low loss of high-frequency signals.

[0152] Also, for example, in amplifier circuits 1, 1A, 1B, and 1C, when a high-frequency signal of a first power class is input to splitter 10, the balanced mode is executed, and when a high-frequency signal of a second power class having a maximum output power smaller than the maximum output power allowed for the first power class is input to splitter 10, the differential mode is executed.

[0153] According to this, when the amplifier circuit 1 (or 1A to 1C) transmits a high-frequency signal of the first power class, the temperatures of the power amplifiers 21 and 22 and the filters 61 to 63 rise, and impedance fluctuations due to temperature changes also increase. In this case, selecting the balanced mode can suppress fluctuations in output power due to impedance fluctuations. Furthermore, the power durability of the filters 61 to 63 can be relaxed, allowing the filters 61 to 63 to be made smaller. On the other hand, when the amplifier circuit 1 (or 1A to 1C) transmits a high-frequency signal of the second power class, selecting the differential mode can prioritize low noise and low loss of the high-frequency signal.

[0154] Also, for example, in the amplifier circuits 1, 1A, 1B, and 1C, the first power class is PC2 and the second power class is PC3.

[0155] For example, in amplifier circuits 1, 1A, 1B, and 1C, splitter 10 includes transformer 150 having input coil 151 and output coil 152, +45° phase shift circuit 131 connected between one end of output coil 152 and output terminal 102, switch 141 connected in parallel to +45° phase shift circuit 131, -45° phase shift circuit 132 connected between the other end of output coil 152 and output terminal 103, and switch 142 connected in parallel to -45° phase shift circuit 132, and one end of input coil 151 is connected to input terminal 101 and the other end of input coil 151 is connected to ground.

[0156] This makes it possible to provide a duplexer 10 that can switch the phase difference of the output signals between 90° and 180° using +45° phase shift circuits and −45° phase shift circuits with simplified circuit configurations.

[0157] Also, for example, in the amplifier circuits 1, 1A, 1B, and 1C, the duplexer 10A includes a transformer 160 having an input coil 161 and an output coil 162, a 90° hybrid circuit 170, a switch 143 connected between the input terminal 101 and one end of the input coil 161, a switch 144 connected between the input terminal 101 and the input end of the 90° hybrid circuit 170, a switch 145 connected between one end of the output coil 162 and the output terminal 102, a switch 146 connected between a first output end of the 90° hybrid circuit 170 and the output terminal 102, a switch 147 connected between the other end of the output coil 162 and the output terminal 103, and a switch 148 connected between a second output end of the 90° hybrid circuit 170 and the output terminal 103.

[0158] This makes it possible to provide a duplexer 10A that can switch the phase difference of the output signals between 90° and 180° using a transformer and a 90° hybrid circuit with a simplified circuit configuration.

[0159] (Other Embodiments, etc.) While the amplifier circuit according to the embodiment of the present invention has been described above with reference to the embodiment and modifications thereof, the amplifier circuit according to the present invention is not limited to the above-described embodiment and modifications. The present invention also includes other embodiments realized by combining any of the components in the above-described embodiment and modifications, modifications obtained by applying various modifications to the above-described embodiment and modifications that would occur to those skilled in the art without departing from the spirit of the present invention, and various devices incorporating the above-described amplifier circuit.

[0160] For example, in the amplifier circuits according to the above-described embodiments and modifications, other circuit elements and wiring may be inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings.

[0161] The features of the amplifier circuits described based on the above embodiments will be described below.

[0162] <1> A duplexer having a first input terminal, a first output terminal, and a second output terminal, configured to branch a signal input to the first input terminal and switch between: (1) a first mode in which a first signal is output from the first output terminal and a second signal is output from the second output terminal, the second signal having a phase difference of +90° with respect to the first signal; and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal is output from the second output terminal, the fourth signal having a phase difference of +180° with respect to the third signal; a first power amplifier having an input end connected to the first output terminal; a second power amplifier having an input end connected to the second output terminal; a first transformer having a first input coil and a first output coil; a first -45° phase shift circuit connected to a first path connecting the output end of the first power amplifier and one end of the first input coil; and a first switch connected in parallel to the first -45° phase shift circuit. an amplifier circuit comprising: a first +45° phase-shift circuit connected to a second path connecting an output terminal of the second power amplifier and the other end of the first input coil; and a second switch connected in parallel to the first +45° phase-shift circuit.

[0163] <2> The amplifier circuit according to <1>, wherein in the first mode, the first switch and the second switch are in a non-conductive state, and in the second mode, the first switch and the second switch are in a conductive state.

[0164] <3> A duplexer having a first input terminal, a first output terminal, and a second output terminal, configured to branch a signal input to the first input terminal and switch between: (1) a first mode in which a first signal is output from the first output terminal and a second signal is output from the second output terminal, the second signal having a phase difference of +90° with respect to the first signal; and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal is output from the second output terminal, the fourth signal having a phase difference of +180° with respect to the third signal; a first power amplifier having an input terminal connected to the first output terminal; a second power amplifier having an input terminal connected to the second output terminal; a first transformer having a first input coil and a first output coil; a first switch connected to a first path connecting an output terminal of the first power amplifier and one end of the first input coil; a first −45° phase shift circuit connected between the first switch and ground; and a second switch connected to a second path connecting the output terminal of the second power amplifier and the other end of the first input coil. a first +45° phase shift circuit connected between the second switch and ground.

[0165] <4> The amplifier circuit according to <3>, wherein in the first mode, the first switch and the second switch are in a conductive state, and in the second mode, the first switch and the second switch are in a non-conductive state.

[0166] <5> The amplifier circuit according to any one of <1> to <4>, wherein the first −45° phase-shift circuit is a low-pass filter, and the first +45° phase-shift circuit is a high-pass filter.

[0167] <6> An amplifier circuit comprising: a branching filter having a first input terminal, a first output terminal, and a second output terminal, and configured to branch a signal input to the first input terminal and switch between: (1) a first mode in which a first signal is output from the first output terminal and a second signal is output from the second output terminal, the second signal having a phase of −90° relative to the first signal; and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal is output from the second output terminal, the fourth signal having a phase of −180° relative to the third signal; a first power amplifier having an input terminal connected to the first output terminal; a second power amplifier having an input terminal connected to the second output terminal; a first transformer having a first input coil and a first output coil; a −90° phase shift circuit connected to a path connecting an output terminal of the second power amplifier and one end of the first input coil; and a first switch connected to the −90° phase shift circuit, wherein the output terminal of the first power amplifier is connected to the other end of the first input coil.

[0168] <7> The amplifier circuit according to <6>, wherein the first switch is connected in parallel to the −90° phase shift circuit.

[0169] <8> The amplifier circuit according to <7>, wherein the −90° phase shift circuit is a quarter-wave transmission line, one end of the quarter-wave transmission line is connected to an output end of the second power amplifier, and the other end of the quarter-wave transmission line is connected to one end of the first input coil.

[0170] <9> The amplifier circuit according to any one of <6> to <8>, wherein in the first mode, the first switch is in a non-conductive state, and in the second mode, the first switch is in a conductive state.

[0171] <10> The amplifier circuit according to <6>, wherein the first switch is connected between the −90° phase shift circuit and ground.

[0172] <11> The amplifier circuit according to <10>, wherein the −90° phase shift circuit includes: a first inductor connected between an output terminal of the second power amplifier and one end of the first input coil; a first capacitor connected between the first switch and a path connecting the output terminal of the second power amplifier and the first inductor; and a second capacitor connected between the first switch and a path connecting the one end of the first input coil and the first inductor.

[0173] <12> The amplifier circuit according to <10> or <11>, wherein in the first mode, the first switch is in a conductive state, and in the second mode, the first switch is in a non-conductive state.

[0174] <13> The amplifier circuit according to any one of <1> to <12>, further comprising: a first filter having a pass band including a transmission band of a first band; a second filter having a pass band including a transmission band of a second band; and a third switch having a common terminal, a first selection terminal, and a second selection terminal, the common terminal being connected to one end of the first output coil, the first selection terminal being connected to the first filter, and the second selection terminal being connected to the second filter, wherein the other end of the first output coil is connected to ground.

[0175] <14> The amplifier circuit according to <13>, wherein the first mode is executed when the first band signal and the second band signal are simultaneously transmitted, and the second mode is executed when the first band signal is transmitted alone.

[0176] <15> The amplifier circuit according to any one of <1> to <13>, wherein the first mode is executed when a high-frequency signal modulated with a first modulation bandwidth is input to the duplexer, and the second mode is executed when a high-frequency signal modulated with a second modulation bandwidth narrower than the first modulation bandwidth is input to the duplexer.

[0177] <16> The amplifier circuit according to any one of <1> to <13>, wherein the first mode is executed when a high-frequency signal of a first power class is input to the duplexer, and the second mode is executed when a high-frequency signal of a second power class having a maximum output power smaller than the maximum output power allowed for the first power class is input to the duplexer.

[0178] <17> The amplifier circuit according to <16>, wherein the first power class is PC2, and the second power class is PC3.

[0179] <18> The amplifier circuit according to any one of <1> to <17>, wherein the duplexer includes: a second transformer having a second input coil and a second output coil; a second +45° phase-shift circuit connected between one end of the second output coil and the first output terminal; a fourth switch connected in parallel to the second +45° phase-shift circuit; a second −45° phase-shift circuit connected between the other end of the second output coil and the second output terminal; and a fifth switch connected in parallel to the second −45° phase-shift circuit, wherein one end of the second input coil is connected to the first input terminal, and the other end of the second input coil is connected to ground.

[0180] <19> The amplifier circuit according to any one of <1> to <17>, wherein the branching filter includes: a third transformer having a third input coil and a third output coil; a 90° hybrid circuit; a sixth switch connected between the first input terminal and one end of the third input coil; a seventh switch connected between the first input terminal and an input end of the 90° hybrid circuit; an eighth switch connected between one end of the third output coil and the first output terminal; a ninth switch connected between a first output end of the 90° hybrid circuit and the first output terminal; a tenth switch connected between the other end of the third output coil and the second output terminal; and an eleventh switch connected between a second output end of the 90° hybrid circuit and the second output terminal.

[0181] The present invention can be widely used as an amplifier circuit disposed in a front end portion of communication devices such as mobile phones.

[0182] 1, 1A, 1B, 1C, 1D, 1E Amplifier circuit 10, 10A Splitter 21, 22 Power amplifier 31, 31A, 132 -45° phase shift circuit 32, 32A, 131 +45° phase shift circuit 33 1 / 4 wavelength transmission line 33C -90° phase shift circuit 41, 41A, 42, 42A, 43, 44, 44C, 45, 46, 141, 142, 143, 144, 145, 146, 147, 148 Switch 50, 50D, 150, 160 Transformer 51, 151, 161, Input coil 52, 52D, 152, 162 Output coil 61, 62, 63 Filter 70 Matching circuit 101 Input terminal 102, 103 Output terminal 170 90° hybrid circuit 171, 172 Transmission line 311, 312, 321, 322 Input / output terminal 341 Inductor 342, 343 Capacitor

Claims

1. A branching filter having a first input terminal, a first output terminal, and a second output terminal, configured to branch a signal input to the first input terminal and switch between (1) a first mode in which a first signal is output from the first output terminal and a second signal is output from the second output terminal, the second signal having a phase difference of +90° with respect to the first signal, and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal is output from the second output terminal, the fourth signal having a phase difference of +180° with respect to the third signal; a first power amplifier having an input terminal connected to the first output terminal; a second power amplifier having an input terminal connected to the second output terminal; a first transformer having a first input coil and a first output coil; a first -45° phase shift circuit connected to a first path connecting the output terminal of the first power amplifier and one end of the first input coil; and a first switch connected in parallel to the first -45° phase shift circuit. an amplifier circuit comprising: a first +45° phase-shift circuit connected to a second path connecting an output end of the second power amplifier and the other end of the first input coil; and a second switch connected in parallel to the first +45° phase-shift circuit.

2. The amplifier circuit according to claim 1, wherein in the first mode, the first switch and the second switch are in a non-conductive state, and in the second mode, the first switch and the second switch are in a conductive state.

3. A branching filter having a first input terminal, a first output terminal, and a second output terminal, configured to branch a signal input to the first input terminal and switch between (1) a first mode in which a first signal is output from the first output terminal and a second signal is output from the second output terminal, the second signal having a phase difference of +90° with respect to the first signal, and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal is output from the second output terminal, the fourth signal having a phase difference of +180° with respect to the third signal; a first power amplifier having an input terminal connected to the first output terminal; a second power amplifier having an input terminal connected to the second output terminal; a first transformer having a first input coil and a first output coil; a first switch connected to a first path connecting the output terminal of the first power amplifier and one end of the first input coil; a first -45° phase shift circuit connected between the first switch and ground; and a second switch connected to a second path connecting the output terminal of the second power amplifier and the other end of the first input coil. a first +45° phase shift circuit connected between the second switch and ground.

4. The amplifier circuit according to claim 3, wherein in the first mode, the first switch and the second switch are in a conductive state, and in the second mode, the first switch and the second switch are in a non-conductive state.

5. The amplifier circuit according to any one of claims 1 to 4, wherein the first -45° phase shift circuit is a low-pass filter, and the first +45° phase shift circuit is a high-pass filter.

6. An amplifier circuit comprising: a branching filter having a first input terminal, a first output terminal, and a second output terminal, and configured to branch a signal input to the first input terminal and switch between: (1) a first mode in which a first signal is output from the first output terminal and a second signal is output from the second output terminal, the second signal having a phase difference of -90° with respect to the first signal; and (2) a second mode in which a third signal is output from the first output terminal and a fourth signal is output from the second output terminal, the fourth signal having a phase difference of -180° with respect to the third signal; a first power amplifier having an input terminal connected to the first output terminal; a second power amplifier having an input terminal connected to the second output terminal; a first transformer having a first input coil and a first output coil; a -90° phase shift circuit connected to a path connecting the output terminal of the second power amplifier and one end of the first input coil; and a first switch connected to the -90° phase shift circuit, wherein the output terminal of the first power amplifier is connected to the other end of the first input coil.

7. The amplifier circuit according to claim 6, wherein the first switch is connected in parallel with the −90° phase shift circuit.

8. The amplifier circuit according to claim 7, wherein the -90° phase shift circuit is a quarter-wave transmission line, one end of the quarter-wave transmission line is connected to the output end of the second power amplifier, and the other end of the quarter-wave transmission line is connected to one end of the first input coil.

9. The amplifier circuit according to any one of claims 6 to 8, wherein in the first mode, the first switch is in a non-conductive state, and in the second mode, the first switch is in a conductive state.

10. The amplifier circuit according to claim 6, wherein the first switch is connected between the −90° phase shift circuit and ground.

11. The amplifier circuit according to claim 10, wherein the -90° phase shift circuit comprises: a first inductor connected between the output terminal of the second power amplifier and one end of the first input coil; a first capacitor connected between the first switch and a path connecting the output terminal of the second power amplifier and the first inductor; and a second capacitor connected between the first switch and a path connecting the one end of the first input coil and the first inductor.

12. The amplifier circuit according to claim 10 or 11, wherein in the first mode, the first switch is in a conductive state, and in the second mode, the first switch is in a non-conductive state.

13. The amplifier circuit according to any one of claims 1 to 12, further comprising: a first filter having a pass band that includes the transmission band of the first band; a second filter having a pass band that includes the transmission band of the second band; and a third switch having a common terminal, a first selection terminal and a second selection terminal, the common terminal being connected to one end of the first output coil, the first selection terminal being connected to the first filter, and the second selection terminal being connected to the second filter, wherein the other end of the first output coil is connected to ground.

14. The amplifier circuit according to claim 13, wherein the first mode is executed when the first band signal and the second band signal are transmitted simultaneously, and the second mode is executed when the first band signal is transmitted alone.

15. An amplifier circuit according to any one of claims 1 to 13, wherein the first mode is executed when a high-frequency signal modulated with a first modulation bandwidth is input to the duplexer, and the second mode is executed when a high-frequency signal modulated with a second modulation bandwidth narrower than the first modulation bandwidth is input to the duplexer.

16. An amplifier circuit according to any one of claims 1 to 13, wherein the first mode is executed when a high-frequency signal of a first power class is input to the splitter, and the second mode is executed when a high-frequency signal of a second power class having a maximum output power smaller than the maximum output power allowed for the first power class is input to the splitter.

17. The amplifier circuit of claim 16, wherein the first power class is PC2 and the second power class is PC3.

18. The amplifier circuit according to any one of claims 1 to 17, wherein the duplexer comprises: a second transformer having a second input coil and a second output coil; a second +45° phase-shift circuit connected between one end of the second output coil and the first output terminal; a fourth switch connected in parallel to the second +45° phase-shift circuit; a second -45° phase-shift circuit connected between the other end of the second output coil and the second output terminal; and a fifth switch connected in parallel to the second -45° phase-shift circuit, wherein one end of the second input coil is connected to the first input terminal and the other end of the second input coil is connected to ground.

19. The amplifier circuit according to any one of claims 1 to 17, wherein the branching filter comprises: a third transformer having a third input coil and a third output coil; a 90° hybrid circuit; a sixth switch connected between the first input terminal and one end of the third input coil; a seventh switch connected between the first input terminal and an input end of the 90° hybrid circuit; an eighth switch connected between one end of the third output coil and the first output terminal; a ninth switch connected between a first output end of the 90° hybrid circuit and the first output terminal; a tenth switch connected between the other end of the third output coil and the second output terminal; and an eleventh switch connected between a second output end of the 90° hybrid circuit and the second output terminal.

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