Method for producing multilayer substrates with an integrated conductor structure and multilayer substrates that can be produced according to the method

Abstract

In order to produce a plurality of multilayer substrates (100), each having an integrated conductor structure, a layer (102) of an organic dielectric is applied to a layered base substrate (101), followed by the formation of a plurality of conductor structures in a plurality of adjacent conductor structure regions (106) of the layered base substrate (101). The conductor structure regions (106) are isolated by separating the base substrate (101) in separation regions (119) that separate the conductor structure regions (106) from one another. According to the invention, the layer made of the organic dielectric is removed in the separation regions, forming preferably elongated trenches in the layer made of the organic dielectric, before the base substrate is separated. Preferably, a plasma is applied to the separation regions (119) in order to remove the organic dielectric. A multilayer substrate (100) produced in this way can be distinguished by an edge formed solely by the base substrate (101) protruding from the conductor structure region (106).

Description

[0001] METHOD FOR PRODUCING MULTI-LAYER SUBSTRATES WITH AN INTEGRATED LADDER STRUCTURE AND MULTI-LAYER SUBSTRATES PRODUCABLE ACCORDING TO THE METHOD

[0002] STRATE

[0003] AREA OF INVENTION

[0004] The invention relates to a method for producing multilayer substrates, each having an integrated conductor structure, and multilayer substrates produced according to the method.

[0005] BACKGROUND TO THE INVENTION

[0006] Multilayer substrates with an integrated conductor structure find diverse applications in microelectronics. Well-known examples include printed circuit boards, chiplets, and interposers.

[0007] Printed circuit boards (PCBs) serve as carriers for electronic components such as SMD components (Surface-Mount Device), BGA components (Ball Grid Array) or THT components (Through-Hole Technology).

[0008] A chiplet is a small, functional part of a larger microprocessor or system-on-a-chip (SoC). Instead of a large monolithic die (single chip) with a multitude of functions, a chiplet design divides different functional units into separate chips. These individual chips (chiplets) are then combined to form a multifunctional unit.

[0009] Interposers are substrates that physically and electrically connect different chips (such as chiplets). They are used as a kind of "adapter" between the chips and the actual substrate (e.g., a printed circuit board).

[0010] All these substrates typically have a multilayer structure with conductor structures in several levels. The conductor structures are separated from each other by dielectric layers. These dielectric layers are usually interrupted by vias (plated through-holes), which electrically connect conductor structures in different levels. Plastic-based films or sheets, often with fiber reinforcement, are commonly used as dielectric layers for printed circuit boards (PCBs). FR-4 (Flame Retardant 4) is probably the most widely used material for PCBs. It consists of an epoxy resin matrix in which a woven glass fiber material is embedded. FR-4 is known for its excellent mechanical and electrical properties, as well as its heat resistance.

[0011] Especially for interposers and chiplets, layers made of inorganic dielectric materials can be of interest instead of polymer-based dielectric layers. In recent years, glass, ceramics, silicon, and glass-ceramics have increasingly played a role as suitable inorganic dielectric materials for dielectric layers.

[0012] In particular, glass, ceramics and glass-ceramics have a very low dielectric constant, which leads to lower signal losses and better signal integrity, especially in high-frequency applications.

[0013] The use of glass, ceramics and glass-ceramics results in low dielectric losses, which in turn is ideal for high-speed and high-frequency applications.

[0014] They are more thermally stable than, for example, plastics, which increases the reliability of substrate layers made from these materials in thermally demanding environments.

[0015] They have a comparatively low coefficient of thermal expansion, which leads to higher dimensional stability and reduces the stress on solder joints during temperature changes.

[0016] They are mechanically very resilient and tolerate vibrations and shocks very well.

[0017] In particular, glass, ceramics and glass-ceramics are chemically inert and resist corrosion and chemical attacks, which can extend the service life of printed circuit boards, especially in aggressive environments.

[0018] Glass and glass ceramics, in particular, often have very smooth surfaces.

[0019] To manufacture chiplets and interposers, several layers of polymer-based layers, for example made of FR4 or other materials, can preferably be applied to both sides of a dielectric layer made of one of these inorganic materials. Conductor structures can then be embedded in or between these layers and interconnected by vias. In the case of a glass layer, these vias are called TGVs (through-glass vias). In the case of interposers, the layers and conductor structures are often referred to as a "redistribution layer" (RDL). The RDL makes it possible, for example, to distribute the electrical connections from the densely packed pins of a chip to more widely spaced pads or contacts on a printed circuit board.

[0020] The production of chiplets and interposers typically begins with an inorganic base substrate, such as a glass substrate measuring 600 mm x 600 mm and with a thickness of 200 pm to 2 mm. On this substrate, a large number of chiplets or interposers (e.g., 12 x 12) can be formed in parallel in separate areas by depositing the aforementioned polymer-based layers and conductive structures onto the base substrate. Individual layers are preferably deposited for all areas in a single step. For example, in a first step, a metal foil or a two-layer metal-polymer foil measuring 600 mm x 600 mm can be laminated across all areas onto the aforementioned glass substrate measuring 600 mm x 600 mm. Vias can be formed simultaneously in all areas or at least in the same processing step.

[0021] After these processes are completed, the formed chiplets and interposers are separated by cutting, in particular sawing, the base substrate along the boundaries between the areas.

[0022] One problem that can occur here results from the different coefficients of thermal expansion between the base substrate and the polymer-based layers applied to it. The layers on both sides of the base substrate can exert a strong pull on it, causing it to literally tear apart during singulation. This results in chiplets and interposers with damaged edges.

[0023] SUMMARY OF THE INVENTION The invention described below was based on the objective of providing a method for the production of chiplets and interposers in which existing problems with singulation are solved or at least reduced.

[0024] To solve this problem, the invention proposes the method described below, in particular a preferred embodiment of the method described below with the features of claim 1. A multilayer substrate produced or producible by the method is the subject of claim 12. Further developments of the invention are the subject of dependent claims. The wording of all claims is hereby incorporated by reference into the content of this description.

[0025] The process according to the invention is suitable for producing multilayer substrates, each having an integrated conductor structure. It comprises the following steps: a. Providing a layered base substrate made of a dielectric inorganic material, b. Applying a layer of an organic dielectric to the layered base substrate, c. Forming a plurality of conductor structures in several adjacent conductor structure regions of the layered base substrate, and d. Separating the conductor structure regions by cutting the base substrate into separation regions that separate the conductor structure regions from one another, thus obtaining the multilayer substrates to be produced.

[0026] With regard to the dielectric inorganic material and the substrate thereof, the method in preferred embodiments is characterized by at least one of the following additional features:

[0027] The dielectric inorganic material is a material from the group that includes glass, ceramics, glass-ceramics and silicon.

[0028] The layered base substrate has a thickness in the range of 25 pm to 2000 pm, preferably a thickness in the range of 100 pm to 1100 pm.

[0029] The layered base substrate is rectangular in shape. The layered base substrate has a length ranging from 100 mm to 800 mm and a width ranging from 100 mm to 800 mm.

[0030] It is particularly preferred that all of the above preferred features are implemented in combination.

[0031] Borosilicate, aluminosilicate, quartz, or soda-lime glass are preferred. Depending on the application, photosensitive glasses (especially from the lithium silicate glass family) and glasses with a high refractive index may be preferred.

[0032] Suitable ceramic substrates include, in particular, substrates made of AI2O3, ZrOVAbOs, AIN, Si3N4, BeO and BN.

[0033] A thickness within the aforementioned preferred range offers an optimal balance between mechanical stability and flexibility, thereby improving the substrate's resistance to mechanical stresses and thermal cycles. Preferably, the layered base substrate has a uniform thickness within one of the aforementioned ranges.

[0034] It is still preferred that the layered base substrate is square and has, for example, a side length of 600 mm * 600 mm.

[0035] The application of the organic dielectric layer to the layered base substrate is preferably carried out in such a way that the entire surface of the base substrate is covered by the layer, including the separation zones. The organic dielectric layer therefore preferably has dimensions that are equal to or greater than the dimensions of the base substrate.

[0036] The base substrate has a first side and a second side. Preferably, the described process involves the fabrication of multilayer structures consisting of several layers of an organic dielectric and conductor structures in multiple layers on both sides of the base substrate.

[0037] Regarding the layer of organic dielectric, the method in preferred embodiments is further characterized by at least one of the following additional features:

[0038] The organic dielectric layer is either an epoxy resin-based layer or a polyimide-based layer.

[0039] The layer of organic dielectric has a thickness in the range of 5 pm to 100 pm, preferably from 8 pm to 50 pm.

[0040] The layer of organic dielectric is a plastic film.

[0041] The layer of organic dielectric is laminated onto the substrate.

[0042] Epoxy resin and polyimide offer excellent electrical insulation and thermal stability. They are also chemically resistant, which increases the durability of the multilayer substrate being produced.

[0043] The preferred thickness of the organic dielectric layer allows for flexible adaptation to various application scenarios, offering a good balance between insulation and mechanical stability.

[0044] Using a film facilitates processing and integration into the manufacturing process, which reduces production costs and increases efficiency.

[0045] In a particularly preferred embodiment of an epoxy resin-based layer, an ABF film (ABF = Ajinomoto Build-up Film) is used.

[0046] Optionally, the organic dielectric layer may include fillers, in particular dielectric fillers. For example, the organic dielectric layer may be a film made of one of the aforementioned polymer materials in which silicon dioxide particles are embedded.

[0047] Suitable dielectric fillers include, in particular, metal or semimetal oxides (besides silicon dioxide, especially aluminum oxide, zirconium oxide, or titanium oxide) and other ceramic fillers (especially silicon carbide, boron nitride, or boron carbide). Silicon can also be used if necessary.

[0048] Lamination ensures uniform and reliable adhesion of the layer. However, it is also possible to apply the organic dielectric layer to the substrate in other ways, for example by slit or spin coating. The inventive method is particularly distinguished by the fact that, in step e., the organic dielectric layer is removed in the separation areas by forming grooves, preferably elongated grooves, before carrying out step d. above.

[0049] Preferably, the layer is removed from the organic dielectric in such a way that the base substrate is exposed in the separation areas, i.e., it is no longer covered by the organic dielectric after removal.

[0050] It has been found that this measure offers surprisingly significant advantages when separating the base substrate. The occurrence of tensile forces in the separation zones is almost completely eliminated. Consequently, the rate of cases in which, for example, chiplets and interposers result with damaged edges is significantly reduced.

[0051] In principle, a first conductor structure can be created directly on the base substrate in the conductor structure regions, which is then covered by the layer of organic dielectric. Preferably, however, the layer of organic dielectric is first applied to the base substrate, and the conductor structure is then formed within or on top of it. In particular, forming a conductor structure embedded in the layer is preferred, as this is subject to lower pressures when further layers are applied. The formation of the conductor structures is described in more detail below.

[0052] In particularly preferred embodiments, the method is characterized by the following additional feature f: f. To remove the organic dielectric, the separation areas are treated with a plasma.

[0053] Plasma application is also known as plasma etching. Plasma etching is a precise and clean process that is ideally suited for removing organic dielectrics. All separation zones can be treated with the plasma simultaneously. To generate the plasma, a process gas from the group consisting of O₂, H₂, N₂, argon, helium, CF₄, C₃F₈, CHF₃, and mixtures of the aforementioned gases, such as O₂ / CF₄, can be subjected to an electrical discharge. The plasma application preferably takes place at a temperature in the range of -15 °C to 200 °C, and more preferably in the range of -15 °C to 80 °C.

[0054] In principle, liquid etchants can also ensure a uniform and effective removal of the organic dielectric.

[0055] All areas where no organic dielectric is to be removed must, of course, be protected before the respective etching process. For example, a metal mask layer provides effective protection against the effects of a plasma.

[0056] The method is particularly preferably characterized by at least one of the following features a. to e.: a. The trenches encircle the conductor structure areas to be separated and delineate them from one another. b. The conductor structure areas are rectangular. c. The conductor structure areas have lengths and widths in the range of 3 mm to 300 mm. d. The trenches encircling the conductor structure areas to be separated have widths in the range of 10 µm to 5 mm. e. The trenches encircling the conductor structure areas to be separated form a grid structure on the base substrate.

[0057] The bottom of the trenches corresponds to the separation zones where the organic dielectric is removed.

[0058] Regarding the formation of conductor structures, the method is preferably characterized by at least one of the following additional features a. to d.: a. To form conductor structures in the conductor structure regions, depressions and / or elongated grooves are introduced into the layer of organic dielectric in the conductor structure regions by means of a plasma and filled with a metal. b. The removal of the dielectric in the separation regions (and thus the formation of the grooves surrounding the conductor structure regions to be separated) and the introduction of the depressions and / or grooves within the conductor structure regions are carried out simultaneously by means of the same plasma. c. The grooves surrounding the conductor structure regions to be separated are filled with a filler metal. d.The filling of the trenches surrounding the conductor structure areas to be isolated, and the filling of the depressions and / or trenches (formed according to the immediately preceding feature a.) within the conductor structure areas, is carried out simultaneously with the same filler metal.

[0059] Preferably, identical structures are formed in all conductor structure areas with the aim of obtaining a large number of identical multilayer substrates when the base substrate is separated.

[0060] The formation of conductor structures within the conductor structure areas by filling depressions and / or elongated grooves with a metal, as well as the prior formation of the depressions and / or elongated grooves using a plasma, is described, for example, in WO 2023 / 036888 A1 or in WO 2021 / 001167 A1 of the applicant in connection with printed circuit boards. The techniques described therein can also be applied within the scope of the present invention. Reference is hereby made to the corresponding descriptions. For example, to create the depressions and / or elongated grooves, the layer of organic dielectric within the conductor structure areas can be partially masked with a cover metal layer. The plasma then removes the areas not covered by the cover metal layer, forming the depressions and / or elongated grooves.The depressions and / or elongated trenches are then filled with the filler metal and the top layer of metal is removed.

[0061] Conductor structures formed in this way are characterized by being embedded in the organic dielectric layer. Consequently, the subsequent application of further dielectric layers results in comparatively low pressures acting on the conductor structures, which has a positive effect on existing impedance and signal velocity requirements. The fact that channels can be formed with exceptionally high accuracy using plasma etching also has a positive effect in this regard.

[0062] The removal of the dielectric in the separation zones directly leads to the formation of the grooves that encircle the conductor structure sections to be separated. Preferably, the depressions and / or grooves within the conductor structure sections are created using the same plasma that is also used to remove the dielectric in the separation zones. Particularly preferably, both are performed simultaneously in the same step.

[0063] A similar procedure is preferably followed for the subsequent filling of the depressions and / or trenches formed within the conductor structure areas with the filler metal. Here too, it is preferred that the aforementioned filling of the trenches surrounding the conductor structure areas to be separated takes place simultaneously with the formation of the conductor structures within the conductor structure areas in the same work step, and that the trenches surrounding the conductor structure areas to be separated and the depressions and / or trenches within the conductor structure areas are filled with the same filler metal.

[0064] In principle, it is also possible to form the conductor structures not by embedding them, but by placing them on top of the organic dielectric layer. To create the conductor structures in the conductor areas, a metal layer can be applied to the organic dielectric layer and, after a masking step, selectively removed, particularly by an etching process (subtractive formation of a conductor structure). However, this is disadvantageous with regard to the aforementioned impedance and signal velocity requirements. Furthermore, the plasma treatment for removing the dielectric in the separation areas would then potentially have to be performed in a separate step, which would be disadvantageous.

[0065] A particular advantage arises when removing the layer from the organic dielectric in the separation areas requires no separate steps. Instead, it is preferable to accomplish this removal within steps that are already necessary for forming the conductor structures in the conductor structure areas. The same applies to filling the trenches surrounding the conductor structure areas to be separated with the filler metal. This measure is also preferably carried out within steps that are already necessary for forming the conductor structures in the conductor structure areas, namely when filling the depressions and / or elongated trenches in the conductor structure areas with the aforementioned metal.

[0066] The multilayer substrates to be produced preferably have conductor layers in several planes, specifically, as mentioned above, preferably on the first and second sides of the base substrate. The process for forming such substrates is preferably characterized by at least one of the following features: a. A subsequent layer of organic dielectric is applied to the layer of organic dielectric. b. Further conductor structures are formed in or on the subsequent layer within the conductor structure regions. Preferably, these are separated from previously formed conductor structures by the subsequent layer.

[0067] In a further development of this variant of the process, the process is preferably characterized by the immediately following feature a.: a. To form the further conductor structures in or on the subsequent layer, depressions and / or elongated grooves are introduced into the conductor structure areas of the subsequent layer by means of a plasma, which are filled with a metal.

[0068] The application of the subsequent layer and the formation of conductor structures in or on the subsequent layer, preferably with the aid of the plasma, can in principle be repeated any number of times, so that substrates with in principle any number of dielectric layers and conductor structures in different planes can be formed in this way.

[0069] As a result, each conductor structure area preferably comprises several conductor structures in multiple layers, separated from each other by dielectric layers applied to the base substrate. Besides plasma technology followed by filling the resulting grooves and / or depressions with a filler metal, the additional conductor structures can also be formed, for example, by a subtractive process, with the aforementioned respective advantages and disadvantages.

[0070] In a preferred further development, each conductor structure area on the first and second side of the base substrate comprises several conductor structures in multiple layers, which are separated from each other by the dielectric layers applied to the base substrate (the layer applied first to the base substrate and the subsequent layers).

[0071] Preferably, the subsequent layers consist of the same organic dielectric as the first layer of organic dielectric applied to the base substrate. And, as in the case of the first layer of organic dielectric applied to the base substrate, the subsequent layers are preferably applied in the form of films.

[0072] Subsequent layers are preferably applied in such a way that the entire surface of the base substrate, including the separation zones, is covered by the respective subsequent layer. Accordingly, it may be preferable or even necessary to remove each subsequent layer from the separation zones after its application. Furthermore, it may be preferable, necessary, or expedient to fill any trench formed in the subsequent layer with a filler metal, as described above, after removing the organic dielectric from the respective subsequent layer in the separation zones.

[0073] Removing the dielectric in the separation areas after each subsequent layer application ensures that mechanical stresses acting on the base substrate can be kept low throughout the entire process.

[0074] The method according to the invention is characterized in preferred embodiments by at least one of the following features: a. After the application of the subsequent layer, preferably after each application of a subsequent layer, the subsequent layer is removed in the separation areas, forming trenches, preferably elongated trenches, in the subsequent layer. b. The trenches formed are filled with a metal. c. The trenches are filled with the same metal that is used to form the further conductor structures. d. The trenches surrounding the conductor structure areas to be separated in the layer of organic dielectric applied to the layered base substrate, and the trenches surrounding the conductor structure areas to be separated in the subsequent layer(s), are all filled with a metal.

[0075] If the dielectric organic material of the layer applied to the layered base substrate and the dielectric organic material of the subsequent layer or layers are always removed in the separation areas, the grooves formed in the subsequent layer or layers preferably lie exactly above the grooves surrounding the conductor structure areas, preferably filled with the filler metal, in the layer of organic dielectric applied to the layered base substrate.

[0076] When all the trenches are filled with a metal, the metal fillings form a common metal frame that encloses the conductor structure areas across all layers of an organic dielectric (the layer of organic dielectric applied to the base substrate and the subsequent layers).

[0077] The method according to the invention is characterized in preferred embodiments by at least one of the following features: a. The grooves formed in the subsequent layer, which surround the conductor structure areas to be separated, are filled with the same metal as the grooves surrounding the conductor structure areas to be separated in the layer of organic dielectric material first applied to the base substrate and arranged between the subsequent layer and the base substrate. b.By filling the trenches formed in the subsequent layer, which surround the conductor structure areas to be isolated, with the metal, a metal frame is formed, which encompasses the metal fillings in the trenches formed in the subsequent layer, which surround the conductor structure areas to be isolated, and the metal fillings in the trenches surrounding the conductor structure areas to be isolated in the layer of organic dielectric first applied to the base substrate, located between the subsequent layer and the base substrate, and which encloses the conductor structure areas over all layers, i.e. over the first applied layer and the subsequent layer and, if applicable, further subsequent layers.

[0078] This can be used to advantage. It is preferred to also remove the filler metal from the separation areas before the singulation step. In this respect, the method according to the invention is preferably characterized by the following feature: a. Before step d of claim 1, filler metal located in the trenches surrounding the conductor structure areas to be singulated is removed, preferably in one step.

[0079] In the case of the aforementioned metal frame, the filler metal can thus be removed from all layers in a single operation. Removal is preferably carried out by wet chemical etching.

[0080] The filler metal in the grooves surrounding the conductor structure areas serves to protect the grooves, and especially the groove walls, before the final singulation step, for example from unwanted effects of plasma treatment and also for temporary mechanical stabilization. However, it interferes with the singulation process and is therefore preferably removed.

[0081] The filler metal used in the present invention is preferably copper. Accordingly, the removal is preferably carried out using an etching solution capable of etching copper.

[0082] According to the invention, it is preferred that conductor structures in different planes on one side of the base substrate and / or on different sides of the base substrate are interconnected by vias. Such vias can be formed, for example, by drilling and metallizing the resulting hole. However, it is also possible to form corresponding holes by etching with the plasma described above and subsequently filling them with a metal. The base substrate is preferably cut using a laser. This is made possible, not least, by the inventive exposure of the separation areas, in which, in preferred embodiments, neither organic dielectric nor metal is present during the cutting process. The laser thus only needs to cut through the layer of organic dielectric.

[0083] In further particularly preferred embodiments, the method is characterized by one of the following additional features: a. The separation of the base substrate (101) takes place in the separation areas (119) such that the multilayer substrates (100) formed by the separation have at least one edge that is formed solely by the base substrate (101) projecting from the conductor structure area (106). b. The base substrate projecting from the conductor structure area (106) forms an elongated projection with a width in the range of 10 pm to 2 mm, preferably with a width of 20 pm to 1 mm.

[0084] The formation of such a superstructure offers several advantages. In particular, the superstructure can provide mechanical relief to the edge regions of the multilayer substrates. As mentioned earlier, significant tensile stresses can occur when sawing an inorganic base substrate with applied organic layers, as is done, for example, in the production of interposers or chiplets. These stresses often manifest themselves, especially at the edges of the substrates, in the form of delaminations or breakouts.

[0085] If, however, the base substrate is cut in the middle of the separation zones, leaving a portion of the separation area on both sides of the cut as the aforementioned overhang, the critical stress zones can be kept away from the sensitive areas with conductor structures. The overhang acts as a stress barrier and further reduces the risk of local damage to the multilayer structure. This is particularly relevant to the well-known SeWaRe phenomenon (Separation of Wafer by Residual Stress), in which residual stresses cause glass breakage or edge chipping.

[0086] In particularly preferred embodiments, the method is characterized by one of the following additional features: a. The multilayer substrate to be produced is an interposer. b. The multilayer substrate to be produced is a chiplet.

[0087] A multilayer substrate according to the invention has a conductor structure region with an integrated conductor structure and is particularly characterized by an edge formed solely by a base substrate projecting from the conductor structure region. The conductor structure region with the integrated conductor structure and the projecting edge have already been explained in the description of the method according to the invention.

[0088] In principle, any multilayer substrate that has been or can be produced according to the method described above is the subject of the present invention.

[0089] BRIEF DESCRIPTION OF THE DRAWINGS

[0090] Exemplary embodiments of the invention are explained in more detail below with reference to drawings.

[0091] Figures 1 and 2 schematically illustrate the process of a preferred variant of the method according to the invention (cross-sectional views).

[0092] Figure 3 shows a top view of a base substrate including conductor structure areas separated from each other by separation zones before a singulation step.

[0093] Figure 4 schematically illustrates the problems of the state of the art in singulating multilayer substrates (cross-sectional view).

[0094] Figure 5 schematically illustrates the edge region of a multilayer substrate produced according to the invention with an integrated conductor structure (cross-sectional view).

[0095] DESCRIPTION OF A PREFERRED EXECUTION EXAMPLE

[0096] In a process according to Figures 1 and 2, a layered base substrate 101 made of glass is provided in a first step. Layers 102 and 103 of an organic dielectric are applied to both sides of this substrate. The layers 102 and 103 are preferably applied in the form of films, for example, by adhesive bonding. After application, elongated grooves and depressions 104 and 105 are introduced into the layers 102 and 103 using a plasma. These grooves and depressions are then filled with a filler metal in a subsequent step. The result of these process steps is shown in sub-Figure A. Here, the grooves 104 filled with filler metal define separation zones that enclose and delineate conductor structure regions 106. Within the conductor structure regions 106, the grooves and depressions 105 filled with filler metal form conductor structures within the planes of the layers 102 and 103.

[0097] In a subsequent step, layers 107 and 108 are deposited onto layers 102 and 103 of the organic dielectric. Elongated grooves and depressions 109 and 110 are also created in these layers using a plasma and filled with a filler metal. Layers 107 and 108 consist of the same material as layers 102 and 103, and the filler metal is the same as that used to fill the grooves and depressions 104 and 105 in layers 102 and 103. The result of these process steps is shown in sub-figure B.

[0098] The dielectric organic material of the subsequent layers 107 and 108 was removed from the separation zones, as had previously been the dielectric material of layers 102 and 103. The trenches 109 formed in the subsequent layers 107 and 108 lie exactly above the trenches 104 surrounding the conductor structure regions 106 in the layers 102 and 103 of the organic dielectric applied to the layered base substrate 101. During the filling of the trenches 109, the filler metal is deposited directly onto the metal with which the trenches 104 are filled. The metal fillings in the trenches 104 and 109 together form metal frames which enclose the ladder structure areas 106 over the layers 102 and 107 on one side of the base substrate 101 and over the layers 103 and 108 on the other side of the base substrate 101.

[0099] In a further step, subsequent layers 111 and 112 are applied to layers 107 and 108. Elongated grooves and depressions 113 and 114 are also created in these layers using a plasma and filled with a filler metal. Subsequent layers 111 and 112 consist of the same material as layers 102 and 103, and the filler metal is the same as that used to fill the grooves and depressions 104 and 105 in layers 102 and 103. The result of these process steps is shown in subfigure C.

[0100] The dielectric organic material of the subsequent layers 111 and 112 was removed in the separation zones, as had previously been the dielectric material of layers 102 and 107, as well as 103 and 108. The trenches 113 formed in the subsequent layers 111 and 112 lie exactly above the trenches 109 and 104 surrounding the conductor structure regions 106. The metal fillings in the trenches 104, 109, and 113 together form metal frames that enclose the conductor structure regions 106 on the underside of the base substrate 101 across layers 102, 107, and 111, and on the upper side of the base substrate 101 across layers 103, 108, and 112.

[0101] To separate the conductor structure regions 106, the separation areas are freed from deposited filler metal in further steps. For this purpose, mask layers 115 and 116 are first applied to the outer layers 111 and 112 of the multilayer intermediate product shown in partial figure C. The result of this process step is shown in partial figure D. The mask layers 115 and 116 completely cover the layers 111 and 112, except for the areas 117 where the grooves 113 filled with filler metal are exposed. In these areas, the mask layer was either removed beforehand or not applied in the first place due to prior masking.

[0102] The layers are then treated with an etching solution that dissolves the filler metal wherever layers 111 and 112 are not covered by the mask layers 115 and 116. The metal fillings in the trenches 104, 109, and 113, which are in direct contact with each other and form the common metal frame, are thereby dissolved. The result of this process step is shown in partial figure E. By removing the metal fillings from the trenches 104, 109, and 113, trenches 118 are exposed, extending from the outer surfaces of layers 111 and 112 to the base substrate 101, which is exposed at the bottom of the trenches 118. The bottoms of the trenches remain as separation zones 119 between adjacent conductor structure regions 106. They are preferably free of filler metal and free of organic dielectric. In these separation areas, the base substrate can be cut, in particular, using a laser.The base substrate 101 shown in Figure 3 comprises a plurality of conductor structure regions 106 separated from one another by separation areas 119. In a subsequent step, multilayer substrates with an integrated conductor structure in several layers are formed from the conductor structure regions 106 by singulation. The conductor structure regions 106 have a rectangular basic shape and are defined by grooves or the separation areas 119, which form a grid structure on the base substrate 101. The conductor structure regions 106 can, for example, be constructed with the functionality of a chiplet or an interposer. After the aforementioned singulation, they can then be further processed as a chiplet or interposer.

[0103] Of course, vias can be provided according to the invention that also penetrate the base substrate, for example for the purpose of electrical connection of conductor structures in layers 102 and 103. However, these are secondary for the invention described herein and are therefore not shown.

[0104] A section along line S corresponds to the cross-sectional representation in subfigure E.

[0105] Figure 4 shows schematic cross-sectional views (parts A and B) illustrating the problem encountered in the prior art during the singulation process of multilayer substrates with an integrated conductor structure. Each figure depicts a substrate that has already been singulated, consisting of an inorganic base substrate 201 with multilayer conductor structure regions 231 and 232 formed on it. The stress distributions indicated by arrows show that considerable tensile stresses can occur along the edge of the substrate 201. These stresses are particularly concentrated near the interfaces 240 between the base substrate 201 and the applied layers 231 and 232, and can lead to spalling, cracking (see gap 241), or delamination. In practice, this phenomenon is referred to as the SeWaRe effect.

[0106] In contrast, Figure 5 schematically illustrates a multilayer substrate 100 produced according to the invention, already present in isolated form, in a cross-section perpendicular to a cut edge. The figure clarifies that the substrate has a projecting edge 135 with a width d, which is formed solely by the base substrate 101 protruding from the conductor structure region 106. The edge 135 serves to decouple stress-sensitive areas of the multilayer structure from the actual cut edge. In this way, the mechanical stresses generated during sawing are prevented from being directly introduced into the functional conductor structure regions. Instead, they are absorbed by the projecting edge 135, which leads to significantly improved edge stability and greatly reduces the risk of chipping, cracking, or delamination.

Claims

PATENT CLAIMS 1. A method for producing several multilayer substrates (100), each having an integrated conductor structure, comprising the steps of: a. providing a layered base substrate (101) made of a dielectric inorganic material; b. applying a layer (102) of an organic dielectric to the layered base substrate (101); c. forming a plurality of conductor structures in several adjacent conductor structure regions (106) of the layered base substrate (101); and d. separating the conductor structure regions (106) by separating the base substrate (101) into separation regions (119) which separate the conductor structure regions (106) from one another, obtaining the multilayer substrates (100) to be produced, characterized in that e.the layer (102) of the organic dielectric in the separation areas (119) is removed from the organic dielectric in the layer (102) by preferably forming elongated trenches (104) before step d. and f. that the separation areas (119) are preferably treated with a plasma to remove the organic dielectric.

2. The method of claim 1, comprising at least one of the following features: a. The trenches (104) surround the conductor structure sections (106) to be separated and delimit them from one another. b. The conductor structure sections (106) are rectangular. c. The conductor structure sections (106) have lengths and widths ranging from 3 mm to 300 mm. d. The trenches (104) have widths ranging from 10 pm to 5 mm. e. The trenches (104) form a grid structure on the base substrate (101).

3. A method according to any of the preceding claims with at least one of the following additional features: a. To form conductor structures in the conductor structure regions (106), depressions and / or elongated grooves (105) are introduced into the layer of organic dielectric in the conductor structure regions (106) by means of a plasma and filled with a metal. b. The removal of the dielectric in the separation regions (119) and the introduction of the depressions and / or grooves (105) in the conductor structure regions are carried out simultaneously by means of the same plasma. c. The grooves (104) that surround the conductor structure regions (106) to be separated are filled with a filler metal. d. The filling of the trenches (104) which surround the conductor structure areas (106) to be isolated, and the filling of the depressions and / or trenches (105) in the conductor structure areas (106) is carried out simultaneously with the same filler metal.

4. A method according to any of the preceding claims with the following additional features: a. A subsequent layer (107) of an organic dielectric is applied to the layer (102) of the organic dielectric. b. Further conductor structures are formed in or on the subsequent layer (107) in the conductor structure regions (106).

5. Method according to claim 4 with the following additional feature: a. To form the further conductor structures in or on the subsequent layer (107), depressions are created in the conductor structure regions (106) by means of a plasma. and / or elongated trenches (110) were introduced into the subsequent layer (107), which are filled with a metal.

6. A method according to claim 4 or 5, characterized by at least one of the following features: a. After the application of the subsequent layer (107), the subsequent layer (107) is removed in the separation areas (119), preferably forming elongated grooves (109) in the subsequent layer (107). b. The grooves (109) formed are filled with a metal. c. The grooves are filled (109) with the same metal that is used to form the further conductor structures.

7. The method of claim 6, characterized by at least one of the following features: a. The trenches (109) are filled with the same metal as the trenches (104). b. By filling the trenches (109) with the metal, a metal frame is formed which comprises the metal fillings in the trenches (109) and the metal fillings in the trenches (104) and which encloses the conductor structure areas (106) across all layers (102; 107).

7. Method according to claim 6, characterized by the following feature: a. Before step d of claim 1, filler metal located in the trenches (104; 106) surrounding the conductor structure areas (106) to be separated is removed, preferably in one step.

8. Method according to one of the preceding claims with the following additional feature: a. Conductor structures in different planes on one side of the base substrate (101) and / or on different sides of the base substrate (101) are connected to each other by vias.

9. Method according to one of the preceding claims with the following additional feature: a. The separation of the base substrate (101) is carried out by means of a laser.

10. A method according to any one of the preceding claims with at least one of the following additional features: a. The separation of the base substrate (101) takes place in the separation regions (119) such that the multilayer substrates (100) formed by the separation have at least one edge that is formed solely by the base substrate (101) projecting from the conductor structure region (106). b. The base substrate projecting from the conductor structure region (106) forms an elongated projection with a width in the range of 10 pm to 2 mm, preferably with a width of 20 pm to 1 mm.

11. A method according to any one of the preceding claims with any one of the following additional features: a. The multilayer substrate to be produced is an interposer. b. The multilayer substrate to be produced is a chiplet.

12. Multilayer substrate, preferably produced or producible according to a method according to one of the preceding claims, comprising a conductor structure region (106) with an integrated conductor structure, characterized by an edge formed solely by a base substrate (101) projecting from the conductor structure region (106).

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