Display panel, manufacturing method for display panel, and display device

Abstract

A display panel, a manufacturing method for the display panel, and a display device. The display panel comprises: a substrate; a display functional layer, which is arranged on one side of the substrate and comprises at least one conductive layer; an insulating layer, which is arranged on the side of the display functional layer away from the substrate, wherein the insulating layer is provided with at least one bonding hole region, the bonding hole region has at least one contact hole, and the orthographic projection of the contact hole on the conductive layer at least partially overlaps the conductive layer; and a touch control metal layer, which is arranged on the insulating layer and electrically connected to the conductive layer by means of the contact hole.

Description

Display panel, display panel manufacturing method and display device

[0001] The present application claims priority to the Chinese patent application No. 202411287892.8, filed on September 13, 2024, with the Chinese Patent Office, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the display technical field, for example, to a display panel, a display panel manufacturing method and a display device. BACKGROUND

[0003] With the development of economic life, people's requirements for displays are getting higher and higher. High-fineness, rich colors and fast response Organic Light-Emitting Diode (OLED) displays have gradually become mainstream and attracted more and more attention. Among OLED display devices combined with touch screens, the display with a touch panel (TP) on the OLED encapsulation layer (On-cell touch) has a thinner thickness, thus attracting more and more attention.

[0004] The existing On-cell touch display panel has a complex process and high manufacturing cost. SUMMARY

[0005] The present application provides a display panel, a display panel manufacturing method and a display device, which saves hardware mask plates and reduces product cost.

[0006] Embodiments of the present application provide a display panel, comprising: a substrate;

[0007] a display functional layer disposed on one side of the substrate and comprising at least one conductive layer;

[0008] an insulating layer disposed on the side of the display functional layer away from the substrate, the insulating layer being provided with at least one lapping hole area, the lapping hole area having at least one contact hole, the contact hole having an orthographic projection on the conductive layer at least partially overlapping the conductive layer;

[0009] a touch metal layer disposed on the insulating layer and electrically connected to the conductive layer through the contact hole.

[0010] Embodiments of the present application also provide a display panel manufacturing method, comprising:

[0011] disposing a display functional layer on one side of a substrate, the display functional layer comprising at least one conductive layer;

[0012] forming an insulating layer on the display functional layer;

[0013] patterning the insulating layer, so that the insulating layer comprises at least one overlap hole region, the overlap hole region having at least one contact hole, a projection of the contact hole on the conductive layer at least partially overlapping the conductive layer;

[0014] a touch metal layer is arranged, the touch metal layer being connected with the conductive layer through the contact hole.

[0015] The embodiment of the present application also provides a display device comprising the display panel of any of the embodiments of the present application.

[0016] The technical scheme provided by the embodiment of the present application multiplexes the insulating layer between the display function layer and the touch metal as a mask plate, and in the preparation process, the overlap hole region can be added through the patterning design on the insulating layer. The overlap hole region is a hollow region on the insulating layer. After the etching process, at least one contact hole is formed in the overlap hole region because the overlap hole region does not cover the insulating layer. The projection of the contact hole on the conductive layer at least partially overlaps the conductive layer, so that the contact hole can expose the conductive layer. The patterning pattern of the insulating layer is used to protect the covered region, the etching removal of the packaging material in the shadow region of the insulating layer is realized, the hardware mask plate is saved, and the product cost is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0017] FIG. 1 is a structural schematic diagram of a display panel in the related art;

[0018] FIG. 2 is a cross-sectional structural schematic diagram of the position AA' in FIG. 1;

[0019] FIG. 3 is a structural schematic diagram of a display panel provided by an embodiment of the present application;

[0020] FIG. 4 is a top view structural schematic diagram of a touch metal layer of a display panel provided by an embodiment of the present application;

[0021] FIG. 5 is a structural schematic diagram of another display panel provided by an embodiment of the present application;

[0022] FIG. 6 is a partial structural schematic diagram of another display panel provided by an embodiment of the present application;

[0023] FIG. 7 is a cross-sectional structural schematic diagram of a display panel along the cutting line of FIG. 6;

[0024] FIG. 8 is a flow schematic diagram of a preparation method of a display panel provided by an embodiment of the present application;

[0025] FIG. 9 is a flow schematic diagram of a preparation method of another display panel provided by an embodiment of the present application;

[0026] FIG. 10 is a structural schematic diagram of a display device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0027] With the continuous development of display technology, customers' demand for thinness gradually increases, and TP on TFE products are favored by customers because they are more thin. TP Metal Mesh products gradually become mainstream because of their better touch performance.

[0028] FIG. 1 is a structural schematic diagram of a display panel of the related art, and FIG. 2 is a cross-sectional structural schematic diagram of the AA' position in FIG. 1. Referring to FIGS. 1 and 2, because the signal of the TP on-cell product needs to be connected with the array, a corresponding connection hole 110 needs to be provided so that the signal line 120 of the TP is connected with the conductive layer 130 in the array through the connection hole 110 to realize the transmission of the signal. However, because of the existence of the shadow area of the encapsulation layer 240, that is, the CVD (Chemical Vapor Deposition) shadow, the CVD encapsulation material exists at the position of the connection hole, and therefore an additional mask plate needs to be designed to remove the encapsulation material at the connection hole, so as to realize the electrical connection between the signal line 120 of the TP and the conductive layer 130 in the array, thereby increasing the preparation cost of the product.

[0029] Therefore, FIG. 3 is a structural schematic diagram of a display panel provided by an embodiment of the present application. Referring to FIG. 3, the display panel comprises a substrate 200, a display functional layer 210 provided on one side of the substrate 200, and the display functional layer 210 comprises at least one conductive layer 130.

[0030] An insulating layer 220 is provided on the side of the display functional layer 210 away from the substrate 200, and the insulating layer 220 is provided with at least one overlap hole area 221, and the overlap hole area 221 has at least one contact hole 222, and the orthogonal projection of the contact hole 222 on the conductive layer 130 at least partially overlaps the conductive layer 130. A touch metal layer 230 is provided on the insulating layer 220 and is electrically connected with the conductive layer 130 through the contact hole 222.

[0031] The display functional layer 210 is provided on one side of the substrate 200, and the display functional layer 210 is a functional structure layer of the display panel. For example, in the display area 1, the display functional layer 210 comprises a pixel driving circuit layer and a light emitting functional layer which are provided in a stacked manner. Because the light emitting functional layer in the display panel is very sensitive to external environmental factors such as water vapor and oxygen, an encapsulation layer 240 can be used to seal the light emitting functional layer to improve the service life and stability of the display panel. The encapsulation layer 240 can extend to the non-display area 2, and the encapsulation layer 240 can be a single layer or a multi-layer structure, and the material used can be an organic film layer or an inorganic film layer, or a stacked structure of an organic film layer and an inorganic film layer.

[0032] Optionally, in the display area 1, the pixel driving circuit layer includes a pixel driving circuit array, the pixel driving circuit layer includes the pixel driving circuit array, the pixel driving circuit array includes a pixel driving circuit, the pixel driving circuit is provided with a driving circuit, a thin film transistor (TFT) and a capacitor, etc., to drive the light emitting element in the corresponding connected light emitting functional layer. The light emitting functional layer includes a first electrode, a second electrode and a light emitting layer, and the first electrode and the second electrode are arranged on both sides of the light emitting layer, wherein the first electrode on the side of the light emitting layer close to the pixel driving circuit layer is an anode, and the second electrode on the side of the light emitting layer away from the pixel driving circuit layer is a cathode, and the first electrode, the second electrode and the light emitting layer form a light emitting element. The light emitting layer is connected to the driving circuit in the pixel driving circuit layer through the anode to form a signal transmission path, and the light emitting element emits light after the combination of holes and electrons in the light emitting layer. The light emitting layer in the light emitting element can generally be formed by evaporation. In addition to the light emitting layer, the light emitting element can also include an electron transport layer and a hole transport layer for balancing electrons and holes, and an electron injection layer and a hole injection layer for enhancing the injection of electrons and holes. Under the driving of the electric field, the electron is injected from the second electrode to the electron transport layer, and the hole is injected from the first electrode to the hole transport layer. The electron migrates to the light emitting layer through the electron transport layer, and the hole migrates to the light emitting layer through the hole transport layer. Thus, the electron and the hole meet in the light emitting layer, form an exciton and excite the light emitting molecule, and emit visible light through radiative relaxation.

[0033] In the non-display area 2, the display functional layer 210 further includes at least one conductive layer 130, the conductive layer 130 is arranged on one side of the substrate 200, and the conductive layer 130 includes a metal trace 131 having a signal transmission function. For example, the metal trace 131 in the conductive layer 130 can be used as a signal transmission line of the touch metal layer 230 and the driving chip. The conductive layer 130 can be a metal trace layer separately arranged in the display functional layer 210, or can be arranged in the same layer as any metal layer in the pixel driving circuit layer or the light emitting functional layer. In order to improve the impact resistance of the display panel, in some embodiments, an inorganic layer 212 is further arranged between the substrate 200 and the display functional layer 210, and the inorganic layer 212 serves as a buffer layer to absorb part of the deformation stress. The conductive layer 130 in FIG. 3 in the embodiment of the application only shows the positional relationship and is not a limitation on the positional relationship of the film layers.

[0034] Figure 4 is a top view of a touch metal layer of a display panel according to an embodiment of the present application. As shown in Figure 4, the touch metal layer 230 includes functional traces for signal transmission, such as touch traces 231, which are located on the non-display area 2 of the display panel. Optionally, the touch metal layer 230 also includes touch electrodes 232, which are located on the display area 1 of the display panel and are electrically connected to the touch traces 231. In an example, the touch traces 231 and the touch electrodes 232 can be formed in the same layer. Since adjacent touch electrodes 232 in each row or each column need to be electrically connected by a bridging structure, the touch metal layer 230 is formed by first depositing a first metal layer by physical vapor deposition, then forming an insulating layer 220 on the surface of the first metal layer, and then performing a series of processes such as exposure, development, and curing on the insulating layer 220 to form a pattern, and then etching the metal layer to form the bridging structure, and then forming a second metal layer, and then performing a pattern etching process on the second metal layer to form the touch electrodes and / or the touch traces, and so on. Alternatively, the pattern etching process on the second metal layer can also be performed by forming an insulating layer 220 on the surface of the second metal layer, performing a series of processes such as exposure, development, and curing on the insulating layer 220 to form a pattern, and then etching the second metal layer. In an example, the insulating layer 220 can be an organic insulating layer, such as optical chemical (OC), and thus the processes of exposure, development, and curing on the insulating layer 220 can be implemented by a photo-lithography process to form a pattern. Optionally, the touch electrodes include mutual-capacitance touch electrodes or self-capacitance touch electrodes. The mutual-capacitance touch electrodes can include touch sensing electrodes and touch driving electrodes, which can be arranged in a cross manner.

[0035] Based on the protection of the covering position by the insulating layer 220, in order to save the additional mask hardware designed in the subsequent process, at least one lap joint hole area 221 can be added when the insulating layer 220 is designed to be patterned. That is, the lap joint hole area 221 in the patterned insulating layer 220 formed after a series of processes such as exposure, development and curing is a hollow area, which can leak out the underlying structure not covered by the insulating layer 220. After etching under the protection of the patterned insulating layer 220, the inorganic encapsulation layer 240 in the lap joint hole area 221 not covered by the insulating layer 220 will be etched, so that the inorganic encapsulation material in the shadow area of the encapsulation layer 240 can be removed. For example, referring to FIG. 3, in some embodiments, a planarization layer 250 can also be arranged between the conductive layer 130 and the encapsulation layer 240, and the planarization layer 250 provides a planarization plane to improve the sealing property of the encapsulation layer 240. In order to leak out the conductive layer 130 in the underlying layer of the encapsulation layer 240, the orthographic projection of the lap joint hole area 221 on the conductive layer 130 at least partially overlaps the conductive layer 130, so that after layer-by-layer etching, a contact hole 222 can be formed in the lap joint hole area 221. At this time, the contact hole 222 penetrates the encapsulation layer 240 and the planarization layer 250, and the contact hole 222 can at least leak out part of the conductive layer 130. According to the process preparation requirements, optionally, the diameter of the contact hole 222 ranges from 5 μm to 25 μm. Only one contact hole 222 can be arranged in the lap joint hole area 221, that is, one lap joint hole area 221 corresponds to one contact hole 222.

[0036] In some embodiments, a plurality of contact holes 222 can be arranged in at least one overlap hole region 221, that is, a plurality of contact holes 222 can be formed in one overlap hole region 221. FIG. 5 is a structural schematic diagram of another display panel according to an embodiment of the present application. As shown in FIG. 5, the difference between the embodiment shown in FIG. 5 and the embodiment shown in FIG. 3 is that, when the insulating layer is patterned, the insulating material between the plurality of contact holes 222 is removed, and no insulating material is arranged between the plurality of contact holes 222, thereby forming an entire through overlap hole region 221 as shown in FIG. 5. As shown in FIG. 5, a planarization layer 250 is arranged between the conductive layer 130 and the encapsulation layer 240, and a connection hole 110 for the touch metal layer 230 to overlap with the conductive layer 130 can be reserved on the planarization layer 250. In some designs, the display panel can include a plurality of connection holes 110 arranged in an array. When the overlap hole region 221 is arranged on the insulating layer 220, one overlap hole region 221 can cover a plurality of connection holes 110. The inorganic encapsulation layer 240 of the overlap hole region 221 not covered by the insulating layer 220 will be etched, thereby removing the inorganic encapsulation material on the connection hole 110. Each connection hole 110 forms a corresponding contact hole 222. At this time, no insulating material is arranged between the plurality of contact holes 222, and the overlap hole region 221 and the contact hole 222 are in a one-to-many relationship, that is, a plurality of contact holes 222 can be formed in one overlap hole region 221. In the etching process, the etching conditions of the inorganic layer can be used, and the etching of the metal and organic layers has little effect. In subsequent processes, the touch metal layer 230 is prepared, so that the touch wires of the touch metal layer 230 can be electrically connected to the conductive layer 130 through the contact hole 222, thereby realizing signal transmission.

[0037] Optionally, when the insulating layer 220 is patterned, the insulating layer 220 can be processed by exposure, for example, the insulating layer 220 is etched by using a weak exposure method, so as to avoid the opening of the patterned hollow region from becoming larger. The weak exposure method is a process compensation method, that is, by adjusting the exposure intensity and time, the exposure energy is lower than the conventional exposure energy, so that the material of the exposed region can be more uniformly removed in the etching process, and the opening size can be better controlled in the etching stage, thereby avoiding the opening from becoming larger due to excessive etching.

[0038] The technical scheme provided by the embodiments of the present application multiplexes the insulating layer between the display function layer and the touch metal as a mask plate, and a lap joint hole area is added by patterning design on the insulating layer in the preparation process. The lap joint hole area is a hollow area on the insulating layer. After the etching process, at least one contact hole is formed in the lap joint hole area because the lap joint hole area is not covered by the insulating layer. The contact hole can expose the conductive layer because the orthographic projection of the contact hole on the conductive layer at least partially overlaps the conductive layer. The patterning design of the insulating layer is used to protect the covered area, the etching removal of the encapsulating material in the shadow area of the encapsulating layer which is not covered by the insulating layer is realized, the hardware mask plate is saved, and the product cost is reduced.

[0039] In some embodiments, continuing to refer to FIG. 3, the display panel further includes an encapsulating layer 240 between the insulating layer 220 and the conductive layer 130, wherein the orthographic projection of the contact hole 222 on the conductive layer 130 does not overlap the orthographic projection of the encapsulating layer 240 on the conductive layer 130.

[0040] Because the light emitting function layer in the display panel is very sensitive to external environmental factors such as water vapor and oxygen, the encapsulating layer 240 can be used to seal the light emitting function layer to improve the service life and stability of the display panel. Because the encapsulating layer 240 has a shadow area, the inorganic encapsulating material exists at the position of the connection hole 110 of the conductive layer 130 and the touch metal layer 230 in the non-display area 2. Therefore, at least one lap joint hole area 221 can be added when the insulating layer 220 is patterned. That is, the lap joint hole area 221 in the pattern formed after a series of processes such as exposure, development and curing of the insulating layer 220 is a hollow area, which can leak the lower structure not covered by the insulating layer 220. After etching under the protection of the patterned insulating layer 220, the inorganic encapsulating layer 240 in the lap joint hole area 221 not covered by the insulating layer 220 will be etched, so that the overlapping position of the encapsulating layer 240 and the contact hole 222 can be removed, and the overlapping part of the contact hole 222 and the conductive layer 130 is exposed.

[0041] In some embodiments, when the display panel has a bending area, the wire of the bending area can be arranged through the conductive layer 130. The pin pads corresponding to the chip on film (COF) and the integrated circuit (IC) can be connected with the conductive layer 130, so as to realize the cross-area layout of the wire. Still taking FIG. 3 and FIG. 5 as an illustration, optionally, the display panel further comprises a pad metal layer 310, and the insulating layer 220 further comprises at least one pad connecting area 311; the pad connecting area 311 has at least one pad connecting hole 223, and the orthographic projection of the pad connecting hole 223 on the conductive layer 130 at least partially overlaps the conductive layer 130; the pad connecting hole 223 is used for exposing at least one layer of the conductive layer 130, and the pad metal layer 310 is connected with the conductive layer 130 through the pad connecting hole 223;

[0042] The pad metal layer 310 is a metal setting layer of the pin pads corresponding to the chip on film (COF) and the integrated circuit (IC). When the display panel has a bending area, the wire of the bending area can be arranged through the conductive layer 130. The pad metal layer 310 is electrically connected with the conductive layer 130 through the pad connecting hole 223, so as to utilize the conductive layer 130 to cross the bending area. For example, when the pin pads corresponding to the COF are manufactured through the touch metal layer 230, the pad metal layer 310 and the touch metal layer 230 can be arranged in the same layer.

[0043] Based on the above role of the insulating layer 220, in order to save the additional mask hardware designed in the subsequent process, at least one pad connection area 311 can be added when the insulating layer 220 is designed to be patterned. The pad connection area 311 is a setting area of the pin pad of the COF and the IC. Therefore, the pad connection area 311 in the patterned insulating layer 220 formed after a series of processes such as exposure, development and curing is a hollow area, which can leak out the lower structure not covered by the insulating layer 220. After etching under the protection of the patterned insulating layer 220, the inorganic encapsulation layer 240 of the lap joint hole area 221 not covered by the insulating layer 220 will be etched, so that the inorganic encapsulation material in the shadow area of the encapsulation layer 240 can be removed. For example, continue to refer to FIG. 3, in some embodiments, a planarization layer 250 can also be arranged between the conductive layer 130 and the encapsulation layer 240, which provides a planarization plane through the planarization layer 250 to improve the sealing property of the encapsulation layer 240. In order to leak out the conductive layer 130 in the lower layer of the encapsulation layer 240, the orthographic projection of the pad connection area 311 on the conductive layer 130 at least partially overlaps the conductive layer 130, so that a pad connection hole 223 can be formed in the pad connection area 311 after layer-by-layer etching, which can at least leak out part of the conductive layer 130. At this time, the pad connection area 311 and the pad connection hole 223 are one-to-one corresponding, that is, one pad connection area 311 corresponds to one pad connection hole 223.

[0044] In some embodiments, the lap joint hole area 221 and the pad connection hole 223 are one-to-many, that is, one lap joint hole area 221 can correspond to multiple pad connection holes 223. Continue to refer to FIG. 5, the planarization layer 250 is arranged between the conductive layer 130 and the encapsulation layer 240, and the connection hole of the lap joint of the pad metal layer 310 and the conductive layer 130 can be reserved on the planarization layer 250. In some designs, the display panel can include multiple connection holes arranged in a row, one pad metal layer 310 can cover multiple connection holes when the pad metal layer 310 is arranged on the insulating layer 220, and the inorganic encapsulation layer 240 of the pad metal layer 310 not covered by the insulating layer 220 will be etched, so that the inorganic encapsulation material on the connection hole can be removed, and each connection hole forms a corresponding pad connection hole 223. At this time, the lap joint hole area 221 and the pad connection hole 223 are one-to-many, that is, one lap joint hole area 221 can correspond to multiple pad connection holes 223. In the etching process, the etching conditions of the inorganic layer can be used, which basically has no effect on the etching of the metal and organic layers. The preparation of the pad metal layer 310 is completed in the subsequent process, so that the pin pad in the pad metal layer 310 can be electrically connected with the conductive layer 130 through the pad connection hole 223 to realize signal transmission.

[0045] In some embodiments, FIG. 6 is a schematic view of a partial structure of a display panel according to an embodiment of the present application, and FIG. 7 is a schematic view of a cross-section structure of a display panel along a cutting line according to an embodiment of the present application. Referring to FIGS. 6 and 7, the display panel further includes at least one cutting area. A normal projection of the cutting area on the conductive layer 130 does not overlap a normal projection of the insulating layer 220 on the conductive layer 130, and the normal projection of the cutting area on the conductive layer 130 overlaps the conductive layer 130 at least in two layers.

[0046] In actual production, the display panel often has a cutting requirement, for example, a hole cutting on the screen, an array design cutting, and a display panel cutting, etc. If a laser cutting process is used, the cutting line cannot be covered with an organic material. Therefore, when the organic insulating layer 220 is designed in a pattern, the cutting area of the display panel needs to be avoided. For example, in the present embodiment, the cutting area is set as the cutting line 510. After a series of processes such as exposure, development, and curing, the pattern formed in the cutting area is a hollow area. The hollow area can leak the lower structure not covered by the insulating layer 220. The inorganic encapsulation layer 240 in the cutting area not covered by the insulating layer 220 will be etched. If the normal projection of the cutting area on the conductive layer 130 overlaps the conductive layer 130, after the encapsulation material is etched, the inorganic interlayer dielectric of the metal trace 131 of the conductive layer 130 will be etched, and then the metal trace 131 will be etched, which can easily cause the metal trace 131 to be disconnected. In order to prevent the disconnection problem, the normal projection of the cutting area on the conductive layer 130 overlaps the conductive layer 130 at least in two layers, so that the metal trace 131 of at least two layers is used to reduce the influence of the disconnection of the metal trace 131.

[0047] FIG. 8 is a flowchart of a preparation method of a display panel according to an embodiment of the present application. Referring to FIGS. 3, 5, and 8, the preparation method includes the following steps.

[0048] S110, a display function layer is arranged on one side of the substrate, and the display function layer includes at least one conductive layer.

[0049] The display function layer 210 is arranged on one side of the substrate 200, and the display function layer 210 is a functional structure layer of the display panel. For example, in the display area 1, the display function layer 210 includes a pixel driving circuit layer and a light emitting function layer arranged in a stack. Since the light emitting function layer in the display panel is very sensitive to external environmental factors such as water vapor and oxygen, an encapsulation layer 240 can be used to seal the light emitting function layer to improve the service life and stability of the display panel. The encapsulation layer 240 can extend to the non-display area 2, and the encapsulation layer 240 can be a single layer or a multi-layer structure, and the material can be an organic film layer or an inorganic film layer, or a stack structure of an organic film layer and an inorganic film layer.

[0050] Optionally, in the display area 1, the pixel driving circuit layer comprises a pixel driving circuit array, the pixel driving circuit array comprises a pixel driving circuit, and the pixel driving circuit is provided with a driving circuit, a thin film transistor (TFT) and a capacitor, etc., to drive the light emitting element in the light emitting functional layer connected thereto. The light emitting functional layer comprises a first electrode, a second electrode and a light emitting layer, and the first electrode and the second electrode are arranged on both sides of the light emitting layer. The first electrode on the side of the light emitting layer close to the pixel driving circuit layer is an anode, and the second electrode on the side of the light emitting layer away from the pixel driving circuit layer is a cathode. The first electrode, the second electrode and the light emitting layer form a light emitting element. The light emitting layer is connected to the driving circuit in the pixel driving circuit layer through the anode to form a signal transmission path, and the light emitting element emits light after the combination of holes and electrons in the light emitting layer. The light emitting layer in the light emitting element can generally be formed by evaporation. In addition to the light emitting layer, the light emitting element can also comprise an electron transport layer and a hole transport layer for balancing electrons and holes, and an electron injection layer and a hole injection layer for enhancing the injection of electrons and holes. Under the driving of an electric field, electrons are injected from the second electrode to the electron transport layer, and holes are injected from the first electrode to the hole transport layer. The electrons migrate to the light emitting layer through the electron transport layer, and the holes migrate to the light emitting layer through the hole transport layer. Thus, the electrons and holes meet in the light emitting layer, form excitons and excite light emitting molecules, and emit visible light through radiative relaxation.

[0051] In the non-display area 2, the display functional layer 210 further comprises at least one conductive layer 130 arranged on one side of the substrate 200. The conductive layer 130 comprises a metal trace 131 having a signal transmission function. For example, the metal trace 131 in the conductive layer 130 can be used as a signal transmission line of the touch metal layer 230 and the driving chip. The conductive layer 130 can be a metal trace layer arranged separately in the display functional layer 210, or can be arranged in the same layer as any metal layer in the pixel driving circuit layer or the light emitting functional layer. In order to improve the impact resistance of the display panel, in some embodiments, an inorganic layer 212 is arranged between the substrate 200 and the display functional layer 210. The inorganic layer 212 acts as a buffer layer to absorb part of the deformation stress.

[0052] S120, forming an insulating layer on the display functional layer;

[0053] S130, patterning the insulating layer to make the insulating layer comprise at least one lap joint hole area, and the lap joint hole area has at least one contact hole, and the orthographic projection of the contact hole on the conductive layer at least partially overlaps the conductive layer;

[0054] In the patterning of the insulating layer 220, at least one overlap hole region 221 is added. That is, the overlap hole region 221 in the patterning formed after a series of processes such as exposure, development and curing of the insulating layer 220 is a hollow area, which can leak the underlying structure not covered by the insulating layer 220. After etching under the protection of the patterned insulating layer 220, the inorganic encapsulation layer 240 in the overlap hole region 221 not covered by the insulating layer 220 will be etched, so that the inorganic encapsulation material in the shadow area of the encapsulation layer 240 can be removed. For example, continuing to refer to FIG. 3, in some embodiments, the overlap hole region 221 has a contact hole 222, and a planarization layer 250 can be further arranged between the conductive layer 130 and the encapsulation layer 240, which provides a planarization plane through the planarization layer 250 to improve the sealing of the encapsulation layer 240. In order to leak the conductive layer 130 in the underlying layer of the encapsulation layer 240, the orthogonal projection of the overlap hole region 221 on the conductive layer 130 at least partially overlaps the conductive layer 130, so that after layer-by-layer etching, a contact hole 222 can be formed in the overlap hole region 221, which can at least leak part of the conductive layer 130. According to the process preparation requirements, the diameter of the optional contact hole 222 ranges from 5 μm to 25 μm. At this time, the overlap hole region 221 and the contact hole 222 are one-to-one corresponding, that is, one overlap hole region 221 corresponds to one contact hole 222.

[0055] Optionally, when the insulating layer 220 is patterned, the insulating layer 220 can be processed by exposure to compensate for the process, for example, the insulating layer 220 is etched by using a weak exposure method to avoid the opening of the patterned hollow area from becoming larger. The weak exposure method is a compensation process, which adjusts the exposure intensity and time to make the exposure energy lower than the conventional exposure energy, so that the material in the exposed area can be more uniformly removed in the etching process, and the opening size can be better controlled in the etching stage to avoid the opening from becoming larger due to excessive etching.

[0056] In some embodiments, continuing to refer to FIG. 5, when the insulating layer is patterned, the insulating material between the plurality of contact holes 222 is removed, and there is no insulating material spacing between the plurality of contact holes 222, forming a whole through overlap hole region shown in FIG. 5. The planarization layer 250 can be reserved with a connection hole for the touch metal layer 230 to overlap the conductive layer 130. In some designs, the display panel can include a plurality of connection holes arranged in a row. When the insulating layer 220 is provided with the overlap hole region 221, one overlap hole region 221 can cover a plurality of connection holes, and the inorganic encapsulation layer 240 in the overlap hole region 221 not covered by the insulating layer 220 will be etched, so that the inorganic encapsulation material on the connection hole can be removed, and each connection hole forms a corresponding contact hole 222. At this time, the overlap hole region 221 and the contact hole 222 are one-to-many, that is, one overlap hole region 221 can form a plurality of contact holes 222.

[0057] S140, a touch metal layer is arranged, and the touch metal layer is connected with the conductive layer through the contact hole.

[0058] Optionally, the display panel further comprises an encapsulation layer between the insulating layer and the conductive layer; FIG. 9 is a flowchart of another method for manufacturing a display panel according to an embodiment of the present application; as shown in FIG. 9, the method comprises the following steps:

[0059] S210, a display function layer is arranged on one side of the substrate, and the display function layer comprises at least one conductive layer;

[0060] S220, an insulating layer is formed on the display function layer;

[0061] S230, the insulating layer is patterned, so that the insulating layer comprises at least one overlap hole region, the overlap hole region has at least one contact hole, and a projection of the contact hole on the conductive layer at least partially overlaps the conductive layer;

[0062] S240, the encapsulation layer of the overlap hole region is etched, and a projection of the contact hole in the overlap hole region on the conductive layer does not overlap a projection of the encapsulation layer on the conductive layer.

[0063] Since the light-emitting function layer in the display panel is very sensitive to external environmental factors such as water vapor and oxygen. In order to improve the service life and stability of the display panel, an encapsulation layer 240 can also be covered on the light-emitting function layer for sealing. Since the encapsulation layer 240 has a shadow area, there is inorganic encapsulation material in the position of the connection hole of the touch metal layer and the conductive layer in the non-display area 2, so at least one overlap hole region 221 can be added when the insulating layer 220 is patterned. That is, the overlap hole region 221 in the pattern formed after the insulating layer 220 is exposed, developed and cured and the like is a hollow area, and the hollow area can leak the lower structure not covered by the insulating layer 220. The process of exposing, developing and curing the insulating layer 220 can realize the patterning design by using the yellow light process flow. When the insulating layer 220 is patterned, the insulating material between the plurality of contact holes 222 can also be removed, so as to form an entire through overlap hole region 221 shown in FIG. 5. After etching under the protection of the patterned insulating layer 220, the inorganic encapsulation layer 240 of the overlap hole region 221 not covered by the insulating layer 220 will be etched, so as to remove the position of the encapsulation layer 240 and the contact hole 222 projection overlap, and expose the overlapping part of the contact hole 222 and the conductive layer 130 projection.

[0064] S250, a touch metal layer is arranged, and the touch metal layer is connected with the conductive layer through the contact hole.

[0065] Optionally, the insulating layer 220 is patterned, and the insulating layer 220 further comprises at least one pad connection region 311; the pad connection region 311 comprises at least one pad connection hole 223, and a normal projection of the pad connection hole 223 on the conductive layer 130 at least partially overlaps the conductive layer 130.

[0066] The pad metal layer 310 is a metal setting layer of pin pads corresponding to a chip on film (COF) and an integrated circuit (IC). When the display panel has a bending area, the wiring of the bending area can be provided by the conductive layer 130. The pad metal layer 310 is electrically connected to the conductive layer 130 through the pad connection hole 223, so as to cross the bending area by using the conductive layer 130.

[0067] Based on the protection of the covering position of the insulating layer 220, in order to save the additional mask hardware designed in the subsequent process, at least one pad connection region 311 can be added when the insulating layer 220 is patterned. The pad connection region 311 is a setting area of pin pads corresponding to the COF and the IC. Therefore, the pad connection region 311 in the pattern formed after a series of processes such as exposure, development and curing of the insulating layer 220 is a hollow area, and the hollow area can leak out the lower structure not covered by the insulating layer 220. After etching under the protection of the patterned insulating layer 220, the inorganic encapsulation layer 240 of the lap joint hole region 221 not covered by the insulating layer 220 will be etched, so as to remove the inorganic encapsulation material in the shadow area of the encapsulation layer 240. For example, continuing to refer to FIG. 3, in some embodiments, a planarization layer 250 can also be provided between the conductive layer 130 and the encapsulation layer 240, and the planarization layer 250 provides a planarization plane to improve the sealing performance of the encapsulation layer 240. In order to leak out the conductive layer 130 in the lower layer of the encapsulation layer 240, the normal projection of the pad connection region 311 on the conductive layer 130 at least partially overlaps the conductive layer 130, so that the pad connection hole 223 can be formed in the pad connection region 311 after layer-by-layer etching, and the pad connection hole 223 can leak out at least part of the conductive layer 130. At this time, the pad connection region 311 and the pad connection hole 223 are one-to-one corresponding, that is, one pad connection region 311 corresponds to one pad connection hole 223. In the subsequent process, the preparation of the pad metal layer 310 is completed, so that the pin pads in the pad metal layer 310 can be electrically connected to the conductive layer 130 through the pad connection hole 223, and signal transmission is achieved.

[0068] In some embodiments, referring to FIG. 5, a planarization layer 250 is arranged between the conductive layer 130 and the encapsulation layer 240, and a connecting hole for the pad metal layer 310 to overlap the conductive layer 130 can be reserved on the planarization layer 250. In some designs, the display panel can include a plurality of connecting holes arranged in an array. When the pad metal layer 310 is arranged on the insulating layer 220, one pad metal layer 310 can cover a plurality of connecting holes. The inorganic encapsulation layer 240 of the pad metal layer 310 that is not covered by the insulating layer 220 will be etched, so that the inorganic encapsulation material on the connecting hole can be removed, and each connecting hole forms a corresponding pad connecting hole 223. At this time, the overlap hole area 221 and the pad connecting hole 223 are one-to-many, that is, one overlap hole area 221 can form a plurality of pad connecting holes 223. In the etching process, the etching conditions of the inorganic layer can be used, and the etching of the metal and organic layers has little effect. In the subsequent process, the preparation of the pad metal layer 310 is completed, so that the pin pad in the pad metal layer 310 can be electrically connected to the conductive layer 130 through the pad connecting hole 223 to realize signal transmission.

[0069] FIG. 11 is a structural schematic diagram of a display device provided by an embodiment of the present application. Referring to FIG. 11, the display device includes the display panel 10 of any embodiment of the present application. The display device shown in FIG. 11 is merely illustrative. The display device can include a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, or any product or component having a display function, without limitation. The specific advantages of the display panel 10 have been described in detail in the above embodiments. The display device has the same advantages as the display panel described above, and thus will not be described here again.

Claims

1. A display panel, comprising: a substrate; a display functional layer disposed on a side of the substrate and comprising at least one conductive layer; an insulating layer disposed on a side of the display functional layer away from the substrate, the insulating layer being provided with at least one overlap hole region, the overlap hole region having at least one contact hole, a projection of the contact hole on the conductive layer at least partially overlapping the conductive layer; and a touch metal layer disposed on the insulating layer and electrically connected to the conductive layer through the contact hole. 2.The display panel of claim 1, further comprising an encapsulation layer between the insulating layer and the conductive layer, wherein, The projection of the contact hole on the conductive layer does not overlap a projection of the encapsulation layer on the conductive layer.

3. The display panel of claim 2, wherein, The diameter of the contact hole ranges from 5 μm to 25 μm.

4. The display panel of claim 1, wherein, The insulating layer is an organic insulating layer, and the insulating layer is formed by patterning to form the overlap hole region. 5.The display panel of claim 4, wherein the insulating layer is a photoresist.

6. The display panel of claim 2, wherein, The encapsulation layer is a single-layer or multi-layer structure. 7.The display panel of claim 1, further comprising an inorganic layer disposed between the substrate and the display functional layer. 8.The display panel of claim 2, further comprising a planarization layer disposed between the conductive layer and the encapsulation layer, the planarization layer being provided with a connection hole. 9.The display panel of any one of claims 1-5, further comprising at least one cutting region, a projection of the cutting region on the conductive layer not overlapping a projection of the insulating layer on the conductive layer, and the cutting region overlapping the conductive layer.

10. The display panel of claim 9, wherein, The number of the conductive layers is at least two. 11.The display panel of any one of claims 4-5, further comprising a pad metal layer, and the insulating layer further comprising at least one pad connection region. The pad connection region has at least one pad connection hole, a projection of the pad connection hole on the conductive layer at least partially overlapping the conductive layer, and the pad metal layer being connected to the conductive layer through the pad connection hole.

12. The display panel of claim 11, wherein, The pad metal layer is disposed in the same layer as the touch metal layer.

13. The display panel of any of claims 1-5, wherein, The at least one overlap hole region has one contact hole, or the at least one overlap hole region has a plurality of contact holes, and the plurality of contact holes are not provided with the insulating layer.

14. The display panel of claim 13, wherein, In a display region, the display functional layer comprises a pixel driving circuit layer and a light emitting functional layer disposed in a stack, the pixel driving circuit layer comprises a pixel driving circuit array, and a plurality of pixel driving circuits in the pixel driving circuit array are electrically connected to a plurality of light emitting elements in the light emitting functional layer one by one.

15. The display panel of claim 14, wherein, The at least one conductive layer is disposed in the same layer as any metal layer in the pixel driving circuit layer or the light emitting functional layer. 16.A method for manufacturing a display panel, comprising: disposing a display functional layer on a side of a substrate, the display functional layer comprising at least one conductive layer; forming an insulating layer on the display functional layer; patterning the insulating layer to make the insulating layer comprise at least one overlap hole region, the overlap hole region having at least one contact hole, a projection of the contact hole on the conductive layer at least partially overlapping the conductive layer. A touch metal layer is arranged, which is connected with the conductive layer through the contact hole.

17. The method of producing a display panel according to claim 16, wherein The display panel further comprises an encapsulation layer between the insulating layer and the conductive layer; the patterning of the insulating layer further comprises: The encapsulation layer of the lap joint hole area is etched, and the orthographic projection of the contact hole in the lap joint hole area on the conductive layer does not overlap with the orthographic projection of the encapsulation layer on the conductive layer.

18. The method of producing a display panel according to claim 16, wherein, When the insulating layer is patterned, the insulating layer further comprises at least one pad connection area; the pad connection area has at least one pad connection hole, and the orthographic projection of the pad connection hole on the conductive layer at least partially overlaps with the conductive layer.

19. The method of producing a display panel according to claim 18, wherein When the insulating layer is patterned, the insulating layer is further subjected to process compensation in an exposed manner.

20. A display device comprising the display panel of any one of claims 1-15.

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