Temperature-based performance and reliability control for semiconductor devices

A dynamic temperature threshold system for semiconductor devices adjusts based on performance comparisons and usage history, improving thermal efficiency and reliability by addressing inefficiencies in conventional static thresholds.

WO2026059552A1PCT designated stage Publication Date: 2026-03-19GOOGLE LLC
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-09-11
Publication Date
2026-03-19

AI Technical Summary

Technical Problem

Conventional static temperature thresholds for semiconductor devices are inadequate for varying user behaviors and device performance degradation, leading to inefficient thermal control and reduced reliability.

Method used

Implementing a dynamic temperature threshold system that adjusts based on recent performance comparisons to baseline performance and usage history, using feedback loops to throttle semiconductor elements until temperatures are within the determined threshold.

Benefits of technology

Enhances thermal efficiency and reliability by ensuring appropriate temperature management for different usage scenarios and performance levels, preventing performance degradation and device damage.

✦ Generated by Eureka AI based on patent content.

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Abstract

Aspects of temperature-based performance and reliability control for semiconductor devices are disclosed. For example, a temperature control unit monitors a temperature of an element of the semiconductor device and maintains a prior temperature threshold. The temperature control unit throttles the element so that the temperature remains below the prior temperature threshold. A performance block coupled with the temperature control unit provides a dynamic temperature threshold to the temperature control unit. The dynamic temperature threshold may be based on a comparison of a recent performance of the semiconductor device to a baseline performance. The dynamic temperature threshold is also based on a usage history of an electronic device coupled with the semiconductor device. The dynamic temperature threshold may cause the temperature control unit to throttle an operating parameter of the element to reduce the temperature of the element below the determined temperature threshold.
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Description

TEMPERATURE-BASED PERFORMANCE AND RELIABILITY CONTROL FOR SEMICONDUCTOR DEVICESBACKGROUND

[0001] Semiconductor devices are widely used throughout the world in various electronic devices. It is estimated that almost 80% of the world’s population owns a mobile phone, which is one type of electronic device. One semiconductor device used within electronic devices is a system-on-a-chip (SoC), which may include various elements, such as a central processing unit (CPU), a graphic processing unit (GPU), an accelerated processing unit (APU), an audio processing unit, and a tensor processing unit (TPU).

[0002] Elements of a semiconductor device (e.g., CPU, GPU) within an electronic device may cause a rise in temperature within the semiconductor device, which may apply stress or reduce performance of the semiconductor device when the temperature is too high. Likewise, repeated temperature peaks may reduce the long-term performance and reliability of the semiconductor device. Worse still, temperature may have an exponential effect, in comparison to other factors (e.g., current density), on the lifetime performance of a semiconductor device. As a result, an electronic device may include one or more temperature controllers configured to thermally control elements of the semiconductor device within the electronic device to maintain a high performance and reliability of the electronic device.SUMMARY

[0003] This document describes systems and techniques directed at temperature-based performance and reliability control for semiconductor devices, which may overcome or reduce the disadvantages of short-term or long-term high temperatures. For example, a performance block is described that provides a determined temperature threshold to the temperature control unit, which is configured to throttle an element of a semiconductor device if the temperature of the element exceeds the threshold. The temperature control unit throttles various operating aspects (e.g., voltage, operating frequency, current) of the element of the semiconductor device until the temperature of the element is reduced below the determined temperature threshold, thereby reducing various disadvantages caused by high temperatures.

[0004] Aspects of temperature-based performance control for semiconductor devices are disclosed. For example, a temperature control unit monitors the temperature of an element of the semiconductor device. The temperature control is configured to throttle the element, if necessary, to maintain the temperature below a temperature threshold. A performance block coupled with the temperature control unit provides a determined temperature threshold to the temperaturecontrol unit, which replaces any prior temperature threshold stored within the determined temperature control unit. The determined temperature may be based on a comparison of a recent performance of the semiconductor device to a baseline performance. The determined temperature threshold may also be based on a usage history of an electronic device coupled with the semiconductor device. If the comparison of the current performance to the baseline performance indicates the performance is below the usage history of the electronic device, the determined temperature threshold may cause the temperature control unit to throttle the element.

[0005] In some aspects, the techniques described herein relate to a method including receiving a comparison of a recent performance of a semiconductor device to a baseline performance of the semiconductor device. The method includes receiving a usage history of an electronic device coupled with the semiconductor device. The method includes determining, at the performance block, a temperature threshold for an element of the semiconductor device based on the comparison of the recent performance of the semiconductor device to the baseline performance and the usage history of the electronic device coupled with the semiconductor device. The method includes directing a temperature control unit to control a temperature of the element to not exceed the determined temperature threshold.

[0006] In some aspects, the techniques described herein relate to a system including a first feedback loop, the first feedback loop configured to monitor and control, based on a first temperature threshold within a temperature control unit, a temperature of an element associated with a semiconductor device. The system including a second feedback loop coupled with the first feedback loop, the second feedback loop configured to determine a performance reduction metric of the semiconductor device by comparison of a recent performance of the semiconductor device to a baseline performance of the semiconductor device, the performance reduction metric indicating a reduction of the recent performance of the semiconductor device to the baseline, or original, performance. The second feedback loop is configured to calculate a dynamic temperature threshold based on the performance reduction metric and send the dynamic temperature threshold to the temperature control unit of the first feedback loop.

[0007] This Summary is provided to introduce simplified concepts of systems and methods for temperature-based performance and reliability control for semiconductor devices, the concepts of which are further described below in the Detailed Description and Drawings. This Summary is not intended to identify essential features of the claimed subject matter, nor is it intended for use in determining the scope of the claimed subject matter.BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The details of one or more aspects of systems and techniques directed at temperature-based performance and reliability control for semiconductor devices are described in this document with reference to the following drawings, in which the use of same numbers in different instances may indicate similar features or components.

[0009] FIG. 1 illustrates an example system that includes a performance optimizer metric calculator and a performance analyzer coupled with a performance block in which aspects of temperature-based performance and reliability control of a semiconductor device can be implemented.

[0010] FIG. 2 illustrates an example system that includes a performance optimizer metric calculator and two performance analyzers coupled with a performance block in which aspects of temperature-based performance and reliability control of a semiconductor device can be implemented.

[0011] FIG. 3 illustrates an example system that includes a performance optimizer metric calculator coupled with two performance blocks and two performance analyzers each coupled with a respective performance block in which aspects of temperature-based performance and reliability control of a semiconductor device can be implemented.

[0012] FIG. 4 illustrates an example operating environment in which aspects of temperature-based performance and reliability control of a semiconductor device can be implemented.

[0013] FIG. 5 illustrates an integrated circuit component in which aspects of temperaturebased performance and reliability control of a semiconductor device can be implemented.

[0014] FIG. 6 illustrates an example electronic device having internal hardware configurations for temperature-based performance and reliability control of a semiconductor device in accordance with one or more implementations.

[0015] FIG. 7 is a flowchart of a method of an aspect of temperature-based performance and reliability control of a semiconductor device.

[0016] FIG. 8 is a flowchart of a method of an aspect of temperature-based performance and reliability control of a semiconductor device.DETAILED DESCRIPTIONOverview

[0017] A temperature control unit uses a software-driven algorithm to control the temperature of a component of a semiconductor device that includes a static temperature threshold that may not be applicable for all applications. For example, the static temperature threshold maybe adequate for an average user of an electronic device, but the static temperature threshold may be too severe for a light user of the electronic device or not severe enough for a heavy user of the electronic device. For example, a light user of a mobile phone may only use the mobile phone to text and make phone calls and a static temperature threshold may be too severe for such user. As another example, a heavy user may use applications and / or play games on the mobile phone that use a high amount of resources and a static temperature threshold may not be severe enough for such user. A static temperature threshold applies a global thermal policy that may not be thermally efficient and / or thermally sufficient for all applications. Thus, conventional static temperature thresholds may unnecessarily diminish a user experience of an electronic device.

[0018] Furthermore, over the lifetime of a semiconductor device, the performance and / or reliability of the semiconductor device may diminish. In such a case, a static temperature threshold may also not be adequate to thermally control an element of the semiconductor device due to the diminished performance and / or reliability. For example, a static temperature threshold may be set too high due to a reduced performance or reliability of the semiconductor device causing a thermal control unit to not adequately control the temperature of an element, which may lead to damaging and unreliability and / or a further reduction in performance of the device.

[0019] To this end, this document describes systems and techniques directed at temperature-based performance and reliability control for semiconductor devices.

[0020] The techniques described herein may measure a recent performance of the semiconductor device and compare the measured performance to a baseline performance to determine a performance reduction metric. The usage history of an electronic device coupled with the semiconductor device to determine a performance target. If the performance reduction metric indicates that recent performance is below the performance target, a dynamic temperature threshold may be determined and sent to a temperature control unit that replaces the prior static temperature threshold with the dynamic temperature (which may result in throttling an element of the semiconductor device). The element will be throttled until the temperature of the element is below the dynamic temperature threshold. On the other hand, a dynamic temperature threshold may not be used if reduction performance metric indicates that the recent performance of the semiconductor device exceeds the performance target.

[0021] The recent performance of the semiconductor device may be determined by comparing the recent performance of the semiconductor device to a baseline performance. Two ring oscillators, a performance counter, software, or the like may be used to compare the recent performance of the semiconductor device to the baseline performance. The recent performance can be measured in various manners and include various timeframes, such as a current performance over a short, immediate period, a current performance over a longer period (e.g.,hours or days), a performance of a prior period (e.g., minus 10 days to minus 5 days from a current time), an average usage over the life of the device, an average usage over a period including an immediate performance, an average usage of a prior period, or the like. The performance target may be determined via a performance analyzer configured to analyze the usage history of the electronic device coupled with the semiconductor device. The performance analyzer may determine the usage history for various timescales, as noted in part above. Some example timescales are over the last hour, over the last 24 hours, over the last week, over the last month, or a past timescale (e.g., a specified time-period six months ago, a specified time-period within the last year, or the like). The timescales are provided for illustrative purposes and various timescales may be used as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure. In addition to particular periods, the usage history may be used to extrapolate performance, and thus the dynamic temperature threshold may take into account ongoing degradation in performance or reliability into the future life of the device.

[0022] The following discussion describes operating environments, techniques that may be employed in the operating environments, and example methods. Although techniques using and apparatuses for temperature-based performance and reliability control for semiconductor devices are described, it is to be understood that the subject of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as example implementations and reference is made to the operating environment by way of example only.Example Systems and Operational Schemes

[0023] FIG. 1 illustrates an example system 100 in which aspects of temperature-based performance and reliability control of a semiconductor device can be implemented. The system 100 includes a first feedback loop 102 including an element 104 of a semiconductor device and a temperature control unit 106. The temperature control unit 106 is coupled with the element 104. The element 104 may be any component of the semiconductor device that may increase in temperature due to operation of the element 104. For example, the element 104 may be a processor that may increase in temperature when processing. The processor may be a CPU, GPU, TPU, or the like. The element 104 may instead be a non-processing element, such as a sensor or display. For example, the sensor may be an optical sensor, radar sensor, proximity sensor, or the like. The element 104 may be any component of a semiconductor device that causes a rise in temperature due to use, continued use, and / or repeated cycling of the component.

[0024] The temperature control unit 106 is configured to monitor the temperature of the element 104 and thermally control (e.g., throttle) the element 104 in the event the temperature ofthe element 104 exceeds a prior temperature threshold stored, or maintained, within the temperature control unit 106. The temperature control unit 106 is configured to control the operation of element 104. The temperature control unit 106 may be a component coupled with the element 104 and located within the semiconductor device or, alternatively, coupled with the semiconductor device, but physically located external to the semiconductor device.

[0025] The temperature control unit 106 is configured to throttle 108 the element 104 in order to reduce the temperature of the element 104. In other words, the temperature control unit 106 is configured to change an operating parameter (e.g., voltage, frequency, current) of the element 104 to thermally control (e.g., control the temperature) the element 104. The temperature control until 106 may throttle 108 the element 104 in sequential steps that increase the severity of the throttling 108 of the element 104 until the temperature of the element 104 is lower than the temperature threshold stored within the temperature control unit 106.

[0026] The system 100 includes a second feedback loop 110 including a performance block 112 coupled with a performance optimizer metric calculator 114 and a performance analyzer 116. The performance block 112 may be any component configured to control the operation of a temperature control unit 106. The performance block 112 can be configured to receive feedback, or data, from components in the second feedback loop 110 and control the operation of the temperature control unit 106 based on the received feedback. In one implementation, the performance block 112 is configured to receive usage history of an electronic device coupled with the semiconductor device and feedback regarding a recent performance of the semiconductor device. The performance block 112 is configured to generate a determined (e.g., dynamic) temperature threshold 118 based on the received information. The performance block 112 may be located internal or external to the semiconductor device but coupled (e.g., communicatively coupled) with the temperature control unit 106.

[0027] The performance block 112 is also coupled with the temperature control unit 106 of the first feedback loop 102. The performance block 112 is configured to send a determined (e.g., dynamic) temperature threshold 118, based on feedback from the performance optimizer metric calculator 114 and performance analyzer 116, to the temperature control unit 106 as discussed herein. The determined temperature threshold 118 may be a maximum temperature limit, a time-based maximum temperature limit, or a gradual reduction temperature limit. The maximum temperature limit may be a maximum temperature that the temperature of the element 104 is not to exceed. A time-based maximum temperature limit may be a maximum temperature limit that the element is to not exceed for longer than a predetermined time-period. Various timescales may be used. For example, the time-based maximum temperature limit may indicate a maximum temperature that the element 104 may not exceed for a period of seconds, a period ofminutes, or a period of hours, or the like. A gradual reduction temperature limit may gradually decrease a temperature limit for a predetermined time-period until a floor temperature is reached. The temperature may be decreased in varying stages and varying timescales.

[0028] The determined temperature threshold 118 may replace a temperature threshold previously retained by the temperature control unit 106. In some instances, the determined temperature threshold 118 is lower than the prior temperature threshold stored within the temperature control unit 106, which may cause the temperature control unit 106 to throttle the element 104 if the temperature of the element 104 is above the determined temperature threshold 118. In other instances, the determined temperature threshold 118 may be higher than the prior temperature threshold stored within the temperature control unit 106, which may cause the temperature control unit 106 to remove throttling step(s) 108 previously applied to the element 104 as the temperature of the element 104 may be allowed to rise and still be lower than the determined temperature threshold 118.

[0029] The performance optimizer metric calculator 114 is configured to compare a performance (e.g., a recent performance) of the semiconductor device to a baseline performance (e.g., original performance or maximum performance) of the semiconductor device to determine a performance reduction metric 120 of the semiconductor device. The performance reduction metric 120 indicates a change of the recent performance of the semiconductor device to a baseline performance (e.g., original performance) of the semiconductor device (or projected reduction). In one implementation, the performance reduction metric 120 may be a percentage indicating the reduction in performance of the semiconductor device. The performance block 112 may use the performance reduction metric 120 to determine the determined temperature threshold 118 as discussed herein. As an example, a recent brightness of a display of an electronic device may be compared to a baseline brightness of the display. The recent brightness may be decreased with respect to the baseline brightness and a temperature control unit 106 coupled with the GPU associated with the display may be directed to apply determined temperature threshold 118 to lower the temperature of the GPU below the determined temperature threshold 118.

[0030] The performance optimizer metric calculator 114 may be various components configured to compare a recent performance of the semiconductor device to a baseline performance. For example, the reduction metric calculator 114 may be software configured to analyze recent performance and compare to baseline performance. In another implementation, the performance optimizer metric calculator 114 may utilize various components to compare a recent performance to a baseline performance. For example, the performance optimizer metric calculator 114 may use sensors, ring oscillators, counters, or the like to compare the recent performance of the semiconductor device to a baseline performance.

[0031] The performance optimizer metric calculator 114 may use various mechanisms to compare the recent performance of the semiconductor device to the baseline performance of the semiconductor device. Optionally, the system 100 includes a first ring oscillator 122-1 coupled 124 with the performance optimizer metric calculator 114 and a second ring oscillator 122-2 coupled 126 with the performance optimizer metric calculator 114. The first ring oscillator 122- 1 is configured to be isolated from stress applied to the semiconductor device over the lifetime of the semiconductor device. The second ring oscillator 122-2 is not isolated from the semiconductor device. For example, the second ring oscillator 122-2 may be coupled 128 to the element 104. Stress applied to the semiconductor device due to use of the semiconductor device will also be applied to the second ring oscillator 122-2.

[0032] The performance optimizer metric calculator 114 reads an operating frequency of the first ring oscillator 122-1 and reads an operating frequency of the second ring oscillator 122- 2. Further, the performance optimizer metric calculator 114 may compare the operating frequencies of the first ring oscillator 122-1 and second ring oscillator 122-2 to determine the performance reduction metric 120 of the semiconductor device. The performance reduction metric 120 is communicated to the performance block 112. Other mechanisms may be used to determine the performance reduction metric 120 as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure.

[0033] The performance analyzer 116 is configured to provide a performance target 130 based on a usage history of an electronic device coupled with the semiconductor device. The performance analyzer 116 may have various components configured to analyze the usage history of an electronic device coupled with the semiconductor device. For example, the performance analyzer 116 may include software configured to track the usage history or extrapolate the usage history based on various sets of stored data. In one implementation, the performance analyzer 116 is located external or internal to the semiconductor device. The performance analyzer 116 may be a cloud-based application that is wirelessly connected to the electronic device. The cloudbased application may monitor the usage of the electronic device, analyze stored data regarding the usage history, or may extrapolate the usage history based on a series of data points concerning the usage of the electronic device.

[0034] The performance analyzer 116 may analyze the usage history of the electronic device for various timescales. For example, the performance analyzer 116 may analyze the usage history over the last hour, over the last twenty -four (24) hours, over the last week, over the past month, or the like. Additionally, the performance analyzer 116 may analyze the usage history for a past timescale. For example, the performance analyzer 116 may analyze a time-period that occurred a week ago, a month ago, six (6) months ago, a year ago, or the like. In someimplementations, the performance analyzer 116 may analyze a twenty-four (24) hour period that occurred within the last month, a weak-long period within the last six months, a month-long period that occurred within the last year, or the like. In other implementations, the performance analyzer 116 may analyze the average usage, based on the usage history, for various timescales.

[0035] Based on the analysis of the usage history of the electronic device, the performance analyzer 116 provides the performance target 130. For example, the usage history may indicate a light level of usage and the performance target 130 may be a relatively lower percentage of performance (e.g., 75%), which would be sufficient to accommodate usage of the electronic device based on the usage history. In yet another example, the usage history of the electronic device may indicate a relatively high level of usage and the performance target 130 may be a relatively higher percentage of performance (e.g., 90%, 95%, 98%), which would be sufficient to accommodate usage of the electronic device based on the usage history. The performance target 130 is provided to the performance block 112 to be used in the determination of the determined (e.g., dynamic) temperature threshold 118. The example performance targets 130 discussed herein are for illustrative purposes and may be varied as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure.

[0036] The performance block 112 may be configured to determine the dynamic temperature threshold 118 based on the performance reduction metric 120 received from the performance optimizer metric calculator 114 and the performance target 130 received from the performance analyzer 116. The performance block 112 may be configured to generate the determined temperature threshold 118 when the performance reduction metric 120 indicates that the performance of the semiconductor device has decreased less than the performance target 130 from the performance analyzer 116. For example, the performance analyzer 116 may indicate a performance target 130 of 90% based on the analyzed usage history of an electronic device utilizing the semiconductor device. If the performance optimizer metric calculator 114 determines the recent performance of the semiconductor device to be lower than 90%, then the performance block 112 may calculate, or generate, and send the determined temperature threshold 118 to the temperature control unit 106 to throttle 108 the element 104 to lower the current temperature of the element 104 below the determined temperature threshold 118.

[0037] In the event that the performance reduction metric 120 is equal to or exceeds the performance target 130, the performance block 112 may refrain from generating and sending a determined temperature threshold 118 to the temperature control unit 106. In one implementation, the performance block 112 may set the determined temperature threshold 118 equal to the prior temperature threshold stored within the temperature control unit 106 and send the determinedtemperature threshold 118 to the temperature control unit 106 when the performance reduction metric 120 is equal to or exceeds the performance target 130.

[0038] The temperature control unit 106 may monitor the temperature of the element 104 at a first regularity. The components (e.g., the performance optimizer metric calculator 114, performance analyzer 116) of the second feedback loop 110 may compare the performance of the semiconductor device at a second regularity that is less frequent than the first regularity. In other words, the temperature of the element 104 of the semiconductor device may be monitored more frequently than the performance analysis performed by the second feedback loop 110.

[0039] The configuration, shape, number, and size of the first feedback loop 102, the element 104, the temperature control unit 106, the second feedback loop 110, the performance block 112, the performance optimizer metric calculator 114, and the performance analyzer 116 are as shown in FIG. 1 for illustrative purposes and may be varied as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure. For example, the performance optimizer metric calculator 114 and the performance analyzer 116 may be integrated within the performance block 112. Likewise, each of the components (e.g., element 104, temperature control unit 106, performance block 112, performance optimizer metric calculator 114, performance analyzer 116) may be integrated into a single feedback loop or more than two feedback loops. Other systems may be configured for temperature-based performance and reliability control of a semiconductor device such as the system 200 shown in FIG. 2.

[0040] FIG. 2 illustrates an example system 200 in which aspects of temperature-based performance and reliability control of a semiconductor device can be implemented. The system 200 includes a first feedback loop 102 and a second feedback loop 110. The first feedback loop 102 includes an element 104 (e.g., CPU, GPU, TPU, or the like) of a semiconductor device coupled with a temperature control unit 106. The temperature control unit 106 is configured to monitor the temperature of the element 104 and thermally control the element 104 in the event the temperature of the element 104 exceeds a prior temperature threshold stored, or maintained, within the temperature control unit 106. As discussed herein, the temperature control unit 106 is configured to throttle 108 the element 104 to reduce the temperature of the element 104 below the temperature threshold stored within the temperature control unit 106.

[0041] The second feedback loop 110 includes performance block 112 coupled with a performance optimizer metric calculator 114 and a first performance analyzer 116-1 and a second performance analyzer 116-2. The performance block 112 is also coupled with the temperature control unit 106 of the first feedback loop 102 and is configured to send a determined temperature threshold 118 to the temperature control unit 106. The determined temperature threshold 118 isbased on feedback from the performance optimizer metric calculator 114, the first performance analyzer 116-1, and the second performance analyzer 116-2.

[0042] The performance optimizer metric calculator 114 is configured to compare a performance (e.g., a recent performance) of the semiconductor device to a baseline performance (e.g., original performance) of the semiconductor device to determine a performance reduction metric 120 of the semiconductor device. The performance reduction metric 120 may be the percentage that the recent performance of the semiconductor device is in relation to the baseline performance (e.g., original performance or maximum performance). For example, the recent performance of the semiconductor device may presently be 88% of the maximum performance of the semiconductor device. The performance block 112 may use the performance reduction metric 120 to determine the determined temperature threshold 118. The baseline performance of the semiconductor device may be measured regarding various functionalities of the semiconductor device. For example, the baseline performance may concern operating frequency, power consumption, response latency, processing speed, application programming interface latency, or the like.

[0043] The performance optimizer metric calculator 114 may use various mechanisms to compare the recent performance of the semiconductor device to the baseline performance of the semiconductor device. Optionally, the system 200 includes a performance counter 202 coupled 204 with the performance optimizer metric calculator 114. The performance counter 202 may be configured to track the performance of the semiconductor device over the lifetime of the semiconductor device. The performance counter 202 provides an indication of a reduction in a recent performance or reliability of the semiconductor device to the performance optimizer metric calculator 114. The performance optimizer metric calculator 114 uses the information from the performance counter 202 to determine the performance reduction metric 120 that is communicated to the performance block 112.

[0044] The first performance analyzer 116-1 is configured to provide a first performance target 130-1 based on a usage history of an electronic device utilizing the semiconductor device for a first timescale (or first time-period). The second performance analyzer 116-2 is configured to provide a second performance target 130-2 based on a usage history of the electronic device utilizing the semiconductor device for a second timescale (or second time-period) that differs from the first timescale. For example, the first performance analyzer 116-1 may analyze the usage history for the past twenty-four (24) hour period (i.e. the first time-period) and the second performance analyzer 116-2 may analyze the usage history for the past week (i.e. the second timeperiod). Based on the analysis of the usage history for the first timescale, the first performance analyzer 116-1 provides the first performance target 130-1 to the performance block 112.Likewise, based on the analysis of the usage history for the second timescale, the second performance analyzer 116-2 provides the second performance target 130-2 to the performance block 112.

[0045] The performance block 112 may be configured to use the lower performance target between the first performance target 130-1 and the second performance target 130-2 along with the performance reduction metric 120 to determine the determined temperature threshold 118. As discussed herein, the performance block 112 may be configured to generate the determined temperature threshold 118 when the performance reduction metric 120 indicates that the recent performance of the semiconductor device has decreased less than the lower performance target between the first performance target 130-1 and the second performance target 130-2. FIG. 3 illustrates yet another example system 300 in which aspects of temperature-based performance and reliability control of a semiconductor device can be implemented.

[0046] FIG. 3 illustrates a system 300 including a first feedback loop 102 and a second feedback loop 110. The first feedback loop 102 includes an element 104 (e.g., CPU, GPU, TPU, or the like) of a semiconductor device coupled with a temperature control unit 106. The temperature control unit 106 is configured to monitor the temperature of the element 104 and thermally control the element 104 in the event the temperature of the element 104 exceeds a prior temperature threshold stored, or maintained, within the temperature control unit 106. As discussed herein, the temperature control unit 106 thermally controls the element 104 by throttling at least one operation point of the element 104 to reduce the temperature of the element 104 below the temperature threshold stored within the temperature control unit 106.

[0047] The second feedback loop 110 includes a first performance block 112-1 and a second performance block 112-2 each coupled with the temperature control unit 106 of the first feedback loop 102. The first performance block 112-1 and second performance block 112-2 are also each coupled with a performance optimizer metric calculator 114. As discussed herein, the performance optimizer metric calculator 114 is configured to produce, or generate, a performance reduction metric 120. The performance reduction metric 120 indicates a reduction of a recent performance of the semiconductor device to a baseline performance (e.g., original performance) of the semiconductor device.

[0048] The performance optimizer metric calculator 114 may use various mechanisms to compare the recent performance of the semiconductor device to the baseline performance of the semiconductor device. Optionally, the system 300 includes software 302 coupled 304 with the performance optimizer metric calculator 114. The software 302 may be configured to determine the recent performance of the semiconductor device compared to the baseline performance of the semiconductor device. The software 302 provides an indication of a reduction in recentperformance of the semiconductor device to the performance optimizer metric calculator 114. The performance optimizer metric calculator 114 uses the information from the software 302 to determine the performance reduction metric 120 that is communicated to the first performance block 112-1 and the second performance block 112-2.

[0049] A first performance analyzer 116-1 is coupled with the first performance block 112-1 and sends a first performance target 130-1 to the first performance block 112-1. Likewise, a second performance analyzer 116-2 is coupled with the second performance block 112-2 and sends a second performance target 130-2 to the second performance block 112-2. The first performance block 112-1 is coupled with the temperature control unit 106 of the first feedback loop 102 and is configured to send a first determined (e.g., dynamic) temperature threshold 118- 1 to the temperature control unit 106. The first determined temperature threshold 118-1 is based on the performance reduction metric 120 from the performance optimizer metric calculator 114 and the first performance target 130-1 from the first performance analyzer 116-1.

[0050] The second performance block 112-2 is coupled with the temperature control unit 106 of the first feedback loop 102 and is configured to send a second determined (e.g., dynamic) temperature threshold 118-2 to the temperature control unit 106. The second determined temperature threshold 118-2 is based on the performance reduction metric 120 from the performance optimizer metric calculator 114 and the second performance target 130-2 from the second performance analyzer 116-2. The first performance analyzer 116-1 may determine the first performance target 130-1 based on a usage history of an electronic device utilizing the semiconductor device over a first timescale and the second performance analyzer 116-2 may determine the second performance target 130-2 based on a usage history of the electronic device utilizing the semiconductor device over a second timescale that differs from the first timescale. Thus, the first performance target 130-1 may differ from the second performance target 130-2 and the first dynamic temperature threshold 118-1 may differ from the second dynamic temperature threshold 118-2. The temperature control unit 106 may be configured to replace a prior temperature threshold, stored within the temperature control unit 106, with the lower temperature threshold between the first dynamic temperature threshold 118-1 and the second dynamic temperature threshold 118-2.Example Environments and Electronic Devices

[0051] FIG. 4 illustrates an example operating environment 400 in which aspects of temperature-based performance and reliability control for semiconductor devices can be implemented. As illustrated, an SoC integrated circuit (IC) device 402 is mounted to a printed circuit board (PCB) 404, which may be included as part of a computing device that implementsone or more security protocols. As non-limiting examples, the computing device may be a smartphone 406, a personal digital assistant 408, a tablet 410, a laptop 412, or a workstation 414.

[0052] The SoC IC device 402 may include various elements 104 (e.g., GPU, CPU, TPU) that may cause a temperature event (e.g., a sudden increase in temperature) within the SoC IC device 402 due to repeated and / or continued use. For example, a user may repeatedly launch, use, and cancel an application on an electronic device that utilizes the SoC IC device 402. The SoC IC device 402 may include a first feedback loop 102 that includes one or more temperature control units 106 configured to thermally control at least one or more elements 104 of a semiconductor device. The one or more temperature control units 106 are configured to thermally control at least one of the one or more elements 104 based on a prior temperature threshold stored within each of the one or more temperature control units 106.

[0053] The SoC IC device 402 may include a second feedback loop 110. The second feedback loop 110 may include one or more performance blocks 112, a performance reduction metric (PRM) calculator 114, and one or more performance analyzers 116. The one or more performance blocks 112 are configured to generate a dynamic temperature threshold 118 (e.g., a determined temperature threshold) based on the PRM calculator 114 and the one or more performance analyzers 116. The dynamic (e.g., determined) temperature threshold 118, generated by the one or more performance blocks 112, is sent to the temperature control unit(s) 106 of the first feedback loop 102. The at least one temperature control unit 106 replaces the prior temperature threshold with the determined temperature threshold 118, which is used to thermally control the one or more elements 104. The one or more temperature control units 106 may thermally control, based on the determined temperature threshold 118, one or more elements 104 by throttling the one or more elements 104 until the temperature of the one or more elements 104 drops below the determined temperature threshold 118.

[0054] Although the SoC IC device 402 is described in the context of a single SoC IC device including the first feedback loop 102, element(s) 104, temperature control unit(s) 106, second feedback loop 110, performance block(s) 112, PRM calculator 114, and performance analyzers 116, a combination of discrete IC devices may perform the same functions. For example, a discrete processor IC device (e.g., a processor IC device having element(s) 104, temperature control unit(s) 106, performance block(s) 112, a PRM calculator 114, and performance analyzer(s) 116) may work in combination with a discrete non-volatile memory IC device having the elements to perform one or more functions described herein.

[0055] FIG. 5 illustrates an integrated circuit component implemented as an SoC 500 that can implement various aspects of temperature-based performance and reliability control for semiconductor devices. The SoC 500 may be a single chip including components that arefabricated on the same semiconductor substrate. Alternatively, the SoC 500 may be a number of such chips that are epoxied together. The SoC 500 can be implemented in any suitable device, such as a smartphone, a cellular phone, a netbook, a tablet computer, a server, a wireless router, a network-attached storage, a camera, a smart appliance, a printer, a set-top box, or any other suitable type of device. Although described with reference to an SoC, the entities of FIG. 5 may also be implemented as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or the like.

[0056] The SoC 500 can be integrated with electronic circuitry, including the components described in the operating system listed herein. The SoC 500 can also include an integrated data bus (not shown) that couples the various components of the SoC 500 for data communication between the components. The integrated data bus or other components of the SoC 500 may be exposed or accessed through an external port, such as a joint test action group (JTAG) port. For example, components of the SoC 500 may be tested, configured, or programmed (e.g., flashed) through the external port at different stages of manufacture.

[0057] In this example, the SoC 500 includes computer-readable media 502, one or more processors 504, one or more temperature control units 106, one or more performance blocks 112, and VO units 506. The temperature control units 106 are configured for thermal control of a semiconductor device as described herein. The temperature controllers 106 may include memory 508 that may be used to store a prior temperature threshold as discussed herein. The one or more performance blocks 112 may dynamically generate a determined temperature threshold 118 that may replace the prior temperature threshold stored in the memory 508. The computer-readable media 502 may be stored in computer-readable storage media, including one or more non- transitory storage devices such as a random-access memory (RAM) dynamic random access memory (DRAM), non-volatile random access memory (NVRAM), or static random access memory (SRAM), read-only memory (ROM), or flash memory, a hard drive, a solid-state drive (SSD), or any type of media suitable for storing electronic instructions, each coupled with a computer system bus.

[0058] The computer-readable media 502 of the SoC 500 may include executable code for the dynamic generation of a determined temperature threshold. One or more of the processor(s) 504 operably coupled to computer-readable storage media having computer-readable media 502 may execute instructions of dynamic thermal control of a semiconductor device.

[0059] FIG. 6 illustrates an example environment 600 of an example electronic device 602 that includes temperature-based performance and reliability control for semiconductor devices in accordance with one or more implementations. The electronic device 602 may include additional components and interfaces omitted from FIG. 6 for the sake of clarity. The electronic device 602is illustrated with various non-limiting example electronic devices 602, including wireless earbuds 602-1, a smart display associated with a home-automation and control system 602-2, a desktop computer 602-3, a tablet 602-4, a laptop 602-5, a television 602-6, a computing watch 602-7, computing glasses 602-8, a gaming system 602-9, a microwave 602-10, a smart thermostat interface 602-11, and an automobile having computing capabilities 602-12. Other devices may also be used, such as wired earbuds, a security camera, a trackpad, a drawing pad, a netbook, an e-reader, other forms of home-automation and control systems, a wall display, a virtual -reality headset, another vehicle (e.g., an e-bike or plane), and other home appliances, to name just a few examples. Note that the electronic device 602 may be wearable, non-wearable but mobile, or relatively immobile (e.g., desktops and appliances), all without departing from the scope of the present teachings.

[0060] The electronic device 602 includes a housing 604, which defines at least one internal cavity within which one or more of a plurality of electronic components may be disposed. In implementations, a mechanical frame may define one or more portions of the housing 604. As an example, a mechanical frame can include plastic or metallic walls that define portions of the housing 604. In additional implementations, a mechanical frame may support one or more portions of the housing 604. As an example, one or more exterior housing components (e.g., plastic panels) can be attached to the mechanical frame (e.g., a chassis). In so doing, the mechanical frame physically supports the one or more exterior housing components, which define portions of the housing 604. In implementations, the mechanical frame and / or the exterior housing components may be composed of crystalline or non-crystalline solids. In implementations, the housing 604 may be sealed through the inclusion of one or more displays (e.g., at least one display 616), defining at least one internal cavity.

[0061] The electronic device 602 may further include one or more processors 606. The processor(s) 606 can include, as non-limiting examples, an SoC, an application processor (AP), a CPU, or a GPU. The processor(s) 606 generally execute commands and processes utilized by the electronic device 602 and an operating system installed thereon. For example, the processor(s) 606 may perform operations to display graphics of the electronic device 602 on the one or more displays 616 and can perform other specific computational tasks.

[0062] The electronic device 602 may also include computer-readable storage media (CRM) 608. The CRM 608 may be a suitable storage device configured to store device data of the electronic device 602, user data, and multimedia data. The CRM 608 may store an operating system 610 that generally manages hardware and software resources (e.g., the applications) of the electronic device 602 and provides common services for applications stored on the CRM 608. The operating system 610 and the applications are generally executable by the processor(s) 606to enable communications and user interaction with the electronic device 602. One or more processors 606, such as a GPU, perform operations to display graphics of the electronic device 602 on the one or more displays 616 and can perform other specific computational tasks. The processors 606 can be single-core or multiple-core processors.

[0063] The electronic device 602 may also include input / output (I / O) ports 612. The I / O ports 612 allow the electronic device 602 to interact with other devices or users. The I / O ports 612 may include any combination of internal or external ports, such as universal serial bus (USB) ports, audio ports, serial advanced technology attachment (SATA) ports, peripheral component interconnect standard (PCI)-express based ports or card-slots, secure digital input / output (SDIO) slots, and / or other legacy ports.

[0064] The electronic device 602 may further include one or more sensors 614. The sensor(s) 614 can include any of a variety of sensors, such as an audio sensor (e.g., a microphone), a touch-input sensor (e.g., a touchscreen), an image-capture device (e.g., a camera, video-camera), proximity sensors (e.g., capacitive sensors), an under-display fingerprint sensor, or an ambient light sensor (e.g., photodetector). In implementations, the electronic device 602 includes one or more of a front-facing sensor(s) and a rear-facing sensor(s). The element 104 of the semiconductor device may be the various components of the electronic device 602. For example, the element 104 may be processor(s) 606, computer-readable media 608, I / O ports 612, sensors 614, display(s) 616, battery 622, or the like. The operating system 610 and / or various processor(s) 606 of the electronic device 602 include operating instructions to enable the second feedback loop 110 to provide temperature-based performance and reliability control of various components of the electronic device 602.

[0065] The electronic device 602 may include one or more displays 616, one or more cover layers 618, and one or more display panels 620. The cover lay er(s) 618 may be implemented as any of a variety of transparent materials including polymers (e.g., plastic, acrylic) or glasses.

[0066] The electronic device 602 further includes a battery 622. In implementations, the battery 622 is a rechargeable battery that is configured to store and supply electrical energy. The rechargeable battery 622 may be any suitable rechargeable battery, such as a lithium-ion (Li-ion) battery.Example Methods

[0067] Example methods are described below with reference to the flowcharts of FIG. 7 and FIG. 8. Although example method aspects are described separately below, they may be implemented together in any combination or permutation.

[0068] FIG. 7 is a flowchart that illustrates a method 700 for temperature-based performance and reliability control for semiconductor devices, which includes operations 702 through 708. At step 702, a comparison of a recent performance of a semiconductor device to a baseline performance of the semiconductor device is received. For example, a performance optimizer metric calculator (e.g., performance optimizer metric calculator 114) of a feedback loop (e.g., second feedback loop 110) may compare the recent performance of a semiconductor to a baseline performance of the semiconductor device. The comparison may be received by a performance block (e.g., performance block 112).

[0069] At step 704, a usage history of an electronic device coupled with the semiconductor device is received. For example, a performance analyzer (e.g., performance analyzer 116) of a feedback loop (e.g., second feedback loop 110) may analyze a usage history of an electronic device coupled with the semiconductor device. The usage history may be received by a performance block (e.g., performance block 112).

[0070] At step 706, a temperature threshold for an element of the semiconductor is determined based on the comparison of the recent performance of the semiconductor device to the baseline performance of the semiconductor device and the usage history of the electronic device coupled with the semiconductor device. For example, a performance block (e.g., performance block 112) determines a temperature threshold (e.g., determined temperature threshold 118) for an element (e.g., element 104) based on a comparison of the recent performance of the semiconductor device to the baseline performance of the semiconductor device and the usage history of an electronic device coupled with the semiconductor device.

[0071] At step 708, a temperature control unit is directed to control a temperature of the element to not exceed the determined temperature threshold. For example, a performance block (e.g., performance block 112) of a feedback loop (e.g., second feedback loop 110) directs a temperature control unit (e.g., temperature control unit 106) to control a temperature of an element (e.g., element 104) to not exceed the determined temperature threshold (e.g., determined temperature threshold 118). By doing so, a dynamic temperature threshold, based on a recent performance of the semiconductor device and usage history of the electronic device, may be used to provide temperature-based performance control. This results in more-efficient thermal control of the semiconductor device in comparison to thermal control based on a static temperature threshold.

[0072] FIG. 8 is a flowchart that illustrates a method 800 for temperature-based performance and reliability control for semiconductor devices, which includes operations 802 and 804. The method 800 for temperature-based performance control for semiconductor devices may be a continuation of the method 700 of FIG. 7.

[0073] At step 802, an average usage of an electronic device coupled with the semiconductor device is determined based on analyzing the usage history of the electronic device over a predetermined time-period. For example, a component (e.g., performance analyzer 116) of a feedback loop (e.g., second feedback loop 110) of a semiconductor device may analyze the usage history of an electronic device coupled with a semiconductor device to determine an average usage of the electronic device. The component (e.g., performance analyzer 116) may analyze the average usage for various timescales (e.g., an hour, a twenty-four (24) hour period, a forty-eight (48) hour period, a week, a month, or the like) or for various timescales in the past.

[0074] At 804, a performance target based on the determined average usage is provided. For example, the component (e.g., performance analyzer 116) of the feedback loop (e.g., second feedback loop 110) may provide a performance target, based the determined average usage from the analysis of the usage history of the electronic device, to a performance block (e.g., performance block 112) of the feedback loop (e.g., second feedback loop 110). The performance target is based on the determined average usage of an electronic device. As such, the dynamic temperature threshold may provide an improved user experience.

[0075] For the methods described herein and the associated flowchart(s) and flow diagram(s), the orders in which operations are shown and / or described are not intended to be construed as a limitation. Instead, any number or combination of the described method operations can be combined in any order to implement a given method or an alternative method, including by combining operations from the flowchart or diagram and the earlier-described techniques into one or more methods. Operations may also be omitted from or added to the described methods. Further, described operations can be implemented in fully or partially overlapping manners.Example Aspects and Implementations of Temperature-Based Performance Control for Semiconductor Devices

[0076] In the following, some example aspects and implementations are described:

[0077] Example aspect 1. A method comprising: receiving a comparison of a recent performance of a semiconductor device to a baseline performance of the semiconductor device; receiving a usage history of an electronic device coupled with the semiconductor device; determining a temperature threshold for an element of the semiconductor device based on the comparison of the recent performance of the semiconductor device to the baseline performance and the usage history of the electronic device coupled with the semiconductor device; and directing a temperature control unit of the element to not exceed the determined temperature threshold.

[0078] Example aspect 2. The method of example aspect 1, wherein directing the temperature control unit is effective to cause the temperature control unit to throttle a voltage, a frequency, or a current for the element.

[0079] Example aspect 3. The method of example aspects 1 or 2, wherein the temperature control unit includes a prior temperature threshold and the determined temperature threshold replaces the prior temperature threshold.

[0080] Example aspect 4. The method of any one of example aspects 1 to 3, wherein the method is performed by a performance block coupled to, and within, the electronic device.

[0081] Example aspect 5. The method of any one of example aspects 1 through 4, wherein a performance optimizer metric calculator performs the comparison of the recent performance of the semiconductor device to the baseline performance of the semiconductor device and determines a performance reduction metric that indicates a reduction of the recent performance of the semiconductor device from the baseline performance.

[0082] Example aspect 6. The method of example aspect 5, wherein the comparison by the performance optimizer metric calculator further comprises: determining a first operating frequency of a first ring oscillator, the first ring oscillator being isolated from the element of the semiconductor device; determining a second operating frequency of a second ring oscillator coupled with the element of the semiconductor device; and comparing the second operating frequency to the first operating frequency.

[0083] Example aspect 7. The method of example aspect 5, wherein the comparison by the performance optimizer metric calculator further comprises: using a performance counter to analyze the recent performance of the semiconductor device with the baseline performance of the semiconductor device.

[0084] Example aspect 8. The method of example aspect 5, wherein the comparison by the performance optimizer metric calculator further comprises: using software to analyze the recent performance of the semiconductor device with the baseline performance of the semiconductor device.

[0085] Example aspect 9. The method of any one of example aspects 5 to 8, further comprising: determining, by a performance analyzer, an average usage of the electronic device coupled with the semiconductor device based on analyzing the usage history of the electronic device over a predetermined time-period; and providing a performance target based on the determined average usage.

[0086] Example aspect 10. The method of example aspect 9, wherein the determined temperature threshold is based on the performance reduction metric and the performance targetand the determined temperature threshold is identical to the prior temperature threshold when the performance target is less than the performance reduction metric.

[0087] Example aspect 11. The method of example aspect 9 or 10, wherein the determined temperature threshold is based on the performance reduction metric and the performance target and the determined temperature threshold is lower than the prior temperature threshold when the performance target is greater than the performance reduction metric.

[0088] Example aspect 12. The method of any one of example aspects 9 to 11, wherein determining, by the performance analyzer, the average usage of the electronic device further comprises: determining, by a first performance analyzer, a first average usage of the electronic device over a first time-period; and determining, by a second performance analyzer, a second average usage of the electronic device over a second time-period.

[0089] Example aspect 13. The method of example aspect 12, wherein the determined temperature threshold is based on the comparison of the recent performance of the semiconductor device to the baseline performance and a higher average usage between the first average usage and the second average usage.

[0090] Example aspect 14. The method of example aspect 4, or example aspect dependent thereon, wherein: the temperature control unit monitors the temperature of the element at a first regularity; and the performance block determines the temperature threshold for the element at a second regularity, the second regularity being less frequent than the first regularity.

[0091] Example aspect 15. A non-transitory computer-readable memory storing instructions, which, when executed by one or more processors, cause the one or more processors to execute any one of the methods of example aspects 1 to 14.

[0092] Example aspect 16. An apparatus configured to perform the method of any one of example aspects 1 to 14.

[0093] Example aspect 17. A system comprising: a first feedback loop, the first feedback loop configured to monitor and control, based on a first temperature threshold within a temperature control unit, a temperature of an element associated with a semiconductor device; and a second feedback loop coupled with the first feedback loop, the second feedback loop configured to: determine a performance reduction metric of the semiconductor device by comparison of a recent performance of the semiconductor device to a baseline performance of the semiconductor device; determine a temperature threshold based on the performance reduction metric; and transmit the determined temperature threshold to the temperature control unit of the first feedback loop.

[0094] Example aspect 18. The system of example aspect 17, wherein the temperature control unit is configured to: replace a prior temperature threshold stored within the temperaturecontrol unit with the determined temperature threshold; and thermally control the element to control the temperature of the element based on the determined temperature threshold.

[0095] Example aspect 19. The system of example aspect 18, wherein the second feedback loop further comprises: a performance optimizer metric calculator and a performance analyzer coupled with a performance block, the performance block being coupled with the temperature control unit.

[0096] Example aspect 20. The system of example aspect 19, wherein the performance optimizer metric calculator is configured to: determine a performance reduction metric of the semiconductor device, the performance reduction metric based on a comparison of a recent performance of the semiconductor device to a baseline performance of the semiconductor device; and transmit the performance reduction metric to the performance block.

[0097] Example aspect 21. The system of example aspect 20, wherein the performance analyzer is configured to determine a performance target based on a usage history of an electronic device coupled with the semiconductor device and transmit the performance target to the performance block.

[0098] Example aspect 22. The system of example aspect 21, wherein the determined temperature threshold is based on the performance target and the performance reduction metric.

[0099] Example aspect 23. The system of example aspect 22, wherein the performance block is configured to not transmit the determined temperature threshold to the first feedback loop if the performance target is less than the performance reduction metric.

[0100] Example aspect 24. The system of example aspect 22, wherein the performance block is configured to set the determined temperature threshold equal to the prior temperature threshold, stored within the temperature control unit, if the performance target is less than the performance reduction metric.

[0101] Example aspect 25. The system of any one of example aspects 19 to 24, wherein the comparison of the recent performance of the semiconductor device to the baseline performance of the semiconductor device further comprises: a determination of a first operating frequency of a first ring oscillator, the first ring oscillator being isolated from the element of the semiconductor device; a determination of a second operating frequency of a second ring oscillator coupled with the element of the semiconductor device; and a comparison of the second operating frequency to the first operating frequency.

[0102] Example aspect 26. The system of any one of example aspects 19 to 24, further comprising: a comparison counter configured to analyze the recent performance of the semiconductor device with the baseline performance of the semiconductor device.

[0103] Example aspect 27. The system of any one of example aspects 19 to 24, further comprising: software configured to analyze the recent performance of the semiconductor device with the baseline performance of the semiconductor device.

[0104] Example aspect 28. The system of any one of example aspects 19 to 27, wherein the performance analyzer is configured to determine an average usage based on the usage history of the electronic device coupled with the semiconductor device and the performance target is based on the determined average usage.

[0105] Example aspect 29. The system of any one of example aspects 19 to 28, wherein the performance analyzer further comprises: a first performance analyzer configured to determine a first average usage, based on the usage history, of the electronic device coupled with the semiconductor device over a first time period and provide a first performance target based on the determined first average usage; and a second performance analyzer configured to determine a second average usage, based on the usage history, of the electronic device coupled with the semiconductor device over a second time period that differs from the first time period and provide a second performance target based on the determined second average usage.

[0106] Example aspect 30. The system of any one of example aspects 19 to 29, wherein the performance block calculates the determined temperature threshold based on the performance reduction metric and one of the first performance target or the second performance target having a lowest performance target.

[0107] Example aspect 31. The system of any one of example aspects 19 to 30, wherein the first feedback loop monitors the temperature of the element of the semiconductor device at a first regularity and the second feedback loop calculates the determined temperature threshold at a second regularity, the second regularity being less frequent than the first regularity.

[0108] Example aspect 32. The system of any one of example aspects 19 to 31, wherein the performance block comprises a first performance block coupled with the temperature control unit and the performance analyzer and a second performance block coupled with the temperature control unit.

[0109] Example aspect 33. The system of any one of example aspects 19 to 32, wherein the performance analyzer further comprises: a first performance analyzer configured to determine a first average user behavior of the semiconductor device over a first time period and provide a first performance target based on the determined first average user behavior, the first performance analyzer coupled with the first performance block; and a second performance analyzer configured to determine a second average user behavior of the semiconductor device over a second time period that differs from the first time period and provide a second performance target based on thedetermined second average user behavior, the second performance analyzer coupled with the second performance block.Conclusion

[0110] Unless context dictates otherwise, use herein of the word “or” may be considered use of an “inclusive or,” or a term that permits inclusion or application of one or more items that are linked by the word “or” (e.g., a phrase “A or B” may be interpreted as permitting just “A,” as permitting just “B,” or as permitting both “A” and “B”). Also, as used herein, a phrase referring to “at least one of’ a list of items refers to any combination of those items, including single members. For instance, “at least one of a, b, or c” can cover a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiples of the same element (e.g., a-a, a-a-a, a-a-b, a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c, or any other ordering of a, b, and c). Further, items represented in the accompanying figures and terms discussed herein may be indicative of one or more items or terms, and thus reference may be made interchangeably to single or plural forms of the items and terms in this written description.

[0111] Although implementations for temperature-based performance and reliability control for semiconductor devices have been described in language specific to certain features and / or methods, the subject of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as example implementations for temperature-based performance and reliability control for semiconductor devices.

Claims

CLAIMSWhat is claimed is:

1. A method comprising: receiving a comparison of a recent performance of a semiconductor device to a baseline performance of the semiconductor device; receiving a usage history of an electronic device coupled with the semiconductor device; determining a temperature threshold for an element of the semiconductor device based on: the comparison of the recent performance of the semiconductor device to the baseline performance; and the usage history of the electronic device coupled with the semiconductor device; and directing a temperature control unit to control a temperature of the element to not exceed the determined temperature threshold.

2. The method of claim 1 , wherein directing the temperature control unit is effective to cause the temperature control unit to throttle a voltage, a frequency, or a current for the element.

3. The method of claims 1 or 2, wherein the temperature control unit includes a prior temperature threshold and the determined temperature threshold replaces the prior temperature threshold.

4. The method of claim any one of claims 1 to 3, wherein the method is performed by a performance block coupled to, and within, the electronic device.

5. The method of claims 1 through 4, wherein a performance optimizer metric calculator performs the comparison of the recent performance of the semiconductor device to the baseline performance of the semiconductor device and determines a performance reduction metric that indicates a reduction of the recent performance of the semiconductor device from the baseline performance.

6. The method of claim 5, wherein the comparison by the performance optimizer metric calculator further comprises: determining a first operating frequency of a first ring oscillator, the first ring oscillator being isolated from the element of the semiconductor device; determining a second operating frequency of a second ring oscillator coupled with the element of the semiconductor device; and comparing the second operating frequency to the first operating frequency.

7. The method of claim 5, wherein the comparison by the performance optimizer metric calculator further comprises: using a performance counter to analyze the recent performance of the semiconductor device with the baseline performance of the semiconductor device; or using software to analyze the recent performance of the semiconductor device with the baseline performance of the semiconductor device.

8. The method of any one of claims 5 to 7, further comprising: determining, by a performance analyzer, an average usage of the electronic device coupled with the semiconductor device based on analyzing the usage history of the electronic device over a predetermined time-period; and providing a performance target based on the determined average usage.

9. The method of claim 8, wherein the determined temperature threshold is based on the performance reduction metric and the performance target, and the determined temperature threshold is identical to the prior temperature threshold when the performance target is less than the performance reduction metric.

10. The method of claim 8 or 9, wherein the determined temperature threshold is based on the performance reduction metric and the performance target and the determined temperature threshold is lower than the prior temperature threshold when the performance target is greater than the performance reduction metric.

11. The method of any one of claims 8 to 10, wherein determining, by the performance analyzer, the average usage of the electronic device further comprises: determining, by a first performance analyzer, a first average usage of the electronic device over a first time-period; and determining, by a second performance analyzer, a second average usage of the electronic device over a second time-period.

12. The method of claim 11 , wherein the determined temperature threshold is based on the comparison of the recent performance of the semiconductor device to the baseline performance and a higher average usage between the first average usage and the second average usage.

13. The method of claim 4 or any preceding claim dependent thereon, wherein: the temperature control unit monitors the temperature of the element at a first regularity; and the performance block determines the temperature threshold for the element at a second regularity, the second regularity being less frequent than the first regularity.

14. A non-transitory computer-readable memory storing instructions, which, when executed by one or more processors, cause the one or more processors to execute any one of the methods of claims 1 to 13.

15. An apparatus configured to perform the method of any one of claims 1 to 13.

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