Display panel and display apparatus

Abstract

A display panel comprises: a base substrate, a display structure layer, an encapsulation structure layer, a touch structure layer and a plurality of frame signal lines. The display structure layer comprises a plurality of display organic insulating layers and a plurality of display inorganic insulating layers, the plurality of display organic insulating layers being located on the sides of the plurality of display inorganic insulating layers away from the base substrate. The touch structure layer is located on the side of the encapsulation structure layer away from the base substrate, and comprises a touch inorganic insulating layer. The touch inorganic insulating layer comprises: a first inorganic boundary portion located in a first frame region. The first inorganic boundary portion is in direct contact with at least one display organic insulating layer, and is not in direct contact with the plurality of display inorganic insulating layers. The plurality of frame signal lines are located in the first frame region, are located on the sides of the plurality of display inorganic insulating layers away from the base substrate, and are located on the side of the touch inorganic insulating layer close to the base substrate, and there is a voltage difference between at least two adjacent frame signal lines.

Description

Display panel and display device

[0001] The present application claims priority to the Chinese patent application No. 202411304306.6, filed on September 18, 2024, and entitled "Display panel and display device", the content of which is to be understood as incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the technical field of display, and in particular, to a display panel and a display device. BACKGROUND

[0003] Organic light emitting diode (OLED) and quantum dot light emitting diode (QLED) are active light emitting display devices, which have the advantages of self-emission, wide viewing angle, high contrast, low power consumption, extremely high response speed, thinness, flexibility and low cost. SUMMARY

[0004] The following is a summary of the subject matter of the detailed description herein. This summary is not intended to limit the scope of the claims.

[0005] The present application provides a display panel and a display device.

[0006] In one aspect, the embodiment provides a display panel, comprising: a substrate, a display structure layer, an encapsulation structure layer, a touch structure layer, and a plurality of border signal lines. The display structure layer is located on the substrate and comprises a plurality of display organic insulating layers and a plurality of display inorganic insulating layers, the plurality of display organic insulating layers being located on a side of the plurality of display inorganic insulating layers away from the substrate. The encapsulation structure layer is located on a side of the display structure layer away from the substrate. The touch structure layer is located on a side of the encapsulation structure layer away from the substrate and comprises a touch inorganic insulating layer; the touch inorganic insulating layer comprises: a first inorganic boundary portion located in a first border area, the first inorganic boundary portion being in direct contact with at least one display organic insulating layer of the plurality of display organic insulating layers and not being in direct contact with the plurality of display inorganic insulating layers. The plurality of border signal lines are located in the first border area, the plurality of border signal lines being located on a side of the plurality of display inorganic insulating layers away from the substrate and on a side of the touch inorganic insulating layer close to the substrate, and there is a voltage difference between at least two adjacent border signal lines of the plurality of border signal lines. The display panel satisfies at least one of the following: a minimum distance between a projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate and an overlapping area of projections of the at least two border signal lines located on different conductive layers on the substrate is greater than 0; a minimum distance between a projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate and a projection of the at least two border signal lines located on the same conductive layer closest to the touch inorganic insulating layer on the substrate is greater than 0.

[0007] In some example embodiments, the minimum distance between the projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate and the overlapping area of the projections of the at least two border signal lines on the substrate is greater than 20 microns.

[0008] In some example embodiments, the plurality of border signal lines comprises: at least one first border signal line and a plurality of second border signal lines; the plurality of second border signal lines are located on the same conductive layer, the first border signal line and the plurality of second border signal lines are located on different conductive layers; the first border signal line is configured to transmit a constant power signal, and the projection of the first border signal line on the substrate at least partially overlaps with the projection of at least one second border signal line of the plurality of second border signal lines on the substrate.

[0009] In some example embodiments, the display structure layer further comprises: a plurality of display metal layers; the plurality of second border signal lines and a display metal layer of the plurality of display metal layers closest to the touch structure layer are in a same layer structure.

[0010] In some example embodiments, the plurality of display metal layers comprises: a first source-drain metal layer, a second source-drain metal layer and a third source-drain metal layer located on a side of the plurality of display inorganic insulating layers away from the substrate base plate; the plurality of second bezel signal lines and the third source-drain metal layer are in a same layer structure, and the first bezel signal line is located on a side of the plurality of second bezel signal lines close to the substrate base plate.

[0011] In some example embodiments, the first bezel region comprises: a first wiring area, a bending area and a second wiring area arranged in sequence along a direction away from the effective region; the touch inorganic insulating layer does not overlap with the bending area in the orthographic projection of the substrate base plate; a first inorganic boundary portion of the touch inorganic insulating layer is located in the second wiring area and adjacent to the bending area.

[0012] In some example embodiments, the display structure layer comprises: a plurality of sub-pixels located in the effective region and a plurality of data lines connected with the plurality of sub-pixels. The substrate base plate further comprises: a second bezel region located on a remaining side of the effective region, the second bezel region being provided with a gate drive circuit configured to provide a gate control signal for the plurality of sub-pixels. The first bezel region further comprises: at least one first signal access area located on a side of the second wiring area away from the bending area; the first signal access area is provided with a plurality of first contact pads. The second wiring area is provided with at least one first power supply transfer line, a plurality of data transfer lines, a plurality of first drive transmission lines, a plurality of first drive connection lines and a plurality of second drive connection lines; the first power supply transfer line is configured to transmit a constant first power supply signal. The plurality of data lines are connected with a part of the first contact pads of the first signal access area through the plurality of data transfer lines; the plurality of first drive transmission lines and the plurality of second drive connection lines are located on two sides of the first signal access area along a first direction; the plurality of first drive transmission lines are connected with the plurality of second drive connection lines through the plurality of first drive connection lines and are configured to transmit a control signal provided for the gate drive circuit; the plurality of first drive connection lines are located on a side of the first signal access area close to the bending area. The first bezel signal line comprises the first power supply transfer line, and the plurality of second bezel signal lines comprise the plurality of first drive connection lines.

[0013] In some example embodiments, the plurality of first drive connection lines are located on a side of the plurality of first drive transmission lines and the plurality of second drive connection lines away from the substrate base plate. The first power supply transfer line is located on a side of the plurality of data transfer lines away from the substrate base plate and on a side of the plurality of first drive connection lines close to the substrate base plate.

[0014] In some example embodiments, the first border region further comprises a second signal access area located on a side of the first signal access area away from the bending area, and the second signal access area is provided with a plurality of second contact pads. The second trace area is further provided with a plurality of second driving transmission lines, and the plurality of second driving transmission lines are located on the same side of the first signal access area as the plurality of first driving transmission lines. The plurality of second contact pads comprises at least one first group of second contact pads, at least one second group of second contact pads, and at least one third group of second contact pads; the first group of second contact pads is connected with a portion of the first contact pads in the first signal access area; the second group of second contact pads is connected with the plurality of second driving transmission lines; the third group of second contact pads is connected with the plurality of second driving connection lines; and the second group of second contact pads and the third group of second contact pads are located on two sides of the first group of second contact pads.

[0015] In some example embodiments, the second trace area is provided with at least one second power supply transition line configured to transmit a constant second power supply signal, and a plurality of touch transition lines. The first border signal line comprises the second power supply transition line, and the plurality of second border signal lines comprises the plurality of touch transition lines.

[0016] In some example embodiments, the display panel further comprises an auxiliary organic insulating layer located in the first border region, and the auxiliary organic insulating layer is located on a side of the plurality of display organic insulating layers away from the substrate, and on a side of the touch inorganic insulating layer close to the substrate. A projection of the auxiliary organic insulating layer on the substrate covers a projection of the at least two border signal lines on the substrate.

[0017] In some example embodiments, a first inorganic boundary portion of the touch inorganic insulating layer partially overlaps a projection of the auxiliary organic insulating layer on the substrate.

[0018] In some example embodiments, the touch structure layer comprises, in sequence, a touch barrier layer, a first touch conductive layer, a touch interlayer insulating layer, a second touch conductive layer, and a touch protection layer located on the encapsulation structure layer; and the touch inorganic insulating layer comprises the touch barrier layer, or comprises the touch barrier layer and the touch interlayer insulating layer.

[0019] In another aspect, the embodiments provide a display device comprising the display panel as described above.

[0020] Other aspects can become apparent after reading and understanding the accompanying drawings and detailed description.

[0021] SUMMARY

[0022] The accompanying drawings are used to provide an understanding of the technical solutions of the present application, constitute a part of the specification, and are used together with the embodiments of the present application to explain the technical solutions of the present application, and do not constitute a limitation on the technical solutions of the present application.

[0023] FIG. 1 is a schematic diagram of a display panel according to at least one embodiment of the present disclosure;

[0024] FIG. 2 is a partial plan view of a touch area of a display panel according to at least one embodiment of the present disclosure;

[0025] FIG. 3A is a partial cross-sectional view of an active area of a display panel according to at least one embodiment of the present disclosure;

[0026] FIG. 3B is another partial cross-sectional view of an active area of a display panel according to at least one embodiment of the present disclosure;

[0027] FIG. 3C is another partial cross-sectional view of an active area of a display panel according to at least one embodiment of the present disclosure;

[0028] FIG. 4 is a partial plan view of a first frame area of a display panel according to at least one embodiment of the present disclosure;

[0029] FIG. 5 is a partial wiring diagram of region S1 in FIG. 4;

[0030] FIG. 6 is a partial plan view of region S1 in FIG. 4;

[0031] FIG. 7 is a partial plan view of region S2 in FIG. 4;

[0032] FIG. 8A is a partial cross-sectional view along the direction of PP' in FIG. 6;

[0033] FIG. 8B is a partial cross-sectional view along the direction of QQ' in FIG. 6;

[0034] FIG. 8C is another partial cross-sectional view along the direction of PP' in FIG. 6;

[0035] FIG. 9 is a partial plan view in FIG. 5;

[0036] FIG. 10A is a partial cross-sectional view along the direction of RR' in FIG. 9;

[0037] FIG. 10B is a partial cross-sectional view along the direction of UU' in FIG. 9;

[0038] FIG. 11 is a schematic diagram of a display device according to at least one embodiment of the present disclosure.

[0039] DETAILED DESCRIPTION

[0040] Embodiments of the present disclosure will be described below with reference to the accompanying drawings. The embodiments can be implemented in various different forms. It is readily apparent to those skilled in the art that the form and details of the embodiments can be changed without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure should not be construed as being limited to the embodiments described below. The embodiments in the present disclosure and the features in the embodiments can be combined with each other as long as they do not conflict with each other.

[0041] In the drawings, the size, the thickness, or the region of one or more of constituent elements shown in the drawings can sometimes be exaggerated for the purpose of explanation and thus is not necessarily to scale. Therefore, one embodiment of the present disclosure is not necessarily limited to such a scale. Additionally, the present disclosure is not necessarily limited in shape, number, or the arrangement of the components illustrated in the drawings.

[0042] The ordinal numbers such as "first", "second", and "third" in the present specification are used to avoid confusion among constituent elements and are not used to constitute a limitation on the number thereof in the present disclosure. "A plurality of" in the present disclosure means two or more.

[0043] In the present specification, the words "center", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like used to describe the positional relationship of the constituent elements with reference to the drawings are used only for the purpose of facilitating the description of the present specification and simplifying the description, and do not indicate or imply that a specific orientation is required for the device or element referred to, and therefore cannot be construed as limiting the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction of the constituent elements described. Therefore, it is not limited to the words described in the specification, and can be appropriately changed depending on the situation.

[0044] In this specification, unless otherwise explicitly specified and limited, the terms "mount", "connected", "connected" should be understood broadly. For example, it can be fixedly connected, or detachably connected, or integrally connected; it can be mechanically connected, or connected; it can be directly connected, or indirectly connected through an intermediate piece, or connected inside two elements. For those skilled in the art, the meaning of the above terms in this disclosure can be understood according to the circumstances. Among them, "connected" can include "electrically connected", "electrically connected" can include the case where the constituent elements are connected together through an element having a certain electrical effect. The "element having a certain electrical effect" is not particularly limited as long as it can transmit electrical signals between the connected constituent elements. Examples of "elements having a certain electrical effect" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, other elements with multiple functions, and the like.

[0045] In this specification, a transistor refers to an element including at least a gate (gate electrode), a drain, and a source. A transistor has a channel region between a drain (drain electrode terminal, drain region, or drain electrode) and a source (source electrode terminal, source region, or source electrode), and current can flow through the drain, the channel region, and the source. In this specification, the channel region refers to a region where current flows mainly.

[0046] In this specification, the first electrode can be a drain, and the second electrode can be a source, or the first electrode can be a source, and the second electrode can be a drain. In addition, the gate can also be referred to as a control electrode. In the case of using a transistor with opposite polarity or in the case where the direction of current flow in a circuit is changed, the functions of the "source" and the "drain" are sometimes interchanged. Therefore, in this specification, the "source" and the "drain" can be interchanged.

[0047] In this specification, "parallel" refers to a state in which the angle formed by two straight lines is -10° or more and 10° or less, and thus also includes a state in which the angle is -5° or more and 5° or less. In addition, "perpendicular" refers to a state in which the angle formed by two straight lines is 80° or more and 100° or less, and thus also includes a state in which the angle is 85° or more and 95° or less.

[0048] In this specification, a circle, an ellipse, a triangle, a rectangle, a trapezoid, a pentagon, or a hexagon, etc. are not strictly speaking, and can be an approximate circle, an approximate ellipse, an approximate triangle, an approximate rectangle, an approximate trapezoid, an approximate pentagon, or an approximate hexagon, etc. There can be some small deformations due to tolerances, such as a lead angle, an arc edge, and a deformation, etc.

[0049] In the present specification, "about" and "approximately" mean not strictly limited, and allow for a range of process and measurement error. In the present disclosure, "the same" includes a case where the values differ by 10% or less, such as a case where the values differ by 5% or less.

[0050] In the present specification, A extending along a direction of B means that A can include a main portion and a secondary portion connected to the main portion, the main portion is a line, a line segment or a bar-shaped body, the main portion stretches along the direction of B, and the length of the main portion stretching along the direction of B is greater than the length of the secondary portion stretching along other directions. In the present specification, "A extending along the direction of B" means "the main portion of A extending along the direction of B".

[0051] In the present specification, "A and B are in the same layer structure" means that A and B are formed at the same time by the same patterning process. "The same layer" does not always mean that the thickness or height of the layer is the same in the cross-sectional view. "The orthographic projection of A contains the orthographic projection of B" means that the orthographic projection of B falls within the orthographic projection of A, or the orthographic projection of A covers the orthographic projection of B.

[0052] In some implementations, a display panel can integrate a touch structure. The display panel can include a liquid crystal display (LCD) substrate, or can be an organic light-emitting diode (OLED) display substrate, or can be a plasma display device (PDP) display substrate, or can be an electrophoretic display (EPD) display substrate. For example, the display panel can include an OLED display substrate and a touch structure. The touch structure can be disposed on the encapsulation layer of the display substrate, forming a Touch on Thin Film Encapsulation (Touch on TFE) structure. The display structure and the touch structure are integrated together, which has the advantages of thinness, foldability, etc., and can meet the product requirements of flexible folding, narrow frame, etc.

[0053] In some examples, the Touch on TFE structure mainly includes a Flexible Multi-Layer On Cell (FMLOC) structure and a Flexible Single-Layer On Cell (FSLOC) structure. The FMLOC structure is based on the working principle of mutual-capacitance detection, generally uses two conductive layers to form a driving (Tx) electrode and a sensing (Rx) electrode, and an integrated circuit (IC) realizes touch action by detecting the mutual capacitance between the driving electrode and the sensing electrode. The FSLOC structure is based on the working principle of self-capacitance (or voltage) detection, generally uses a single conductive layer to form a touch electrode, and an integrated circuit realizes touch action by detecting the self-capacitance (or voltage) of the touch electrode.

[0054] The inventors have noticed in the research that in a display panel integrating a display structure and a touch structure, a touch inorganic insulating layer is arranged before the preparation of a conductive layer of the touch structure or between adjacent conductive layers of the touch structure. An edge position of the touch inorganic insulating layer can be directly in contact with an inorganic insulating layer in the display structure to form an inorganic closed space, so that water vapor cannot invade. However, when a boundary of the touch inorganic insulating layer (for example, a boundary of the touch inorganic insulating layer located on a side of the bending area away from the display area) cannot be directly in contact with the inorganic insulating layer in the display structure, and the boundary is close to a conductive layer of the display structure, if water vapor invades the boundary, the water vapor cannot overflow in the reliability process, and direct electrochemical corrosion of a signal wire of the conductive layer of the display structure is likely to occur. When there is a voltage difference between the signal wires, the corrosion of the signal wires is further aggravated.

[0055] The embodiment provides a display panel and a display device, and corrosion of a signal wire in a reliability process can be improved.

[0056] The embodiment provides a display panel, which comprises a substrate, a display structure layer, an encapsulation structure layer, a touch structure layer, and a plurality of frame signal lines. The display structure layer is located on the substrate and comprises a plurality of display organic insulating layers and a plurality of display inorganic insulating layers. The plurality of display organic insulating layers are located on a side of the plurality of display inorganic insulating layers away from the substrate. The encapsulation structure layer is located on a side of the display structure layer away from the substrate. The touch structure layer is located on a side of the encapsulation structure layer away from the substrate and comprises a touch inorganic insulating layer. The touch inorganic insulating layer comprises a first inorganic boundary portion located in a first frame area. The first inorganic boundary portion is directly in contact with at least one display organic insulating layer of the plurality of display organic insulating layers and is not directly in contact with the plurality of display inorganic insulating layers. The plurality of frame signal lines are located in the first frame area. The plurality of frame signal lines are located on a side of the plurality of display inorganic insulating layers away from the substrate and on a side of the touch inorganic insulating layer close to the substrate. There is a voltage difference between at least two adjacent frame signal lines of the plurality of frame signal lines. The display panel satisfies at least one of the following conditions: a minimum distance between a projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate and an overlapping area of projections of the at least two frame signal lines located on different conductive layers on the substrate is greater than 0; and a minimum distance between a projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate and a projection of the at least two frame signal lines located on the same conductive layer closest to the touch inorganic insulating layer on the substrate is greater than 0.

[0057] In some examples, the adjacent bezel signal lines can include: bezel signal lines close to each other in a plane parallel to the plane where the substrate substrate lies, for example, bezel signal lines located in the same conductive layer and without other traces between them; bezel signal lines close to each other in a direction perpendicular to the plane where the substrate substrate lies, for example, bezel signal lines located in adjacent conductive layers and without other traces between them in a direction perpendicular to the substrate substrate.

[0058] In some examples, the plurality of bezel signal lines with voltage difference are adjacent in a direction parallel to the plane where the substrate substrate lies and are located in the same conductive layer closest to the touch inorganic insulation layer, and in the first bezel area, the minimum distance between the orthographic projection of the first inorganic boundary part of the touch inorganic insulation layer on the substrate substrate and the orthographic projection of the plurality of bezel signal lines with voltage difference on the substrate substrate is greater than 0. In other words, in the first bezel area, the orthographic projection of the first inorganic boundary part of the touch inorganic insulation layer on the substrate substrate can not overlap with the orthographic projection of the plurality of adjacent bezel signal lines with voltage difference on the substrate substrate.

[0059] In some examples, the plurality of bezel signal lines with voltage difference are adjacent in a direction perpendicular to the plane where the substrate substrate lies, and in the first bezel area, the minimum distance between the orthographic projection of the first inorganic boundary part of the touch inorganic insulation layer on the substrate substrate and the overlapping area of the orthographic projection of the plurality of bezel signal lines with voltage difference on the substrate substrate is greater than 0. In other words, in the first bezel area, the orthographic projection of the first inorganic boundary part of the touch inorganic insulation layer on the substrate substrate can not overlap with the overlapping area of the orthographic projection of the plurality of bezel signal lines with voltage difference on the substrate substrate.

[0060] In some examples, the voltage difference between the two bezel signal lines can mean that the two bezel signal lines are configured to transmit different signals. For example, one of the bezel signal lines transmits a constant voltage signal, and the other bezel signal line transmits a pulse signal. For another example, both of the bezel signal lines transmit pulse signals, and one of the bezel signal lines transmits a high-level signal while the other bezel signal line transmits a low-level signal.

[0061] The display panel provided by the embodiment can improve the corrosion of the bezel signal lines caused by the water vapor invading from the first inorganic boundary part of the touch inorganic insulation layer that does not directly contact the inorganic insulation layer of the display structure layer by removing the touch inorganic insulation layer at the positions of the plurality of bezel signal lines with voltage difference. The embodiment can improve the corrosion of the bezel signal lines in the first bezel area during the reliability process and avoid the display defects caused thereby.

[0062] In some example embodiments, the first inorganic boundary portion of the touch inorganic insulating layer has a minimum distance between a projection of the first inorganic boundary portion on the substrate and an overlapping area between the at least two bezel signal lines having a voltage difference, which can be greater than 20 microns. The distance setting of the present example can improve the corrosion of the bezel signal lines caused by water vapor.

[0063] In some example embodiments, the plurality of bezel signal lines can include at least one first bezel signal line and a plurality of second bezel signal lines. The plurality of second bezel signal lines can be located in the same conductive layer, and the first bezel signal line and the plurality of second bezel signal lines can be located in different conductive layers. The first bezel signal line can be configured to transmit a constant power signal, and a projection of the first bezel signal line on the substrate and a projection of at least one second bezel signal line of the plurality of second bezel signal lines on the substrate can at least partially overlap. In some examples, the display structure layer can further include a plurality of display metal layers, and the plurality of second bezel signal lines and a display metal layer closest to the touch structure layer of the plurality of display metal layers can be a same layer structure. For example, the plurality of display metal layers can include a first source-drain metal layer, a second source-drain metal layer, and a third source-drain metal layer located on a side of the plurality of inorganic insulating layers of the display structure layer away from the substrate, and the plurality of second bezel signal lines and the third source-drain metal layer can be a same layer structure, and the first bezel signal line can be located on a side of the plurality of second bezel signal lines close to the substrate.

[0064] In some example embodiments, the first bezel area can include a first wiring area, a bending area, and a second wiring area arranged in sequence along a direction away from the active area. The touch inorganic insulating layer can not overlap the bending area in a projection on the substrate, and the first inorganic boundary portion of the touch inorganic insulating layer can be located in the second wiring area and adjacent to the bending area. In some examples, in order to ensure the bending performance of the bending area, the bending area is not provided with the touch inorganic insulating layer, and the touch inorganic insulating layer includes the first inorganic boundary portion adjacent to the bending area in the second wiring area, and an edge of the first inorganic boundary portion can face the bending area. Since the first inorganic boundary portion directly contacts the display organic insulating layer of the display structure layer and does not contact the display inorganic insulating layer to form an inorganic closed space, there is a risk of water vapor intrusion along the edge position of the first inorganic boundary portion. The present example adjusts the positional relationship between the first inorganic boundary portion of the touch inorganic insulating layer and the plurality of bezel signal lines having a voltage difference in the second wiring area, which can improve the corrosion of the wiring in the setting area of the bezel signal lines having a voltage difference, thereby avoiding display abnormalities caused thereby.

[0065] In some example embodiments, the first border signal line and the plurality of second border signal lines are located in the second trace area. The first border signal line can include at least one of a first power supply transition line for transmitting a first power supply signal, and a second power supply transition line for transmitting a second power supply signal. The first power supply signal can be greater than the second power supply signal. The plurality of second border signal lines can include at least one of a plurality of first driving connection lines, and a plurality of touch transition lines. A projection of the first power supply transition line on the substrate can at least partially overlap with a projection of at least one of the first driving connection lines on the substrate. A projection of the second power supply transition line on the substrate can at least partially overlap with a projection of at least one of the touch transition lines on the substrate.

[0066] In some example embodiments, the display panel can further include an auxiliary organic insulating layer located in the first border area. The auxiliary organic insulating layer is located on a side of the plurality of display organic insulating layers away from the substrate, and on a side of the touch inorganic insulating layer close to the substrate. A projection of the auxiliary organic insulating layer on the substrate can cover a projection of the at least two border signal lines on the substrate. In some examples, a projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate can partially overlap with a projection of the auxiliary organic insulating layer on the substrate. The present example can ensure the covering of the plurality of border signal lines by arranging the auxiliary organic insulating layer.

[0067] The scheme of the present embodiments is illustrated below by some examples.

[0068] FIG. 1 is a schematic diagram of a display panel according to at least one embodiment of the present disclosure. FIG. 1 shows a planar schematic diagram of the display panel before a bending process. In some examples, as shown in FIG. 1, the display panel can include an active area AA and a border area BB surrounding the periphery of the active area AA. For example, the border area BB can include a first border area B1 located on one side of the active area AA, and a second border area (e.g., which can include an upper border area B2, a left border area B3, and a right border area B4) located on other sides of the active area AA. The first border area B1 can be a lower border of the display panel.

[0069] In some examples, as shown in FIG. 1, the active area AA can be a flat area configured to display dynamic pictures or static images, and can also be configured to perform touch sensing. The active area AA can be a display area, and can also be a touch area. In the following description, the touch area and the display area both refer to the active area AA. In some examples, the active area AA can be rectangular, for example, a round-cornered rectangle. In other examples, the active area AA can be circular or elliptical, or other shapes. In some examples, the display panel can be a flexible panel, and thus the display panel can be variable, for example, being curled, bent, folded, or rolled up.

[0070] In some examples, as shown in FIG. 1, the active area AA can include a plurality of sub-pixels PX, a plurality of gate lines GL, and a plurality of data lines DL. The plurality of sub-pixels PX can be arranged in an array along a first direction D1 and a second direction D2. The first direction D1 and the second direction D2 are perpendicular to each other. The plurality of gate lines GL can extend along the first direction D1 and be arranged along the second direction D2. The plurality of data lines DL can extend along the second direction D2 and be arranged along the first direction D1. The plurality of gate lines GL and the plurality of data lines DL can intersect to form a plurality of sub-pixel regions in the orthographic projection of the substrate, and each sub-pixel region can be configured to have one sub-pixel PX. The plurality of data lines DL can be electrically connected to the plurality of sub-pixels PX and configured to provide data signals to the plurality of sub-pixels PX. The plurality of gate lines GL can be electrically connected to the plurality of sub-pixels PX and configured to provide gate control signals to the plurality of sub-pixels PX. In some examples, the gate control signals can include scan signals and light-emitting control signals, or can include scan signals, or can include scan signals, light-emitting control signals, and reset control signals.

[0071] In some examples, as shown in FIG. 1, the first direction D1 can be parallel to the extension direction of the gate lines GL in the display area AA, and the first direction D1 can also be referred to as the row direction. The second direction D2 can be parallel to the extension direction of the data lines DL in the display area AA, and the second direction D2 can also be referred to as the column direction.

[0072] In some examples, one pixel unit of the active area AA can include three sub-pixels, which can be a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively. In other examples, one pixel unit can include four sub-pixels, which can be a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel, respectively, or the four sub-pixels can include one red sub-pixel, one blue sub-pixel, and two green sub-pixels.

[0073] In some examples, one sub-pixel can include a pixel circuit and a light emitting element electrically connected with the pixel circuit. The pixel circuit can include a plurality of transistors and at least one capacitor. For example, the pixel circuit can be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C or 8T1C structure. Wherein, T in the above circuit structure refers to a thin film transistor, C refers to a capacitor, the number before T represents the number of thin film transistors in the circuit, and the number before C represents the number of capacitors in the circuit. In some examples, the plurality of transistors in the pixel circuit can be P-type transistors, or can be N-type transistors. Using the same type of transistors in the pixel circuit can simplify the process flow, reduce the process difficulty of the display panel, and improve the yield of the product. In other examples, the plurality of transistors in the pixel circuit can include P-type transistors and N-type transistors.

[0074] In some examples, the plurality of transistors in the pixel circuit can be low temperature poly-silicon thin film transistors, or can be oxide thin film transistors, or can be low temperature poly-silicon thin film transistors and oxide thin film transistors. The active layer of the low temperature poly-silicon thin film transistor adopts low temperature poly-silicon (LTPS, Low Temperature Poly-Silicon), and the active layer of the oxide thin film transistor adopts oxide semiconductor (Oxide). The low temperature poly-silicon thin film transistor has the advantages of high mobility and fast charging, and the oxide thin film transistor has the advantage of low leakage current. Integrating the low temperature poly-silicon thin film transistor and the oxide thin film transistor on one display panel, i.e., an LTPS+Oxide (LTPO for short) display panel, can take advantage of both, can realize low frequency driving, can reduce power consumption, and can improve display quality.

[0075] In some examples, the light emitting element can be any one of a light emitting diode (LED), an organic light emitting diode (OLED), a quantum dot light emitting diode (QLED), a micro-LED (including: mini-LED or micro-LED), etc. For example, the light emitting element can be an OLED, and the light emitting element can emit red light, green light, blue light, or white light, etc. under the driving of the corresponding pixel circuit. The color of the light emitted by the light emitting element can be determined as needed. In some examples, the light emitting element can include an anode, a cathode, and an organic light emitting layer between the anode and the cathode. The anode of the light emitting element can be electrically connected with the corresponding pixel circuit. However, the present embodiment is not limited thereto.

[0076] In some examples, the shape of the light emitting element of the sub-pixel can be rectangular, diamond, pentagonal or hexagonal. When one pixel unit includes three sub-pixels, the light emitting elements of the three sub-pixels can be arranged in a horizontal parallel, vertical parallel or triangle manner; when one pixel unit includes four sub-pixels, the light emitting elements of the four sub-pixels can be arranged in a horizontal parallel, vertical parallel or square manner. However, the present embodiment is not limited in this regard.

[0077] FIG. 2 is a partial plan view of a touch area of a display panel according to at least one embodiment of the present disclosure. In some examples, as shown in FIG. 2, the touch area AA can include a plurality of first touch units 530 and a plurality of second touch units 540, for example, in a display panel integrated with a mutual-capacitance touch structure, forming an FMLOC structure. The first touch units 530 can extend along a first direction D1, and the plurality of first touch units 530 can be arranged in sequence along a second direction D2. The second touch units 540 can extend along the second direction D2, and the plurality of second touch units 540 can be arranged in sequence along the first direction D1. Each first touch unit 530 can include a plurality of first touch electrodes 531 and a first connecting portion 532 arranged in sequence along the first direction D1, and the first touch electrodes 531 and the first connecting portion 532 can be alternately arranged and sequentially connected. Each second touch unit 540 can include a plurality of second touch electrodes 541 arranged in sequence along the second direction D2, and the plurality of second touch electrodes 541 can be arranged at intervals, and adjacent second touch electrodes 541 can be connected to each other by a second connecting portion 542. In some examples, the film layer in which the second connecting portion 542 is located can be different from the film layer in which the first touch electrodes 531 and the second touch electrodes 541 are located.

[0078] In some examples, as shown in FIG. 2, the first touch electrodes 531 and the second touch electrodes 541 can be in the form of transparent conductive electrodes. In other examples, the first touch electrodes 531 and the second touch electrodes 541 can be in the form of metal grids, which can be formed by interlacing a plurality of metal lines, and the metal grid can include a plurality of grid patterns, which can be polygons formed by a plurality of metal lines. The first touch electrodes 531 and the second touch electrodes 541 in the form of metal grids have the advantages of small resistance, small thickness and fast response speed.

[0079] In some examples, as shown in FIG. 2, the first touch electrodes 531 and the second touch electrodes 541 can have a diamond shape, for example, a regular diamond, or a horizontally long diamond, or a vertically long diamond. In other examples, the first touch electrodes 531 and the second touch electrodes 541 can have any one or more of a triangle, a square, a trapezoid, a parallelogram, a pentagon, a hexagon and other polygons, which are not limited in the present embodiment.

[0080] FIG. 3A is a schematic diagram of a partial cross-section of an active area of a display panel according to at least one embodiment of the present disclosure. In FIG. 3A, a structure of a sub-pixel in the active area is shown as an example. In this example, the same type of transistors in the pixel circuit is used as an example, for example, the transistors in the pixel circuit can all be low-temperature polysilicon thin film transistors. In other examples, the transistors in the pixel circuit can be low-temperature polysilicon thin film transistors and oxide thin film transistors. In addition, this example uses a display panel integrated with a mutual-capacitance touch structure to form an FMLOC structure as an example.

[0081] In some examples, as shown in FIG. 3A, in a direction perpendicular to the display panel, the active area of the display panel can include: a substrate 10, and a circuit structure layer 20, a light-emitting structure layer 30, an encapsulation structure layer 40, and a touch structure layer 50 disposed in sequence on the substrate 10. The display structure layer can include the circuit structure layer 20 and the light-emitting structure layer 30. The circuit structure layer 20 can include at least: pixel circuits of a plurality of sub-pixels, each pixel circuit of a sub-pixel can include a plurality of transistors and at least one capacitor. The light-emitting structure layer 30 can include at least: light-emitting elements of a plurality of sub-pixels. The touch structure layer 50 is based on the encapsulation structure layer 40. In some possible implementations, other film layers (such as a color filter layer) can be disposed between the touch structure layer 50 and the encapsulation structure layer 40, which is not limited in the present disclosure.

[0082] In some examples, the substrate 10 can include a first flexible material layer, a first inorganic material layer, a base semiconductor layer, a second flexible material layer, and a second inorganic material layer stacked together. The material of the first flexible material layer and the second flexible material layer can be polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer soft film, etc. The material of the first inorganic material layer and the second inorganic material layer can be silicon nitride (SiNx) or silicon oxide (SiOx), etc. for improving the water-oxygen resistance of the substrate 10. The material of the base semiconductor layer can be amorphous silicon (a-Si). However, the present embodiment is not limited thereto.

[0083] In some examples, FIG. 3A is illustrated by taking one thin film transistor 21 and one capacitor 22 included in each sub-pixel as an example. In some examples, the circuit structure layer 20 of the effective area can include: a semiconductor layer, a first gate metal layer, a second gate metal layer, a first source-drain metal layer, a second source-drain metal layer, and a third source-drain metal layer disposed on the substrate 10. The plurality of display metal layers of the display structure layer of the present example can include: the first gate metal layer, the second gate metal layer, the first source-drain metal layer, the second source-drain metal layer, and the third source-drain metal layer. A first gate insulating layer 101 can be disposed between the semiconductor layer and the first gate metal layer, a second gate insulating layer 102 can be disposed between the first gate metal layer and the second gate metal layer, an interlayer insulating layer 103 can be disposed between the second gate metal layer and the first source-drain metal layer, a passivation layer 104 and a first planarization layer 105 can be disposed between the first source-drain metal layer and the second source-drain metal layer, a second planarization layer 106 can be disposed between the second source-drain metal layer and the third source-drain metal layer, and a third planarization layer 107 can be disposed on the side of the third source-drain metal layer away from the substrate 10. Among them, the plurality of display inorganic insulating layers of the display structure layer can include: the first gate insulating layer 101, the second insulating layer 102, the interlayer insulating layer 103, and the passivation layer 104, and the plurality of display organic insulating layers of the display structure layer can include: the first planarization layer 105, the second planarization layer 106, and the third planarization layer 107. However, the present embodiment is not limited thereto. In other examples, a buffer layer can also be disposed on the side of the semiconductor layer close to the substrate, which can prevent harmful substances in the substrate from invading the inside of the display panel, and also increase the adhesion of the film layers in the display panel to the substrate. In other examples, a bottom shielding metal layer (BSM) can be disposed on the side of the buffer layer close to the substrate, which can be configured to at least partially cover the active layer of the thin film transistor of the pixel circuit to avoid the influence of external light on the performance of the thin film transistor.

[0084] In some examples, the first gate metal layer, the second gate metal layer, the first source-drain metal layer, the second source-drain metal layer, and the third source-drain metal layer can adopt a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above-mentioned metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), which can be a single-layer structure or a multi-layer composite structure, such as Ti / Al / Ti, etc. The semiconductor layer can adopt a material such as amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathienyl, or polythiophene, i.e., the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology, or organic technology.

[0085] In some examples, as shown in FIG. 3A, the semiconductor layer in the effective area can include: the active layer 210 of the thin film transistor 21. The active layer 210 of the thin film transistor 21 can include: the first region 2101, the second region 2102, and the channel region 2100 between the first region 2101 and the second region 2102. The first gate metal layer can include: the gate 213 of the thin film transistor 21, and the first plate 221 of the capacitor 22. The gate 213 of the thin film transistor 21 can cover the channel region 2100 of the active layer 210 in the orthographic projection of the substrate 10. The second gate metal layer can include: the second plate 222 of the capacitor 22. The second plate 222 and the first plate 221 of the capacitor 22 can at least partially overlap in the orthographic projection of the substrate 10, for example, the two can coincide. The first source-drain metal layer can include: the source 211 and the drain 212 of the thin film transistor 21. The interlayer insulating layer 103 can be provided with a plurality of vias (for example, including a first pixel via and a second pixel via) in the effective area. The interlayer insulating layer 103, the second gate insulating layer 102, and the first gate insulating layer 101 in the first pixel via can be removed, exposing at least part of the surface of the first region 2101 of the active layer 210; the interlayer insulating layer 103, the second gate insulating layer 102, and the first gate insulating layer 101 in the second pixel via can be removed, exposing at least part of the surface of the second region 2102 of the active layer 210. The source 211 of the thin film transistor 21 can be electrically connected to the first region 2101 of the active layer 210 through the first pixel via, and the drain 212 can be electrically connected to the second region 2102 of the active layer 210 through the second pixel via. The second source-drain metal layer can include: the first transfer electrode 231. The first transfer electrode 231 can be electrically connected to the drain 212 of the thin film transistor 21 of the pixel circuit through the third pixel via provided by the passivation layer 104 and the first planarization layer 105. The third source-drain metal layer can include: the second transfer electrode 232. The second transfer electrode 232 can be electrically connected to the first transfer electrode 231 of the second source-drain metal layer through the fourth pixel via provided by the second planarization layer 106. The second transfer electrode 232 can be electrically connected to the first electrode 301 (for example, the anode) of the light emitting element through the fifth pixel via provided by the third planarization layer 107. The first transfer electrode 231 and the second transfer electrode 232 can realize the electrical connection between the pixel circuit and the light emitting element.

[0086] In some examples, the gate lines of the effective area can be located in the first gate metal layer, the data lines of the effective area can be located in the second source-drain metal layer or the third source-drain metal layer, and the high-potential power lines of the effective area can be located in at least one of the second source-drain metal layer and the third source-drain metal layer. The present embodiment is not limited in this regard. The circuit structure layer of the present example can include three source-drain metal layers, and the arrangement of more lines in a single source-drain metal layer can be avoided, thereby facilitating the realization of a narrow frame structure.

[0087] In some examples, as shown in FIG. 3A, the light-emitting structure layer 30 can include a pixel definition layer 304 and a plurality of light-emitting elements. For example, each light-emitting element can include a first electrode 301, an organic light-emitting layer 302, and a second electrode 303 stacked in this order. The first electrode 301 of the light-emitting element can be an anode, and the first electrode 301 can be disposed on the third planar layer 107 and electrically connected to the second transfer electrode 232 through the fifth pixel via hole of the third planar layer 107. The pixel definition layer 304 is disposed on the first electrode 301 and the third planar layer 107, and the pixel definition layer 304 can be provided with a plurality of pixel openings, each of which can expose at least part of the surface of a corresponding first electrode 301. At least part of the organic light-emitting layer 302 can be disposed in one pixel opening and connected to the corresponding first electrode 301. The second electrode 303 can be disposed on the organic light-emitting layer 302 and connected to the organic light-emitting layer 302. The organic light-emitting layer 302 can emit light of a corresponding color under the drive of the first electrode 301 and the second electrode 303. The side of the pixel definition layer 304 away from the substrate 10 can also be provided with a spacer layer, which can include a plurality of spacers (PS). In some examples, the pixel definition layer 434 can be made of polyimide, acrylic, polyethylene terephthalate, or the like.

[0088] In some examples, the organic light-emitting layer 302 of the light-emitting element can include an emitting layer (EML) and one or more film layers including a hole injection layer (HIL), a hole transport layer (HTL), a hole block layer (HBL), an electron block layer (EBL), an electron injection layer (EIL), and an electron transport layer (ETL). Under the voltage drive of the first electrode 301 and the second electrode 303, the light-emitting characteristics of the organic material can be utilized to emit light according to the required gray scale.

[0089] In some examples, the light-emitting layers of the light-emitting elements of different colors can be different. For example, the red light-emitting element includes a red light-emitting layer, the green light-emitting element includes a green light-emitting layer, and the blue light-emitting element includes a blue light-emitting layer. In order to reduce the process difficulty and improve the yield, the hole injection layer and the hole transport layer located on one side of the light-emitting layer can adopt a common layer, and the electron injection layer and the electron transport layer located on the other side of the light-emitting layer can adopt a common layer. In some examples, any one or more of the hole injection layer, the hole transport layer, the electron injection layer, and the electron transport layer can be made by one process (one evaporation process or one inkjet printing process), and the isolation can be realized by the surface step of the formed film layer or by surface treatment. For example, any one or more of the hole injection layer, the hole transport layer, the electron injection layer, and the electron transport layer corresponding to adjacent sub-pixels can be isolated. In some examples, the organic light-emitting layer can be prepared by evaporation using a fine metal mask (FMM) or an open mask, or by an inkjet process.

[0090] In some examples, as shown in FIG. 3A, the encapsulation structure layer 40 can include a first encapsulation layer 401, a second encapsulation layer 402, and a third encapsulation layer 403 stacked. The first encapsulation layer 401 and the third encapsulation layer 403 can be made of inorganic materials, and the second encapsulation layer 402 can be made of organic materials. The second encapsulation layer 402 can be arranged between the first encapsulation layer 401 and the third encapsulation layer 403 to prevent external water vapor from entering the light-emitting element. However, the present embodiment is not limited thereto. For example, the encapsulation structure layer can adopt a five-layer stacked structure of inorganic / organic / inorganic / organic / inorganic.

[0091] In some examples, as shown in FIG. 3A, in the direction perpendicular to the display panel, the touch structure layer 50 of the effective area can include a touch barrier layer (TBL) 501, a first touch conductive layer (TMA) 511, a touch layer insulation layer (TLD) 502, a second touch conductive layer (TMB) 512, and a touch protection layer (OC) 503 arranged in sequence.

[0092] In some examples, the first touch conductive layer 511 can include a plurality of first touch electrodes, a plurality of second touch electrodes, and a plurality of first connecting portions; the plurality of first touch electrodes, the plurality of second touch electrodes, and the plurality of first connecting portions can be formed by the same patterning process, and the first touch electrodes and the first connecting portions can be integrated structures connected with each other. The second touch conductive layer 512 can include a plurality of second connecting portions; the second connecting portions can be connected with adjacent second touch electrodes through the via holes of the touch interlayer insulating layer 502. In other examples, the first touch conductive layer can include the aforementioned first touch electrodes, second touch electrodes, and first connecting portions, and the second touch conductive layer can include the aforementioned second connecting portions.

[0093] In some examples, the first touch electrodes can be driving (Tx) electrodes, and the second touch electrodes can be sensing (Rx) electrodes. Alternatively, the first touch electrodes can be sensing (Rx) electrodes, and the second touch electrodes can be driving (Tx) electrodes.

[0094] In some examples, the touch barrier layer 501 and the touch interlayer insulating layer 502 can be inorganic insulating layers, and the touch protective layer 503 can be an organic insulating layer. For example, the touch barrier layer 501 and the touch interlayer insulating layer 502 can be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and can be a single layer, multiple layers, or a composite layer. The touch protective layer 503 can be polyimide (PI) or the like. In this example, the touch inorganic insulating layer can include the touch barrier layer 501 and the touch interlayer insulating layer 502.

[0095] In other examples, the touch barrier layer 501 can be an inorganic insulating layer, and the touch interlayer insulating layer 502 and the touch protective layer 503 can be organic insulating layers. By setting the touch interlayer insulating layer 502 as an organic insulating layer, the crack problem generated in the reliability test of the display panel (such as the crack problem generated in the reverse arch test of the foldable display panel) can be improved, thereby improving the bending resistance of the display panel and being beneficial to improving the product yield and competitiveness of the display panel. In this example, the touch inorganic insulating layer can include the touch barrier layer 501.

[0096] In some examples, the first touch conductive layer 511 and the second touch conductive layer 512 can be made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above-mentioned metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and can be a single-layer structure or a multi-layer composite structure, such as Ti / Al / Ti, ITO / Ag / ITO, or the like.

[0097] FIG. 3B is another partial cross-sectional schematic view of an active area of a display panel according to at least one embodiment of the present disclosure. In some examples, as shown in FIG. 3B, only the first planar layer 105 can be disposed between the first source-drain metal layer and the second source-drain metal layer of the circuit structure layer 20, and the passivation layer can be omitted. The remaining structures of the display panel according to the present example can be referred to the descriptions of the previous embodiments, and thus will not be repeated here.

[0098] FIG. 3C is another partial cross-sectional schematic view of an active area of a display panel according to at least one embodiment of the present disclosure. In some examples, as shown in FIG. 3C, the present example is taken as an example of a display panel integrated with a self-capacitance touch structure to form an FSLOC structure. In a direction perpendicular to the display panel, the touch structure layer 50 of the active area AA can include, in sequence, a touch barrier layer 501, a first touch conductive layer 511, and a touch protection layer 503. The first touch conductive layer 511 can include a plurality of touch electrodes. The touch barrier layer 501 can be an inorganic insulating layer, and the touch protection layer 503 can be an organic insulating layer. In the present example, the touch inorganic insulating layer can include the touch barrier layer 501. The remaining structures of the display panel according to the present example can be referred to the descriptions of the previous embodiments, and thus will not be repeated here.

[0099] In some examples, as shown in FIG. 1, the touch structure layer of the left bezel area B3 and the right bezel area B4 of the display panel can each include a plurality of touch lead-out lines 521. The plurality of touch lead-out lines 521 can be electrically connected to the first touch unit and the second touch unit in the active area AA, respectively. Taking the film layer structure shown in FIG. 3A as an example, the plurality of touch lead-out lines 521 can all be located in the first touch conductive layer, or all be located in the second touch conductive layer; or the plurality of touch lead-out lines 521 can be alternately arranged in the first touch conductive layer and the second touch conductive layer.

[0100] FIG. 4 is a partial plan view of a first bezel area of a display panel according to at least one embodiment of the present disclosure. In some examples, as shown in FIGS. 1 and 4, the first bezel area B1 of the display panel can include, in sequence along a direction away from the active area AA, a first wiring area B11, a bending area B12, and a second wiring area B13. The first wiring area B11 can be connected to the active area AA, and the first wiring area B11 can be provided with at least a first power bezel line 411, a second power bezel line 412, a plurality of display lead-out lines, and a plurality of touch lead-out lines 521. The first power bezel line 411 can extend along a first direction D1 within the first wiring area B11, and can be configured to connect a high-potential power line in the active area AA; the second power bezel line 412 can extend along the first direction D1 within the first wiring area B11, and can be configured to connect a low-potential power line in the third bezel area B13 and the fourth bezel area B14.

[0101] In some examples, the first power frame line 411 can be a double-layer wiring structure, for example, including a first power wiring layer and a second power wiring layer. The first power wiring layer can be in a same layer structure as the first source-drain metal layer of the active area, and the second power wiring layer can be in a same layer structure as the second source-drain metal layer of the active area. The first power wiring layer and the second power wiring layer can be large-area overlapped through a groove formed by digging the first planar layer. The second power wiring layer can extend to the active area and be connected with the high-potential power line in the active area.

[0102] In some examples, the second power frame line 412 can be a three-layer wiring structure, for example, including a third power wiring layer, a fourth power wiring layer, and a fifth power wiring layer. The third power wiring layer can be in a same layer structure as the first source-drain metal layer of the active area, the fourth power wiring layer can be in a same layer structure as the second source-drain metal layer of the active area, and the fifth power wiring layer can be in a same layer structure as the third source-drain metal layer of the active area. The third power wiring layer and the fourth power wiring layer can be large-area overlapped through a groove formed by digging the first planar layer, and the fifth power wiring layer can be connected with the fourth power wiring layer through a plurality of vias formed in the second planar layer. The fifth power wiring layer can be connected with a plurality of low-potential power connection lines in the third source-drain metal layer in the active area, for example, can be an integrated structure, and realize electrical connection with the second power frame line in the upper frame area.

[0103] In some examples, as shown in FIG. 1, the plurality of display lead-out lines in the first wiring area B11 can at least include a plurality of data lead-out lines 251 and a plurality of drive lead-out lines (not shown in the figure). The plurality of data lead-out lines 251 can be electrically connected with a plurality of data lines DL in the active area AA, for example, the plurality of data lead-out lines 251 and the plurality of data lines DL can be one-to-one electrically connected. The plurality of data lead-out lines 251 can be arranged in the first wiring area B11 in a fan-out wiring manner and extend to the bending area B12. For example, the plurality of data lead-out lines 251 can be alternately arranged in the first gate metal layer and the second gate metal layer. The plurality of drive lead-out lines can extend from the left frame area B3 and the right frame area B4 to the first wiring area B11. The plurality of drive lead-out lines can be electrically connected with the gate drive circuit in the left frame area B3 and the right frame area B4. The plurality of drive lead-out lines can be configured to provide control signals to the gate drive circuit, for example, the control signals can include a start signal, a clock signal, etc. The plurality of touch lead-out lines 521 can extend from the left frame area B3 and the right frame area B4 to the first wiring area B11, and can be located on a side of the plurality of display lead-out lines away from the substrate.

[0104] In some examples, as shown in FIG. 1 and FIG. 4, the bending region B12 is connected between the first routing region B11 and the second routing region B13, and can be configured to enable the second routing region B13 to bend to the back of the active area AA. The bending region B12 can be provided with a plurality of bending connection lines, which can include a plurality of data bending connection lines 252, a plurality of driving bending connection lines (not shown), a plurality of touch bending connection lines 522, a first power bending connection line (not shown), and a second power bending connection line (not shown). The first power bending connection line can be electrically connected with the first power frame line 411 in the first routing region B11, and the second power bending connection line can be electrically connected with the second power frame line 412 in the first routing region B11. The plurality of data bending connection lines 252 can be electrically connected with the plurality of data lead-out lines 251, the plurality of driving bending connection lines can be electrically connected with the plurality of driving lead-out lines, and the plurality of touch bending connection lines 522 can be electrically connected with the plurality of touch lead-out lines 521.

[0105] In some examples, as shown in FIG. 1, the plurality of bending connection lines can all extend along the second direction D2, and the plurality of bending connection lines can be in a same layer structure. For example, taking the film layer structure shown in FIG. 3A to FIG. 3C as an example, the plurality of bending connection lines can be located in the second source-drain metal layer. For example, the plurality of touch bending connection lines 522 can be located on opposite sides of the plurality of data bending connection lines 252 in the first direction D1. However, the present embodiments are not limited thereto.

[0106] In some examples, as shown in FIG. 1, the second routing region B13 can be provided with a plurality of switching lines, which can include a plurality of data switching lines 253 and a plurality of touch switching lines 523. The plurality of data switching lines 253 can be electrically connected with the plurality of data bending connection lines 252, for example in a one-to-one correspondence. The plurality of touch switching lines 523 can be electrically connected with the plurality of touch bending connection lines 522, for example in a one-to-one correspondence.

[0107] In some examples, the first frame region B1 can include at least one first signal access region B131 and at least one second signal access region B132. FIG. 1 takes one first signal access region B131 and one second signal access region B132 as an example. In other examples, the display panel can be a large-size panel or a folding panel, and the display panel can include a plurality of first signal access regions B131 or a plurality of second signal access regions B132, the plurality of first signal access regions B131 can be arranged in sequence along the first direction D1, and the plurality of second signal access regions B132 can be arranged in sequence along the first direction D1. The first signal access region B131 can be located on one side of the second signal access region B132 close to the active area AA. For example, the second signal access region B132 can be located on a side of the first signal access region B131 away from the bending region B12 in the second direction D2.

[0108] In some examples, as shown in FIG. 1 and FIG. 4, the first signal access area B131 can also be referred to as a driving chip setting area. The first signal access area B131 can be provided with a plurality of first contact pads, which can be configured to be connected with at least one driving chip. For example, the driving chip can be configured to generate data signals required for driving the sub-pixels. For example, the plurality of first contact pads in the first signal access area B131 can include a first group of first contact pads and a second group of first contact pads, and the second group of first contact pads can be located on a side of the first group of first contact pads away from the bending area B12. The first group of first contact pads can be connected with the plurality of data transfer lines 253.

[0109] In some examples, as shown in FIG. 1 and FIG. 4, the second signal access area B132 can also be referred to as a circuit binding area. The second signal access area B132 can be provided with a plurality of second contact pads. For example, the plurality of second contact pads can be arranged in a row along the first direction D1. The plurality of second contact pads can be configured to be connected with at least one circuit board (for example, a flexible printed circuit (FPC)). For example, the externally connected circuit board can be configured to generate touch signals provided to the touch structure layer and receive touch sensing signals. The second group of first contact pads in the first signal access area B131 can be electrically connected with the plurality of second contact pads through the plurality of pin connection lines, so as to perform signal transmission between the first signal access area B131 and the second signal access area B132.

[0110] In some examples, the second wiring area B13 can further include a first circuit area located on a side of the first signal access area B131 close to the bending area B12. The first circuit area can be provided with a plurality of test circuits (not shown in the figure). The test circuits can be configured to be electrically connected with the plurality of data lines DL in the active area AA through the plurality of data transfer lines 253 and the plurality of data bending connection lines 252, so as to provide test data signals to the plurality of data lines DL in the active area AA in a test phase. The first circuit area can further include a plurality of electrostatic discharge circuits to provide a path for electrostatic discharge. For example, the plurality of data bending connection lines 252 can be electrically connected with the test circuits after being transferred through the plurality of data transfer lines 253, and the plurality of data transfer lines 253 can be located on a side of the plurality of data bending connection lines 252 close to the substrate, which can facilitate the arrangement of the wiring connected with the test circuits. For example, the plurality of data transfer lines 253 can be alternately arranged in the first gate metal layer and the second gate metal layer.

[0111] The structure in the second wiring area B13 will be described below by taking FIG. 4 as an example. In FIG. 4, two first signal access areas B131 are taken as an example for illustration, and the plurality of data transfer lines 253 in FIG. 4 are shown as a whole.

[0112] In some examples, as shown in FIG. 4, the second routing area B13 can also be provided with a plurality of first power supply transition lines (e.g., two first power supply transition lines 413a and 413b) and a plurality of second power supply transition lines (e.g., three second power supply transition lines 414a, 414b and 414c). The plurality of first power supply transition lines can be connected with the first power supply frame line 411 in the first routing area B11 through the plurality of first power supply bending connection lines of the bending area B12; the plurality of second power supply transition lines can be connected with the second power supply frame line 412 in the first routing area B11 through the plurality of second power supply bending connection lines of the bending area B12.

[0113] In some examples, along the first direction D1, the second power supply transition line 414a, the first power supply transition line 413a, the second power supply transition line 414c, the first power supply transition line 413b and the second power supply transition line 414b are arranged in sequence. The second power supply transition lines 414a and 414b can extend at least along the second direction D2. The first power supply transition lines 413a and 413b and the second power supply transition line 414c can be substantially n-shaped. Taking the first power supply transition line 413a as an example, the first power supply transition line 413a can include a first main body portion extending along the first direction D1, and a first extension portion and a second extension portion extending along the second direction D2, the first extension portion being connected at one end of the first main body portion, and the second extension portion being connected at the other end of the first main body portion. The first extension portion of the first power supply transition line 413a is adjacent to the second power supply transition line 414a, and the second extension portion is adjacent to the second power supply transition line 414c. The first extension portion and the second extension portion of the first power supply transition line 413a can extend to connect with the corresponding second contact pads in the second signal access area B132.

[0114] In some examples, the first power supply transition lines 413a and 413b and the second power supply transition lines 414a and 414b in the second routing area B13 can each be a double-layer routing structure, for example, can include a routing layer in the same layer structure as the first source-drain metal layer of the active area and a routing layer in the same layer structure as the second source-drain metal layer; the second power supply transition line 414c can be a three-layer routing structure, for example, can include a routing layer in the same layer structure as the first source-drain metal layer of the active area, a routing layer in the same layer structure as the second source-drain metal layer of the active area, and a routing layer in the same layer structure as the third source-drain metal layer of the active area.

[0115] FIG. 5 is a schematic diagram of partial traces of the region S1 in FIG. 4. In some examples, as shown in FIGS. 4 and 5, the second trace area B13 can be further provided with a plurality of drive transmission lines 61, a plurality of first drive connection lines 621a and 621b, and a plurality of second drive connection lines 622a and 622b. The plurality of drive transmission lines 61 can be connected to the plurality of drive lead-out lines of the first trace area B11 through the plurality of drive bend connection lines of the bend area B12. The plurality of drive transmission lines 61 can include a plurality of first drive transmission lines 611a and 611b, and a plurality of second drive transmission lines 612a and 612b. The plurality of first drive transmission lines 611a and the plurality of second drive transmission lines 612a can be located on one side of the plurality of data transfer lines 253 along the first direction D1, and the plurality of first drive transmission lines 611b and the plurality of second drive transmission lines 612b can be located on the other side of the plurality of data transfer lines 253 along the first direction D1. The plurality of first drive transmission lines 611a can be connected to the plurality of second drive connection lines 622a through the plurality of first drive connection lines 621a. The plurality of first drive transmission lines 611b can be connected to the plurality of second drive connection lines 622b through the plurality of first drive connection lines 621b. For example, the plurality of first drive transmission lines 611a and the plurality of first drive connection lines 621a can be electrically connected one-to-one, and the plurality of first drive connection lines 621a and the plurality of second drive connection lines 622a can be electrically connected one-to-one.

[0116] In some examples, the plurality of first drive connection lines 621a can be located on one side of the first first signal access area B131 close to the bend area B12, and the plurality of first drive connection lines 621b can be located on one side of the second first signal access area B131 close to the bend area B12. The plurality of second drive connection lines 622a and 622b can be located in the middle region of the two first signal access areas B131.

[0117] In some examples, the plurality of second contact pads of the second signal access area B132 can include: two first groups of second contact pads 811a and 811b, two second groups of second contact pads 812a and 812b, two third groups of second contact pads 813a and 813b, two fourth groups of second contact pads 814a and 814b, four fifth groups of second contact pads 815a, 815b, 815c and 815d, and four sixth groups of second contact pads 816a, 816b, 816c and 816d. Along the first direction D1, the two third groups of second contact pads 813a and 813b can be located in the middle of the two first groups of second contact pads 811a and 811b, the second groups of second contact pads 812a and 812b can be located on both sides of the two first groups of second contact pads 811a and 811b, the fourth group of second contact pads 814a can be located on the side of the second group of second contact pads 812a away from the first group of second contact pads 811a, and the fourth group of second contact pads 814b can be located on the side of the second group of second contact pads 812b away from the first group of second contact pads 811b.

[0118] In some examples, the plurality of second contact pads within the first group of second contact pads 811a can be configured to connect with the second group of first contact pads within the first first signal access area B131, and the plurality of second contact pads within the first group of second contact pads 811b can be configured to connect with the second group of first contact pads within the second first signal access area B131. The plurality of second contact pads within the second group of second contact pads 812a can be configured to connect with the plurality of second drive transmission lines 612a, and the plurality of second contact pads within the second group of second contact pads 812b can be configured to connect with the plurality of second drive transmission lines 612b. The plurality of second contact pads within the third group of second contact pads 813a can be configured to connect with the plurality of second drive connection lines 622a, and the plurality of second contact pads within the third group of second contact pads 813b can be configured to connect with the plurality of second drive connection lines 622b. The plurality of second contact pads within the fourth group of second contact pads 814a and 814b can be configured to connect with the plurality of touch switch lines 523. The plurality of second contact pads within the fifth group of second contact pads 815a and 815b can be configured to connect with the first power switch line 413a, and the plurality of second contact pads within the fifth group of second contact pads 815c and 815d can be configured to connect with the first power switch line 413b. The plurality of second contact pads within the sixth group of second contact pads 816a can be configured to connect with the second power switch line 414a, the plurality of second contact pads within the sixth group of second contact pads 816d can be configured to connect with the second power switch line 414b, and the plurality of second contact pads within the sixth group of second contact pads 816b and 816c can be configured to connect with the second power switch line 414c.

[0119] In some examples, the first border region B1 can have a first midline along the first direction D1, the first midline extending along the second direction D2, the traces within the second trace region B13 can be arranged substantially symmetrically about the first midline.

[0120] In some examples, as shown in FIG. 4 and FIG. 5, a plurality of second drive transmission lines 612a of the plurality of drive transmission lines 61 within the second trace region B13 can be connected with a second group of second contact pads 812a, the plurality of first drive transmission lines 611a can be connected with a third group of second contact pads 813a through a plurality of first drive connection lines 621a and a plurality of second drive connection lines 622a, the second group of second contact pads 812a and the third group of second contact pads 813a can be located on both sides of the first group of first contact pads 811a along the first direction D1. This example can satisfy the number of second contact pads required by the drive transmission lines by arranging the second contact pads connected with the drive transmission lines on both sides of the first group of second contact pads, for example, to support the needs of a foldable display panel.

[0121] In some examples, as shown in FIG. 5, the plurality of first drive transmission lines 611a and the plurality of second drive transmission lines 612a can be arranged in sequence along the first direction D1. For example, the plurality of first drive transmission lines 611a can be located on one side of the plurality of second drive transmission lines 612a close to the first main body portion of the first power transfer line 413a. In other examples, the plurality of first drive transmission lines 611a and the plurality of second drive transmission lines 612a can be arranged alternately or partially alternately along the first direction D1.

[0122] In some examples, as shown in FIG. 5, the plurality of first drive transmission lines 611a and the plurality of second drive transmission lines 612a can be located on one side of the first power transfer line 413a and the second power transfer line 414a close to the substrate. For example, the plurality of first drive transmission lines 611a and the plurality of second drive transmission lines 612a can be in the same layer structure as the first gate metal layer or the second gate metal layer within the active area. The plurality of first drive connection lines 621a can be located on one side of the first power transfer line 413a away from the substrate. The orthogonal projection of the first power transfer line 413a on the substrate and the orthogonal projection of the plurality of first drive connection lines 621a on the substrate can at least partially overlap. For example, the orthogonal projection of each first drive connection line 621a on the substrate and the orthogonal projection of the first power transfer line 413a on the substrate can partially overlap. For example, the plurality of first drive connection lines 621a can be in the same layer structure as the third source-drain metal layer within the active area, and the plurality of second drive connection lines 622a can be in the same layer structure as the first source-drain metal layer within the active area.

[0123] FIG. 6 is a schematic diagram of a partial plan view of region S1 in FIG. 4. FIG. 7 is a schematic diagram of a partial plan view of region S2 in FIG. 4. FIG. 8A is a schematic diagram of a partial cross-sectional view along the direction of PP' in FIG. 6. FIG. 8B is a schematic diagram of a partial cross-sectional view along the direction of QQ' in FIG. 6.

[0124] In some examples, as shown in FIGS. 6-8B, the plurality of first drive connection lines 621a can extend at least along the first direction D1 and be arranged in sequence along the second direction D2 in a direction away from the bending region B12. The projection of the plurality of first drive connection lines 621a on the substrate and the projection of the first power transfer line 413a on the substrate can overlap. For example, the projection of each first drive connection line 621a on the substrate and the projection of the first power transfer line 413a on the substrate can partially overlap. The plurality of second drive connection lines 622a can be located on the side of the plurality of first drive connection lines 621a close to the substrate.

[0125] In some examples, as shown in FIGS. 8A and 8B, the plurality of data transfer lines of the second wiring region B13 can include a plurality of first data transfer lines 253a in the same layer structure as the first gate metal layer of the active area and a plurality of second data transfer lines 253b in the same layer structure as the second gate metal layer of the active area. The first power transfer line 413a can include a sixth power wiring layer 413-1 in the same layer structure as the first source-drain metal layer of the active area and a seventh power wiring layer 413-2 in the same layer structure as the second source-drain metal layer of the active area. The seventh power wiring layer 413-2 can be electrically connected to the sixth power wiring layer 413-1 in a large area through a groove formed in the first planar layer 105. The plurality of first drive connection lines 621a can be in the same layer structure as the third source-drain metal layer of the active area. The plurality of second drive connection lines 622a can be in the same layer structure as the first source-drain metal layer of the active area, for example. The first power transfer line 413a of the present example can act as a shielding layer and be arranged between the plurality of first drive connection lines 621a and the plurality of data transfer lines 253, which can avoid signal crosstalk between the first drive connection lines 621a and the data transfer lines 253.

[0126] In some examples, the touch inorganic insulating layer of the first frame region B1 can include a touch barrier layer and a touch interlayer insulating layer stacked, for example, in the film layer structure shown in FIGS. 3A and 3B. The touch inorganic insulating layer can include a touch barrier layer, for example, in the film layer structure shown in FIG. 3C. The projection of the touch inorganic insulating layer on the substrate and the projection of the bending region B12 on the substrate can not overlap. The touch inorganic insulating layer can include a first inorganic boundary portion 505 located in the second wiring region B13. The edge 5051 of the first inorganic boundary portion 505 close to the bending region B12 can be a non-straight edge.

[0127] In some examples, in order to guarantee the bending performance of the bending area B12, the bending area B12 is not provided with the touch inorganic insulating layer. The touch inorganic insulating layer has a first inorganic boundary portion 505 close to the bending area B12 in the second trace area B13, and an edge 5051 of the first inorganic boundary portion 505 faces the bending area B12. Since the first inorganic boundary portion 505 is in direct contact with the display organic insulating layer (for example, the third flat layer 107), and is not in direct contact with the display inorganic insulating layer to form an inorganic closed space, there is a risk of water vapor invading along the edge position of the first inorganic boundary portion 505. The plurality of first driving connection lines are configured to transmit a plurality of control signals provided to the gate driving circuit, and there is a voltage difference between adjacent plurality of first driving connection lines. The first power transfer line is configured to transmit a constant first power signal (for example, a constant high voltage signal), and there is a voltage difference between the plurality of first driving connection lines and the first power transfer line. Under the driving of the high and low voltage difference, the area is prone to rapid wire corrosion and display abnormalities. The present example adjusts the relative position relationship between the touch inorganic insulating layer and the plurality of first driving connection lines and the first power transfer line, and improves the corrosion risk of the first driving connection lines caused by water vapor invasion.

[0128] In some examples, as shown in FIGS. 6-8B, the edge 5051 of the first inorganic boundary portion 505 of the touch inorganic insulating layer can be located on a side of the plurality of first driving connection lines 621a away from the bending area B12. The intersection area of the orthographic projection of the first inorganic boundary portion 505 on the substrate substrate, and the orthographic projection of the first power transfer line 413a and the plurality of first driving connection lines 621a on the substrate substrate can have no overlap. In other words, the first inorganic boundary portion 505 does not cover the intersection area of the orthographic projection of the first power transfer line 413a and the plurality of first driving connection lines 621a on the substrate substrate.

[0129] In some examples, as shown in FIGS. 6 and 7, the orthographic projection of the first inorganic boundary portion 505 on the substrate substrate and the orthographic projection of the plurality of first driving connection lines 621a on the substrate substrate can have no overlap. The orthographic projection of the first inorganic boundary portion 505 on the substrate substrate and the orthographic projection of the first power transfer line 413a on the substrate substrate can partially overlap.

[0130] In some examples, as shown in FIG. 8A, along the second direction D2, the edge 5051 of the first inorganic boundary portion 505 of the touch inorganic insulating layer can have a first distance L1 between the overlapping area of the first power transfer line 413a and the plurality of first drive connection lines 621a in the orthographic projection of the substrate. As shown in FIG. 8B, along the first direction D1, the edge 5051 of the first inorganic boundary portion 505 of the touch inorganic insulating layer can have a second distance L2 between the overlapping area of the first power transfer line 413a and the plurality of first drive connection lines 621a in the orthographic projection of the substrate. The first distance L1 and the second distance L2 can be greater than 20 microns. For example, the first distance L1 and the second distance L2 can be the same. For another example, the first distance L1 can be greater than the second distance L2.

[0131] In some examples, as shown in FIG. 8A and FIG. 8B, the second wiring area B13 can be provided with a fourth planar layer (i.e., the aforementioned auxiliary organic insulating layer) 108, which can be located on the side of the third planar layer 107 away from the substrate 10 and on the side of the first inorganic boundary portion 505 of the touch inorganic insulating layer close to the substrate 10. The orthographic projection of the fourth planar layer 108 on the substrate can cover the orthographic projection of the plurality of first drive connection lines 621a on the substrate. The orthographic projection of the fourth planar layer 108 on the substrate can partially overlap with the orthographic projection of the first power transfer line 414a on the substrate. For example, the fourth planar layer 108 can be in the same layer structure as the pixel definition layer of the effective area, or can be an organic insulating layer newly prepared in the step between the third planar layer and the pixel definition layer. Since there is an organic insulating layer (e.g., the third planar layer 107) below the etched portion during the etching process of the touch inorganic insulating layer of the second wiring area B13, the present example can ensure coverage of the wiring in the same layer structure as the third source-drain metal layer by providing the fourth planar layer 108.

[0132] In some examples, as shown in FIG. 8A and FIG. 8B, the orthographic projection of the fourth planar layer 108 on the substrate can partially overlap with the orthographic projection of the first inorganic boundary portion 505 on the substrate. There is partial overlap between the edge of the fourth planar layer 108 and the edge 5051 of the first inorganic boundary portion 505 of the touch inorganic insulating layer. The edge 5051 of the first inorganic boundary portion 505 can cover the edge of the fourth planar layer 108 adjacent to the first inorganic boundary portion 505.

[0133] The present example can improve the corrosion of the wiring caused by the invasion of water vapor through the edge of the first inorganic boundary portion of the touch inorganic insulating layer by removing the touch inorganic insulating layer above the overlapping area of the first power transfer line and the plurality of first drive connection lines.

[0134] FIG. 8C is another schematic view of the partial cross section along the direction of PP' in FIG. 6. In some examples, as shown in FIG. 8C, the second wiring area B13 can not be provided with the fourth planar layer 108. The thickness of the third planar layer 107 in the second wiring area B13 can be greater than or equal to the thickness of the third planar layer 107 in the active area, to ensure the encapsulation of the wiring in the second wiring area B13 which is arranged in the same layer as the third source-drain metal layer. The remaining description of the display panel of the present embodiment can refer to the foregoing description of the previous embodiments, and thus will not be repeated here.

[0135] In some examples, the plurality of display metal layers of the display structure layer in the active area can include a first source-drain metal layer and a second source-drain metal layer. The first power transfer line can be in the same layer structure as the first power metal layer, and the plurality of first driving connection lines can be in the same layer structure as the second source-drain metal layer. In other examples, the plurality of display metal layers of the display structure in the active area can include a first source-drain metal layer, a second source-drain metal layer, a third source-drain metal layer, and a fourth source-drain metal layer arranged in sequence. The plurality of first driving connection lines can be in the same layer structure as the fourth source-drain metal layer, and the first power transfer line can be located on the side of the plurality of first driving connection lines close to the substrate. The positional relationship between the first inorganic boundary portion of the touch inorganic insulating layer and the first power transfer line and the plurality of first driving connection lines can be as described above.

[0136] FIG. 9 is a schematic view of a partial plane in FIG. 5. FIG. 10A is a schematic view of a partial cross section along the direction of RR' in FIG. 9. FIG. 10B is a schematic view of a partial cross section along the direction of UU' in FIG. 9.

[0137] In some examples, taking the film layer structure shown in FIGS. 3A and 3B as an example, when the touch interlayer insulating layer is an organic insulating layer, and the touch transfer lines of the second wiring area B13 are arranged in the first touch conductive layer and the second touch conductive layer, the touch transfer lines are prone to be corroded due to water vapor and residual corrosion factors in the touch interlayer insulating layer. Therefore, as shown in FIGS. 9 to 10B, the plurality of touch transfer lines 523 can be in the same layer structure as the third source-drain metal layer in the active area. In other examples, when the display structure layer includes a plurality of source-drain metal layers, the plurality of touch transfer lines can be in the same layer structure as the source-drain metal layer closest to the touch structure layer. For example, when the display structure layer includes a first source-drain metal layer and a second source-drain metal layer, the plurality of touch transfer lines can be in the same layer structure as the second source-drain metal layer.

[0138] In some examples, the second power adapter line 414a can be located on one side of the plurality of touch adapter lines 523 close to the substrate substrate. For example, the second power adapter line 414a can include an eighth power trace layer 414-1 in the same layer structure as the first source-drain metal layer of the active area, and a ninth power trace layer 414-2 in the same layer structure as the second source-drain metal layer of the active area. The ninth power trace layer 414-2 can be electrically connected to the eighth power trace layer 414-1 through the groove formed in the first planar layer 105. The second power adapter line 414a in the present example can act as a shielding layer to prevent signal crosstalk between the plurality of touch adapter lines 523 and the traces in the same layer structure as the second gate metal layer and the first gate metal layer (e.g., including the plurality of drive transmission lines 61 as shown in FIG. 5).

[0139] In some examples, the plurality of touch adapter lines 523 can be configured to transmit a positive signal, for example, a voltage range of 1.5V to 3.5V, and the second power adapter line 414a is configured to transmit a negative signal. There is a voltage difference between the second power adapter line 414a and the plurality of touch adapter lines 523. The present example adjusts the relative position relationship between the touch inorganic insulating layer and the plurality of touch adapter lines and the second power adapter line to improve the risk of corrosion of the plurality of touch adapter lines caused by water vapor intrusion.

[0140] In some examples, at the boundary area between the bending area B12 and the second trace area B13, the plurality of touch bending connection lines 522 can be electrically connected to the plurality of touch adapter lines 523 through a plurality of first touch connection electrodes (e.g., including the plurality of first touch connection electrodes 524a and 524b), a plurality of second touch connection electrodes 525, and a plurality of third touch connection electrodes 526a and 526b. The plurality of first touch connection electrodes 524a can be in the same layer structure as the first gate metal layer of the active area, the plurality of first touch connection electrodes 524b can be in the same layer structure as the second gate metal layer of the active area, the plurality of second touch connection electrodes 525 can be in the same layer structure as the second source-drain metal layer of the active area, and the plurality of third touch connection electrodes 526a and 526b can be in the same layer structure as the first source-drain metal layer of the active area.

[0141] In some examples, as shown in FIG. 10A, one touch bending connection line 522 can be connected to one end of the first touch connection electrode 524a (or the first touch connection electrode 524b) through one third touch connection electrode 526a, the other end of the first touch connection electrode 524a (or the first touch connection electrode 524b) can be connected to the second touch connection electrode 525 through one third touch connection electrode 526b, and the second touch connection electrode 525 can be connected to one touch adapter line 523. In other examples, the third touch connection electrode can be omitted, and the first touch connection electrode can be directly connected to the second touch connection electrode and the touch bending connection line.

[0142] In some examples, in the first direction D1, the plurality of touch transition lines 523 can be provided with crack detection transition lines (e.g., including crack detection transition lines 601 and 602) near the side of the display panel edge. The crack detection transition lines 601 and 602 can be configured to detect whether the touch structure layer has a crack. The crack detection transition line 601 can be, for example, a same layer structure as the first gate metal layer, and the crack detection transition line 602 can be, for example, a same layer structure as the second gate metal layer.

[0143] In some examples, as shown in FIGS. 9-10B, the first inorganic boundary portion 505 of the touch inorganic insulating layer can not overlap with the overlapping area of the second power transition line 414a and the plurality of touch transition lines 523 in the orthographic projection of the substrate. In other words, the first inorganic boundary portion 505 does not cover the overlapping area of the second power transition line 414a and the plurality of touch transition lines 523 in the orthographic projection of the substrate. For example, the first inorganic boundary portion 505 can not overlap with the plurality of touch transition lines 523 in the orthographic projection of the substrate. The first inorganic boundary portion 505 can partially overlap with the second power transition line 414a in the orthographic projection of the substrate. In other examples, the first inorganic boundary portion 505 can not overlap with the overlapping area of the second power transition line 414a and the plurality of touch transition lines 523 in the orthographic projection of the substrate, and can partially overlap with the plurality of touch transition lines 523 in the orthographic projection of the substrate, and can partially overlap with the second power transition line 414a in the orthographic projection of the substrate.

[0144] In some examples, as shown in FIG. 10B, along the first direction D1, the edge 5051 of the first inorganic boundary portion 505 of the touch inorganic insulating layer can have a third distance L3 between the overlapping area of the second power transition line 414a and the plurality of touch transition lines 523 in the orthographic projection of the substrate. The third distance L3 can be greater than 20 microns. For example, the third distance L3 can be the same as the first distance L1 described above.

[0145] The present example can improve the situation of wire corrosion caused by water vapor invading through the edge of the first inorganic boundary portion of the touch inorganic insulating layer by removing the touch inorganic insulating layer above the overlapping area of the second power transition line and the plurality of touch transition lines. The remaining description of the display panel of the present example can refer to the description of the foregoing embodiments, and thus will not be described here.

[0146] In some other examples, in addition to the position close to the bending area, the position in the first bezel area where the first inorganic boundary part of the touch inorganic insulating layer meets the plurality of bezel signal lines without contact with the display inorganic insulating layer and with a voltage difference can also be etched to adjust the positional relationship between the first inorganic boundary part of the touch inorganic insulating layer and the corresponding bezel signal line in the manner of the foregoing embodiments to improve the wire corrosion condition.

[0147] FIG. 11 is a schematic diagram of a display device according to at least one embodiment of the present disclosure. In some examples, as shown in FIG. 11, the display device 91 can include a display panel 910. The display panel 910 can be an OLED display panel. The display device 91 can be an OLED display device, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, or any product or component having display and touch functions. However, the present embodiments are not limited thereto.

[0148] In the description of the present specification, the description of the terms “one embodiment”, “some embodiments”, “an example”, or “some examples” and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the different embodiments or examples described in the present specification and the features of the different embodiments or examples can be combined and combined by those skilled in the art without contradiction.

[0149] Although the embodiments of the present application have been shown and described above, it is to be understood that the above-described embodiments are exemplary, and are not to be construed as limiting the present application, and those skilled in the art can make changes, modifications, replacements and variations to the above-described embodiments within the scope of the present application.

Claims

1. A display panel, comprising: a substrate substrate comprising: an active area and a first bezel area located at one side of the active area; a display structure layer located on the substrate substrate, comprising a plurality of display organic insulating layers and a plurality of display inorganic insulating layers, the plurality of display organic insulating layers being located at a side of the plurality of display inorganic insulating layers away from the substrate substrate; an encapsulation structure layer located at a side of the display structure layer away from the substrate substrate; a touch structure layer located at a side of the encapsulation structure layer away from the substrate substrate, comprising a touch inorganic insulating layer; the touch inorganic insulating layer comprising: a first inorganic boundary portion located at the first bezel area, the first inorganic boundary portion being in direct contact with at least one display organic insulating layer of the plurality of display organic insulating layers and not being in direct contact with the plurality of display inorganic insulating layers; a plurality of bezel signal lines located in the first bezel area, the plurality of bezel signal lines being located at a side of the plurality of display inorganic insulating layers away from the substrate substrate and at a side of the touch inorganic insulating layer close to the substrate substrate, and there being a voltage difference between at least two adjacent bezel signal lines of the plurality of bezel signal lines; the display panel satisfying at least one of the following: a minimum distance between a projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate substrate and an overlapping area between projections of the at least two bezel signal lines located at different conductive layers on the substrate substrate is greater than 0; a minimum distance between a projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate substrate and a projection of the at least two bezel signal lines located at the same conductive layer closest to the touch inorganic insulating layer on the substrate substrate is greater than 0.

2. The display panel of claim 1, wherein, a minimum distance between a projection of the first inorganic boundary portion of the touch inorganic insulating layer on the substrate substrate and an overlapping area between projections of the at least two bezel signal lines on the substrate substrate is greater than 20 microns.

3. The display panel of claim 1, wherein, the plurality of bezel signal lines comprising: at least one first bezel signal line and a plurality of second bezel signal lines; the plurality of second bezel signal lines being located at the same conductive layer, and the first bezel signal line being located at a different conductive layer from the plurality of second bezel signal lines; the first bezel signal line being configured to transmit a constant power supply signal, and a projection of the first bezel signal line on the substrate substrate at least partially overlapping a projection of at least one second bezel signal line of the plurality of second bezel signal lines on the substrate substrate.

4. The display panel of claim 3, wherein, the display structure layer further comprising: a plurality of display metal layers; the plurality of second bezel signal lines and a display metal layer of the plurality of display metal layers closest to the touch structure layer being a same-layer structure.

5. The display panel of claim 4, wherein, the plurality of display metal layers comprising: a first source-drain metal layer, a second source-drain metal layer and a third source-drain metal layer located at a side of the plurality of display inorganic insulating layers away from the substrate substrate; the plurality of second bezel signal lines and the third source-drain metal layer being a same-layer structure, and the first bezel signal line being located at a side of the plurality of second bezel signal lines close to the substrate substrate.

6. The display panel of any one of claims 3 to 5, wherein, The first frame region comprises, in sequence along a direction away from the effective region, a first trace area, a bending area and a second trace area; The first inorganic boundary portion of the touch inorganic insulating layer is located in the second trace area and adjacent to the bending area. The display structure layer comprises a plurality of sub-pixels located in the effective region and a plurality of data lines connected with the plurality of sub-pixels; 7. The display panel of claim 6, wherein, The substrate substrate further comprises a second frame region located on the remaining side of the effective region, and the second frame region is provided with a gate drive circuit configured to provide a gate control signal for the plurality of sub-pixels; The first frame region further comprises at least one first signal access area located on a side of the second trace area away from the bending area; and the first signal access area is provided with a plurality of first contact pads; The second trace area is provided with at least one first power supply transfer line, a plurality of data transfer lines, a plurality of first drive transmission lines, a plurality of first drive connection lines and a plurality of second drive connection lines; the first power supply transfer line is configured to transmit a constant first power supply signal; The plurality of data lines are connected with a part of the first contact pads of the first signal access area through the plurality of data transfer lines; the plurality of first drive transmission lines and the plurality of second drive connection lines are located on both sides of the first signal access area along a first direction; the plurality of first drive transmission lines are connected with the plurality of second drive connection lines through the plurality of first drive connection lines and are configured to transmit a control signal provided for the gate drive circuit; and the plurality of first drive connection lines are located on a side of the first signal access area close to the bending area; The first frame signal line comprises the first power supply transfer line, and the plurality of second frame signal lines comprise the plurality of first drive connection lines. The plurality of first drive connection lines are located on a side of the plurality of first drive transmission lines and the plurality of second drive connection lines away from the substrate substrate; 8. The display panel of claim 7, wherein, The first power supply transfer line is located on a side of the plurality of data transfer lines away from the substrate substrate and on a side of the plurality of first drive connection lines close to the substrate substrate. The first frame region further comprises a second signal access area located on a side of the first signal access area away from the bending area, and the second signal access area is provided with a plurality of second contact pads; 9. The display panel of claim 7, wherein, The second trace area is further provided with a plurality of second drive transmission lines, and the plurality of second drive transmission lines are located on the same side of the first signal access area as the plurality of first drive transmission lines; The plurality of second contact pads comprise at least one first group of second contact pads, at least one second group of second contact pads and at least one third group of second contact pads; The first group of second contact pads are connected with a part of the first contact pads in the first signal access area; The second group of second contact pads are connected with the plurality of second drive transmission lines; The third group of second contact pads are connected with the plurality of second drive connection lines; ​ The second group of second contact pads and the third group of second contact pads are located on two sides of the first group of second contact pads.

10. The display panel of claim 6, wherein, The second trace area is provided with at least one second power transfer line and a plurality of touch transfer lines, and the second power transfer line is configured to transmit a constant second power signal. The first bezel signal line includes the second power transfer line, and the plurality of second bezel signal lines include the plurality of touch transfer lines.

11. The display panel of any one of claims 1-10, further comprising: An auxiliary organic insulating layer is located in the first bezel area, the auxiliary organic insulating layer is located on a side of the plurality of display organic insulating layers away from the substrate, and is located on a side of the touch inorganic insulating layer close to the substrate; The auxiliary organic insulating layer covers the projection of the at least two bezel signal lines on the substrate.

12. The display panel of claim 11, wherein, The first inorganic boundary part of the touch inorganic insulating layer partially overlaps the projection of the auxiliary organic insulating layer on the substrate.

13. The display panel of any one of claims 1 to 12, wherein, The touch structure layer includes a touch barrier layer, a first touch conductive layer, a touch interlayer insulating layer, a second touch conductive layer and a touch protection layer arranged in sequence on the packaging structure layer; and the touch inorganic insulating layer includes the touch barrier layer, or includes the touch barrier layer and the touch interlayer insulating layer.

14. A display device comprising the display panel according to any one of claims 1 to 13.

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