Command processing circuit, command processing method, and PIM apparatus

Abstract

Provided in the present disclosure are a command processing circuit, a command processing method, and a PIM apparatus. The command processing circuit comprises: a PIM command identification module, which is electrically connected to a command address bus of a PIM apparatus and is configured to receive a command signal by means of the command address bus, determine the type of the currently received command signal, send, when it is determined that the currently received command signal is a conventional DRAM command, the command signal to a conventional command processing module, and send, when it is determined that the currently received command signal is a PIM-related command, the command signal to a PIM command processing module; the PIM command processing module, which is electrically connected to the PIM command identification module and is configured to receive the PIM-related command, decode the PIM-related command, and perform a corresponding operation on the basis of a decoding result; and the conventional command processing module, which is electrically connected to the PIM command identification module and is configured to receive the conventional DRAM command and decode the conventional DRAM command. The present disclosure is at least conducive to avoiding mode switching and improving system performance.

Description

Command processing circuit, command processing method and PIM device

[0001] The present application claims priority to the Chinese patent application No. 202411359383.1, filed on September 26, 2024, and entitled "Command processing circuit, command processing method and PIM device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Embodiments of the present disclosure relate to the field of Processing-In-Memory (PIM), and in particular to a command processing circuit, a command processing method and a PIM device. BACKGROUND

[0003] In the traditional computer architecture, data is stored in memory, and the processor is responsible for reading data from memory for processing, and after processing, the results are written back to memory. This approach has a bottleneck in data transmission, especially when processing large-scale data and complex computing tasks, frequent data transmission consumes a lot of time and energy. In order to solve this problem, the concept of Processing-In-Memory (PIM) is proposed. PIM devices can both store data and directly perform arithmetic operations, so as to improve the speed of data processing. SUMMARY

[0004] Embodiments of the present disclosure provide a command processing circuit, a command processing method and a PIM device, which at least help to avoid mode switching and improve system performance.

[0005] In a first aspect, embodiments of the present disclosure provide a command processing circuit applied to a PIM device, comprising:

[0006] A PIM command identification module is electrically connected to the command address bus of the PIM device, configured to receive a command signal through the command address bus and determine the type of the currently received command signal; if it is determined that the currently received command signal is a DRAM regular command, the command signal is sent to a regular command processing module; if it is determined that the currently received command signal is a PIM related command, the command signal is sent to a PIM command processing module;

[0007] The PIM command processing module is electrically connected to the PIM command identification module, configured to receive the PIM related command, perform decoding processing on the PIM related command, and perform corresponding operations according to the decoding result;

[0008] The conventional command processing module, in electrical connection with the PIM command identification module, is configured to receive the DRAM conventional command and decode process the DRAM conventional command.

[0009] In some embodiments, the PIM related command includes a PIM mode start command, a PIM operation command, a PIM execution command and a no operation command; the PIM mode start command is used to indicate entering the PIM mode; the PIM operation command at least includes an addition command and a multiplication command, and the PIM operation command is registered in the PIM command processing module; the PIM execution command is used to call the PIM operation command from the PIM command processing module and send to an execution module of the PIM device.

[0010] In some embodiments, the DRAM conventional command at least includes a read command, a write command and a refresh command.

[0011] In some embodiments, the PIM command identification module is further used to determine the command signal received within a preset time after receiving the PIM mode start command as the PIM related command and send to the PIM command processing module.

[0012] In some embodiments, the PIM command identification module includes:

[0013] A first identification unit is configured to receive the command signal, judge the command signal according to a PIM command truth table, output a first flag signal in a valid state if it is determined that the currently received command signal is the PIM mode start command, otherwise output a first flag signal in an invalid state; output a second flag signal in a valid state if it is determined that the currently received command signal is the PIM execution command, otherwise output a second flag signal in an invalid state.

[0014] A timing unit is configured to receive the first flag signal, clear in response to the first flag signal in a valid state and start timing, output a third flag signal in a valid state when the timing result is less than the preset time and greater than 0, otherwise output a third flag signal in an invalid state.

[0015] A judgment unit is configured to receive the first flag signal, the second flag signal and the third flag signal, determine that the currently received command signal is the PIM related command if at least one of them is in a valid state, and send the command signal to the PIM command processing module; otherwise, determine that the currently received command signal is the DRAM conventional command, and send the command signal to the conventional command processing module.

[0016] In some embodiments, the command address bus transmits the PIM operation command within the preset time after transmitting the PIM mode start command.

[0017] In some embodiments, the PIM command processing module comprises:

[0018] The second identification unit is configured to receive the PIM related command, decode and determine the PIM related command according to a PIM command truth table, output a valid PIM mode start command indication signal if the currently received PIM related command is determined to be the PIM mode start command, otherwise output an invalid PIM mode start command indication signal; output a valid PIM operation command indication signal if the currently received PIM related command is determined to be the PIM operation command, otherwise output an invalid PIM operation command indication signal; and output a valid PIM execution command indication signal if the currently received PIM related command is determined to be the PIM execution command, otherwise output an invalid PIM execution command indication signal.

[0019] The command register is configured to store the PIM operation command in response to the valid PIM operation command indication signal, and output the PIM operation command to an execution module of the PIM device in response to the valid PIM execution command indication signal.

[0020] In some embodiments, the PIM command processing module further comprises:

[0021] The counter is configured to be electrically connected with the second identification unit, count the PIM operation command in response to the valid PIM operation command indication signal, and output a count value; and clear the count value when the PIM device is powered on for the first time.

[0022] The address decoding module is electrically connected with the second identification unit, the counter and the command register, and is configured to decode the count value and / or the PIM execution command, and output an address signal; wherein the PIM execution command contains position information of the PIM operation command to be called in the command register, and the address signal is used to indicate an address of the command register.

[0023] In some embodiments, the command register receives the address signal, stores the PIM operation command to a corresponding address in response to the valid PIM operation command indication signal according to the address signal, and calls and outputs the corresponding PIM operation command in response to the valid PIM execution command indication signal according to the address signal.

[0024] In some embodiments, the counter is cleared in response to the PIM mode on command indication signal in the active state.

[0025] In some embodiments, the address decoding module decodes the PIM execution command in response to the PIM execution command indication signal in the active state, and outputs the address signal; and decodes the count value in response to the PIM execution command indication signal in the inactive state, and outputs the address signal.

[0026] In a second aspect, the embodiments of the present disclosure provide a command processing method, applied to a PIM device, including:

[0027] receiving a command signal through a command address bus;

[0028] determining the type of the currently received command signal; if it is determined that the currently received command signal is a DRAM regular command, sending the command signal to a regular command processing module; and if it is determined that the currently received command signal is a PIM related command, sending the command signal to a PIM command processing module;

[0029] The PIM command processing module decodes and processes the PIM related command, and performs corresponding operations according to the decoding result.

[0030] The regular command processing module decodes and processes the DRAM regular command, and performs corresponding operations according to the decoding result.

[0031] In some embodiments, the determination of the type of the currently received command signal includes: determining the command signal according to a PIM command truth table; determining a PIM mode on command, a PIM execution command and a command signal received within a preset time after the PIM mode on command as the PIM related command; and determining the rest as the DRAM regular command.

[0032] In some embodiments, the PIM command processing module decodes and processes the PIM related command, and performs corresponding operations according to the decoding result, including:

[0033] identifying the PIM related command;

[0034] if a PIM operation command is identified, controlling a counter to perform a plus one operation, decoding a count value of the counter to obtain an address signal, and storing the PIM operation command into a command register according to the address signal;

[0035] If the PIM execution command is identified, the PIM execution command is decoded to obtain an address signal, and according to the address signal, a corresponding PIM operation command is fetched from the command register and output.

[0036] In a third aspect, the embodiments of the present disclosure provide a PIM device, which at least comprises the command processing circuit as described in the first aspect.

[0037] The technical solutions provided by the embodiments of the present disclosure have at least the following advantages:

[0038] By judging the type of the command signal first and then sending it to the corresponding command processing module for corresponding operation, it is not necessary to set the storage mode and the PIM mode in time periods and switch between modes, so that the normal read and write of the DRAM and the operation of the PIM unit can be executed, the efficiency of the PIM device operation is improved, and the system performance is improved. BRIEF DESCRIPTION OF DRAWINGS

[0039] One or more embodiments are illustrated by way of example in the drawings, which are not intended to limit the embodiments and in which the same or similar elements are denoted by the same reference numerals unless otherwise specified, the drawings in the drawings do not constitute a proportional limit; in order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or in the prior art, the drawings needed in the embodiments will be briefly introduced below, and obviously, the drawings in the following description can obtain other drawings without creative labor according to these drawings.

[0040] FIG. 1 is a structural schematic diagram of a PIM device provided by an embodiment of the present disclosure;

[0041] FIG. 2 is a structural schematic diagram of a command processing circuit provided by an embodiment of the present disclosure;

[0042] FIG. 3 is a signal waveform diagram of a PIM command identification module provided by an embodiment of the present disclosure;

[0043] FIG. 4 is a flowchart of a command processing method provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] The technical solutions in the embodiments of the present disclosure will be described clearly and completely in combination with the drawings in the embodiments of the present disclosure. It can be understood that the specific embodiments described herein are only used to explain the related application, and not to limit the application. In addition, it should be noted that, for the convenience of description, only the parts related to the application are shown in the drawings. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure, and are not intended to limit the present disclosure. In the following description, “some embodiments” are described, which describe a subset of all possible embodiments, but it can be understood that “some embodiments” can be the same subset or different subset of all possible embodiments, and can be combined with each other without conflict. It should be noted that the terms “first”, “second”, “third” in the embodiments of the present disclosure are only used to distinguish similar objects, and do not represent a specific order of the objects. It can be understood that “first”, “second”, “third” can be interchanged in a specific order or sequence as allowed, so that the embodiments of the present disclosure described herein can be implemented in an order other than that illustrated or described herein.

[0045] Dynamic Random Access Memory (DRAM)

[0046] Synchronous Dynamic Random Access Memory (SDRAM)

[0047] Double Data Rate SDRAM (DDR)

[0048] Low Power DDR (LPDDR)

[0049] Processing-In-Memory (PIM)

[0050] Command (CMD)

[0051] Multiplication (MUL)

[0052] Addition (ADD)

[0053] Command Register (CR)

[0054] Command / Address Bus (CA Bus)

[0055] The PIM device can both store data and directly perform arithmetic operations. Data storage can be implemented by a conventional storage array, such as a DRAM storage array, in a storage mode. Arithmetic operations can be implemented by a related operation unit in the PIM device in a PIM mode. Since the command address bus CA Bus is shared, the PIM device often needs to be divided into a storage mode and a PIM mode during operation, and is time-divisionally operated. In the storage mode, read and write commands related to storage are processed, and in the PIM mode, various commands related to operations are processed. This mode needs to be switched, and a large amount of time is consumed in the mode switching process, reducing system performance.

[0056] Therefore, the command processing circuit is provided in the embodiments of the present disclosure, which is applied to a PIM device and includes a PIM command identification module, a PIM command processing module, and a conventional command processing module. The PIM command identification module is electrically connected with the command address bus of the PIM device and is configured to receive a command signal through the command address bus and determine the type of the currently received command signal. If it is determined that the currently received command signal is a DRAM conventional command, the command signal is sent to the conventional command processing module. If it is determined that the currently received command signal is a PIM related command, the command signal is sent to the PIM command processing module. The PIM command processing module is electrically connected with the PIM command identification module and is configured to receive the PIM related command, perform decoding processing on the PIM related command, and perform corresponding operations according to the decoding result. The conventional command processing module is electrically connected with the PIM command identification module and is configured to receive the DRAM conventional command and perform decoding processing on the DRAM conventional command. In this way, through the design of the command processing circuit, the PIM device can perform normal read and write of the DRAM and operation of the PIM unit without mode switching, the efficiency of the PIM device operation is improved, and the system performance is improved.

[0057] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0058] In an embodiment of the present disclosure, referring to FIG. 1, a structure schematic diagram of a PIM device 70 provided by the embodiments of the present disclosure is shown, and the PIM device 70 includes a command processing circuit 10. As shown in FIG. 1, the command processing circuit 10 includes:

[0059] The PIM command identification module 20 is electrically connected with the command address bus of the PIM device 70 and is configured to receive a command signal through the command address bus and determine the type of the currently received command signal. If it is determined that the currently received command signal is a DRAM conventional command, the command signal is sent to the conventional command processing module 40. If it is determined that the currently received command signal is a PIM related command, the command signal is sent to the PIM command processing module 30.

[0060] The PIM command processing module 30 is electrically connected with the PIM command identification module 20, configured to receive the PIM related command, decode the PIM related command, and perform corresponding operation according to the decoding result.

[0061] The conventional command processing module 40 is electrically connected with the PIM command identification module 20, configured to receive the DRAM conventional command, and decode the DRAM conventional command.

[0062] The PIM device 70 further comprises a receiver (RX) and a command sampling module 60. The receiver is used to receive a command / address signal (CMD / ADD) and a clock signal CK_t. In the command sampling module, the clock signal CK_t samples the command / address signal CMD / ADD and outputs a command signal. The PIM command identification module 20 receives the command signal through a command / address bus and judges the type of the currently received command signal; if it is judged as a DRAM conventional command, the command signal is sent to the conventional command processing module 40; if it is judged as a PIM related command, the command signal is sent to the PIM command processing module 30. By judging the type of the command signal first and then sending it to the corresponding command processing module for corresponding operation, it is not necessary to set the storage mode and the PIM mode in time periods and switch between modes, which improves the efficiency of the PIM device operation and enhances the system performance.

[0063] The conventional command processing module 40 receives the DRAM conventional command, decodes the command signal according to a DRAM command truth table, judges the specific type of the DRAM conventional command, and sends it to the corresponding functional module to execute corresponding operation on the DRAM storage array. In some embodiments, the DRAM conventional command at least includes a read command, a write command and a refresh command. It can be understood that the DRAM conventional command can also include an activation command, a pre-charge command and a power saving mode, etc.

[0064] The PIM command processing module 30 receives the PIM related command, decodes the PIM related command, and performs corresponding operation according to the decoding result. In some embodiments, the PIM related command includes a PIM mode start command, a PIM operation command, a PIM execution command and a no operation command. The PIM mode start command is used to indicate entering the PIM mode; the PIM operation command at least includes an addition command and a multiplication command, and the PIM operation command is registered in the PIM command processing module 30; the PIM execution command is used to call the PIM operation command from the PIM command processing module 30 and send it to the execution module 50 of the PIM device to execute corresponding operation.

[0065] The PIM command processing module 30 decodes the command signal according to the PIM command truth table, judges the specific type of the PIM related command according to the decoding result, and performs corresponding processing. Specifically, if the PIM operation command is received, the PIM operation command is stored in the PIM command processing module 30; if the PIM execution command is received, the PIM operation command is called from the PIM command processing module 30 and sent to the execution module 50 of the PIM device. Since the storage mode and the PIM mode are no longer set in time periods, and the PIM operation is no longer concentrated, the sending of the PIM operation command is more flexible. The PIM operation command can be temporarily stored, and then called and executed when the PIM execution command is received. In this way, the PIM device runs more flexibly and efficiently. It can be understood that in addition to the addition command and the multiplication command, the PIM operation command can also include a shift command and a complement command, etc., which can be set according to the needs of the system.

[0066] In some embodiments, the PIM command identification module 20 is also used to determine the command signal received within the preset time after the PIM mode start command as a PIM related command and send it to the PIM command processing module 30. Since the DRAM regular command and the PIM related command are transmitted through the common command address bus, and part of the PIM operation command and the DRAM regular command can also have a truth table repetition, determining the command signal received within the preset time after the PIM mode start command as a PIM related command can make the PIM related command and the DRAM regular command better compatible.

[0067] In some embodiments, the command address bus transmits the PIM operation command within the preset time after the PIM mode start command is transmitted. In this way, even if the PIM operation command and the DRAM regular command have a truth table repetition, the PIM operation command can be determined as a PIM related command and sent to the PIM command processing module 30. In other words, the truth table of the PIM operation command and the DRAM regular command can have a repetition, which does not affect the operation of the PIM device. In this way, the PIM instruction set can be saved. It should be noted that the PIM mode start command and the PIM execution command cannot be repeated with the truth table of the DRAM regular command to avoid misjudgment. In this way, the PIM instruction set can be saved, and the PIM device can also be compatible with the PIM related command and the DRAM regular command at the same time.

[0068] It can be understood that the preset time can be designed according to system requirements and the number of PIM operation commands that can be temporarily stored in the PIM command processing module 30. The system requirements include the requirements of the GPU / CPU / SOC to perform operations within a period of time. Generally speaking, the more PIM operation commands that can be temporarily stored in the PIM command processing module 30, the longer the preset time can be set.

[0069] In some embodiments, as shown in FIG. 2, the PIM command identification module 20 includes:

[0070] The first identification unit 21 is configured to receive the command signal, judge the command signal according to the PIM command truth table, output the first flag signal in the valid state if it is determined that the currently received command signal is the PIM mode start command, otherwise output the first flag signal in the invalid state; output the second flag signal in the valid state if it is determined that the currently received command signal is the PIM execution command, otherwise output the second flag signal in the invalid state;

[0071] The timing unit 22 is configured to receive the first flag signal, clear in response to the first flag signal in the valid state, and start timing, output the third flag signal in the valid state when the timing result is less than the preset time and greater than 0, otherwise output the third flag signal in the invalid state;

[0072] The judgment unit 23 is configured to receive the first flag signal, the second flag signal and the third flag signal, if at least one of them is in the valid state, it is determined that the currently received command signal is the PIM related command, and the command signal is sent to the PIM command processing module 30; otherwise, it is determined that the currently received command signal is the DRAM regular command, and the command signal is sent to the regular command processing module 40.

[0073] The first identification unit 21 judges the specific type of the PIM related command according to the PIM command truth table, can identify the PIM mode start command and the PIM execution command, and outputs the corresponding flag signal. The first identification unit 21 can be realized by a decoder and some logic circuits, and needs to be designed according to the truth table. The timing unit 22 starts timing after identifying the PIM mode start command, and outputs the third flag signal in the valid state when the timing result is less than the preset time and greater than 0, the purpose is to judge the command signal received within the preset time after receiving the PIM mode start command as the PIM related command. The timing unit 22 can be realized by a counter circuit and some logic circuits. The judgment unit 23 judges the type of the command signal according to the state of the first flag signal, the second flag signal and the third flag signal. If at least one of them is in the valid state, it is judged as the PIM related command, otherwise it is judged as the DRAM regular command. In this way, the PIM mode start command, the PIM execution command and the command signal received within the preset time after the PIM mode start command can all be judged as the PIM related command. Since the command address bus transmits the PIM operation command within the preset time after transmitting the PIM mode start command, the PIM operation command can also be judged as the PIM related command and sent to the PIM command processing module 30. The judgment unit 23 can be realized by a multiplexer and some logic circuits. Specifically, the logic circuits such as NAND gate, NOR gate and inverter can be selected according to the level of the valid state and the invalid state.

[0074] Referring to FIG. 3, a signal waveform diagram of the PIM command identification module 20 in a case is shown. Ck_t and CK_c represent the sampling command address signal CA <x:0>clock signal and a complementary clock signal. MUL represents a multiplication command in the PIM operation command, and ADD represents an addition command in the PIM operation command. In this embodiment, the valid state is high level, and the invalid state is low level. When the currently received command signal is a PIM mode start command, in the next clock cycle, the first identification unit 21 sets the first flag signal to high level; at the same time, the timing unit 22 starts timing, and sets the third flag signal to high level. At this time, the judgment unit 23 judges the received command signal as a PIM related command, and sends the PIM mode start command to the PIM command processing module 30, while the signal received by the regular command processing module 40 is 000…000, which cannot be decoded into any DRAM regular command. The multiplication command MUL and the addition command ADD after the PIM mode start command are within the preset time, so the third flag signal still maintains in the high level state, so the judgment unit 23 judges the multiplication command MUL and the addition command ADD as PIM related commands, and sends them to the PIM command processing module 30, while the signal received by the regular command processing module 40 is still 000…000. After the preset time, the timing unit 22 sets the third flag signal to low level, at this time, the DRAM read command READ is received, and the first flag signal and the second flag signal output by the first identification unit 21 are both low level, so in the next clock cycle, the judgment unit 23 judges the received command signal as a DRAM regular command, and sends it to the regular command processing module 40. While the signal received by the PIM command processing module 30 is 000…000, which cannot be decoded into any PIM related command. When the currently received command signal is a PIM execution command, in the next clock cycle, the first identification unit 21 sets the second flag signal to high level, and the judgment unit 23 judges the received command signal as a PIM related command, and sends the PIM execution command to the PIM command processing module 30, while the signal received by the regular command processing module 40 is 000…000, which cannot be decoded into any DRAM regular command. Since the reception and transmission of the command address signal both need clock and flip-flop for sampling, the generation of the flag signal and the judgment of the command type are usually one clock cycle later than the receiving time. In some cases, it is two to three clock cycles later. Generally, it is designed according to the performance requirements and actual situation of the circuit.

[0075] In some embodiments, as shown in FIG. 2, the PIM command processing module 30 includes:

[0076] The second identification unit 31 is configured to receive a PIM related command, decode the PIM related command according to a PIM command truth table, and determine whether the currently received PIM related command is a PIM mode start command. If the determination result is that the currently received PIM related command is a PIM mode start command, an effective state PIM mode start command indication signal is output, otherwise an invalid state PIM mode start command indication signal is output. If the determination result is that the currently received PIM related command is a PIM operation command, an effective state PIM operation command indication signal is output, otherwise an invalid state PIM operation command indication signal is output. If the determination result is that the currently received PIM related command is a PIM execution command, an effective state PIM execution command indication signal is output, otherwise an invalid state PIM execution command indication signal is output.

[0077] The command register 32 is configured to store the PIM operation command in response to the effective state PIM operation command indication signal, and output the PIM operation command to the execution module 50 of the PIM device 70 in response to the effective state PIM execution command indication signal.

[0078] The second identification unit 31 can determine the specific type of the PIM related command according to the PIM command truth table, and can identify the PIM mode start command, the PIM operation command and the PIM execution command, and output the corresponding indication signal. The second identification unit 31 can be implemented by a decoder and some logic circuits, and the specific design needs to be determined according to the truth table. The command register 32 can store the PIM operation command, and in response to the PIM execution command, the corresponding PIM operation command can be retrieved. Since the storage mode and the PIM mode are no longer set in time periods, and the PIM operation is no longer concentrated, the sending of the PIM operation command is more flexible. The PIM operation command can be temporarily stored first, and then retrieved and executed in response to the PIM execution command. In this way, the operation of the PIM device is more flexible and efficient, and the switching between modes is not needed, which improves the system performance.

[0079] In some embodiments, as shown in FIG. 2, the PIM command processing module 30 further includes:

[0080] The counter 33 is electrically connected with the second identification unit 31, and is configured to count the PIM operation command in response to the effective state PIM operation command indication signal, and output a count value. The count value is cleared when the PIM device 70 is powered on for the first time.

[0081] The address decoding module 34 is electrically connected with the second identification unit 31, the counter 33 and the command register 32, and is configured to decode the count value and / or the PIM execution command, and output an address signal. The PIM execution command contains the position information of the PIM operation command to be retrieved in the command register 32, and the address signal is used to indicate the address of the command register 32.

[0082] The counter 33 counts the PIM operation commands, and provides the address of the PIM operation command stored in the command register 32. The address decoding module 34 decodes the count value into the address signals required by the command register 32. For example, the first PIM operation command is received after the PIM device 70 is powered on, the count value is 1, and the binary representation is 001. After decoding by the address decoding module 34, the address signal is 000…0001, and the first PIM operation command is stored in the position 000…0001 of the command register 32. The second PIM operation command is received, the count value is 2, and the binary representation is 010. After decoding by the address decoding module 34, the address signal is 000…0010, and the second PIM operation command is stored in the position 000…0010 of the command register 32. The third PIM operation command is received, the count value is 3, and the binary representation is 011. After decoding by the address decoding module 34, the address signal is 000…0100, and the third PIM operation command is stored in the position 000…0100 of the command register 32. The fourth PIM operation command is received, the count value is 4, and the binary representation is 100. After decoding by the address decoding module 34, the address signal is 000…1000, and the third PIM operation command is stored in the position 000…1000 of the command register 32. The above process is repeated for the subsequent PIM operation commands.

[0083] The address decoding module 34 can also decode the PIM execution commands. The PIM execution commands contain the position information of the PIM operation commands in the command register 32. For example, the PIM execution command is 011 if it wants to retrieve the third PIM operation command mentioned above. After decoding by the address decoding module 34, the address signal is 000…0100, and the PIM operation command stored in the position is retrieved. It can be understood that the address decoding module 34 can be implemented by decoders and some logic circuits according to the address format of the command register 32.

[0084] In some embodiments, the command register 32 receives the address signals, and in response to the valid PIM operation command indication signal, stores the PIM operation commands to the corresponding addresses according to the address signals. In response to the valid PIM execution command indication signal, the corresponding PIM operation commands are retrieved and output according to the address signals.

[0085] When receiving the PIM operation command indication signal in the active state, the command register 32 stores the current received PIM operation command to the corresponding position according to the address signal output by the address decoding module 34 at this time. When receiving the PIM execution command indication signal in the active state, the command register 32 retrieves the corresponding PIM operation command according to the address signal output by the address decoding module 34 at this time, and outputs the PIM operation command to the execution module 50 of the PIM device 70 to execute the corresponding operation. It can be understood that the command register 32 needs to be based on the respective indication signals and address signals to correctly store and output the PIM operation command, so as to avoid errors in operation.

[0086] In some embodiments, the counter 33 clears the count value in response to the PIM mode start command indication signal in the active state. The counter 33 clears the count value when the PIM device 70 is powered on for the first time. If the capacity of the command register 32 is large enough, the count value can not be cleared in the subsequent operation of the PIM device 70, and the count value is always accumulated to store all PIM operation commands in the command register 32. If it is desired to save the capacity of the command register 32, the count value can be cleared every time the PIM mode start command is received, and the counting is restarted, which means that the PIM operation command received after each PIM mode start command will overwrite the PIM operation command stored in the command register 32 after the previous PIM mode start command. It should be noted that the PIM execution command after the PIM mode start command can only retrieve the PIM operation command stored in the command register 32. In some cases, the count value can also be cleared after a plurality of PIM mode start commands. For example, the counter 33 can clear the count value once every M PIM mode start command indication signals in the active state, and M is an integer greater than 0, which can be selected according to actual requirements and the capacity of the command register.

[0087] In some embodiments, the address decoding module 34 decodes the PIM execution command to output the address signal in response to the PIM execution command indication signal in the active state, and decodes the count value to output the address signal in response to the PIM execution command indication signal in the inactive state. The address decoding module 34 can also include a multiplexer, the control end of the multiplexer receives the PIM execution command indication signal, two input ends respectively receive the PIM execution command and the count value, if the PIM execution command indication signal is in the active state, the PIM execution command is output to be decoded, if the PIM execution command indication signal is in the inactive state, the count value is output to be decoded. In this way, the PIM execution command and the count value can share a set of decoding circuits, and the circuit devices of the address decoding module 34 can be saved.

[0088] From the above analysis, the PIM command identification module 20 judges the type of the currently received command signal. If it is determined that the command signal is a DRAM regular command, the command signal is sent to the regular command processing module 40. If it is determined that the command signal is a PIM related command, the command signal is sent to the PIM command processing module 30. The PIM command processing module 30 further identifies the PIM related command. If a PIM operation command is identified, the counter 33 performs a plus one operation. The address decoding module 34 decodes the count value of the counter 33 to obtain an address signal. According to the address signal, the PIM operation command is stored in the command register 32. If a PIM execution command is identified, the address decoding module 34 decodes the PIM execution command to obtain an address signal. According to the address signal, the corresponding PIM operation command is retrieved from the command register 32 and output to the execution module 50 of the PIM device 70.

[0089] In summary, the command processing circuit provided by the embodiments of the present disclosure judges the type of the command signal first, and then sends it to the corresponding command processing module for corresponding operation. In this way, it is not necessary to set the storage mode and the PIM mode in different time periods, and it is not necessary to switch between modes. The normal read and write of the DRAM and the operation of the PIM unit can be performed, the efficiency of the PIM device operation is improved, and the system performance is improved.

[0090] In another embodiment of the present disclosure, referring to FIG. 4, a flowchart of a command processing method provided by an embodiment of the present disclosure is shown. As shown in FIG. 4, the method is applied to a PIM device, which includes the following steps:

[0091] S101, receiving a command signal through a command address bus;

[0092] S102, judging the type of the currently received command signal;

[0093] S103, if it is determined that the currently received command signal is a DRAM regular command, sending the command signal to a regular command processing module, and performing step S105;

[0094] S104, if it is determined that the currently received command signal is a PIM related command, sending the command signal to a PIM command processing module, and performing step S106;

[0095] S105, the regular command processing module decodes and processes the DRAM regular command, and performs corresponding operation according to the decoding result;

[0096] S106, the PIM command processing module decodes and processes the PIM related command, and performs corresponding operation according to the decoding result.

[0097] The command processing method first judges the type of the command signal, and then sends it to the corresponding command processing module for corresponding operation, so that the storage mode and the PIM mode no longer need to be set in time periods, and the mode switching is no longer needed, and the normal read and write of the DRAM and the operation of the PIM unit can be performed, the efficiency of the PIM device operation is improved, and the system performance is improved.

[0098] In some embodiments, judging the type of the currently received command signal includes: judging the command signal according to the PIM command truth table; determining the PIM mode opening command, the PIM execution command, and the command signal received within the preset time after the PIM mode opening command as PIM related commands; and determining the rest as DRAM regular commands. In some embodiments, the command address bus transmits the PIM operation command within the preset time after the PIM mode opening command is transmitted. In this way, even if the PIM operation command and the DRAM regular command have a truth table repetition, the PIM operation command can be determined as a PIM related command and sent to the PIM command processing module 30. The PIM mode opening command is used to indicate entering the PIM mode; the PIM operation command at least includes an addition command and a multiplication command, and the PIM operation command is registered in the PIM command processing module; and the PIM execution command is used to call the PIM operation command from the PIM command processing module and send it to the execution module of the PIM device to perform corresponding operation.

[0099] In some embodiments, the PIM command processing module decodes and processes the PIM related command, and performs corresponding operation according to the decoding result, including: identifying the PIM related command; if the PIM operation command is identified, controlling the counter to perform the plus one operation, decoding the count value of the counter to obtain the address signal, and storing the PIM operation command in the command register according to the address signal; and if the PIM execution command is identified, decoding the PIM execution command to obtain the address signal, and calling and outputting the corresponding PIM operation command from the command register according to the address signal. Since the storage mode and the PIM mode no longer need to be set in time periods, and the PIM operation no longer needs to be concentrated, the sending of the PIM operation command is more flexible, and the PIM operation command can be temporarily stored first, and then called and executed when the PIM execution command is received. In this way, the PIM device operation is more flexible and efficient, the mode switching is no longer needed, and the system performance is improved.

[0100] In another embodiment of the present disclosure, referring to FIG. 1, a schematic structural diagram of a PIM device 70 provided by the embodiment of the present disclosure is shown. As shown in FIG. 1, the PIM device 70 at least includes the aforementioned command processing circuit 10.

[0101] As shown in FIG. 1, the PIM device 70 further includes a receiver (Receiver, RX), a command sampling module 60 and an execution module 50. The receiver is configured to receive a command / address signal (Command / Address, CMD / ADD) and a clock signal CK_t. In the command sampling module, the clock signal CK_t samples the command / address signal CMD / ADD and outputs a command signal. The execution module 50 can perform PIM related operations. The PIM device 70 further includes a storage array, which is not shown in the figure.

[0102] The PIM device includes a command processing circuit 10, which judges the type of the command signal first and then sends it to the corresponding command processing module for corresponding operation, so that the storage mode and the PIM mode do not need to be set in time periods, and the mode switching is not needed, so that the normal read and write of the DRAM and the operation of the PIM unit can be performed, the efficiency of the PIM device operation is improved, and the system performance is improved.

[0103] The above are only preferred embodiments of the present disclosure, and are not used to limit the protection scope of the present disclosure. It should be noted that in the present disclosure, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a…" does not exclude the presence of another identical element in the process, method, article or device including the element. The above sequence number of the embodiments of the present disclosure is only for description, and does not represent the advantages and disadvantages of the embodiments. The methods disclosed in the several method embodiments provided by the present disclosure can be combined arbitrarily without conflict to obtain new method embodiments. The features disclosed in the several product embodiments provided by the present disclosure can be combined arbitrarily without conflict to obtain new product embodiments. The features disclosed in the several method or device embodiments provided by the present disclosure can be combined arbitrarily without conflict to obtain new method or device embodiments. The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A command processing circuit, characterized by, Applied to a PIM device, comprising: a PIM command identification module (20) electrically connected with a command address bus of the PIM device, configured to receive a command signal through the command address bus and judge the type of the currently received command signal; if it is judged that the currently received command signal is a DRAM regular command, the command signal is sent to a regular command processing module (40); if it is judged that the currently received command signal is a PIM related command, the command signal is sent to a PIM command processing module (30); the PIM command processing module (30) is electrically connected with the PIM command identification module, configured to receive the PIM related command, and code process the PIM related command, and perform corresponding operation according to the code result; the regular command processing module (40) is electrically connected with the PIM command identification module, configured to receive the DRAM regular command, and code process the DRAM regular command.

2. The command processing circuit of claim 1, wherein, The PIM related command includes a PIM mode start command, a PIM operation command, a PIM execution command and a no operation command; the PIM mode start command is used to indicate entering the PIM mode; the PIM operation command at least includes an addition command and a multiplication command, the PIM operation command is registered in the PIM command processing module; the PIM execution command is used to call the PIM operation command from the PIM command processing module and send to an execution module of the PIM device.

3. The command processing circuit of claim 1, wherein, The DRAM regular command at least includes a read command, a write command and a refresh command.

4. The command processing circuit of claim 2, wherein, The PIM command identification module is further used to judge the command signal received within a preset time after receiving the PIM mode start command as the PIM related command and send to the PIM command processing module.

5. The command processing circuit of claim 4, wherein, The PIM command identification module includes: a first identification unit (21) configured to receive the command signal, judge the command signal according to a PIM command truth table, if it is judged that the currently received command signal is the PIM mode start command, output a first flag signal in a valid state, otherwise output a first flag signal in an invalid state; if it is judged that the currently received command signal is the PIM execution command, output a second flag signal in a valid state, otherwise output a second flag signal in an invalid state; a timing unit (22) configured to receive the first flag signal, clear in response to the first flag signal in a valid state and start timing, when the timing result is less than the preset time and greater than 0, output a third flag signal in a valid state, otherwise output a third flag signal in an invalid state; The judging unit (23) is configured to receive the first flag signal, the second flag signal and the third flag signal, if at least one of them is in the valid state, determine that the currently received command signal is the PIM related command, and send the command signal to the PIM command processing module; otherwise, determine that the currently received command signal is the DRAM regular command, and send the command signal to the regular command processing module.

6. The command processing circuit of claim 4, wherein, The command address bus transmits the PIM operation command within the preset time after transmitting the PIM mode start command.

7. The command processing circuit of claim 2, wherein, The PIM command processing module comprises: The second identifying unit (31) is configured to receive the PIM related command, decode and judge the PIM related command according to the PIM command truth table, output the PIM mode start command indication signal in the valid state if it is determined that the currently received PIM related command is the PIM mode start command, otherwise output the PIM mode start command indication signal in the invalid state; output the PIM operation command indication signal in the valid state if it is determined that the currently received PIM related command is the PIM operation command, otherwise output the PIM operation command indication signal in the invalid state; output the PIM execution command indication signal in the valid state if it is determined that the currently received PIM related command is the PIM execution command, otherwise output the PIM execution command indication signal in the invalid state. The command register (32) is configured to store the PIM operation command in response to the PIM operation command indication signal in the valid state, and output the PIM operation command to the execution module of the PIM device in response to the PIM execution command indication signal in the valid state.

8. The command processing circuit of claim 7, wherein, The PIM command processing module further comprises: The counter (33) is electrically connected with the second identifying unit, counts the PIM operation command in response to the PIM operation command indication signal in the valid state, and outputs the count value; and clears the count value when the PIM device is powered on for the first time. The address decoding module (34) is electrically connected with the second identifying unit, the counter and the command register, and is configured to decode the count value and / or the PIM execution command, and output an address signal; wherein the PIM execution command contains the position information of the PIM operation command to be called in the command register, and the address signal is used to indicate the address of the command register.

9. The command processing circuit of claim 8, wherein, The command register receives the address signal, stores the PIM operation command to the corresponding address according to the address signal in response to the PIM operation command indication signal in the valid state, and calls and outputs the corresponding PIM operation command according to the address signal in response to the PIM execution command indication signal in the valid state.

10. The command processing circuit of claim 8, wherein, The counter clears the count value in response to the PIM mode start command indication signal in the valid state.

11. The command processing circuit of claim 8, wherein, The address decoding module decodes the PIM execution command in response to the PIM execution command indication signal in the valid state and outputs the address signal; and decodes the count value in response to the PIM execution command indication signal in the invalid state and outputs the address signal.

12. A command processing method characterized by comprising: The application is applied to a PIM device, comprising: receiving a command signal through a command address bus; determining the type of the currently received command signal; if the currently received command signal is determined to be a DRAM regular command, sending the command signal to a regular command processing module; and if the currently received command signal is determined to be a PIM related command, sending the command signal to a PIM command processing module; The PIM command processing module decodes the PIM related command and performs corresponding operations according to the decoding result; and the regular command processing module decodes the DRAM regular command and performs corresponding operations according to the decoding result.

13. The command processing method of claim 12, wherein, The determination of the type of the currently received command signal comprises: determining the command signal according to a PIM command truth table; determining a PIM mode start command, a PIM execution command and a command signal received within a preset time after the PIM mode start command as the PIM related command; and determining the rest as the DRAM regular command.

14. The command processing method of claim 13, wherein, The PIM command processing module decodes the PIM related command and performs corresponding operations according to the decoding result, comprising: identifying the PIM related command; if a PIM operation command is identified, controlling a counter to perform a plus one operation and decoding the count value of the counter to obtain an address signal, and storing the PIM operation command into a command register according to the address signal; if the PIM execution command is identified, decoding the PIM execution command to obtain an address signal, and calling and outputting a corresponding PIM operation command from the command register according to the address signal.

15. A PIM device, characterized by The application comprises the command processing circuit according to any one of claims 1-11.

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