Method for using laser to remove wrap-around layer of TBC solar cell silicon wafer

Abstract

The present invention relates to the field of solar cells. Disclosed is a method for using laser to remove a wrap-around layer of a TBC solar cell silicon wafer. The present invention uses a "three-step" laser processing + alkali cleaning method to remove a wrap-around layer on front and side surfaces of a silicon wafer so as to have advantages of high efficiency and few negative effects, and does not require acid treatment in the process of removing the wrap-around so as to have characteristics of being more environmentally friendly and low-cost.

Description

Method for removing TBC solar cell wafer wrap plating layer by laser TECHNICAL FIELD

[0001] The present application relates to the field of solar cells, in particular to a method for removing TBC solar cell wafer wrap plating layer by laser. BACKGROUND

[0002] In the process of preparing TOPCon and other solar cells, high-temperature diffusion, deposition of poly-Si and the like are important procedures for forming p-n junction and high-low junction of the cells. In order to improve the production yield of the cells and reduce the preparation cost of a single wafer, tubular vacuum equipment has gradually replaced plate-type vacuum equipment. However, in the process of tubular diffusion or deposition, whether it is a single-insertion process or a double-insertion process, the influence of wrap plating of dielectric film cannot be avoided, thereby leading to poor appearance of the cells and large leakage value, which affects the performance of the cells.

[0003] Currently, a wet chemical method is generally used to remove the wrap plating layer on the front surface and side surface of the wafer, which specifically includes: (1) removing the BSG layer / PSG layer by chain acid (HF) and removing the wrap plating layer by alkali corrosion; (2) removing the wrap plating layer by chain acid (HF+HNO3) throwing. + / n + -poly-Si composite laminated structure, as shown in FIG. 1, the chain acid (HF) removing BSG layer / PSG layer + alkali corrosion method can only remove the surface phosphorus diffusion layer, and the bottom boron diffusion layer cannot be removed at one time, which needs to be repeated twice, which leads to a very complex and long overall wrap plating removal process, which is difficult to apply to mass production. Although the method (2) can remove the wrap plating layer of PERC, TOPCon and BC type cells at one time, the up and down shaking of the wafer is large during the acid throwing process, which leads to the inability to effectively remove the edge wrap plating area. In addition, the amount of HF and HNO3 used in the acid throwing process is large, which undoubtedly increases the difficulty and cost of waste liquid and waste gas treatment.

[0004] In summary, it is necessary to develop a more simple and efficient, low negative impact, environmentally friendly and low-cost method for removing the wrap plating layer of the wafer. SUMMARY

[0005] In order to solve the above technical problems, the present application provides a method for removing the wrap plating layer of the TBC solar cell wafer by laser. The present application adopts a "three-step" laser treatment + alkali cleaning method to remove the wrap plating layer on the front surface and side surface of the wafer, which has the characteristics of high efficiency, small negative impact, environmental protection and low cost.

[0006] The technical scheme of the present application is as follows: a method for removing a wrap-around layer of a TBC solar cell silicon wafer by using a laser, which comprises the following steps:

[0007] S1, selecting a TBC semi-finished silicon wafer with a wrap-around layer on the front and side surfaces.

[0008] During the early high-temperature deposition and diffusion process of the silicon wafer, wrap-around layers will inevitably be generated on the front and side surface regions. If these wrap-around layers are not removed, not only will the appearance of the cell be affected, but more importantly, the leakage current value of the cell will be increased, thereby affecting the performance of the cell.

[0009] S2, laser patterning and slotting are performed to preliminarily remove the deposition layer at the junction of the p region and the n region on the back surface of the silicon wafer, so as to preliminarily form an isolation region on the back surface of the silicon wafer in this region.

[0010] Through laser slotting, the deposition layer at the junction of the p region and the n region on the back surface of the silicon wafer can be basically removed, so that an insulating isolation region can be formed in this region, and the formation of the pyramid texture by alkali cleaning and texturing is facilitated.

[0011] S3, the wrap-around layer on the front surface of the silicon wafer is preliminarily removed by three-step processing of ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser.

[0012] In S2, the deposition layer on the back surface of the silicon wafer usually only has a boron / phosphorus diffusion layer and a BSG / PSG layer in the same thickness direction, and the thickness is relatively thin, so it can be basically removed by one-time laser processing. However, the present application found that it is difficult to effectively remove the wrap-around layer on the front and side surfaces of the silicon wafer by one-time laser processing. The reasons are as follows: (1) first, the wrap-around layer is usually a stacked wrap-around layer (i.e. a tunneling oxide layer, a boron diffusion layer, a BSG layer, a tunneling oxide layer, a phosphorus diffusion layer and a PSG layer are sequentially arranged in the same thickness direction), and the thickness is relatively thick; (2) second, the absorption coefficients of different types of deposition layers to laser are different, and different wavelengths of laser have different processing depths, so one-time laser cannot effectively remove all deposition layers in the stacked wrap-around layer.

[0013] Therefore, the present application ingeniously adopts a "three-step method" laser processing (S3, S5) + alkali cleaning (S6) mode. The "three-step method" laser processing specifically includes: first, ultraviolet femtosecond laser processing, then green picosecond laser processing, and finally infrared nanosecond laser processing.

[0014] Different laser wavelengths have different penetration depths in the deposited layer, the penetration depth of the ultraviolet band is 200-400 nm, the penetration depth of the green band is 492-577 nm, and the penetration depth of the infrared band is > 760 nm; the advantages of the "three-step" laser processing of the application are: (1) by using three different laser wavelengths (short wave to medium wave to infrared), the laser can effectively penetrate each deposited layer in the entire laminated plating layer; (2) under different pulse widths (femtosecond, picosecond, nanosecond), the pulse width of the femtosecond laser is the narrowest, and the single laser beam energy is often the highest, which can rapidly heat the material in a short time, so that the "gasification" effect of the deposited layer dominates in the processing process; the pulse width of the picosecond laser is in the middle, and the "gasification" and "lofting" effects of the deposited layer exist simultaneously in the processing process; and the pulse width of the nanosecond laser is the largest, and the single laser beam energy is often the lowest, so that the "lofting" effect of the deposited layer dominates in the processing process. Therefore, the ultraviolet femtosecond laser processing can make most of the surface phosphorus diffusion layer / PSG layer gasify, then the green picosecond laser processing makes part of the phosphorus diffusion layer / PSG layer and the boron diffusion layer / BSG layer interface region "gasify" and "loft", and finally the infrared nanosecond laser processing makes the boron diffusion layer / BSG layer more "loft", which lays a foundation for subsequent wet cleaning. Based on different laser pulse widths, the deposited layer on the surface is in a state of transition from "gasification" to "lofting", which can more thoroughly process each deposited layer in the plating layer.

[0015] S4, stack the plurality of silicon wafers obtained in S3 in a layered manner.

[0016] From the perspective of the front side of the silicon wafer, the longitudinal thickness of the side plating layer is comparable to the thickness of the silicon wafer itself. The side plating area cannot be completely removed during the above-mentioned front side laser processing, and since the silicon wafer is very thin, the plating layer on the four sides of the single silicon wafer cannot be processed by laser. Therefore, the application ingeniously stacks the silicon wafers processed on the front side in a "layered" manner, with the side up, to prepare for subsequent laser processing of the plating layer on the four sides.

[0017] S5, sequentially process the plating layer on the four sides of the stacked silicon wafer by ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser, so that the plating layer on the side of the silicon wafer is preliminarily removed.

[0018] S6, alkali cleaning and texturing to completely remove the plating layer.

[0019] After the foregoing laser processing, the scribe layer on the surface of the silicon wafer has been preliminarily removed, and in S6, the silicon wafer after laser processing is placed in an alkali texturing tank for wet cleaning and texturing integration processing, so that the scribe layer is completely cleaned, and a pyramid texture is formed on the front surface of the silicon wafer; as for the S2 grooving area (i.e. the isolation area) on the back surface of the silicon wafer, the residual deposition layer in the isolation area can be cleaned in the process of wet cleaning + texturing, and a pyramid texture is formed. The non-S2 grooving area on the back surface of the silicon wafer is protected by the PSG layer / BSG layer, so that the deposition layer at the bottom of this area is not damaged in the process of alkali cleaning + texturing.

[0020] Preferably, in S1, the scribe layer is a tunneling oxide layer, a boron diffusion layer, a BSG layer, a tunneling oxide layer, a phosphorus diffusion layer and a PSG layer deposited on the surface of the silicon wafer in sequence, and the total thickness is 200-1000 nm.

[0021] Preferably, in S1, the p region and the n region on the back surface of the silicon wafer are arranged alternately, the deposition layer of the p region is a tunneling oxide layer, a boron diffusion layer and a BSG layer deposited on the back surface of the silicon wafer in sequence, and the deposition layer of the n region is a tunneling oxide layer, a phosphorus diffusion layer and a PSG layer deposited on the back surface of the silicon wafer in sequence, and the total thickness is 100-500 nm.

[0022] Preferably, in S2, the laser patterning grooving conditions are as follows: picosecond laser, laser wavelength 400-600 nm, spot size 50-150 μm, frequency 500-700 KHz, marking speed 40,000-50,000 mm / s, power 10-50 W, and processing time 1-5 s.

[0023] Preferably, in S3 and S5,

[0024] The conditions of the ultraviolet femtosecond laser are as follows: laser wavelength 200-400 nm, spot size 20-80 μm, frequency 100-300 KHz, marking speed 10,000-30,000 mm / s, power 5-100 W, and processing time 1-10 s;

[0025] The conditions of the green picosecond laser are as follows: laser wavelength 492-577 nm, spot size 50-150 μm, frequency 500-700 KHz, marking speed 30,000-50,000 mm / s, power 5-100 W, and processing time 1-10 s;

[0026] The conditions of the infrared nanosecond laser are as follows: laser wavelength 760-1,200 nm, spot size 100-300 μm, frequency 800-1,200 KHz, marking speed 50,000-80,000 mm / s, power 5-100 W, and processing time 1-10 s.

[0027] The present application finds that, in order to further improve the removal effect of the plating layer, the wavelength and frequency of the three laser treatments can be set differently. Specifically, first, a small spot size / low frequency ultraviolet femtosecond laser treatment is performed, then a medium spot size / medium frequency green picosecond laser treatment is performed, and finally a large spot size / high frequency infrared nanosecond laser treatment is performed.

[0028] First, for different laser spot sizes, the size of the spot directly affects the energy distribution within the spot. When the laser power is constant, if the spot size increases, the single energy density will decrease because the energy is dispersed over a larger area; the smaller the spot size, the higher the energy density. The spot size determines the degree of focusing of the laser beam, the shorter the focal length, the tighter the laser beam is focused, the smaller the spot is formed, but the higher the energy density within the spot. Conversely, the longer the focal length, the larger the spot, and the lower the energy density. Thus, for ultraviolet femtosecond lasers, a small spot is more likely to achieve a higher single energy density, thereby making the "gasification" effect of the deposited layer more significant; for green picosecond lasers, the spot size is moderate, the single energy density is also moderate, and the "gasification" and "lofting" effects are both considered when processing the deposited layer; and for infrared nanosecond lasers, the spot size is the largest and the single energy density is the lowest, and the "lofting" effect will be more significant when processing the deposited layer.

[0029] Second, different laser frequencies significantly affect the single laser beam energy. When the laser output power is constant, the lower the frequency, the greater the single laser beam energy, and vice versa, because the single laser energy is related to the repetition frequency of the laser, and the output power is the product of the single laser energy and the repetition frequency. Specifically, the repetition frequency refers to the number of pulses emitted by the laser per unit time. Under the condition that the output power is constant, the repetition frequency affects the energy of the single pulse, and increasing the repetition frequency will result in a decrease in the energy of the single pulse because the output power is fixed and more pulse times mean that each pulse carries less energy. If the frequency increases, the energy of the single pulse will decrease accordingly to maintain the output power unchanged, because the output power is the product of the single pulse energy and the repetition frequency, and increasing the frequency will inevitably result in a decrease in the single pulse energy.

[0030] Thus, the single energy of the low-frequency laser is often the largest, the "gasification" effect is greater when processing the deposited layer, and the single energy of the high-frequency laser is often the smallest, the "lofting" effect is greater when processing the deposited layer; by adjusting the frequency, the "gasification" and "lofting" effects in the above laser treatment process can be further made more significant.

[0031] As a preferred, in S4, the front surface of the lower silicon wafer after the layer stacking is attached to the back surface of the upper silicon wafer, and all four side surfaces of the silicon wafers after the layer stacking are flush.

[0032] As preferred, in S5, the plated layers on all four sides of the layered stack of silicon wafers are sequentially treated by laser.

[0033] After one side is treated by laser, the stack of silicon wafers can be rotated clockwise by 90° to treat the next side of the plated layer, and a total of four sides are sequentially treated, and the whole treatment process is shown in Fig. 2.

[0034] As preferred, in S6, the alkali cleaning and texturing specifically includes: placing the silicon wafer into an alkali texturing tank for wet cleaning and texturing integrated treatment, completely removing the residual plated layer on the surface of the silicon wafer and the residual deposited layer in the grooving area of S2; and forming a pyramid textured surface on the front and back surfaces of the silicon wafer.

[0035] As preferred, in S6, the alkali cleaning and texturing is finally removed by acid washing to remove the residual PSG layer and BSG layer in the non-grooving area of S2 on the back surface of the silicon wafer.

[0036] Compared with the prior art, the present application has the following beneficial effects:

[0037] (1) The present application ingeniously adopts a "three-step" laser treatment + alkali cleaning method to remove the plated layer on the front and side surfaces of the silicon wafer, which has the characteristics of high efficiency, small negative impact, environmental protection and low cost.

[0038] (2) The present application stacks the silicon wafers after removing the plated layer on the front surface in a "layered" manner and then performs laser treatment together, which not only solves the problem that the single silicon wafer cannot be treated by laser due to its thin thickness, but also has higher batch processing efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0039] Fig. 1 is a structural schematic diagram of a TBC semi-finished silicon wafer with a plated layer in S1 of the present application.

[0040] Fig. 2 is a flowchart of laser treatment of the plated layer on the front and side surfaces of the silicon wafer.

[0041] Fig. 3 is a structural schematic diagram of the silicon wafer after alkali cleaning and texturing.

[0042] The reference signs are: silicon wafer 1, tunnel oxide layer 2, boron diffusion layer 3, BSG layer 4, phosphorus diffusion layer 5, PSG layer 6, and pyramid textured surface 7. DETAILED DESCRIPTION

[0043] The present application will be further described below in conjunction with examples.

[0044] Overall example

[0045] A method for removing the plated layer of a TBC solar cell silicon wafer by laser, specifically comprising the following steps:

[0046] S1, select a TBC semi-finished silicon wafer with a plated layer on the front and side surfaces. The plated layer is inevitably formed on the front and side surfaces of the silicon wafer during the early high-temperature diffusion and deposition process. If the plated layer is not removed, it will not only affect the appearance of the battery, but more importantly, it will increase the leakage value of the battery, thereby affecting the performance of the battery.

[0047] In some specific embodiments, the thickness of the silicon wafer is ≤ 150 μm.

[0048] In some specific embodiments, as shown in FIG. 1, the plated layer is a tunneling oxide layer 2, a boron diffusion layer 3, a BSG layer 4, a tunneling oxide layer 2, a phosphorus diffusion layer 5, and a PSG layer 6 deposited on the surface of the silicon wafer 1 in sequence, with a total thickness of 200-1000 nm.

[0049] In some specific embodiments, as shown in FIG. 1, the p region and the n region of the back surface of the silicon wafer 1 are arranged alternately, the deposition layer of the p region is a tunneling oxide layer 2, a boron diffusion layer 3, and a BSG layer 4 deposited on the back surface of the silicon wafer in sequence, and the deposition layer of the n region is a tunneling oxide layer 2, a phosphorus diffusion layer 5, and a PSG layer 6 deposited on the back surface of the silicon wafer in sequence, with a total thickness of 100-500 nm.

[0050] S2, laser patterning and slotting to preliminarily remove the deposition layer at the junction of the p region and the n region on the back surface of the silicon wafer, so as to preliminarily form an isolation region on the back surface of the silicon wafer in the region. By laser slotting, the deposition layer at the junction of the p region and the n region on the back surface of the silicon wafer can be basically removed, and after slotting, an insulating isolation region can be preliminarily formed in the region, and a pyramid texture can be formed for subsequent alkali cleaning and texturing.

[0051] In some specific embodiments, the conditions for laser patterning and slotting are as follows: picosecond laser, laser wavelength 400-600 nm, spot size 50-150 μm, frequency 500-700 KHz, marking speed 40,000-50,000 mm / s, power 10-50 W, and processing time 1-5 s.

[0052] S3, preliminarily remove the plated layer on the front surface of the silicon wafer by three-step processing of ultraviolet femtosecond laser, green picosecond laser, and infrared nanosecond laser.

[0053] In some specific embodiments, the conditions for the ultraviolet femtosecond laser are as follows: spot size 20-80 μm, laser wavelength 200-400 nm, frequency 100-300 KHz, marking speed 10,000-30,000 mm / s, power 5-100 W, and processing time 1-10 s.

[0054] In some specific embodiments, the green picosecond laser has the following conditions: spot size 50-150 mu m, laser wavelength 492-577 nm, frequency 500-700 KHz, marking speed 30000-50000 mm / s, power 5-100 W, and processing time 1-10 s.

[0055] In some specific embodiments, the infrared nanosecond laser has the following conditions: spot size 100-300 mu m, laser wavelength 760-1200 nm, frequency 800-1200 KHz, marking speed 50000-80000 mm / s, power 5-100 W, and processing time 1-10 s.

[0056] S4, stack the plurality of silicon wafers obtained in S3 in a layered manner. From the perspective of the front surface of the silicon wafer, the side surface around the longitudinal thickness of the plating layer is equivalent to the thickness of the silicon wafer itself. The side surface around the plating layer cannot be completely removed during the above-mentioned front surface laser processing of S3; and since the silicon wafer is very thin, the plating layer on the four side surfaces of a single silicon wafer cannot be processed by laser. Therefore, the above-mentioned silicon wafers after front surface processing are ingeniously stacked in a "layered" manner with the side surface upward, preparing for subsequent laser processing of the plating layer on the four side surfaces.

[0057] In some specific embodiments, the front surface of the lower silicon wafer is attached to the back surface of the upper silicon wafer after the layered stacking, and the four side surfaces of all the silicon wafers are flush after the layered stacking.

[0058] S5, sequentially process the plating layer on the four side surfaces of the stacked silicon wafer by ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser, so that the plating layer on the side surface of the silicon wafer is preliminarily removed.

[0059] In some specific embodiments, the plating layer on the four side surfaces of all the silicon wafers after the layered stacking is sequentially processed by laser. After the laser processing of one side surface, the stacked silicon wafer is rotated clockwise by 90 degrees to process the plating layer on the next side surface, and a total of four side surfaces are sequentially processed. The whole processing flowchart is shown in FIG. 2.

[0060] In some specific embodiments, the ultraviolet femtosecond laser has the following conditions: spot size 20-80 mu m, laser wavelength 200-400 nm, frequency 100-300 KHz, marking speed 10000-30000 mm / s, power 5-100 W, and processing time 1-10 s.

[0061] In some specific embodiments, the green picosecond laser has the following conditions: spot size 50-150 mu m, laser wavelength 492-577 nm, frequency 500-700 KHz, marking speed 30000-50000 mm / s, power 5-100 W, and processing time 1-10 s.

[0062] In some specific embodiments, the infrared nanosecond laser has a spot size of 100-300 μm, a laser wavelength of 760-1200 nm, a frequency of 800-1200 KHz, a marking speed of 50000-80000 mm / s, a power of 5-100 W, and a processing time of 1-10 s.

[0063] S6, alkali cleaning and texturing, completely removing the wrap-around layer. After the laser treatment described above, the wrap-around layer on the surface of the silicon wafer has been preliminarily removed. As shown in FIG. 3, in S6, the silicon wafer after laser treatment is placed in an alkali texturing tank for wet cleaning and texturing integrated treatment, so that the wrap-around layer is completely cleaned, and a pyramid texture 7 is formed on the front surface of the silicon wafer; as for the S2 grooving area (i.e. the isolation area) on the back surface of the silicon wafer, the residual deposition layer in the isolation area can also be cleaned during the wet cleaning and texturing process, and a pyramid texture 7 is formed. The non-S2 grooving area on the back surface of the silicon wafer is protected by the PSG layer / BSG layer, so that the deposition layer at the bottom of this area is not damaged during the alkali cleaning and texturing process,

[0064] In some specific embodiments, the alkali cleaning and texturing conditions are that the temperature is maintained at 75-85 °C, and the time is 6-12 min.

[0065] S7, double-sided film deposition: AlO x thin film is deposited on the front and back surfaces of the treated silicon wafer by ALD deposition, in which Al(CH3)3 reacts with water vapor to form a thin film with a thickness of 8-10 nm, and the process temperature is controlled at 220-280 °C. Then, SiN x thin film is deposited on the front and back surfaces of the treated silicon wafer by ALD deposition, in which Al(CH3)3 reacts with water vapor to form a thin film with a thickness of 8-10 nm, and the process temperature is controlled at 220-280 °C. Then, SiN x thin film is deposited on the front and back surfaces of the treated silicon wafer by ALD deposition, in which Al(CH3)3 reacts with water vapor to form a thin film with a thickness of 8-10 nm, and the process temperature is controlled at 220-280 °C. Then, SiN x thin film is deposited on the front and back surfaces of the treated silicon wafer by ALD deposition, in which Al(CH3)3 reacts with water vapor to form a thin film with a thickness of 8-10 nm, and the process temperature is controlled at 220-280 °C. Then, SiN

[0066] S8, after the film deposition, the silicon wafer is subjected to screen printing on the back surface to form a metal contact, then sintering at 700-800 °C to form an Ag-Si ohmic contact, and finally light injection repair to obtain the final product TBC solar cell.

[0067] Specific embodiments and comparative examples.

[0068] Example 1

[0069] A method for removing TBC solar cell silicon wafer wrap layer by laser, comprising the following steps:

[0070] S1, select a TBC semi-finished silicon wafer with wrap layer on the front and side surfaces, the thickness of the silicon wafer is 150 μm, and the size is 182.2 mm x 183.75 mm. As shown in FIG. 1, the wrap layer is a tunnel oxide layer 2, a boron diffusion layer 3, a BSG layer 4, a tunnel oxide layer 2, a phosphorus diffusion layer 5 and a PSG layer 6 deposited on the surface of the silicon wafer 1 in sequence, and the total thickness is about 600 nm. The p region and the n region of the back surface of the silicon wafer 1 are arranged alternately, the deposition layer of the p region is a tunnel oxide layer 2, a boron diffusion layer 3 and a BSG layer 4 deposited on the back surface of the silicon wafer in sequence, and the deposition layer of the n region is a tunnel oxide layer 2, a phosphorus diffusion layer 5 and a PSG layer 6 deposited on the back surface of the silicon wafer in sequence, and the total thickness is about 300 nm.

[0071] S2, laser patterned slotting is used to preliminarily remove the deposition layer at the junction of the p region and the n region on the back surface of the silicon wafer, so as to preliminarily form an isolation region on the back surface of the silicon wafer in the region. By laser slotting, the deposition layer at the junction of the p region and the n region on the back surface of the silicon wafer can be basically removed, and after slotting, an insulating isolation region can be preliminarily formed in the region, and the subsequent formation of the pyramid texturing can be prepared. Specifically, the laser patterned slotting conditions are as follows: picosecond laser, laser wavelength 532 nm, spot size 100 μm, frequency 600 KHz, marking speed 45000 mm / s, power 50 W, and processing time 3 s.

[0072] S3, the wrap layer on the front surface of the silicon wafer is preliminarily removed by three-step processing of ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser. Specifically, the ultraviolet femtosecond laser conditions are as follows: spot size 60 μm, laser wavelength 355 nm, frequency 200 KHz, marking speed 15000 mm / s, power 60 W, and processing time 9 s. The green picosecond laser conditions are as follows: spot size 120 μm, laser wavelength 532 nm, frequency 600 KHz, marking speed 35000 mm / s, power 60 W, and processing time 6 s. The infrared nanosecond laser conditions are as follows: spot size 250 μm, laser wavelength 1064 nm, frequency 1100 KHz, marking speed 60000 mm / s, power 60 W, and processing time 3 s.

[0073] S4, stack multiple silicon wafers obtained in S3 in layers. After layer stacking, the front surface of the lower layer silicon wafer is attached to the back surface of the upper layer silicon wafer, and the four side surfaces of all the silicon wafers are flush after layer stacking.

[0074] S5, the four sides of the silicon wafer after stacking are treated by ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser in sequence to make the plating layer on the side of the silicon wafer be removed preliminarily. Specifically, the plating layer on all four sides of the silicon wafer after layer stacking is treated by laser in sequence. After the laser treatment of one side, the stacked silicon wafer is rotated clockwise by 90° to treat the plating layer of the next side, and a total of four sides are treated in sequence. The whole treatment process is shown in FIG. 2. The ultraviolet femtosecond laser has a spot size of 60 μm, a laser wavelength of 355 nm, a frequency of 200 KHz, a marking speed of 15000 mm / s, a power of 60 W, and a treatment time of 9 s. The green picosecond laser has a spot size of 120 μm, a laser wavelength of 532 nm, a frequency of 600 KHz, a marking speed of 35000 mm / s, a power of 60 W, and a treatment time of 6 s. The infrared nanosecond laser has a spot size of 250 μm, a laser wavelength of 1064 nm, a frequency of 1100 KHz, a marking speed of 60000 mm / s, a power of 60 W, and a treatment time of 3 s.

[0075] S6, after the laser treatment, the plating layer on the surface of the silicon wafer has been removed preliminarily. As shown in FIG. 3, in S6, the silicon wafer after laser treatment is placed in an alkali texturing tank for wet cleaning and texturing integrated treatment (the conditions of alkali cleaning and texturing are that the temperature is maintained at 82℃, and the time is 7 min, so that the plating layer is completely cleaned, and a pyramid texture 7 is formed on the front surface of the silicon wafer; as for the S2 grooving area (i.e. the isolation area) on the back surface of the silicon wafer, the part of the deposited layer in the isolation area can also be cleaned in the process of wet cleaning and texturing, and a pyramid texture 7 is formed; and the non-S2 grooving area on the back surface of the silicon wafer is protected by the PSG layer / BSG layer, so that the deposited layer at the bottom of the area is not damaged in the process of alkali cleaning and texturing,

[0076] S7, double-sided film deposition: AlO x thin film generated by the reaction of Al(CH3)3 and water vapor, with a thickness of 8 nm and a process temperature of 250℃. Then, a tube PECVD device is used to deposit SiN x thin film, SiN x The thickness of the thin film is about 90 nm, and the refractive index is 2.0. SiN x The reaction gas in the tube cavity is SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440℃, the flow rate of SiH4 gas is 980 sccm, the flow rate of NH3 gas is 8000 sccm, the silicon-nitrogen ratio is 1:5, and the deposition time is 10 min.

[0077] S8, the coated silicon wafer is subjected to screen printing on the back surface to form a metal contact, then sintered at 770°C to form an Ag-Si ohmic contact, and finally subjected to photo injection repair to obtain a final product TBC solar cell.

[0078] Example 2

[0079] Example 2 differs from Example 1 in that S3 and S5 adopt a "three-step" laser treatment, but the same frequency. The specific laser treatment process is as follows:

[0080] The front surface and side surface wrap plating layers of the silicon wafer are preliminarily removed by three-step treatment of ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser. Specifically, the conditions of the ultraviolet femtosecond laser are as follows: spot size 60 μm, laser wavelength 355 nm, frequency 600 KHz, marking speed 15000 mm / s, power 60 W, and treatment time 9 s. The conditions of the green picosecond laser are as follows: spot size 120 μm, laser wavelength 532 nm, frequency 600 KHz, marking speed 35000 mm / s, power 60 W, and treatment time 6 s. The conditions of the infrared nanosecond laser are as follows: spot size 250 μm, laser wavelength 1064 nm, frequency 600 KHz, marking speed 60000 mm / s, power 60 W, and treatment time 3 s.

[0081] Example 3

[0082] Example 3 differs from Example 1 in that S3 and S5 adopt a "three-step" laser treatment, but the same spot size. The specific laser treatment process is as follows:

[0083] The front surface and side surface wrap plating layers of the silicon wafer are preliminarily removed by three-step treatment of ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser. The conditions of the ultraviolet femtosecond laser are as follows: spot size 150 μm, laser wavelength 355 nm, frequency 200 KHz, marking speed 15000 mm / s, power 60 W, and treatment time 9 s. The conditions of the green picosecond laser are as follows: spot size 150 μm, laser wavelength 532 nm, frequency 600 KHz, marking speed 35000 mm / s, power 60 W, and treatment time 6 s. The conditions of the infrared nanosecond laser are as follows: spot size 150 μm, laser wavelength 1064 nm, frequency 1100 KHz, marking speed 60000 mm / s, power 60 W, and treatment time 3 s.

[0084] Comparative Example 1

[0085] Comparative Example 1 differs from Example 1 in that a conventional acid washing process is adopted to remove the front surface and side surface wrap plating layers of the silicon wafer, which specifically comprises the following steps:

[0086] The difference between Comparative Example 1 and Example 1 is that S3-S5 of Example 1 is replaced by: the silicon wafer after high temperature treatment is removed from the front and side of the silicon wafer by a chain acid etching machine, wherein the volume ratio of the hydrofluoric acid solution and the nitric acid solution in the acid tank is 1:4 (the concentration of the hydrofluoric acid solution is 49wt%, and the concentration of the nitric acid solution is 69wt%), and the belt speed is 1.3m / min.

[0087] Comparative Example 2

[0088] The difference between Comparative Example 2 and Example 1 is that S3 and S5 are treated by one laser treatment. The specific laser treatment process is: using picosecond laser, laser wavelength 532nm, spot size 100μm, frequency 600KHz, marking speed 45000mm / s, power 50W, and treatment time 3s.

[0089] Performance

[0090] The TBC solar cells obtained in each example and comparative example are tested for various performance tests, and the results are shown in Table 1:

[0091] Table 1

[0092]

[0093] From the comparison of the data in Table 1, it can be seen that:

[0094] Example 1 uses a differential "three-step" laser process to remove the plating layer, and the alkali cleaning can effectively remove the plating layer on the front and side of the silicon wafer. The results show that the conversion efficiency of the TBC solar cell is the highest, and the leakage value is the lowest.

[0095] For Example 2 and Example 3, although the differential "three-step" laser process is also used to remove the plating layer, the parameter difference of the three-step laser treatment process is not significant compared with Example 1 (the laser power is unchanged in Example 2, and the spot size is unchanged in Example 3), so the leakage value is slightly higher.

[0096] For Comparative Example 1, since the conventional chain acid etching method is used to remove the plating layer on the front and side of the silicon wafer, the silicon wafer often shakes up and down during the acid etching process, which cannot effectively remove the edge plating area, resulting in a high leakage value and affecting the performance of the final cell.

[0097] For Comparative Example 2, since the conventional "one-step" laser process is used, it cannot effectively remove the plating layer on the front and side, so the cell leakage value is the highest, which significantly affects the performance of the cell.

[0098] The raw materials and equipment used in the present application are conventional raw materials and equipment in the art unless otherwise specified; the methods used in the present application are conventional methods in the art unless otherwise specified.

[0099] The above is only the preferred embodiment of the present application, and does not limit the present application in any way. Any simple modification, change and equivalent transformation of the above embodiment according to the technical essence of the present application still falls within the protection scope of the technical solution of the present application.

Claims

1. A method for removing TBC solar cell silicon wafer wrap plating layer by laser, characterized in that The application relates to a method for removing a wrap-plating layer on a silicon wafer. S1, selecting a TBC semi-finished silicon wafer with a wrap-plating layer on the front and side surfaces; S2, laser patterning groove preliminary removal of the deposited layer at the junction of the p region and the n region on the back surface of the silicon wafer, so that the back surface of the silicon wafer in the groove region preliminarily forms an isolation region; S3, removing the wrap-plating layer on the front surface of the silicon wafer through three-step processing of ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser; S4, stacking a plurality of silicon wafers obtained in S3 in a layered manner; S5, removing the wrap-plating layer on the four side surfaces of the silicon wafer after stacking through processing of ultraviolet femtosecond laser, green picosecond laser and infrared nanosecond laser; S6, alkali cleaning and texturing, and completely removing the wrap-plating layer.

2. The method of claim 1, wherein: In S1, the wrap-plating layer is a tunneling oxide layer, a boron diffusion layer, a BSG layer, a tunneling oxide layer, a phosphorus diffusion layer and a PSG layer which are sequentially deposited on the surface of the silicon wafer.

3. The method of claim 2, wherein: In S1, the p region and the n region on the back surface of the silicon wafer are staggered, the deposited layer of the p region is a tunneling oxide layer, a boron diffusion layer and a BSG layer which are sequentially deposited on the back surface of the silicon wafer, and the deposited layer of the n region is a tunneling oxide layer, a phosphorus diffusion layer and a PSG layer which are sequentially deposited on the back surface of the silicon wafer.

4. The method of claim 3, wherein: In S1, the total thickness of the wrap-plating layer is 200-1000 nm, and the total thickness of the deposited layer of the p region and the n region is 100-500 nm. In S2, the laser patterning groove is processed under the following conditions: picosecond laser, laser wavelength 400-600 nm, spot size 50-150 mu m, frequency 500-700 KHz, marking speed 40000-50000 mm / s, power 10-50 W and processing time 1-5 s. In S3 and S5, the ultraviolet femtosecond laser is processed under the following conditions: spot size 20-80 mu m, laser band 200-400 nm, frequency 100-300 KHz, marking speed 10000-30000 mm / s, power 5-100 W and processing time 1-10 s; the green picosecond laser is processed under the following conditions: spot size 50-150 mu m, laser band 492-577 nm, frequency 500-700 KHz, marking speed 30000-50000 mm / s, power 5-100 W and processing time 1-10 s; and the infrared nanosecond laser is processed under the following conditions: spot size 100-300 mu m, laser band 760-1200 nm, frequency 800-1200 KHz, marking speed 50000-80000 mm / s, power 5-100 W and processing time 1-10 s.

5. The method of claim 1, wherein: In S4, the front surface of the lower silicon wafer is attached to the back surface of the upper silicon wafer after the layered stacking, and the four side surfaces of all the silicon wafers after the layered stacking are flush.

6. The method of claim 1 or 2, wherein: In S5, the wrap-plating layer on the four side surfaces of all the silicon wafers after the layered stacking is processed through laser. In S6, the alkali cleaning and texturing specifically include: placing the silicon wafer into an alkali texturing tank for wet cleaning and texturing integrated processing, completely removing the residual wrap-plating layer on the surface of the silicon wafer and the residual deposited layer in the groove region of S2; and simultaneously forming a pyramid texture on the front surface and the back surface of the silicon wafer. In S6, the PSG layer and the BSG layer in the non-groove region of S2 on the back surface of the silicon wafer are removed through acid washing at the end of the alkali cleaning and texturing. ​ 7. The method of claim 1, wherein: ​ 8. The method of claim 1 or 7, wherein: ​ 9. The method of claim 1, wherein: ​ 10. The method of claim 9, wherein: ​

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