Chassis-based device configuration method and apparatus, and chassis-based device

Abstract

Embodiments of the present application relate to the technical field of network communications, and provide a chassis-based device configuration method and apparatus, and a chassis-based device. The chassis-based device configuration method comprises: acquiring the number and bandwidth of each type of serdes link under a serdes bus corresponding to each NP in a chassis-based device; and on the basis of the number and bandwidth of each type of serdes link under the serdes bus corresponding to each NP and a bandwidth proportionality rule, configuring route distribution weights for the serdes links under the serdes bus corresponding to each NP, wherein the bandwidth proportionality rule is used to indicate that the ratios between the bandwidths of respective serdes buses corresponding to a plurality of NPs are equal, and the route distribution weights for the serdes bus corresponding to each NP are used to indicate the proportion of data distribution tasks of the NP that are allocated to the serdes links under the serdes bus. The present application can ensure scalable expansion of chassis-based devices by using mixed-rate serdes links.

Description

Method and apparatus for configuring a chassis device, and chassis device

[0001] The present application claims priority to the Chinese patent application No. 202411393385.2, filed on September 30, 2024, and entitled "Method and apparatus for configuring a chassis device, and chassis device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the field of network communication technology, and in particular to a method and apparatus for configuring a chassis device. BACKGROUND

[0003] A chassis device is a large-capacity chassis device that can handle large traffic, such as a chassis switch, a chassis router, etc. In a chassis device, line processing units (LPUs) are mainly used for service packet processing, and a switch fabric unit (SFU) is used to process traffic exchange between LPUs in the chassis device. The LPU and the SFU communicate through a pair of serializer and deserializer (serdes) buses. For example, a pair of serdes buses can be used for uplink communication and downlink communication between the LPU and the SFU, respectively.

[0004] In related technologies, an LPU contains multiple network processors (NPs) also known as service processing chips, and an SFU contains multiple forwarding engines (FEs) also known as switch chips. Each NP and each FE communicate through multiple serdes links provided by a serdes bus. The configuration of a cell switching architecture chassis device can generally include that, for each NP, the rate of the serdes links between the NP and all FEs is the same, and the number of serdes links between each NP and each FE is proportional. Under such a configuration, when the chassis device distributes data (such as cells) according to the number of links, it can ensure that the bandwidth of each serdes link is used evenly, thereby avoiding bandwidth waste or congestion caused by unfair distribution.

[0005] However, as technology and demand develop, the frame device often has the need of capacity expansion or rate upgrade, at this time, the serdes link between the LPU and the SFU needs to be upgraded to a higher rate, and the higher rate means higher hardware (such as the bandwidth of the serdes bus) performance. However, part of the slot or part of the serdes link of the slot in the frame device may have insufficient high-speed margin due to the limitation of the transmission link: the related serdes link cannot be upgraded to a higher rate, which means that the frame device cannot be upgraded to full-link high speed in the above configuration, resulting in the problem that the frame device cannot be expanded. SUMMARY

[0006] To solve the above technical problems, the present application provides a frame device configuration method, device and frame device. The frame device configuration method configures the routing distribution weight of the serdes link under the serdes bus between the NP and the FE through the rule that the ratio of the bandwidth of each serdes bus corresponding to each NP is equal and the bandwidth and number of each serdes link, so as to realize the effect that each serdes link between each NP and each FE of the frame device can run at different bandwidths, that is, at a mixed rate.

[0007] In a first aspect, the present application provides a frame device configuration method, the frame device comprising a plurality of network processors (NP) and a plurality of forwarding engines (FE), each NP in the plurality of NP being in communication with each FE in the plurality of FE through a serializer-deserializer (serdes) bus, each serdes bus comprising one or more serdes links, the method comprising: obtaining the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP; configuring the routing distribution weight of the serdes link under the serdes bus corresponding to each NP according to the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP and the equal ratio rule of the bandwidth; wherein the equal ratio rule of the bandwidth is used to indicate that the ratio of the bandwidth of each serdes bus corresponding to the plurality of NP is equal, and the routing distribution weight of the serdes link under the serdes bus corresponding to the NP is used to indicate the proportion of the data distribution task allocated to the serdes link under the serdes bus in the data distribution task of the NP.

[0008] The embodiment of the present application configures the routing distribution weight of the serdes bus to indicate the allocation proportion of the data distribution task of each serdes link between the NP and the FE. By configuring the routing distribution weight of the serdes bus between each NP and the FE, it can be ensured that, in the case that the bandwidths of the serdes links between each NP and the FE are different, that is, the mixed rate, when the cells are distributed according to the routing distribution weight configured based on the bandwidth of the serdes bus, the ratio of the exchange bandwidth of each NP to each FE in the frame device, that is, the used bandwidth of different serdes buses, remains consistent, thereby meeting the demand that the bandwidth of each serdes link is used evenly, and achieving the effect that the serdes links between each NP and each FE of the frame device can operate at different bandwidths, that is, at a mixed rate. Under such configuration, the frame device that can operate at a mixed rate can realize the upgrade or expansion of the entire frame device without full-link high-speed upgrade, thereby avoiding the problem that the frame device cannot be upgraded or expanded due to the insufficient high-speed margin of the serdes link.

[0009] According to the first aspect, the routing distribution weight of the serdes link under the serdes bus corresponding to each NP is configured according to the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP, and the equal ratio rule of the bandwidth, comprising: obtaining the bandwidth of each serdes bus corresponding to a plurality of NPs respectively and the total bandwidth of each serdes bus corresponding to a plurality of NPs respectively according to the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP; for each serdes bus corresponding to each NP, calculating the ratio of the bandwidth of the serdes bus corresponding to the NP to the total bandwidth of the serdes bus corresponding to the NP, to obtain the routing distribution weight of the serdes link under the serdes bus corresponding to each NP.

[0010] In the embodiment of the present application, the bandwidth of the serdes bus, that is, the sum of the bandwidths of the serdes links under the serdes bus, can be obtained by the bandwidth of each serdes link and the number of each serdes link under the serdes bus, and then the proportion of the serdes bus in the total bandwidth of all serdes buses corresponding to the corresponding NP can be obtained by using the bandwidth of the serdes bus, that is, the routing distribution weight of the serdes bus.

[0011] According to the first aspect, or any one of the implementations of the first aspect, after the serdes link of the serdes bus corresponding to each NP is configured with the routing distribution weight according to the number of each serdes link and the bandwidth of each serdes link of the serdes bus corresponding to each NP and the bandwidth equal ratio rule, the method further comprises: if there is a fault serdes link in one or more serdes links, obtaining the loss bandwidth of the serdes bus to which the fault serdes link belongs according to the bandwidth of the serdes link of the type to which the fault serdes link belongs and the number of the serdes link of the type; determining the isolation bandwidth of the serdes bus corresponding to the second NP according to the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP and the bandwidth equal ratio rule, the first NP including the NP corresponding to the fault serdes link, and the second NP including the NP different from the first NP in the frame device; and isolating the serdes link with a bandwidth matching the isolation bandwidth from all serdes links corresponding to the second NP.

[0012] In the scenario where the serdes link bandwidth between each NP and FE is different, i.e., the mixed rate is achieved through the routing distribution weight, if part of the links in the frame device is in fault, based on the bandwidth equal ratio relationship, the bandwidth of the link to be isolated connected by the remaining NPs can be obtained through the ratio between the loss bandwidth of the fault link and the total bandwidth of all serdes buses connected by the NP corresponding to the serdes bus to which the fault link belongs, and the bandwidth connected by the remaining NPs is isolated, so that the serdes link bandwidth between each NP and each FE still maintains the equal ratio effect, thereby solving the problem of uneven distribution of data caused by the abnormality of part of the links, and ensuring that the scheme is applicable to the scenario of part of the links being in fault.

[0013] According to the first aspect, or any one of the implementations of the first aspect, determining the isolation bandwidth of the serdes bus corresponding to the second NP according to the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP and the bandwidth equal ratio rule comprises: constructing an equation relationship between the first ratio and the second ratio according to the bandwidth equal ratio rule, the first ratio including the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP, and the second ratio including the ratio between the isolation bandwidth of the serdes bus corresponding to the second NP and the total bandwidth of all serdes buses corresponding to the second NP; and solving the isolation bandwidth of the serdes bus corresponding to the second NP from the equation relationship.

[0014] According to the equal-ratio rule of bandwidth, the ratio between the loss bandwidth of the serdes bus corresponding to the first NP and the total bandwidth of all serdes buses corresponding to the first NP is equal to the ratio between the isolation bandwidth of the serdes bus corresponding to the second NP and the total bandwidth of all serdes buses corresponding to the second NP, so that the isolation bandwidth can be obtained.

[0015] According to the first aspect, or any one of the implementations of the above first aspect, each of the plurality of NPs respectively communicates with each of the plurality of FEs through a serializer and a deserializer (serdes) bus, including: each of the plurality of NPs respectively communicates with each of the plurality of FEs through a serializer and a deserializer (serdes) bus for uplink communication from the NP to the FE or downlink communication from the FE to the NP.

[0016] Embodiments of the present application, for uplink and downlink communication between NP and FE, the difference lies in the direction of data transmission, therefore, both can be applied to the present scheme, thereby expanding the use scenario of the present scheme.

[0017] The second aspect, the present application provides a frame device configuration device for configuring a frame device, the frame device includes a plurality of network processors (NPs) and a plurality of forwarding engines (FEs), each of the plurality of NPs respectively communicates with each of the plurality of FEs through a serializer and a deserializer (serdes) bus, each serdes bus includes one or more serdes links, the device includes: a parameter acquisition module for acquiring the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP; a device configuration module for configuring the routing distribution weight of the serdes link under the serdes bus corresponding to each NP according to the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP and the equal-ratio rule of bandwidth; wherein, the equal-ratio rule of bandwidth is used to indicate that the ratio between the bandwidths of the serdes buses corresponding to the plurality of NPs is equal, and the routing distribution weight of the serdes link under the serdes bus corresponding to the NP is used to indicate the proportion of the data distribution task allocated to the serdes bus in the data distribution task of the NP.

[0018] According to a second aspect, the device configuration module is specifically configured to: obtain bandwidths of serdes buses corresponding to a plurality of NPs respectively and total bandwidths of the serdes buses corresponding to the plurality of NPs according to the number of each serdes link and the bandwidth of each serdes link under each serdes bus corresponding to each NP; and calculate a ratio of the bandwidth of the serdes bus corresponding to each NP to the total bandwidth of the serdes buses corresponding to each NP for each serdes bus corresponding to each NP to obtain a routing distribution weight of each serdes link under the serdes bus corresponding to each NP.

[0019] According to the second aspect or any possible implementation manner of the second aspect, the device configuration module is further configured to: after configuring the routing distribution weight for each serdes bus corresponding to each NP according to the number of each serdes link and the bandwidth of each serdes link under each serdes bus corresponding to each NP and the equal-ratio rule of bandwidth, if there is a faulty serdes link in one or more serdes links, obtain a loss bandwidth of the serdes bus to which the faulty serdes link belongs according to the bandwidth of the serdes link of the type to which the faulty serdes link belongs and the number of the serdes link of the type; determine an isolation bandwidth of the serdes bus corresponding to a second NP according to a ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to a first NP and the equal-ratio rule of bandwidth, the first NP including an NP corresponding to the faulty serdes link, and the second NP including an NP different from the first NP in the frame device; and isolate the serdes link with a bandwidth matching the isolation bandwidth from all serdes links corresponding to the second NP.

[0020] According to the second aspect or any possible implementation manner of the second aspect, the device configuration module is specifically configured to: construct an equation relationship between a first ratio and a second ratio according to the equal-ratio rule of bandwidth, the first ratio including a ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP, and the second ratio including a ratio between the isolation bandwidth of the serdes bus corresponding to the second NP and the total bandwidth of all serdes buses corresponding to the second NP; and solve the isolation bandwidth of the serdes bus corresponding to the second NP from the equation relationship.

[0021] According to the second aspect or any possible implementation manner of the second aspect, each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and deserializer (serdes) bus, including: each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and deserializer (serdes) bus for uplink communication from the NP to the FE or downlink communication from the FE to the NP.

[0022] The second aspect and any kind of implementation form of the second aspect correspond to the first aspect and any kind of implementation form of the first aspect respectively. The technical effects corresponding to the second aspect and any kind of implementation form of the second aspect can refer to the technical effects corresponding to the first aspect and any kind of implementation form of the first aspect, which will not be described here again.

[0023] In a third aspect, the embodiments of the present application provide a chassis device, comprising: a plurality of network processors (NP) and a plurality of forwarding engines (FE), each of the plurality of NP is in communication with each of the plurality of FE through a serializer-deserializer (serdes) bus, each serdes bus comprises one or more serdes links; one or more of the plurality of network processors (NP) execute one or more programs, so that the one or more NP implement the method in any one of the first aspect and any kind of implementation form of the first aspect.

[0024] In a fourth aspect, the embodiments of the present application provide a computer readable medium for storing a computer program, the computer program comprising instructions for executing the method in the first aspect or any possible implementation form of the first aspect.

[0025] In a fifth aspect, the embodiments of the present application provide a computer program, the computer program comprising instructions for executing the method in the first aspect or any possible implementation form of the first aspect.

[0026] In a sixth aspect, the embodiments of the present application provide a chip, comprising a processing circuit, a transceiver pin. Wherein, the transceiver pin and the processing circuit communicate with each other through an internal connection path, the processing circuit executes the method in the first aspect or any possible implementation form of the first aspect to control the receiving pin to receive the signal, and to control the sending pin to send the signal. BRIEF DESCRIPTION OF DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0028] Fig. 1 is an example diagram of a switching architecture of a chassis device;

[0029] Fig. 2 is a schematic diagram of a scenario of insufficient link margin of part of slots in a chassis device;

[0030] Fig. 3 is a schematic diagram of a scenario of insufficient part of link margin of slots in a chassis device;

[0031] FIG. 4 is a structural block diagram of a frame device according to an embodiment of the present application;

[0032] FIG. 5 is a structural block diagram of a frame device according to an embodiment of the present application;

[0033] FIG. 6 is a flow diagram of a frame device configuration method according to an embodiment of the present application;

[0034] FIG. 7 is an example diagram of a switching architecture of a frame device according to an embodiment of the present application;

[0035] FIG. 8 is a structural block diagram of a frame device configuration apparatus according to an embodiment of the present application. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0037] The term "and / or" in the present document is only used to describe an association relationship of associated objects, and means that there can be three relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone.

[0038] The terms "first" and "second" and the like in the specification and claims of the embodiments of the present application are used to distinguish different objects, and are not used to describe a specific order of the objects. For example, the first target object and the second target object are used to distinguish different target objects, and are not used to describe a specific order of the target objects.

[0039] In the embodiments of the present application, the words "exemplary" or "for example" are used to mean serving as an example, instance, or illustration. Any embodiment or design presented as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or advantageous than other embodiments or design solutions. Rather, the use of "exemplary" or "for example" is intended to present concepts in a concrete manner.

[0040] In the embodiments of the present application,

[0041] In the description, unless otherwise specified, "a plurality of" means two or more. For example, a plurality of processing units means two or more processing units; a plurality of systems means two or more systems.

[0042] In order to facilitate understanding of the embodiments, first, some technical terms and background technologies related to the embodiments will be introduced.

[0043] Network processor (NP): also known as service processing chip, is an integrated circuit providing high-performance networking solution. NP is specifically applied to various tasks in communication field, such as packet processing, protocol analysis, route lookup, voice / data convergence, firewall, QoS, etc., and can be regarded as a high-performance, programmable I / O device. Programmability is the difference between network processor and ASIC.

[0044] Cell: basic unit of transmission in cell switching architecture and multiplexing, composed of a header and an information segment. The header contains control information, and the information segment contains user information or other management information decomposed into data blocks.

[0045] There are two main switching architectures for frame devices, one for packet switching architecture and one for cell switching architecture. In the cell switching architecture, in order to ensure the traffic balance between LPU and each SFU, the configuration of the switching architecture of the frame device needs to strictly follow the design constraints, which affects the flexibility of the device to some extent. For example, FIG. 1 is an example diagram of a switching architecture of a frame device. As shown in FIG. 1, in the cell switching architecture, in order to consider the traffic balance between NP and FE, the following rules usually need to be followed:

[0046] (1) For each NP, the rate of serdes link between the NP and all FEs needs to be consistent. Specifically, assuming that RateMn represents the rate of serdes link between NP M and FEn, then:

[0047] The rate of serdes link between NP A and FEn satisfies: RateA0=RateA1=RateA2……=RateAn;

[0048] The rate of serdes link between NP B and FEn satisfies: RateB0=RateB1=RateB2……=RateBn;

[0049] ……;

[0050] The rate of serdes between NP B and FEn satisfies: RateM0=RateM1=RateM2……=RateMn.

[0051] (2) For each NP, the proportion of the number of serdes links between the NP and each FE is consistent with the proportion of the number of serdes links between each NP other than the NP and each FE in the chassis device. That is, the proportion of the number of all serdes links under each NP is the same. Assuming that LaneMn represents the number of serdes between NP M and FEn, then:

[0052] The proportion of the number of serdes links between NP A and FEn, the proportion of the number of serdes links between NP B and FEn, …, and the proportion of the number of serdes links between NP M and FEn satisfy:

[0053] LaneA0: LaneA1: LaneA2: …… LaneAn = LaneB0: LaneB1: LaneB2: …… LaneBn = …… LaneM0: LaneM1: LaneM2: …… LaneMn.

[0054] In a specific application, the customer is likely to have an upgrade or expansion demand for the chassis device, at which time the chassis device is required to support a higher-capacity line card, and the serdes link between the LPU and the SFU needs to be upgraded to a higher rate, and a higher rate requires higher performance of the backplane and other hardware. However, the existing network device, i.e., the chassis device already put into use by the customer, is limited by the performance of the backplane and other hardware, and the chassis device is likely to have insufficient high-speed margin for part of the slots or part of the links. At this time, under the configuration described in the embodiment of FIG. 1, the chassis device must achieve full-link high-speed upgrade, but when the high-speed margin of part of the slots or part of the links is insufficient, the high-speed upgrade of this part of the links cannot be performed, so that full-link high-speed upgrade cannot be achieved, and the chassis device cannot be upgraded or expanded.

[0055] In one example, FIG. 2 is a schematic diagram of a scenario in which the link margin of part of the slots in the chassis device is insufficient. As shown in FIG. 2, the high-speed margin of part of the slots of the links A0 and B0 indicated by the dashed line in FIG. 2 is insufficient, and the serdes link cannot be upgraded to a higher rate, so that the entire system cannot be upgraded to a higher rate, and the device capacity cannot be improved. In one example, FIG. 3 is a schematic diagram of a scenario in which part of the link margin of the slots in the chassis device is insufficient. As shown in FIG. 3, the high-speed margin of part of the links of a certain slot and part of the links of another slot is insufficient, and the serdes link cannot be upgraded to a higher rate, so that the entire system cannot be upgraded to a higher rate, and the device capacity cannot be improved.

[0056] It can be seen that in the above exchange architecture for cells, the cell distribution between the NP and the FE is performed according to the number of links. If the links between the same NP and the various FE fabrics in the system are operated at different rates, due to the different bandwidth capabilities of the serdes links at different rates, uneven distribution will occur in the process of distributing cells according to the number of links, resulting in bandwidth waste or congestion. Therefore, in the above embodiments of FIG. 1 to FIG. 3, it is required that all serdes links corresponding to the same NP need to be operated at the same rate. This leads to the fact that the chassis device is easily affected by the insufficient high-speed margin of part of the links and cannot be expanded.

[0057] To the above situation, the embodiment of the present application provides a chassis device configuration method. In the method, the routing distribution weight is configured based on the bandwidth of the serdes link under the serdes bus, which is used to indicate the allocation proportion of the data distribution task of each serdes link between the NP and the FE. By configuring the routing distribution weight for each serdes bus between the NP and the FE, it can be ensured that in the case that the bandwidth of each serdes link between the NP and the FE is different, that is, the mixed rate, when the cell distribution is performed according to the routing distribution weight configured based on the bandwidth of the serdes bus, the ratio of the exchange bandwidth of each NP to each FE in the chassis device, that is, the used bandwidth of the different serdes buses, remains consistent, thereby meeting the balanced use of the bandwidth of each serdes bus and achieving the effect that the serdes links between each NP and each FE of the chassis device can be operated at different bandwidths, that is, at a mixed rate. Under such configuration, the chassis device that can operate at a mixed rate can realize the upgrade or expansion of the entire chassis device without the need for full-link high-speed upgrade, thereby avoiding the problem that the chassis device cannot be upgraded or expanded due to the limitation of the serdes link with insufficient high-speed margin.

[0058] Before the technical solutions of the embodiments of the present application are described, the application scenarios of the embodiments of the present application will be described first in combination with the accompanying drawings. For example, FIG. 4 is one of the structural block diagrams of a chassis device provided by the embodiments of the present application. As shown in FIG. 4, the chassis device configuration method can be used to configure a chassis device such as a routing device, a switch, etc. Specifically, the method can include a plurality of network processors (NP) and a plurality of forwarding engines (FE). Each NP in the plurality of NPs is in communication with each FE in the plurality of FEs through a serializer-deserializer (serdes) bus. Each serdes bus includes one or more serdes links.

[0059] In an example, the serdes bus can include a plurality of pairs of serial buses as shown in FIG. 4. The plurality of pairs of serial buses can be used for uplink communication from the NP to the FE or downlink communication from the FE to the NP, or the plurality of pairs of serial buses are respectively used for the uplink communication and the downlink communication, which can be determined according to application requirements, and embodiments of the present application do not limit this.

[0060] Embodiments of the present application, for uplink communication and downlink communication between the NP and the FE, the difference lies in the data transmission direction, therefore, both can apply the present scheme, thereby expanding the use scenario of the present scheme.

[0061] In another example, the chassis device can include a plurality of line processing units LPU and a plurality of switching fabric units SFU. Each LPU can include one or more NPs, and each SFU can include one or more FEs. Embodiments of the present application do not limit the specific number of NPs in the LPU, and do not limit the specific number of FEs in the SFU, which can be set according to application requirements.

[0062] For example, FIG. 5 is a structural block diagram of a chassis device provided by an embodiment of the present application. As shown in FIG. 5, the chassis device 200 includes a memory 201, a processor 202, an interface 203 (physical interface), and a power module 204. The interface 203 (physical interface) includes but is not limited to a local area network interface (LAN interface), a wide area network interface (WAN interface), and a chassis device configuration interface. The chassis device configuration interface can include a console port and an auxiliary port. The processor 202 is connected to the terminal through the interface 203. The number of local area network interfaces, wide area network interfaces, and chassis device configuration interfaces is not limited to one. The types of local area network interfaces (LAN interfaces) 3030 include standard network interfaces such as Ethernet, Fast Ethernet, Gigabit Ethernet, and 10 Gigabit Ethernet M. In each network, different media standards interfaces can be supported, such as RJ45 interface, fiber interface, and thick coaxial cable interface. The chassis device 200 can be connected to the terminal through the RJ45 interface to realize data communication with the terminal. The wide area network interface has a synchronous serial interface and an asynchronous serial interface. The chassis device 200 is connected to the wide area network through the WAN interface to realize a wide area network data communication network across regions. The console port Console is usually used to connect the interface with the terminal through a special connection line when performing basic configuration on the chassis device 200. As the console port enables users or administrators to communicate with the chassis device 200 using network devices to complete the configuration of the chassis device, and as the auxiliary port also provides an EIA / TIA-232 asynchronous serial interface, which is usually used to connect a modem to realize remote management of the chassis device.

[0063] In some embodiments of the present application, the memory 201 can employ a non-volatile memory, a random access memory, a flash memory, and a read-only memory.

[0064] The processor 202 can include one or more processing units, for example: the processor 202 can include a network processor (NP), an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units can be independent devices or integrated in one or more processors. The controller can be the nerve center and command center of the frame device 200. The controller can generate operation control signals according to instruction operation codes and timing signals, and complete the control of fetching and executing instructions.

[0065] The power module 204 can include a power supply, a power management component, etc. The power management component is used to manage the charging of the power supply and the power supply to other modules.

[0066] Optionally, for a wireless frame device, the frame device 200 shown in FIG. 5 also has a wireless communication module (not shown in FIG. 5). So that the wireless frame device can realize wireless communication. The wireless communication module can provide a wireless communication solution applied on the terminal, including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) network), blue tooth (BT), near field communication (NFC), infrared technology (IR), etc. The wireless communication module can be one or more devices integrated with at least one communication processing module.

[0067] The wireless communication module can provide a solution for wireless communication applied to the frame device 200, including WLAN such as Wi-Fi, BT, global navigation satellite system (GNSS), frequency modulation (FM), NFC, IR, and the like. The wireless communication module can be one or more devices integrated with at least one communication processing module.

[0068] It can be understood that the interface connection relationship between the modules shown in the embodiments of the present application is only illustrative and does not constitute a structural limitation of the frame device 200. In other embodiments of the present application, the frame device 200 can also use different interface connection modes or combinations of multiple interface connection modes in the above embodiments. In specific applications, the frame device 200 can be an electronic device running a network operating system involved in human-computer interaction such as a router, a switch, and the like in a network communication scenario.

[0069] In one example, the execution subject of the frame device configuration method provided by the embodiments of the present application can be the frame device shown in FIG. 4 or FIG. 5, specifically, a processor such as NP in the frame device, or a controller, CPU, main processing unit (MPU), and the like different from NP in the frame device. In another example, the execution subject of the frame device configuration method provided by the embodiments of the present application can be a client such as a terminal tool for managing the frame device, a network management device, and the like in communication with the frame device. Specifically, the client can be an electronic device such as a computer, a mobile terminal, a server, and the like, or the client can be software installed on these electronic devices for managing the frame device.

[0070] The frame device configuration method provided by the embodiments of the present application will be described in detail below in combination with FIG. 6 to FIG. 7 and FIG. 3.

[0071] For example, FIG. 6 is a flowchart of a frame device configuration method provided by an embodiment of the present application. As shown in FIG. 6, the frame device configuration method is used to configure the frame device shown in FIG. 4 or FIG. 5, and the method specifically can include:

[0072] S601, obtaining the number of each serdes link and the bandwidth of each serdes link under each serdes bus corresponding to each NP.

[0073] In a specific application, when the execution subject of the frame device configuration method is the client, the client can request the frame device for the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link, or read the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link provided by the manufacturer of the frame device through a database. When the execution subject of the frame device configuration method is the frame device itself, the frame device can obtain the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link through an interface, or read the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link pre-stored.

[0074] The embodiments of the present application do not limit the specific way of obtaining the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link, and any way that can obtain the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link in a specific scenario can be used in the frame device configuration method provided by the embodiments of the present application.

[0075] S602, according to the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link and the bandwidth equal ratio rule, configure the routing distribution weight of the serdes link under the serdes bus corresponding to each NP; wherein the bandwidth equal ratio rule is used to indicate that the ratio of the bandwidths of the serdes buses corresponding to the plurality of NPs is equal, and the routing distribution weight of the serdes link under the serdes bus corresponding to the NP is used to indicate the proportion of the data distribution task allocated to the serdes link under the serdes bus in the data distribution task of the NP.

[0076] In an optional implementation, the above-mentioned configuring the routing distribution weight of the serdes link under the serdes bus corresponding to each NP according to the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link and the bandwidth equal ratio rule can specifically include:

[0077] According to the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link, obtain the bandwidth of the serdes bus corresponding to each of the plurality of NPs and the total bandwidth of the serdes bus corresponding to each of the plurality of NPs;

[0078] For each serdes bus corresponding to the NP, the ratio of the bandwidth of the serdes bus corresponding to the NP to the total bandwidth of the serdes bus corresponding to the NP is calculated to obtain the routing distribution weight of the serdes link under the serdes bus corresponding to each NP.

[0079] For example, FIG. 7 is an example diagram of a switching architecture of a frame device provided by an embodiment of the present application. As shown in FIG. 7, it is assumed that there are Mn_0, Mn_1, …, Mn_x types of serdes links under the serdes bus between NP M and FEn. For example, there are serdes link A0_0 to serdes link A0_x under the serdes bus A0 between NP A and FE0, and the serdes buses corresponding to NP A include A0, A1, …, and An. The number of links of the Mn_x type is marked as LaneMn_x, the bandwidth of the link of the Mn_x type is marked as RateMn_x, and the routing distribution weight of the link of the Mn_x type is marked as RouterMn_x.

[0080] For example, the ratio between the bandwidth of the link bus of each FE, for example, FE0 to FEn, and NP A is equal to the ratio between the bandwidth of the link bus of each FE, for example, FE0 to FEn, and NP B:

[0081] The routing distribution weight of the serdes link bus of each FE, for example, FE0 to FEn, and NP A, that is, the ratio of the bandwidth of each serdes link bus corresponding to NP A to the total bandwidth of all serdes link buses corresponding to NP A, that is, the proportion of the bandwidth of the serdes link bus corresponding to NP A in the total bandwidth of all serdes link buses corresponding to NP A is the routing distribution weight of the serdes link bus corresponding to NP A. For example:

[0082] The routing distribution weight of the serdes link corresponding to NP A, RouterA0_0, is

[0083] (RateA0_0*LaneA0_0) / [(RateA0_0*LaneA0_0+RateA0_1*LaneA0_1+RateA0_2*LaneA0_2+

[0084] …+RateA0_X*LaneA0_X)+(RateA1_0*LaneA1_0+RateA1_1*LaneA1_1+RateA1_2*LaneA1_2+

[0085] …+RateA1_X*LaneA1_X)+

[0086] … + (RateAn_0*LaneAn_0 + RateAn_1*LaneAn_1 + RateAn_2*LaneAn_2… + RateAn_X*LaneAn_X)].

[0087] It can be understood that the symbol "*" in the embodiments of the present application represents multiplication operation, which will not be described subsequently. The routing distribution weight of the serdes bus corresponding to the NP M can be constructed similarly to the above example, and the difference lies in that the specific parameters of the serdes link under the serdes bus corresponding to the NP are different. For the same part, refer to the examples of NP A and NP B above, which will not be described here.

[0088] Based on the above example, when the frame device is configured, the ratio of the switching bandwidth of each NP to each FE is kept consistent: for the uplink of NP to FE, different routing distribution weights are configured for the serdes links under the serdes buses of different bandwidths. The routing distribution weights of the serdes links under the serdes buses of different bandwidths are in a proportional relationship with the bandwidths of the serdes links under the serdes buses of different bandwidths. Therefore, the ratio of the link bandwidths used when the cells are distributed based on the routing distribution weights, that is, the ratio of the switching bandwidths, also satisfies the bandwidth proportional rule, that is, the ratio of each switching bandwidth is equal. For the downlink of FE to NP, different routing distribution weights are configured for the serdes links under the serdes buses of different bandwidths. The routing distribution weights of the serdes links under the serdes buses of different bandwidths are in a proportional relationship with the bandwidths of the serdes links under the serdes buses of different bandwidths. Therefore, the ratio of the link bandwidths used when the cells are distributed based on the routing distribution weights, that is, the ratio of the switching bandwidths, also satisfies the bandwidth proportional rule, that is, the ratio of each switching bandwidth is equal. In this way, the bandwidth usage of different serdes buses can be balanced, and waste or congestion can be avoided.

[0089] In the embodiments of the present application, the bandwidth of the serdes bus is the sum of the bandwidths of the serdes links under the serdes bus. Therefore, the bandwidth of the serdes bus can be obtained by the bandwidth of each serdes link under the serdes bus and the number of each serdes link, and then the proportion of the serdes bus in the total bandwidth of all serdes buses corresponding to the corresponding NP is obtained by using the bandwidth of the serdes bus, and the routing distribution weight of the serdes bus is obtained.

[0090] In an implementation, after configuring the routing distribution weight for the serdes bus corresponding to each NP according to the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP and the bandwidth equal ratio rule, the frame device configuration method provided by the embodiment of the application can further include:

[0091] If there is a faulty serdes link in one or more serdes links, the loss bandwidth of the serdes bus to which the faulty serdes link belongs is obtained according to the bandwidth of the serdes link of the type to which the faulty serdes link belongs and the number of the serdes link of the type, the isolation bandwidth of the serdes bus corresponding to the second NP is determined according to the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP and the bandwidth equal ratio rule, the first NP includes the NP corresponding to the faulty serdes link, and the second NP includes the NP different from the first NP in the frame device; and the serdes link with a bandwidth matching the isolation bandwidth in all serdes links corresponding to the second NP is isolated.

[0092] In an implementation, the isolation bandwidth of the serdes bus corresponding to the second NP can be determined according to the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP and the bandwidth equal ratio rule, and specifically can include:

[0093] According to the bandwidth equal ratio rule, an equation relationship between the first ratio and the second ratio is constructed, the first ratio includes the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP, and the second ratio includes the ratio between the isolation bandwidth of the serdes bus corresponding to the second NP and the total bandwidth of all serdes buses corresponding to the second NP;

[0094] The isolation bandwidth of the serdes bus corresponding to the second NP is solved from the equation relationship.

[0095] According to the bandwidth equal ratio rule, the embodiment of the application can obtain the isolation bandwidth by equating the ratio between the loss bandwidth of the serdes bus corresponding to the first NP and the total bandwidth of all serdes buses corresponding to the first NP to the ratio between the isolation bandwidth of the serdes bus corresponding to the second NP and the total bandwidth of all serdes buses corresponding to the second NP.

[0096] For example, assuming that the bandwidths of the serdes links between the NP and the FEs are the same, such as RateMn, in the frame device. There are Mn0, Mn1, …, Mn types of serdes links between the NP M and the FEs, where the number of links of the Mn_x type is marked as LaneMn, and the routing distribution weight of the links of the Mn type is marked as RouterMn.

[0097] When the frame device is in normal operation, such as in the scenario described in the embodiment of FIG. 7, the bandwidth equal ratio rule is satisfied: (RateA0*LaneA0) : (RateA1*LaneA1) : (RateA2*LaneA2) : … : (RateAn*LaneAn) = (RateB0*LaneB0) : (RateB1*LaneB1) : (RateB2*LaneB2) : … : (RateBn*LaneBn).

[0098] Referring to FIG. 3, when a faulty link, such as the faulty link LaneAn_X shown by the dashed line, occurs in the serdes link between the first NP, such as NP A, and the FEs, the bandwidth of the link lost between NP A and the FEs is RateAn*LaneAn_X, and the normal available bandwidth of the link between NP A and the FEs is BandAn = RateAn*LaneAn-RateAn*LaneAn_X. The ratio of the link bandwidth lost between NP A and the FEs to the total bandwidth is:

[0099] (RateAn*LaneAn_X) / [(RateA0*LaneA0)+(RateA1*LaneA1)+(RateA2*LaneA2)+ … (RateAn*LaneAn)]

[0100] The ratio is transmitted to the second NP, that is, the opposite end NP of the faulty link, such as NP M. NP M isolates the corresponding link bandwidth based on the link bandwidth ratio, that is, the isolated bandwidth ISOBank Mn:

[0101] Correspondingly, based on the routing distribution weight of the serdes bus under the above equal ratio relationship, it can be ensured that the exchange bandwidth of each NP to each FE, that is, the ratio of the bandwidths used by different serdes buses, remains consistent when performing cell distribution, thereby meeting the requirement that the bandwidth of each serdes link is used evenly.

[0102] In the scenario where the bandwidths of the serdes links between each NP and FE are different, i.e., the effect of mixed rates, is realized by the routing distribution weight based on the bandwidth configuration of the serdes link, if part of the serdes links in the frame device is in failure, based on the bandwidth equal ratio relationship, the loss bandwidth of the failure link and the ratio of the total bandwidth of the serdes bus corresponding to the NP connected by the failure link to the total bandwidth of all the serdes buses connected by the NP, the bandwidth of the remaining NP connected isolation link can be obtained, and the bandwidth of the remaining NP connected isolation link is isolated, so that the bandwidth of the serdes link between each NP and FE remains equal ratio, thereby solving the problem of uneven distribution of data caused by partial link abnormality, and ensuring that the scheme is applicable to the scenario of partial link failure.

[0103] In one example, the embodiment of the present application also provides a frame device configuration apparatus. FIG. 8 is a structural block diagram of a frame device configuration apparatus provided by an embodiment of the present application. As shown in FIG. 8, the apparatus is used for configuring a frame device, and the frame device includes a plurality of network processors (NPs) and a plurality of forwarding engines (FEs). Each NP in the plurality of NPs is in communication with each FE in the plurality of FEs through a serializer and deserializer (serdes) bus. Each serdes bus includes one or more serdes links. The apparatus includes:

[0104] A parameter acquisition module, configured to acquire the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link.

[0105] A device configuration module, configured to configure a routing distribution weight for the serdes bus corresponding to each NP according to the number of each serdes link under the serdes bus corresponding to each NP, the bandwidth of each serdes link, and a bandwidth equal ratio rule. The bandwidth equal ratio rule is used to indicate that the ratios of the bandwidths of the serdes buses corresponding to the plurality of NPs are equal. The routing distribution weight of the serdes bus corresponding to the NP is used to indicate the proportion of the data distribution task allocated to the serdes bus in the data distribution task of the NP.

[0106] Wherein, all the related contents of the steps involved in the method embodiment can be cited to the function description of the corresponding function module, which will not be repeated here.

[0107] In addition, the frame device shown in FIG. 4 and FIG. 5 and the apparatus shown in FIG. 8 according to the present application can include corresponding hardware and / or software modules for performing the functions of the frame device configuration method according to the embodiments of the present application. The algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in hardware or a combination of hardware and computer software. Whether a certain function is performed in hardware or computer software driven hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in conjunction with the embodiments, but such implementation should not be considered beyond the scope of the present application.

[0108] The embodiments of the present application also provide a computer storage medium, which stores computer instructions. When the computer instructions are run on an electronic device, the electronic device performs the related method steps described above to implement the frame device configuration method according to the embodiments described above.

[0109] The embodiments of the present application also provide a computer program product, which, when run on a computer, causes the computer to perform the related steps described above to implement the frame device configuration method according to the embodiments described above.

[0110] The electronic device, computer storage medium, computer program product or chip provided by the embodiments of the present application are used to perform the corresponding methods provided above, and thus the beneficial effects achieved thereby can refer to the beneficial effects of the corresponding methods provided above, which will not be described here again.

[0111] Any content of each embodiment of the present application, and any content of the same embodiment, can be freely combined. Any combination of the above is within the scope of the present application.

[0112] Those skilled in the art should realize that the functions described in the embodiments of the present application in one or more examples above can be implemented in hardware, software, firmware or any combination thereof. When implemented in software, these functions can be stored in a computer readable medium or transmitted as one or more instructions or codes on a computer readable medium. The computer readable medium includes computer storage medium and communication medium, wherein the communication medium includes any medium that facilitates the transfer of computer programs from one place to another. The storage medium can be any available medium accessible by a general or special purpose computer.

[0113] The embodiments of the present application are described above with reference to the accompanying drawings, but the present application is not limited to the specific embodiments described above, and the specific embodiments described above are merely illustrative, but not restrictive, and a person of ordinary skill in the art can make many forms under the inspiration of the present application without departing from the purpose of the present application and the scope protected by the claims.

Claims

1. A method of configuring a frame device, characterized by, The frame device includes a plurality of network processors (NP) and a plurality of forwarding engines (FE), each of the plurality of NP is in bus communication with each of the plurality of FE through a serializer-deserializer (serdes) bus, each serdes bus includes one or more serdes links, and the method includes: obtaining the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP; configuring a routing distribution weight for the serdes link under the serdes bus corresponding to each NP according to the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP and a bandwidth equal ratio rule; The bandwidth equal ratio rule is used to indicate that the ratio of the bandwidths of the serdes buses corresponding to the plurality of NP is equal, and the routing distribution weight of the serdes bus corresponding to the NP is used to indicate the proportion of the data distribution task allocated to the serdes link under the serdes bus in the data distribution task of the NP.

2. The method of claim 1, wherein, The method further includes: obtaining the bandwidth of each serdes bus corresponding to the plurality of NP and the total bandwidth of each serdes bus corresponding to the plurality of NP according to the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP; calculating the ratio of the bandwidth of the serdes bus corresponding to the NP to the total bandwidth of each serdes bus corresponding to the NP for each serdes bus corresponding to the NP to obtain the routing distribution weight of the serdes link under the serdes bus corresponding to each NP.

3. The method according to claim 1 or 2, characterized in that, The method further includes: if there is a faulty serdes link in the one or more serdes links, obtaining the loss bandwidth of the serdes bus to which the faulty serdes link belongs according to the bandwidth of the serdes link of the type to which the faulty serdes link belongs and the number of the serdes link of the type. determining an isolation bandwidth of a serdes bus corresponding to a second NP according to a ratio between a loss bandwidth of the serdes bus and a total bandwidth of all serdes buses corresponding to a first NP and a bandwidth equal ratio rule, the first NP including a NP corresponding to the faulty serdes link, the second NP including a NP different from the first NP in the chassis device; isolating a serdes link in all serdes links corresponding to the second NP and having a bandwidth matching the isolation bandwidth.

4. The method of claim 3, wherein, The method according to the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP and the bandwidth equal ratio rule, the isolation bandwidth of the serdes bus corresponding to the second NP includes: According to the bandwidth equal ratio rule, an equation relationship between a first ratio and a second ratio is constructed, the first ratio including a ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP, the second ratio including a ratio between the isolation bandwidth of the serdes bus corresponding to the second NP and the total bandwidth of all serdes buses corresponding to the second NP; The isolation bandwidth of the serdes bus corresponding to the second NP is solved from the equation relationship.

5. The method according to any one of claims 1 to 4, characterized in that, Each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and a deserializer serdes bus, including: Each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and a deserializer serdes bus for uplink communication from the NP to the FE or downlink communication from the FE to the NP.

6. A frame device configuration apparatus characterized by comprising: An apparatus for configuring a chassis device, the chassis device including a plurality of network processors NPs and a plurality of forwarding engines FEs, each NP in the plurality of NPs respectively communicating with each FE in the plurality of FEs through a serializer and a deserializer serdes bus, each serdes bus including one or more serdes links, the apparatus including: A parameter acquisition module configured to acquire a number of each serdes link and a bandwidth of each serdes link under a serdes bus corresponding to each NP; A device configuration module configured to configure a routing distribution weight for a serdes link under the serdes bus corresponding to each NP according to the number of each serdes link and the bandwidth of each serdes link under the serdes bus corresponding to each NP and a bandwidth equal ratio rule; The bandwidth equal ratio rule is used to indicate that ratios between bandwidths of respective serdes buses corresponding to the plurality of NPs are equal, and the routing distribution weight of the serdes bus corresponding to the NP is used to indicate a proportion of data distribution tasks allocated to the serdes link under the serdes bus in data distribution tasks of the NP.

7. The apparatus of claim 6, wherein, The device configuration module is specifically configured to: According to the number of each serdes link under the serdes bus corresponding to each NP and the bandwidth of each serdes link, the bandwidth of each serdes bus corresponding to the plurality of NPs respectively and the total bandwidth of each serdes bus corresponding to the plurality of NPs respectively are obtained; For each serdes bus corresponding to each NP, the ratio of the bandwidth of the serdes bus corresponding to the NP to the total bandwidth of each serdes bus corresponding to the NP is calculated to obtain the routing distribution weight of the serdes link under the serdes bus corresponding to each NP.

8. The apparatus of claim 6 or 7, wherein, The device configuration module is further configured to: After the routing distribution weight of the serdes bus corresponding to each NP is configured according to the number of each serdes link under the serdes bus corresponding to each NP, the bandwidth of each serdes link and the bandwidth equal ratio rule, if there is a faulty serdes link in the one or more serdes links, the loss bandwidth of the serdes bus to which the faulty serdes link belongs is obtained according to the bandwidth of the serdes link of the type to which the faulty serdes link belongs and the number of the serdes link of the type; According to the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP and the bandwidth equal ratio rule, the isolation bandwidth of the serdes bus corresponding to the second NP is determined, the first NP includes the NP corresponding to the faulty serdes link, and the second NP includes the NP different from the first NP in the frame device; The serdes link with a bandwidth matching the isolation bandwidth in all serdes links corresponding to the second NP is isolated.

9. The apparatus of claim 8, wherein, The device configuration module is specifically configured to: According to the bandwidth equal ratio rule, an equation relationship between a first ratio and a second ratio is constructed, the first ratio includes the ratio between the loss bandwidth of the serdes bus and the total bandwidth of all serdes buses corresponding to the first NP, and the second ratio includes the ratio between the isolation bandwidth of the serdes bus corresponding to the second NP and the total bandwidth of all serdes buses corresponding to the second NP; The isolation bandwidth of the serdes bus corresponding to the second NP is solved from the equation relationship.

10. The apparatus of any one of claims 6 to 9, wherein, Each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and deserializer (serdes) bus, including: Each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and deserializer (serdes) bus for uplink communication from the NP to the FE or downlink communication from the FE to the NP.

11. A frame device, characterized by Including: A plurality of network processors (NPs) and a plurality of forwarding engines (FEs), each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and deserializer (serdes) bus, and each serdes bus includes one or more serdes links; Each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and deserializer (serdes) bus for uplink communication from the NP to the FE or downlink communication from the FE to the NP. Including: A plurality of network processors (NPs) and a plurality of forwarding engines (FEs), each NP in the plurality of NPs respectively communicates with each FE in the plurality of FEs through a serializer and deserializer (serdes) bus, and each serdes bus includes one or more serdes links; One or more of the plurality of network processors NP execute one or more programs such that the one or more NPs implement the method of any of claims 1 to 5.

12. A computer-readable storage medium, characterized in that, A computer program product comprising a computer program, wherein the computer program, when executed on an electronic device, causes the electronic device to perform the method of any of claims 1 to 5.

13. A chip, characterized by An electronic device comprising one or more interface circuits and one or more processors; the interface circuits configured to receive signals from a memory of the electronic device and send the signals to the processors, the signals comprising computer instructions stored in the memory; the computer instructions, when executed by the processors, causing the electronic device to perform the method of any of claims 1 to 5.

14. A computer program product, characterised in that, A computer program, when executed by an electronic device, causes the electronic device to perform the method of any of claims 1 to 5.

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