LED package
The LED package improves infrared light extraction efficiency by using a high-reflectivity substrate surface and conductive regions to redirect light away from the substrate, addressing the inefficiencies in existing infrared LED packaging.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-08-26
- Publication Date
- 2026-04-09
AI Technical Summary
Infrared LED elements with wavelengths of 1000 nm or more face challenges in light extraction efficiency, particularly due to the significant decrease in light output with increasing temperature, and existing technologies do not provide effective packaging solutions.
An LED package design featuring a flip-chip mounted LED chip on an insulating substrate with conductive regions, through electrodes, and a first light-reflecting region on the substrate surface made of high-reflectivity material, eliminating bonding wires and optimizing light extraction paths.
Enhances infrared light extraction efficiency by reflecting light away from the substrate surface and directing it towards the light extraction surface, reducing the need for bonding wires and enabling a smaller, low-profile package.
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Figure JP2025029927_09042026_PF_FP_ABST
Abstract
Description
LED package
[0001] This invention relates to an LED package on which an LED chip is mounted, and more particularly to an LED package that emits infrared light.
[0002] In recent years, semiconductor light-emitting devices that emit light in the infrared region with wavelengths of 1000 nm or more have been widely used in applications such as security and surveillance cameras, gas detectors, medical sensors, and industrial equipment.
[0003] Semiconductor light-emitting devices with emission wavelengths of 1000 nm or more are generally manufactured using the following procedure: A first conductivity type semiconductor layer, an active layer (sometimes called the "emission-emitting layer"), and a second conductivity type semiconductor layer are sequentially epitaxially grown on an InP substrate as a growth substrate. Then, electrodes for current injection are formed on the semiconductor wafer. After that, the wafer is cut into chip shapes.
[0004] Traditionally, the development of semiconductor laser elements has taken precedence among semiconductor light-emitting devices with emission wavelengths of 1000 nm or more. On the other hand, LED elements have not progressed as much as laser elements, partly because their applications have been limited.
[0005] However, in recent years, with the expansion of applications, there has been a growing demand for high-efficiency infrared LED elements. The applicant has previously proposed technology for infrared LED elements with emission wavelengths of 1000 nm or more that exhibit high light extraction efficiency (see Patent Document 1).
[0006] Japanese Patent Publication No. 2022-65415
[0007] LED elements are sometimes packaged and used while mounted on a substrate. Patent Document 1 mentions the structure of an infrared LED element, i.e., the structure as an LED chip, but does not provide detailed information about the package.
[0008] Various research and development efforts have been made to improve the light extraction efficiency of visible light LEDs. Visible light LEDs generate blue light using nitride-based (GaN-based) semiconductors, and then convert a portion of the blue light's wavelength through a phosphor to produce visible light. GaAs-based semiconductors are also often used for red light LEDs.
[0009] In contrast, to obtain infrared light with a peak wavelength exceeding 1,000 nm, InP-based semiconductors are used. However, InP-based semiconductors have the drawback of exhibiting a significant decrease in light output with increasing temperature compared to GaN-based and GaAs-based semiconductors. For example, comparing GaN-based and InP-based semiconductors, the ratio of light output at 85°C to light output at 25°C is maintained at approximately 90% for a GaN-based LED with a peak wavelength of 450 nm, while it drops to approximately 20% for an InP-based LED with a peak wavelength of 1,650 nm. Therefore, for LEDs emitting infrared light with a peak wavelength exceeding 1,000 nm, it is even more important to improve the light extraction efficiency compared to visible light LEDs.
[0010] In view of the above problems, the present invention aims to provide an LED package that can extract infrared light emitted from an LED chip to the outside with higher efficiency than conventional methods.
[0011] The LED package according to the present invention is an LED package including an LED chip that emits infrared light with a peak wavelength of 1,000 nm to 2,000 nm, comprising: a substrate made of an insulating material on which the LED chip is flip-chip mounted; a pair of first conductive regions formed spaced apart from each other on the first surface of the substrate on the LED chip side, and each contacting the anode electrode and cathode electrode of the LED chip separately via a conductive bonding member, each comprising a first conductive region on the anode electrode side and a first conductive region on the cathode electrode side; a pair of through electrodes formed by penetrating the substrate at spaced-apart positions and each contacting the pair of first conductive regions separately, each comprising a through electrode on the anode electrode side and a through electrode on the cathode electrode side; and a pair of second conductive regions formed spaced apart from each other on the second surface of the substrate opposite to the first surface, and each contacting the pair of through electrodes separately, each comprising a second conductive region on the anode electrode side and a second conductive region on the cathode electrode side. The present invention is characterized by comprising a first light-reflecting region formed on the first surface of the substrate at a position at least outside the LED chip, as viewed from the side of the first surface of the substrate in the direction normal to the first surface, and made of a material with higher reflectivity to infrared light than the substrate.
[0012] The expression "a pair of first conductive regions" is used to mean that the "first conductive region" consists of an "anode electrode side first conductive region" that is electrically connected to the anode electrode of the LED chip, and a "cathode electrode side first conductive region" that is electrically connected to the cathode electrode of the LED chip. In other words, the notation "a pair" here indicates that there is a pair in the sense of "anode electrode side" and "cathode electrode side," and is not intended to limit the number to two. For example, if the "anode electrode side first conductive region" that is electrically connected to the anode electrode of the LED chip is formed in two places on the first surface of the substrate, and the "cathode electrode side first conductive region" that is electrically connected to the cathode electrode of the LED chip is formed at a location on the first surface of the substrate that is spaced apart from the "anode electrode side first conductive region," then there are three first conductive regions in total, but since there is a pair in the sense of "anode electrode side" and "cathode electrode side," these are considered "a pair of first conductive regions."
[0013] The expressions "a pair of through electrodes" and "a pair of second conductive regions" convey a similar meaning, both indicating that they are a pair in the sense of "anode electrode side" and "cathode electrode side."
[0014] Flip-chip mounting is a method of mounting an LED chip, in which a semiconductor is formed on the upper layer of a substrate, onto a substrate via a conductive bonding member, with the substrate inverted so that it faces away from the base.
[0015] In LED packages where the LED chip is mounted using a flip-chip design, light is extracted toward the opposite side of the substrate (the substrate side). Hereafter, this region will be referred to as the "light extraction surface."
[0016] Most of the infrared light generated by an LED chip travels towards the light extraction surface, but some infrared light may travel in a different direction. For example, there may be infrared light emitted from the side of the LED chip that travels along the first surface of the substrate. Here, when we say that infrared light "travels along the first surface of the substrate," we do not mean that it "travels in a direction parallel to the first surface of the substrate," but rather that the vector component parallel to the first surface of the substrate is larger than the vector component perpendicular to the first surface of the substrate. In short, infrared light emitted from the side of the LED chip spreads out in a direction parallel to the first surface of the substrate, with some of it traveling towards the light extraction surface and other parts traveling towards the first surface of the substrate.
[0017] Of the infrared light emitted from the side of the LED chip, the former is directed towards the light extraction surface, so it can be guided to the utilization optical system by, for example, installing an optical system at a later stage to focus the light. On the other hand, the latter is directed towards the first surface of the substrate, so it cannot be directed towards the light extraction surface and therefore cannot be guided to the utilization optical system.
[0018] In contrast, with the LED package structure described above, a region (first light reflection region) made of a material with higher reflectivity to infrared light than the substrate is formed on the first surface of the substrate, i.e., the surface on which the LED chip is mounted, outside the LED chip. Therefore, even infrared light that is emitted from the side of the LED chip and travels toward the first surface of the substrate can be reflected by the first light reflection region and guided toward the light extraction surface. This improves the light extraction efficiency.
[0019] Incidentally, in the LED package with the above structure, each of the pair of first conductive regions formed on the first surface of the substrate is individually connected to a pair of electrodes (anode electrode and cathode electrode) of the LED chip via a conductive bonding member. On the second surface of the substrate, opposite to the first surface, a pair of second conductive regions are formed at mutually separated positions, and the pair of first conductive regions and the pair of second conductive regions are connected by a pair of through electrodes that penetrate the substrate at different locations. Therefore, by bringing the second surface of the substrate into contact with a predetermined energizing region at the installation location of the LED package, a voltage can be applied to the LED chip from the second surface side of the substrate via the pair of through electrodes and the pair of first energizing regions. In other words, with the LED package with the above configuration, bonding wires for energization are unnecessary.
[0020] If infrared light is emitted from the side of the LED chip and travels toward the first surface of the substrate, and a bonding wire is present, this bonding wire may be in the path of the infrared light. Therefore, even if a reflector is provided on the first surface of the substrate, the amount of light incident on the reflector and the amount of infrared light reflected by the reflector may be reduced due to the presence of the bonding wire.
[0021] In contrast, as described above, by using a package that does not require bonding wires, bonding wires are no longer present in the optical path from when infrared light emitted from the side of the LED chip reaches the first light reflection region formed in the area outside the LED chip on the first surface of the substrate, nor in the optical path from when the light is reflected in the first light reflection region and travels towards the light extraction surface. As a result, the light extraction efficiency can be improved.
[0022] Furthermore, with the LED package structure described above, bonding wires are unnecessary, eliminating the need to allocate space for routing them. As a result, a smaller, low-profile LED package can be realized.
[0023] The material constituting the substrate is selected from materials that have insulating properties and preferably high thermal conductivity. Typically, the substrate is composed of aluminum nitride. Other examples of materials constituting the substrate include ceramics such as aluminum oxide, zirconium oxide, silicon oxide, silicon carbide, and silicon nitride, as well as resin-containing materials such as glass epoxy (a material made by solidifying a glass fiber laminate with epoxy resin), polyamide resins, and polyimide resins. Furthermore, the substrate may consist of a mixture of two or more of the materials listed above, or a small amount of other substances may be mixed in addition to the listed materials (main substances).
[0024] The first light-reflecting region is made of a material that has higher reflectivity to infrared light than the substrate. Typically, the first light-reflecting region is made of a metallic material. In this case, it is preferable that the outer edge of the first light-reflecting region is located further inward and spaced further away from the outer edge of the first surface of the substrate. This prevents short circuits.
[0025] The first conductive region is made of a material containing Au, extends outward from the LED chip when viewed from the side of the first surface of the substrate in the direction normal to the first surface, and the first light reflective region may be formed at least in part by the first conductive region.
[0026] As described above, the infrared light has a peak wavelength of 1,000 nm to 2,000 nm. As a result of the inventors' diligent research, it has been confirmed that materials containing Au have a higher reflectivity for infrared light in this wavelength range compared to their reflectivity for ultraviolet and blue light. Therefore, even when the first light reflection region is formed with a material containing Au, there is a high effect in reflecting the infrared light traveling toward the first surface of the substrate toward the light extraction surface.
[0027] Furthermore, since Au is a material with high stability, even if it is formed on the first surface of the substrate, it is difficult to deteriorate due to oxidation or the like. Therefore, by extending a part of the first conductive region for energizing the LED chip through the substrate to the outside of the chip, it is possible to combine the function of energization and the function of reflecting infrared light. As a method for forming the first conductive region made of a material containing Au, methods such as plating, vapor deposition, and sputtering can be adopted, and typically, a method by plating can be adopted.
[0028] As an example, the first conductive region may be formed to continuously extend in a direction from the outer edge of the LED chip toward the outer edge of the first surface of the substrate when viewed in the normal direction of the first surface of the substrate from the side of the first surface of the substrate.
[0029] The LED chip comprises: a semiconductor substrate; a semiconductor laminate formed on the upper layer of a first substrate surface, which is one of the main surfaces of the semiconductor substrate, and comprising an n-type or p-type first semiconductor layer, an active layer that generates the infrared light, and a second semiconductor layer of a different conductivity type than the first semiconductor layer, which are stacked in order from the side closest to the first substrate surface; a first electrode forming one of the anode electrode and the cathode electrode, formed in contact with at least a portion of the upper surface of the first semiconductor layer that is exposed when the second semiconductor layer and the active layer in a region perpendicular to the first substrate surface are excavated in a direction perpendicular to the first substrate surface, when viewed in a direction parallel to the first substrate surface; a second electrode forming the other of the anode electrode and the cathode electrode, formed in contact with at least a portion of the upper surface of the second semiconductor layer in a region spaced apart from the first electrode with respect to a direction parallel to the first substrate surface; and an in-chip reflection layer formed on the upper layer of the semiconductor laminate on the side away from the semiconductor substrate, which reflects the infrared light emitted from the active layer toward the side away from the semiconductor substrate toward the side of the semiconductor substrate. The first electrode and the chip-internal reflective layer are formed spaced apart in a direction parallel to the first substrate surface, and the LED package may further include a second light-reflecting region formed in at least a portion of the region on the first surface of the substrate, directly below the region sandwiched between the first electrode and the chip-internal reflective layer, when viewed from the side of the first surface of the substrate in the direction normal to the first surface, and made of a material with higher reflectivity to infrared light than the substrate.
[0030] With the above configuration, much of the infrared light emitted from the active layer and traveling through the semiconductor laminate toward the substrate can be reflected by the chip-internal reflective layer and directed toward the light extraction surface. The chip-internal reflective layer preferably has a reflectivity of 70% or more for infrared light, more preferably 80% or more, and particularly preferably 90% or more. As such a material, metallic materials such as Ag, Ag alloy, Au, Al, and Cu can be used, and two or more of these materials may be included.
[0031] Some of the infrared light emitted from the active layer and traveling inside the semiconductor laminate toward the substrate side may not be incident on the in-chip reflective layer and may travel toward the first surface of the substrate. However, according to the above structure, on the first surface of the substrate, when viewed from the first surface side in the normal direction of the first surface, a second light reflection region is formed in at least a part of the region directly below the region sandwiched between the first electrode and the in-chip reflective layer. Therefore, for the infrared light traveling inside the semiconductor laminate toward the substrate side and traveling toward the first surface of the substrate without being incident on the in-chip reflective layer, this second light reflection region can reflect it toward the light extraction surface side. Thereby, the light extraction efficiency is further enhanced.
[0032] The second light reflection region may be formed by the conductive bonding member or the first conductive region.
[0033] The conductive bonding member is typically composed of a solder material. As such a solder material, typically, Sn-Ag-Cu solder (a solder containing Sn, Ag, and Cu, which may be referred to as "SAC solder") is used. Other examples of the material constituting the conductive bonding member include various solder materials such as Sn-Cu solder, Sn-Sb solder, Sn-Bi solder, Au-Sn solder, and bonding materials in which metal particles are dispersed in a resin, such as silver paste and gold paste. Note that two or more of the materials listed above may be mixed as the constituent material of the conductive bonding member, or a small amount of other substances may be mixed in addition to the materials listed above (main substances).
[0034] As a result of the intensive research by the present inventor, it was confirmed that the above solder material has a significantly higher reflectivity for infrared light with a peak wavelength of 1,000 nm to 2,000 nm than the reflectivity for light in the ultraviolet region or blue region. Therefore, by arranging the conductive bonding member so that it is also located directly below the region sandwiched between the first electrode and the in-chip reflective layer when viewed from the first surface side in the normal direction of the first surface, it has the effect of reflecting the infrared light traveling toward the first surface of the substrate without being incident on the in-chip reflective layer toward the light extraction surface side.
[0035] Furthermore, by exposing a portion of the first conductive region directly below the area sandwiched between the first electrode and the chip's internal reflective layer when viewed from the first surface in the direction normal to the first surface, the first conductive region can also function as a second light-reflecting region.
[0036] The first light reflection region has an anode-side first light reflection region located closer to the anode electrode than the cathode electrode when viewed from the side of the first surface of the substrate in the direction normal to the first surface, and a cathode-side first light reflection region formed spaced apart from the anode-side first light reflection region and located closer to the cathode electrode than the anode electrode, and when viewed from the side of the first surface of the substrate in the direction normal to the first surface, the anode-side first light reflection region and the cathode-side first light reflection region may differ from each other in at least one of their shape and area.
[0037] With the above configuration, when a consumer installs the LED package at a location of use, they can easily recognize which side is the anode and which is the cathode by visually observing the shape and size of the metallic material region formed outside the LED chip on the first surface of the substrate, i.e., the first light reflection region, when looking at the first surface from the side where the LED chip is attached. This reduces the risk of accidentally reversing the polarity when installing the LED package.
[0038] When viewed from the side of the second surface of the substrate in the direction normal to the second surface, the pair of second conductive regions may differ from each other in at least one of their shape and area.
[0039] With the above configuration, when a user installs the LED package at a location, they can easily recognize which side is the anode and which is the cathode, even when viewing the second side of the substrate from the opposite side of where the LED chip is attached. This reduces the risk of accidentally reversing the polarity when installing the LED package.
[0040] When viewed from the side of the first surface of the substrate in the direction normal to the first surface, the ratio (S2 / S1) of the area S2 of the first light reflection region located outside the LED chip to the area S1 of the first surface located outside the LED chip may be in the range of 30% to 90%. Preferably, the ratio is 40% or more, and particularly preferably 50% or more. The higher this ratio, the higher the proportion of infrared light emitted from the side of the LED chip and traveling toward the first surface of the substrate that can be reflected to the light extraction surface.
[0041] However, especially when the first light reflection region is made of a conductive material such as a metallic material, if the first light reflection region is formed near the outer edge of the first surface of the substrate, it may cause a short circuit with surrounding elements. In particular, if the first light reflection region is electrically connected to the anode electrode or cathode electrode of the LED chip, there is a concern that the LED chip may not light up due to the short circuit. From this viewpoint, it is preferable that the first light reflection region is formed in an area of 90% or less of the area of the first surface located outside the LED chip when viewed from the side of the first surface of the substrate in the direction normal to the first surface.
[0042] The LED package may further include a sealing resin body formed on the first surface side of the substrate so as to cover the outer circumference of the LED chip.
[0043] When an LED chip emitting infrared light with a peak wavelength of 1,000 nm to 2,000 nm is mounted as a flip-chip, the InP substrate used as the base material for epitaxial growth of the semiconductor layer usually remains on the LED chip. Since the LED chip is mounted with the side where the semiconductor layer is formed facing the first surface of the substrate, the light extraction surface is the InP substrate side. When using infrared light with a wavelength of 1,000 nm to 2,000 nm as a reference, the refractive index of air is 1, while the refractive index of InP is a much larger value of about 3.1 to 3.3. Therefore, if the infrared light that passes through the InP substrate is extracted to the outside as is, the proportion of infrared light that undergoes total internal reflection at the interface of the InP substrate will increase.
[0044] In contrast, as shown in the structure above, by covering the outer circumference of the LED chip with a sealing resin, infrared light that has passed through the InP substrate is first incident on the sealing resin, passes through the sealing resin, and then radiates to the outside. The refractive index of the sealing resin in infrared light with wavelengths of 1,000 nm to 2,000 nm depends on the material of the resin used, but is generally in the range of 1.2 to 2.0. Examples of resin materials include epoxy resin, silicone resin, fluororesin, etc., and mixtures of these materials are also acceptable. Therefore, the refractive index difference at the interface between the InP substrate and the sealing resin, and at the interface between the sealing resin and air, is lower than the refractive index difference at the interface between the InP substrate and air when the sealing resin is not present. Thus, the proportion of infrared light that has passed through the InP substrate and been returned by total internal reflection can be suppressed, and the light extraction efficiency can be increased.
[0045] A single LED chip is mounted on the first surface of the substrate, and the sealing resin body may be formed to cover the outer circumference of the single LED chip.
[0046] With the above configuration, infrared light emitted from the side of the semiconductor substrate (typically an InP substrate) of the LED chip and traveling along the first surface of the substrate can also be extracted to the outside while suppressing total internal reflection. Furthermore, some of the reflected light that has been totally reflected can also be directed towards the light extraction surface.
[0047] According to the LED package of the present invention, infrared light emitted from the LED chip can be extracted to the outside with higher efficiency than in conventional methods.
[0048] This is a schematic cross-sectional view showing the structure of one embodiment of an LED package. This is a schematic cross-sectional view showing the structure of an LED chip mounted on the LED package shown in Figure 1. This is a partially enlarged view of Figure 1. This is a partially enlarged view of Figure 1. This is a schematic plan view showing the structure of an LED chip, corresponding to the side that is fixed to the substrate. This is a schematic plan view for explaining the shape of the first conductive region formed on the first surface of the substrate. This is a schematic plan view of the state in which an LED chip is mounted on the first surface of the substrate shown in Figure 6, as seen from the LED chip side. This is a schematic plan view for explaining the shape of the second conductive region formed on the second surface of the substrate. This is a schematic plan view showing the state in which an LED chip is mounted on the first surface of the substrate, and for the sake of explanation, the illustration of the first conductive region is omitted. This is a graph showing the diffuse reflectance of aluminum nitride, Sn-Ag-Cu solder, and Au at different wavelengths. This is a schematic diagram for explaining the experimental method used when the data in Figure 10 was acquired. This is a schematic plan view for explaining another shape of the first conductive region formed on the first surface of the substrate. This is a schematic plan view illustrating another shape of the first conductive region formed on the first surface of the substrate. This is a schematic plan view illustrating another shape of the first conductive region formed on the first surface of the substrate. This is a schematic plan view illustrating another shape of the first conductive region formed on the first surface of the substrate. This is a schematic plan view illustrating another shape of the first conductive region formed on the first surface of the substrate. This is a schematic cross-sectional view illustrating the structure of another embodiment of the LED package. This is a schematic partial cross-sectional view illustrating the structure of another embodiment of the LED package. This is a schematic partial cross-sectional view illustrating the structure of another embodiment of the LED package.
[0049] Embodiments of the LED package according to the present invention will be described below with reference to the drawings as appropriate. Note that the following drawings are schematic representations, and the dimensional ratios and number of elements shown in the drawings do not necessarily correspond to the actual dimensional ratios and number of elements.
[0050] In this specification, the expression "layer B is formed on top of layer A" is intended to include not only cases where layer B is formed directly on the surface of layer A, but also cases where layer B is formed on the surface of layer A via a thin film. The term "thin film" here refers to a layer with a thickness of 50 nm or less, preferably a layer with a thickness of 10 nm or less.
[0051] Furthermore, within this specification, the expression "layer B is formed on top of layer A" is not limited to layer B being located vertically above layer A, but includes cases where, when the LED chip including layers A and B, or the LED package on which this LED chip is mounted, is rotated appropriately, layer B is positioned above layer A.
[0052] In this specification, the description "GaInAsP" means a mixed crystal of Ga, In, As, and P, and the description of the composition ratio is simply omitted. The same applies to other descriptions such as "AlGaInAs".
[0053] Figure 1 is a schematic cross-sectional view showing the structure of one embodiment of an LED package. As shown in Figure 1, the LED package 1 comprises a substrate 7, an LED chip 3 mounted on the substrate 7, and a sealing resin body 5 covering the outer periphery of the LED chip 3. The LED chip 3 is flip-chip mounted on the substrate 7.
[0054] More specifically, the LED chip 3 is fixed to the first surface 7a of the substrate 7 by conductive bonding members 8 and 9. In this embodiment, the conductive bonding members 8 and 9 are made of solder material, and are typically Sn-Ag-Cu solder (solder containing Sn, Ag, and Cu). Other materials that can be used as conductive bonding members 8 and 9 include various solder materials such as Sn-Cu solder, Sn-Sb solder, Sn-Bi solder, and Au-Sn solder, as well as bonding materials in which metal particles are dispersed in resin, such as silver paste and gold paste. The constituent materials of the conductive bonding members 8 and 9 may be a mixture of two or more of the materials listed above, or a small amount of other substances may be mixed in addition to the materials listed above (main substances).
[0055] The LED chip 3 is configured to emit infrared light with a peak wavelength of 1,000 nm to 2,000 nm. An example of the detailed structure of the LED chip 3 will be described later with reference to Figure 2.
[0056] The sealing resin body 5 is provided for the purpose of suppressing the proportion of infrared light emitted from the LED chip 3 that is totally reflected back to the LED chip 3. Examples of constituent materials for the sealing resin body 5 include epoxy resin, silicone resin, fluororesin, etc., and a mixture of these materials may also be used.
[0057] The substrate 7 serves both the function of mounting the LED chip 3 and the function of dissipating heat from the LED chip 3. From this viewpoint, the substrate 7 is preferably made of a material with relatively high thermal conductivity and rigidity. However, since the LED chip 3 is an element that emits light when a voltage is applied between the anode electrode and the cathode electrode, a short circuit between the two electrodes must be avoided. Therefore, the substrate 7 is required to be made of an insulating material. From this viewpoint, aluminum nitride is typically used as the material for the substrate 7. Other examples of materials that constitute the substrate 7 include ceramics such as aluminum oxide, zirconium oxide, silicon oxide, silicon carbide, and silicon nitride, as well as resin-containing materials such as glass epoxy (a material made by solidifying a glass fiber laminate with epoxy resin), polyamide resins, and polyimide resins. The substrate 7 may be made of a mixture of two or more of the materials listed above, or a small amount of other substances may be mixed in addition to the materials listed above (main substances).
[0058] Figure 2 is a schematic cross-sectional view showing the structure of the LED chip 3 in Figure 1. The LED chip 3 has a semiconductor substrate 11 and a semiconductor laminate 12 formed on the semiconductor substrate 11, which includes a first semiconductor layer 13, an active layer 14, and a second semiconductor layer 15.
[0059] The semiconductor substrate 11 is typically an InP substrate. The semiconductor substrate 11 is also used as a base material for epitaxial growth of the semiconductor laminate 12. The thickness of the semiconductor substrate 11 is preferably 20 μm to 1,000 μm, and more preferably 50 μm to 700 μm.
[0060] The first semiconductor layer 13 is formed on the upper layer of one main surface (first substrate surface 11a) of the semiconductor substrate 11. In this embodiment, the first semiconductor layer 13 is composed of n-type InP. The thickness of the first semiconductor layer 13 is not limited, but is, for example, 1,000 nm to 20,000 nm, and preferably 3,000 nm to 10,000 nm. The dopant concentration of the first semiconductor layer 13 is preferably 1 × 10⁻¹⁶ 17 / cm 3 ~5 x 10 18 / cm 3 More preferably, 5 × 10 17 / cm 3 ~4 x 10 18 / cm 3 The n-type dopant material included in the first semiconductor layer 13 can be Sn, Si, S, Ge, Se, etc., with Si being particularly preferred.
[0061] The active layer 14 is formed on the upper layer of the first semiconductor layer 13 (on the side away from the semiconductor substrate 11). More specifically, the active layer 14 is formed on the upper layer of a portion of the first semiconductor layer 13.
[0062] The active layer 14 is appropriately selected from materials that can generate light of a target wavelength and can be epitaxially grown in lattice matching with the semiconductor substrate 11. For example, the semiconductor substrate 11 may be a single-layer structure of GaInAsP, AlGaInAs, or InGaAs, or it may be an MQW (Multiple Quantum Well) structure including a well layer made of GaInAsP, AlGaInAs, or InGaAs and a barrier layer made of GaInAsP, AlGaInAs, InGaAs, or InP having a larger bandgap energy than the well layer. The active layer 14 may be n-type or p-type doped, or undoped. If it is n-type doped, for example, Si can be used as a dopant.
[0063] When the active layer 14 has a single-layer structure, the film thickness of the active layer 14 is 50 nm to 2,000 nm, preferably 100 nm to 1,000 nm. When the active layer 14 has a MQW structure, a well layer and a barrier layer with a film thickness of 2 nm to 20 nm are laminated in a range of 2 cycles to 50 cycles.
[0064] The second semiconductor layer 15 is formed on the upper layer of the active layer 14 (on the side far from the semiconductor substrate 11). In the present embodiment, the second semiconductor layer 15 is composed of a p-type semiconductor layer and includes a p-type clad layer and a p-type contact layer.
[0065] Among the second semiconductor layer 15, the p-type clad layer is composed of, for example, p-type InP. The thickness of this p-type clad layer is not limited, but for example, it is 1,000 nm to 10,000 nm, preferably 2,000 nm to 5,000 nm. The p-type dopant concentration of the p-type clad layer is preferably 1×10 17 / cm 3 to 3×10 18 / cm 3 and more preferably 5×10 17 / cm 3 to 3×10 18 / cm 3 or less.
[0066] Among the second semiconductor layer 15, the p-type contact layer is composed of, for example, p-type GaInAsP. The thickness of this p-type contact layer is not limited, but for example, it is 10 nm to 1,000 nm, preferably 50 nm to 500 nm. Also, the p-type dopant concentration of the p-type contact layer is preferably 5×10 17 / cm 3 to 3×10 19 / cm 3 or less, and more preferably 1×10 18 / cm 3 to 2×10 19 / cm 3 or less.
[0067] The p-type dopant material included in the p-type cladding layer and p-type contact layer constituting the second semiconductor layer 15 can be Zn, Mg, Be, etc., with Zn or Mg being preferred, and Zn being particularly preferred.
[0068] The first semiconductor layer 13 and the second semiconductor layer 15 are appropriately selected from materials that do not absorb infrared light generated in the active layer 14 and that can be epitaxially grown in lattice matching with the semiconductor substrate 11. For example, in addition to InP, materials such as GaInAsP and AlGaInAs can be used for the first semiconductor layer 13 and the second semiconductor layer 15.
[0069] In this embodiment, the case in which the second semiconductor layer 15 has a laminated structure of a cladding layer and a contact layer has been described, but the present invention does not exclude the case in which the cladding layer and the contact layer have the same material. Furthermore, the present invention does not exclude the case in which the first semiconductor layer 13 is composed of a laminate of cladding layers and contact layers with different materials and dopant concentrations.
[0070] As shown in Figure 2, in the semiconductor laminate 12, a portion of the area is excavated in a direction perpendicular to the first substrate surface 11a, thereby removing the second semiconductor layer 15 and the active layer 14, leaving the first semiconductor layer 13 at the top surface. The LED chip 3 includes a first electrode 21 positioned to contact the first semiconductor layer 13 within this area.
[0071] The first electrode 21 is connected to the first semiconductor layer 13 by an ohmic connection. The first electrode 21 is composed of materials such as Au / Ge / Au, Au / Ge / Ni / Au, AuGe, AuGeNi, etc., and may also consist of multiple such materials. The thickness of the first electrode 21 is not limited, but is, for example, 50 nm to 500 nm, and preferably 100 nm to 300 nm.
[0072] The LED chip 3 includes a second electrode 22 formed in contact with the second semiconductor layer 15. The second electrode 22 is formed at a position spaced apart from the first electrode 21 in a direction parallel to the first substrate surface 11a. Furthermore, as will be described later with reference to Figure 5, the second electrodes 22 are arranged in a dispersed manner in a direction parallel to the first substrate surface 11a. An insulating layer 17 is formed between adjacent second electrodes 22. More specifically, the multiple second electrodes 22 dispersed in a direction parallel to the first substrate surface 11a are arranged to be embedded within the insulating layer 17. The insulating layer 17 covers the second semiconductor layer 15, the active layer 14, and a portion of the sidewalls of the first semiconductor layer 13 in the vicinity of the first electrode 21.
[0073] The insulating layer 17 is made of a material that exhibits electrical insulation properties and has high transmittance to infrared light L generated in the active layer 14. The transmittance of the insulating layer 17 to infrared light L is preferably 70% or more, more preferably 80% or more, and particularly preferably 90% or more. Materials such as SiO2, SiN, and Al2O3 can be used as the insulating layer 17.
[0074] The second electrode 22 is made of a material capable of ohmic contact with the second semiconductor layer 15. For example, the second electrode 22 is made of materials such as Au / Zn / Au, AuZn, and AuBe, and may also consist of multiple such materials. As described above, if the second semiconductor layer 15 includes a contact layer, ohmic contact is formed between this contact layer and the second electrode 22. The thickness of the second electrode 22 is not limited, but is, for example, 50 nm to 500 nm, and preferably 100 nm to 300 nm.
[0075] As shown in Figure 2, the LED chip 3 of this embodiment is provided with an internal chip reflective layer 23 on the upper layer (the side away from the semiconductor substrate 11) of the second electrode 22. The internal chip reflective layer 23 has the function of returning the infrared light L generated in the active layer 14, which has traveled toward the second semiconductor layer 15 and passed through the insulating layer 17, back toward the semiconductor substrate 11. The internal chip reflective layer 23 is made of a conductive material that exhibits a high reflectivity to infrared light L. The reflectivity of the internal chip reflective layer 23 to infrared light L1 is preferably 70% or more, more preferably 80% or more, and particularly preferably 90% or more.
[0076] The second electrode 22 needs to achieve ohmic contact with the second semiconductor layer 15, and is therefore made of a material that can be easily alloyed with the second semiconductor layer 15 (more specifically, the contact layer) to achieve low contact resistance. For this reason, as mentioned above, the second electrode 22 can be made of AuZn, AuBe, or an Au / Zn / Au layer structure. However, these materials have relatively low reflectivity to infrared light L. Therefore, if the second electrode 22 is formed over the entire surface of the second semiconductor layer 15, the proportion of infrared light L generated in the active layer 14 and propagating towards the second semiconductor layer 15 that is absorbed by the second electrode 22 becomes high.
[0077] In contrast, in the LED chip 3 of this embodiment, the second electrode 22 is discretely arranged on the upper layer of the second semiconductor layer 15, and an insulating layer 17 made of a material that exhibits high transmittance to infrared light L is formed in the region of the upper layer of the second semiconductor layer 15 where the second electrode 22 is not formed. Above this insulating layer 17, an in-chip reflective layer 23 is formed made of a material with a higher reflectivity to infrared light L than the second electrode 22. As a result, a portion of the infrared light L generated in the active layer 14 and traveling toward the second semiconductor layer 15 is not absorbed by the second electrode 22, but travels through the insulating layer 17, enters the in-chip reflective layer 23, is reflected by the in-chip reflective layer 23, and is guided toward the semiconductor substrate 11. As a result, the light extraction efficiency is increased. Since the in-chip reflective layer 23 does not come into contact with the second semiconductor layer 15, it does not need to be made of a material that can achieve ohmic contact with the second semiconductor layer 15, and can be selected and used from among metal materials with a higher reflectivity than the second electrode 22. Specifically, the chip's internal reflective layer 23 can be made of metallic materials such as Ag, Ag alloy, Au, Al, Cu, or Al / Au.
[0078] The thickness of the chip's internal reflective layer 23 is not particularly limited, but is, for example, 10 nm to 2,000 nm, and preferably 100 nm to 1,000 nm.
[0079] As shown in Figure 2, the LED chip 3 comprises a first pad electrode 24 formed on the upper layer of the first electrode 21 and a second pad electrode 25 formed on the upper layer of the chip's internal reflective layer 23. In the example shown in Figure 2, an insulating layer 18 is formed to cover the area on the upper surface of the chip's internal reflective layer 23 where the second pad electrode 25 is not formed. The insulating layer 18 may be made of the same material as the insulating layer 17.
[0080] The first pad electrode 24 and the second pad electrode 25 each form a region that comes into contact with the conductive bonding members 8 and 9. The first pad electrode 24 and the second pad electrode 25 are composed of, for example, Ti / Au, Ti / Pt / Au, etc. The thickness of the first pad electrode 24 and the second pad electrode 25 is not particularly limited, but is, for example, 500 nm to 5,000 nm, and preferably 1,000 nm to 4,000 nm.
[0081] As shown in Figure 2, the LED chip 3 of this embodiment has a main surface (second substrate surface 11b) of the semiconductor substrate 11 opposite to the first substrate surface 11a that is textured. Preferably, the arithmetic mean roughness Ra of the second substrate surface 11b is 10 nm or more, and more preferably 100 nm or more. By applying such texture processing to the second substrate surface 11b, the proportion of infrared light L1 generated in the active layer 14 and propagating toward the semiconductor substrate 11 that is totally reflected at the surface of the semiconductor substrate 11 is reduced, thereby improving the light extraction efficiency.
[0082] Furthermore, the LED chip 3 of this embodiment is provided with a light-transmitting layer 27 made of a material with high transmittance to infrared light L on the second substrate surface 11b of the semiconductor substrate 11. This light-transmitting layer 27 is selected from a material that has a transmittance of 80% or more to infrared light L and a refractive index between that of the semiconductor substrate 11 and the sealing resin 5. Specifically, the light-transmitting layer 27 is made of SiO x , SION, SIN x , TiO x MgO x These materials can be used, and multiple combinations of these materials are acceptable.
[0083] By providing such a light-transmitting layer 27 in the LED chip 3, the proportion of infrared light L that is totally reflected at the second substrate surface 11b of the semiconductor substrate 11 is further reduced, and the light extraction efficiency is further improved. When infrared light L with a wavelength of 1,000 nm to 2,000 nm is used as a reference, the refractive index of air is 1, while the refractive index of InP, a typical material for the semiconductor substrate 11, is a large value of about 3.1 to 3.3. Therefore, by compensating for the refractive index difference between the semiconductor substrate 11 and air with the light-transmitting layer 27 and the sealing resin 5, the passage of infrared light L through the interface of the two materials with a large refractive index difference is suppressed. As a result, the proportion of total reflection at the interface is reduced, and the light extraction efficiency can be greatly increased. However, this invention does not exclude semiconductor substrates 11 that do not have a textured surface on the second substrate surface 11b or that do not have a light-transmitting layer 27 on the upper surface of the second substrate surface 11b.
[0084] Figures 3 and 4 are enlarged views of parts of Figure 1, respectively. More specifically, Figure 3 is an enlarged view of the side of the first electrode 21 of the LED package 1 shown in Figure 1, and Figure 4 is an enlarged view of the side of the second electrode 22 of the LED package 1 shown in Figure 1.
[0085] As described above, some of the infrared light generated in the active layer 15 travels toward the semiconductor substrate 11 and is extracted to the outside (infrared light L1). Another portion of the infrared light generated in the active layer 15 travels toward the opposite side of the semiconductor substrate 11, is reflected by the chip's internal reflection layer 23, and then travels toward the semiconductor substrate 11 and is extracted to the outside (infrared light L2).
[0086] As shown in Figures 3 and 4, first conductive regions 31 and 36 are formed on the first surface 7a of the substrate 7, and second conductive regions 32 and 37 are formed on the second surface 7b opposite to the first surface 7a. The first conductive region 31 is connected to the first pad electrode 24 via a conductive bonding member 8. The first conductive region 36 is connected to the second pad electrode 25 via a conductive bonding member 9. The first conductive regions 31 and 36 are made of a metallic material, preferably a material exhibiting high oxidation resistance. Typically, the first conductive regions 31 and 36 are made of a material containing Au, such as Ti / Au. Other materials that constitute the first conductive regions 31 and 36 include Ti / Pd / Au, Ti / Ag-Cu / Au, and Mo-Mn / Ni / Au. The second conductive regions 32 and 37 can be made of the same material as the first conductive regions 31 and 36.
[0087] The substrate 7 has embedded through electrodes 33 and 38 that connect the first surface 7a and the second surface 7b internally. More specifically, the through electrode 33 electrically connects the first conductive region 31 and the second conductive region 32, which correspond to the first electrode 21 side, and the through electrode 38 electrically connects the first conductive region 36 and the second conductive region 37, which correspond to the second electrode 22 side. Since the through electrodes 33 and 38 are not exposed, low resistivity is prioritized over oxidation resistance when selecting the constituent material for the through electrodes 33 and 38. From this viewpoint, Cu is typically used as the constituent material for the through electrodes 33 and 38. Other examples of constituent materials for the through electrodes 33 and 38 include Cu-W, Al, Fe-Ni-Co, etc.
[0088] This allows the second surface 7b of the substrate 7 to be installed at the location where the LED package 1 will be used, and power to the LED chip 3 can be supplied from the second surface 7b side of the substrate 7. In this embodiment, the "cathode electrode" of the LED chip 3 is formed by the first electrode 21 and the first pad electrode 24, and the "anode electrode" of the LED chip 3 is formed by the second electrode 22 and the second pad electrode 25. However, the conductivity types of the first semiconductor layer 13 and the second semiconductor layer 15 may be reversed, and accordingly, the "cathode electrode" and "anode electrode" in the above description will be reversed.
[0089] In the example shown in Figure 3, the first conductive region 31, which is formed on the first surface 7a of the substrate 7 and corresponds to the first electrode 21 side, extends outward from the LED chip 3 when viewed in the direction normal to the first surface 7a. As will be described later with reference to Figure 10, materials containing Au, such as Ti / Au, exhibit high reflectivity for infrared light with a peak wavelength of 1,000 nm to 2,000 nm. Therefore, infrared light L4 and L5, which are emitted from the side of the LED chip 3 (typically the side of the semiconductor substrate 11) and propagate toward the first surface 7a of the substrate 7 while spreading outward from the LED chip 3, can be reflected by the first conductive region 31 that extends outward from the LED chip 3 and directed toward the light extraction surface side (+Z direction).
[0090] In the example shown in Figure 4, the first conductive region 36, which is formed on the first surface 7a of the substrate 7 and corresponds to the second electrode 22 side, extends outward from the LED chip 3 when viewed in the direction normal to the first surface 7a. Therefore, similar to the case of the first conductive region 31, infrared light L4 and L5 that emits from the side of the LED chip 3 (typically the side surface of the semiconductor substrate 11) and spreads outward from the LED chip 3 while traveling toward the first surface 7a of the substrate 7 can be reflected by the first conductive region 36 that extends outward from the LED chip 3 and directed toward the light extraction surface side (+Z direction). In other words, in this embodiment, the first conductive regions 31 and 36 correspond to the "first light reflection region". More specifically, in this embodiment, the first conductive region 31 corresponds to the "cathode side first light reflection region", and the first conductive region 36 corresponds to the "anode side first light reflection region".
[0091] As shown in Figures 3 and 4, on the first surface 7a of the substrate 7, the outer edges of the first conductive regions 31 and 36 are located inward from the outer edge of the substrate 7 (arrow da). This suppresses short circuits between products and other items placed around the LED package 1 and the first conductive region 31 or the first conductive region 36.
[0092] As will be described later with reference to Figure 10, solder materials such as SAC solder exhibit high reflectivity for infrared light with a peak wavelength of 1,000 nm to 2,000 nm. Therefore, as shown in Figure 3, by extending the conductive bonding member 8 to at least a portion of the region directly below the region sandwiched between the first electrode 21 and the chip-internal reflective layer 23 on the first surface 7a of the substrate 7, the infrared light L3 can be reflected by the conductive bonding member 8. More specifically, the infrared light L3 generated in the active layer 14 that passes through the insulating layers 17 and 18 located outside the chip-internal reflective layer 23 and travels toward the first surface 7a of the substrate 7 can be reflected by the conductive bonding member 8 and directed toward the light extraction surface side (+Z direction). In other words, in this embodiment, the conductive bonding member 8 corresponds to the "second light reflection region".
[0093] Figure 5 is a schematic plan view of the LED chip 3 as seen from the side fixed to the first surface 7a of the substrate 7. For ease of understanding, the first electrode 21 and the second electrode 22 are shown with dashed lines. As shown in Figure 5, the first pad electrode 24 and the second pad electrode 25 are spaced apart in the planar direction. As described above, multiple second electrodes 22 are arranged in a dispersed manner in the planar direction and are electrically connected to the second pad electrode 25 via the chip's internal reflective layer 23.
[0094] Figure 6 is a schematic plan view showing the first conductive regions 31 and 36 formed on the first surface 7a of the substrate 7. In the example shown in Figure 6, the first conductive region 31 on the first electrode 21 side and the first conductive region 36 on the second electrode 22 side have different shapes. This makes it possible to visually recognize which of the first conductive region 31 and first conductive region 36 corresponds to the anode side and which corresponds to the cathode side when mounting the LED chip 3 on the first surface 7a of the substrate 7.
[0095] Figure 7 is a schematic plan view of the LED chip 3 mounted on the first surface 7a of the substrate 7 shown in Figure 6, as seen from the LED chip 3 side. As described above with reference to Figure 6, the first conductive region 31 on the first electrode 21 side and the first conductive region 36 on the second electrode 22 side have different shapes. As a result, even after mounting the LED chip 3, the first conductive region 31 on the first electrode 21 side and the first conductive region 36 on the second electrode 22 side, which are exposed on the outside of the LED chip 3, have different shapes. This allows consumers to visually recognize which of the first conductive region 31 and first conductive region 36 corresponds to the anode side and which corresponds to the cathode side by detecting the shapes of the first conductive region 31 and first conductive region 36 when installing the LED package 1 at the place of use. Therefore, the risk of accidentally reversing the polarity when installing the LED package 1 is reduced.
[0096] Figure 8 is a schematic plan view showing the second conductive regions 32 and 37 formed on the second surface 7b of the substrate 7. In the example shown in Figure 8, the second conductive region 32 on the first electrode 21 side and the second conductive region 37 on the second electrode 22 side have different shapes. This allows consumers to visually recognize which of the second conductive regions 32 and 37 corresponds to the anode side and which corresponds to the cathode side by detecting the shapes of the second conductive regions 32 and 37 formed on the second surface 7b of the substrate 7 when installing the LED package 1 at the intended location. Therefore, the risk of accidentally reversing the polarity when installing the LED package 1 is reduced.
[0097] Figure 9 is a schematic plan view showing the LED chip 3 mounted on the first surface 7a of the substrate 7, and for the sake of explanation, the first conductive regions 31 and 36 are omitted from the illustration. As described above with reference to Figures 3 and 4, the first conductive regions 31 and 36, which are formed extending to the outside of the LED chip 3, have the function of reflecting infrared light L4 and L5 that is emitted from the side of the LED chip 3 and propagates toward the first surface 7a of the substrate 7 while spreading outwards from the LED chip 3 toward the light extraction surface. From the viewpoint of improving the light extraction efficiency of the LED package 1, it is preferable to secure a large area for the first conductive regions 31 and 36 that extend to the outside of the LED chip 3.
[0098] More specifically, the following applies. As shown in Figure 9, S1 is the area of the first surface 7a located outside the LED chip 3, viewed from the side of the first surface 7a of the substrate 7 in the direction normal to the first surface 7a (Z direction). Also, as shown in Figure 7, S2 is the total area of the first conductive regions 31 and 36 located outside the LED chip 3, viewed from the side of the first surface 7a of the substrate 7 in the direction normal to the first surface 7a (Z direction) (i.e., corresponding to the total area of the first light reflective regions). In this case, the ratio of area S2 to area S1, S2 / S1, is preferably 30% or more, more preferably 40% or more, and particularly preferably 50% or more.
[0099] Figure 10 is a graph showing the diffuse reflectance of aluminum nitride, Sn-Ag-Cu solder, and Au at different wavelengths. Figure 11 is a schematic diagram illustrating the experimental method used to obtain the data shown in Figure 10.
[0100] The experimental system 60 shown in Figure 11 comprises a test light source 61, a diffraction grating 63, apertures 64 and 65, an integrating sphere 66, and a light receiving unit 68. The experimental system 60 corresponds to the V-7200 ultraviolet-visible near-infrared spectrophotometer manufactured by JASCO Corporation. Using this experimental system 60, a standard reflector plate (Spectralon (99% reflectivity)) manufactured by Labsfair Corporation is placed at the location of sample 67 as a reference sample, and test light L61 from the test light source 61 is incident on it to measure the light reception intensity I at different wavelengths in the light receiving unit 68. r Next, the measurement targets (aluminum nitride test specimen, Sn-Ag-Cu solder test specimen, and Au test specimen) were placed at the location of sample 67, and the light reception intensity I for each wavelength at the light receiving unit 68 was measured in the same manner. s The light intensity I detected under each object was measured, with the reflectance of the reference sample as the reference. s And the light detection intensity I detected under the reference sample r Based on this, the relative reflectance values of each object being measured were derived.
[0101] More specifically, if a is the ratio to the reflectance of the exposed area of the sample 67 relative to the reflectance of the entire inner surface of the integrating sphere 66, and I0 is the light intensity of the test light L61 emitted from the test light source 61, then the diffuse reflectance R of the object being measured is... s This can be derived using the following formula.
[0102]
[0103] According to the results in Figure 10 obtained by the method described above, it was confirmed that aluminum nitride, a typical example of a constituent material of substrate 7, has a nearly constant diffuse reflectance regardless of the wavelength of light in the wavelength range of 400 nm or more. Au, a typical example of a constituent material of the first conductive regions 31 and 36, has a reflectance almost equivalent to that of aluminum nitride in the ultraviolet region, while its reflectance is confirmed to be significantly higher than that of aluminum nitride in the wavelength range of 1,000 nm to 2,000 nm. Sn-Ag-Cu solder, a typical example of a constituent material of conductive bonding members 8 and 9, has a higher reflectance in the wavelength range of 1,000 nm to 2,000 nm compared to the ultraviolet region, and this value is confirmed to be significantly higher than that of aluminum nitride.
[0104] From these results, it can be seen that the first conductive regions 31 and 36 can function as the "first light reflection region," and the conductive bonding member 8 can function as the "second light reflection region."
[0105] The shapes of the first conductive regions 31 and 36 formed on the first surface 7a of the substrate 7 can vary in various ways. In the example shown in Figure 6, when comparing the first conductive region 31 and the first conductive region 36, the first conductive region 31 appears to have a shape in which some corners have been cut off. As another example, as shown in Figure 12, a shape in which the corners of the first conductive region 31 are rounded can be adopted. As yet another example, as shown in Figure 13, the size of the first conductive region 31 can be made smaller than the first conductive region 36 to a degree that is visually noticeable.
[0106] Furthermore, as shown in Figure 14, a light-reflecting region 31a may be formed outside the first conductive region 31, separated from the first conductive region 31, and similarly, a light-reflecting region 36a may be formed outside the first conductive region 36, separated from the first conductive region 36. The light-reflecting regions 31a and 36a can be made of the same material as the first conductive regions 31 and 36, but since they are separated from the first conductive regions 31 and 36, they do not conduct electricity. For this reason, the regions indicated by reference numerals 31a and 36a are named "light-reflecting region 31a" and "light-reflecting region 36a". In this case, the light-reflecting regions 31a and 36a correspond to the "first light-reflecting region". Note that the portions of the first conductive regions 31 and 36 that extend outside the LED chip 3 also function as the "first light-reflecting region".
[0107] In the embodiment shown in Figure 14, comparing the light reflection region 31a and the light reflection region 36a as in Figure 6, the light reflection region 31a appears to have a shape in which a part of its corner is cut off. However, this shape is merely an example. The shapes of the light reflection region 31a and the light reflection region 36a can also be, for example, similar to the shapes of the first conductive regions 31 and 36 shown in Figures 12 and 13.
[0108] Furthermore, when light-reflecting regions 31a and 36a are formed outside the first conductive regions 31 and 36, the configuration shown in Figure 15 can also be adopted. In the example shown in Figure 15, on the first surface 7a of the substrate 7, the first conductive regions 31 and 36 are located inside the light-reflecting regions 31a and 36a with respect to a direction perpendicular to the direction in which the light-reflecting regions 31a and 36a are separated (left-right direction of the paper) (up-down direction of the paper) (arrow d1).
[0109] Furthermore, as described above with reference to Figure 14, the light-reflecting regions 31a and 36a are located outside the first conductive regions 31 and 36, separated from the first conductive regions 31 and 36, and are not energized. Therefore, as shown in Figure 16, the light-reflecting region 31a and the light-reflecting region 36a may be connected.
[0110] [Another Embodiment] An alternative embodiment of the LED package 1 will be described below.
[0111] (1) As shown in Figure 17, the light extraction surface 5a side of the sealing resin body 5 may be made into a lens shape. Although not shown in the figures, a case in which a part of the sealing resin body 5 is missing is also within the scope of the present invention.
[0112] Furthermore, LED packages 1 without the sealing resin body 5 are also within the scope of the present invention. However, from the viewpoint of further improving light extraction efficiency, it is preferable for the LED package 1 to include the sealing resin body 5.
[0113] (2) In the example described with reference to Figure 3, of the infrared light generated in the active layer 14, the infrared light L3 that passes through the insulating layers 17 and 18 located outside the chip's internal reflective layer 23 and travels toward the first surface 7a of the substrate 7 is reflected by the conductive bonding member 8 and travels toward the light extraction surface side (+Z direction). In this case, the conductive bonding member 8 corresponds to the "second light reflection region".
[0114] In contrast, as shown in Figure 18, the first conductive region 31 may be extended on the first surface 7a of the substrate 7 to at least a portion of the region directly below the region sandwiched between the first electrode 21 and the chip-internal reflective layer 23, thereby allowing the first conductive region 31 located in that region to function as a "second light reflection region". That is, infrared light L3 generated in the active layer 14 that passes through the insulating layers 17 and 18 located outside the chip-internal reflective layer 23 and travels toward the first surface 7a of the substrate 7 may be reflected by the first conductive region 31.
[0115] Figure 18 illustrates a case where, as in Figure 14, a light-reflecting region 31a is formed outside the first conductive region 31, and a part of the first conductive region 31 functions as a "second light-reflecting region." However, as shown in Figure 3, it goes without saying that it is also possible to adopt a case where the first conductive region 31 extends continuously outward. In this case, the first conductive region 31 functions as a "first light-reflecting region" at a location outside the LED chip 3, and functions as a "second light-reflecting region" at a location directly below the region sandwiched between the first electrode 21 and the chip-internal reflective layer 23.
[0116] The present invention does not exclude the case in which the substrate 7 is exposed at a position directly below the region sandwiched between the first electrode 21 and the chip-internal reflective layer 23, as shown in Figure 19. However, in this case, infrared light L6 generated in the active layer 14 that passes through the insulating layers 17 and 18 located outside the chip-internal reflective layer 23 and travels toward the first surface 7a of the substrate 7 is absorbed by the substrate 7 at a predetermined rate when it is incident on the first surface 7a of the substrate 7. Therefore, from the viewpoint of further improving the light extraction efficiency, it is preferable to form a conductive bonding member 8 or a first conductive region 31 at a position directly below the region sandwiched between the first electrode 21 and the chip-internal reflective layer 23.
[0117] (3) The present invention is not limited to the embodiments described above, and includes various modifications. For example, the embodiments described above are described in detail for a better understanding of the present invention and are not necessarily limited to all configurations described. The scope of the present invention is indicated by the claims, and all modifications within the meaning and scope equivalent to the claims are intended to be included.
[0118] 1: LED package 3: LED chip 5: Encapsulating resin body 5a: Light extraction surface 7: Substrate 7a: First surface of substrate 7b: Second surface of substrate 8: Conductive bonding member 9: Conductive bonding member 11: Semiconductor substrate 11a: First substrate surface of semiconductor substrate 11b: Second substrate surface of semiconductor substrate 12: Semiconductor laminate 13: First semiconductor layer 14: Active layer 15: Second semiconductor layer 17: Insulating layer 18: Insulating layer 21: First electrode 22: Second electrode 23: In-chip reflective layer 24: First pad electrode 25: Second pad electrode 27: Light-transmitting layer 31: First conductive region 31a: Light-reflecting region 32: Second conductive region 33: Through electrode 36: First conductive region 36a: Light-reflecting region 37: Second conductive region 38: Through electrode 60: Experimental system 61: Test light source 63: Diffraction grating 64: Aperture 65: Aperture 66: Integrating sphere 67: Sample 68: Light receiving section L: Infrared light L1: Infrared light L3: Infrared light L4: Infrared light L5: Infrared light L6: Infrared light L61: Test light S1: Area S2: Area
Claims
1. An LED package comprising an LED chip emitting infrared light with a peak wavelength of 1,000 nm to 2,000 nm, wherein the LED chip is flip-chip mounted on a substrate made of an insulating material; a pair of first conductive regions formed spaced apart on the first surface of the substrate on the LED chip side, each comprising a first conductive region on the anode side and a first conductive region on the cathode side, each contacting the anode electrode and cathode electrode of the LED chip separately via a conductive bonding member; a pair of through electrodes formed by penetrating the substrate at spaced-apart positions and contacting the pair of first conductive regions separately, each comprising a through electrode on the anode side and a through electrode on the cathode side; a pair of second conductive regions formed spaced apart on the second surface of the substrate opposite to the first surface, each comprising a second conductive region on the anode side and a second conductive region on the cathode side, each forming contact with the pair of through electrodes separately; An LED package characterized by comprising: a first light-reflecting region formed on the first surface of the substrate at a position at least outside the LED chip, as viewed from the side of the first surface of the substrate in the direction normal to the first surface, and made of a material with higher reflectivity to infrared light than the substrate.
2. The LED package according to claim 1, characterized in that the first light-reflecting region is made of a metallic material, and the outer edge of the first light-reflecting region is located further inward and spaced further from the outer edge of the first surface of the substrate.
3. The LED package according to claim 2, characterized in that the first conductive region is made of a material containing Au, extends outward from the LED chip when viewed from the side of the first surface of the substrate in the direction normal to the first surface, and at least a portion of the first light reflective region is formed by the first conductive region.
4. The LED package according to claim 3, characterized in that the first conductive region is formed to extend continuously in the direction toward the outer edge of the LED chip toward the outer edge of the first surface of the substrate, when viewed from the side of the first surface of the substrate in the direction normal to the first surface.
5. The LED chip comprises: a semiconductor substrate; a semiconductor laminate formed on the upper layer of the first substrate surface, which is one of the main surfaces of the semiconductor substrate, and comprising an n-type or p-type first semiconductor layer, an active layer that generates the infrared light, and a second semiconductor layer of a different conductivity type than the first semiconductor layer, which are stacked in order from the side closest to the first substrate surface; a first electrode constituting one of the anode electrode and the cathode electrode, formed in contact with at least a portion of the upper surface of the first semiconductor layer that is exposed when the second semiconductor layer and the active layer in a region perpendicular to the first substrate surface are excavated in a direction perpendicular to the first substrate surface, when viewed in a direction parallel to the first substrate surface; a second electrode constituting the other of the anode electrode and the cathode electrode, formed in contact with at least a portion of the upper surface of the second semiconductor layer in a region spaced apart from the first electrode with respect to the direction parallel to the first substrate surface; and an in-chip reflection layer formed on the upper layer of the semiconductor laminate on the side away from the semiconductor substrate, which reflects the infrared light emitted from the active layer toward the side away from the semiconductor substrate toward the side of the semiconductor substrate. The LED package according to claim 3, wherein the first electrode and the chip-internal reflective layer are formed spaced apart in a direction parallel to the first substrate surface, and the LED package further comprises a second light-reflecting region formed on the first surface of the substrate, at least a portion of the region on the first surface of the substrate directly below the region sandwiched between the first electrode and the chip-internal reflective layer, as viewed from the side of the first surface of the substrate in the direction normal to the first surface, and made of a material with higher reflectivity to infrared light than the substrate.
6. The LED package according to claim 5, characterized in that the second light-reflecting region is formed by the conductive bonding member or the first conductive region.
7. The LED package according to claim 1, wherein the first light reflection region comprises an anode-side first light reflection region located closer to the anode electrode than the cathode electrode when viewed from the side of the first surface of the substrate in the direction normal to the first surface, and a cathode-side first light reflection region formed spaced apart from the anode-side first light reflection region and located closer to the cathode electrode than the anode electrode, and the anode-side first light reflection region and the cathode-side first light reflection region differ from each other in at least one of their shape and area when viewed from the side of the first surface of the substrate in the direction normal to the first surface.
8. The LED package according to claim 7, characterized in that, when viewed from the side of the second surface of the substrate in the direction normal to the second surface, the pair of second conductive regions differ from each other in at least one of their shape and area.
9. The LED package according to claim 1, characterized in that, when viewed from the side of the first surface of the substrate in the direction normal to the first surface, the ratio of the area of the first light-reflecting region located outside the LED chip to the area of the first surface located outside the LED chip is in the range of 30% to 90%.
10. The LED package according to claim 1, characterized in that it comprises a sealing resin body formed on the side of the first surface of the substrate so as to cover the outer circumference of the LED chip.
11. The LED package according to claim 10, characterized in that a single LED chip is mounted on the first surface of the substrate, and the sealing resin body is formed to cover the outer circumference of the single LED chip.
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