Detection device

Abstract

Provided is a detection device with which it is possible to improve detection accuracy. A detection device comprises: a substrate; and, on the substrate, a first inorganic insulating film, a drive transistor, an organic insulating film, a second inorganic insulating film, a lower electrode, a photodiode, and an upper electrode. The first inorganic insulating film, the drive transistor, the organic insulating film, the second inorganic insulating film, the lower electrode, the photodiode, and the upper electrode are stacked in this order. The detection device has a first capacitance electrode that is provided between the organic insulating film and the second inorganic insulating film and that faces the lower electrode. The first capacitance electrode is connected to a reference potential.

Description

Detection device

[0001] This disclosure relates to a detection device.

[0002] Optical sensors capable of detecting fingerprint patterns and vein patterns are known (for example, Patent Document 1). Such optical sensors have multiple photodiodes, each using an organic semiconductor material as the active layer. The charge generated when light is shone on the photodiode is accumulated in the sensor capacitance formed between the anode and cathode of the photodiode.

[0003] Japanese Patent Publication No. 2009-32005

[0004] The sensor capacity of such optical sensors may result in insufficient dynamic range of light sensitivity.

[0005] This disclosure aims to provide a detection device that can improve detection sensitivity.

[0006] A detection device according to one aspect of the present disclosure comprises a substrate, a first inorganic insulating film, a drive transistor, an organic insulating film, a second inorganic insulating film, a lower electrode, a photodiode, and an upper electrode, wherein the first inorganic insulating film, the drive transistor, the organic insulating film, the second inorganic insulating film, the lower electrode, the photodiode, and the upper electrode are stacked in that order, and a first capacitive electrode is provided between the organic insulating film and the second inorganic insulating film and faces the lower electrode, and the first capacitive electrode is connected to a reference potential.

[0007] Figure 1 is a plan view showing a detection device according to Embodiment 1. Figure 2 is a block diagram showing an example configuration of the detection device according to Embodiment 1. Figure 3 is a circuit diagram showing the detection device. Figure 4 is a circuit diagram showing multiple sensor pixels. Figure 5 is a circuit diagram showing a magnified view of one sensor pixel. Figure 6 is a plan view showing the reference potential supply area of ​​the detection device according to Embodiment 1. Figure 7 is a schematic plan view showing the detection device according to Embodiment 1. Figure 8 is a cross-sectional view taken along VIII-VIII' of Figure 7. Figure 9 is a schematic plan view showing a detection device according to a comparative example of Embodiment 1. Figure 10 is a cross-sectional view taken along X-X' of Figure 8. Figure 11 is a schematic plan view showing a detection device according to Embodiment 2. Figure 12 is a cross-sectional view taken along XII-XII' of Figure 11. Figure 13 is a schematic plan view showing a detection device according to a comparative example of Embodiment 2. Figure 14 is a cross-sectional view taken along XIV-XIV' of Figure 13.

[0008] Embodiments for carrying out the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the embodiments described below. Furthermore, the components described below include those that are easily conceivable to those skilled in the art, and those that are substantially the same. Moreover, the components described below can be combined as appropriate. Furthermore, the disclosure is merely an example, and any modifications that can be easily conceived by those skilled in the art while maintaining the spirit of the invention are naturally included within the scope of the present invention. In addition, the drawings may schematically represent the width, thickness, shape, etc., of each part compared to the actual embodiment in order to clarify the explanation, but these are merely examples and do not limit the interpretation of the present invention. Furthermore, in this specification and in each drawing, elements similar to those described above with respect to previously shown drawings are denoted by the same reference numerals, and detailed explanations may be omitted as appropriate.

[0009] In this specification and in the claims, when describing a manner in which one structure is placed on top of another structure, unless otherwise specified, the term "on top of" includes both cases: when one structure is placed directly on top of another structure so as to be in contact with it, and when another structure is placed above another structure via yet another structure.

[0010] (Embodiment 1) Figure 1 is a plan view showing a detection device according to Embodiment 1. As shown in Figure 1, the detection device 1 includes a substrate 21, a sensor circuit 10, a gate line drive circuit 15, a signal line selection circuit 16, a detection circuit 48, a control circuit 122, a power supply circuit 123, a first light source substrate 51, a second light source substrate 52, at least one first light source 53, and at least one second light source 54.

[0011] A control board 121 is electrically connected to the substrate 21 via a flexible printed circuit board 71. A detection circuit 48 is provided on the flexible printed circuit board 71. A control circuit 122 and a power supply circuit 123 are provided on the control board 121. The control circuit 122 is, for example, an FPGA (Field Programmable Gate Array). The control circuit 122 supplies control signals to the sensor circuit 10, the gate line drive circuit 15, and the signal line selection circuit 16 to control the detection operation of the sensor circuit 10. The control circuit 122 also supplies control signals to the first light source 53 and the second light source 54 to control whether the first light source 53 and the second light source 54 are lit or not. The power supply circuit 123 supplies a voltage signal such as the sensor power supply signal VDDSNS (see Figure 4) to the sensor circuit 10, the gate line drive circuit 15, and the signal line selection circuit 16. The power supply circuit 123 also supplies power supply voltage to the first light source 53 and the second light source 54.

[0012] The substrate 21 has a detection region AA and a peripheral region GA. The detection region AA is the region where a plurality of photodiodes PD (see Figure 4) of the sensor circuit 10 are provided. The peripheral region GA is the region between the outer periphery of the detection region AA and the edge of the substrate 21, and is a region that does not overlap with the photodiodes PD. In the detection region AA, a plurality of sensor pixels, each having a photodiode, are arranged in a matrix.

[0013] The gate line drive circuit 15 and the signal line selection circuit 16 are provided in the peripheral region GA. Specifically, the gate line drive circuit 15 is provided in the region of the peripheral region GA that extends along the second direction Dy. The signal line selection circuit 16 is provided in the region of the peripheral region GA that extends along the first direction Dx, and is provided between the sensor circuit 10 and the detection circuit 48.

[0014] The first direction Dx is one direction in a plane parallel to the substrate 21. The second direction Dy is one direction in a plane parallel to the substrate 21 and is perpendicular to the first direction Dx. The second direction Dy may intersect the first direction Dx without being perpendicular to it. The third direction Dz is perpendicular to the first direction Dx and the second direction Dy and is the normal direction of the substrate 21.

[0015] Multiple first light sources 53 are provided on the first light source substrate 51 and are arranged along the second direction Dy. Multiple second light sources 54 are provided on the second light source substrate 52 and are arranged along the second direction Dy. The first light source substrate 51 and the second light source substrate 52 are electrically connected to the control circuit 122 and the power supply circuit 123, respectively, via terminals 124 and 125 provided on the control board 121.

[0016] Multiple first light sources 53 and multiple second light sources 54 can be, for example, inorganic LEDs (Light Emitting Diodes) or organic EL (OLEDs: Organic Light Emitting Diodes). Each of the multiple first light sources 53 and multiple second light sources 54 emits first and second light of different wavelengths. The first and second light each have different emission maximum wavelengths. The emission maximum wavelength is the wavelength that shows the maximum emission intensity in the emission spectrum, which shows the relationship between the wavelength and emission intensity of each of the first and second light. Hereafter, when only the wavelength value is stated, it will refer to the assumed emission maximum wavelength.

[0017] The first light emitted from the first light source 53 is mainly reflected by the surface of the object to be detected, such as a finger Fg, and enters the sensor circuit 10. As a result, the sensor circuit 10 can detect fingerprints by detecting the shape of the irregularities on the surface of the finger Fg. The second light emitted from the second light source 54 is mainly reflected inside the finger Fg or passes through the finger Fg and enters the sensor circuit 10. As a result, the sensor circuit 10 can detect biological information inside the finger Fg. This biological information includes, for example, pulse waves, pulse rate, and vascular images of the finger Fg or palm.

[0018] For example, the first light may have a wavelength of 520 nm to 600 nm, and the second light may have a wavelength of 780 nm to 900 nm, for example, around 850 nm. In this case, the first light is blue or green visible light, and the second light is infrared light. The sensor circuit 10 can detect fingerprints and pulse waves based on the first light emitted from the first light source 61. The second light emitted from the second light source 62 is reflected inside the object to be detected, such as a finger Fg, or is transmitted through and absorbed by the finger Fg, etc., and enters the sensor circuit 10. As a result, the sensor circuit 10 can detect pulse waves and vascular images (vascular patterns) as information about the living organism inside the finger Fg, etc.

[0019] Alternatively, the first light may have a wavelength of 600 nm to 700 nm, for example, about 660 nm, and the second light may have a wavelength of 780 nm to 900 nm, for example, about 850 nm. In this case, based on the first light emitted from the first light source 53 and the second light emitted from the second light source 54, the sensor circuit 10 can detect blood oxygen saturation in addition to pulse and vascular images as information about the living organism. Thus, since the detection device 1 has a first light source 53 and a plurality of second light sources 54, it can detect various information about the living organism by performing detection based on the first light and detection based on the second light.

[0020] Note that the arrangement of the first light source 53 and the second light source 54 shown in Figure 1 is merely an example and can be changed as appropriate. For example, multiple first light sources 53 and multiple second light sources 54 may be arranged on the first light source substrate 51 and the second light source substrate 52, respectively. In this case, a group containing multiple first light sources 53 and a group containing multiple second light sources 54 may be arranged side by side in the second direction Dy, or the first light sources 53 and second light sources 54 may be arranged alternately in the second direction Dy. Furthermore, there may be one or more light source substrates on which the first light sources 53 and second light sources 54 are provided.

[0021] Figure 2 is a block diagram showing an example configuration of a detection device according to Embodiment 1. As shown in Figure 2, the detection device 1 further includes a detection control circuit 11 and a detection unit 40. Some or all of the functions of the detection control circuit 11 are included in the control circuit 122. Also, some or all of the functions of the detection unit 40, other than the detection circuit 48, are included in the control circuit 122.

[0022] The sensor circuit 10 is a light sensor having a photodiode PD, which is a photoelectric conversion element. The photodiode PD in the sensor circuit 10 outputs an electrical signal corresponding to the irradiated light to the signal line selection circuit 16. The signal line selection circuit 16 sequentially selects the signal line SL according to the selection signal ASW from the detection control circuit 11. As a result, the electrical signal is output to the detection unit 40 as a detection signal Vdet. The sensor circuit 10 also performs detection according to the gate drive signal Vgcl supplied from the gate line drive circuit 15.

[0023] The detection control circuit 11 is a circuit that supplies control signals to the gate line drive circuit 15, the signal line selection circuit 16, and the detection unit 40, respectively, and controls their operation. The detection control circuit 11 supplies various control signals such as the start signal STV, the clock signal CK, and the reset signal RST1 to the gate line drive circuit 15. The detection control circuit 11 also supplies various control signals such as the selection signal ASW to the signal line selection circuit 16. Furthermore, the detection control circuit 11 supplies various control signals to the first light source 53 and the second light source 54 to control their illumination and non-illumination.

[0024] The gate line drive circuit 15 is a circuit that drives multiple gate lines GL (see Figure 3) based on various control signals. The gate line drive circuit 15 sequentially or simultaneously selects multiple gate lines GL and supplies a gate drive signal Vgcl to the selected gate lines GL. As a result, the gate line drive circuit 15 selects multiple photodiodes PD connected to the gate lines GL.

[0025] The signal line selection circuit 16 is a switch circuit that sequentially or simultaneously selects a plurality of signal lines SL (see Figure 3). The signal line selection circuit 16 is, for example, a multiplexer. Based on the selection signal ASW supplied from the detection control circuit 11, the signal line selection circuit 16 connects the selected signal line SL to the detection circuit 48. As a result, the signal line selection circuit 16 outputs the detection signal Vdet of the photodiode PD to the detection unit 40.

[0026] The detection unit 40 includes a detection circuit 48, a signal processing circuit 44, a coordinate extraction circuit 45, a storage circuit 46, a detection timing control circuit 47, an image processing circuit 49, and an output processing circuit 50. The detection timing control circuit 47 controls the detection circuit 48, the signal processing circuit 44, the coordinate extraction circuit 45, and the image processing circuit 49 to operate synchronously based on a control signal supplied from the detection control circuit 11.

[0027] The detection circuit 48 is, for example, an analog front-end circuit (AFE). The detection circuit 48 is a signal processing circuit that has the functions of a detection signal amplification circuit 42 and an A / D conversion circuit 43. The detection signal amplification circuit 42 amplifies the detection signal Vdet. The A / D conversion circuit 43 converts the analog signal output from the detection signal amplification circuit 42 into a digital signal.

[0028] The signal processing circuit 44 is a logic circuit that detects a predetermined physical quantity input to the sensor circuit 10 based on the output signal of the detection circuit 48. When the finger Fg contacts or is close to the detection area AA, the signal processing circuit 44 can detect irregularities on the surface of the finger Fg or palm based on the signal from the detection circuit 48. The signal processing circuit 44 can also detect information related to the living body based on the signal from the detection circuit 48. This information related to the living body includes, for example, the vascular image of the finger Fg or palm, pulse wave, pulse rate, blood oxygen saturation, etc.

[0029] When obtaining human blood oxygen saturation, for example, 660 nm (within the range of 500 nm to 700 nm) is used as the first light source, and approximately 850 nm (within the range of 800 nm to 930 nm) is used as the second light source. Since the amount of light absorbed changes depending on the amount of oxygen taken up by hemoglobin, the amount of light obtained by subtracting the light absorbed by the blood (hemoglobin) from the irradiated first and second light sources is detected by a photodiode PD. Most of the oxygen in the blood is reversibly bound to hemoglobin in red blood cells, and only a small amount is dissolved in the plasma. More specifically, the value of what percentage of the blood's capacity is bound to oxygen as a whole is called oxygen saturation (SpO2). ２ This is called [a specific term]. By using two wavelengths of light, the first and second wavelengths, it becomes possible to calculate blood oxygen saturation from the amount of light irradiated and the amount of light absorbed by the blood (hemoglobin).

[0030] Furthermore, the signal processing circuit 44 may acquire detection signals Vdet (information related to living organisms) simultaneously detected by multiple photodiodes PD and perform a process to average them. In this case, the detection unit 40 can suppress noise and measurement errors caused by relative positional misalignment between the detected object, such as a finger Fg, and the sensor circuit 10, enabling stable detection.

[0031] The memory circuit 46 temporarily stores the signals calculated by the signal processing circuit 44. The memory circuit 46 may be, for example, RAM (Random Access Memory), a register circuit, or the like.

[0032] The coordinate extraction circuit 45 is a logic circuit that determines the detection coordinates of surface irregularities of fingers, etc., when finger contact or proximity is detected in the signal processing circuit 44. The coordinate extraction circuit 45 is also a logic circuit that determines the detection coordinates of blood vessels in the fingers Fg and palm. The image processing circuit 49 combines the detection signals Vdet output from each photodiode PD of the sensor circuit 10 to generate two-dimensional information indicating the shape of surface irregularities of fingers Fg, etc., and two-dimensional information indicating the shape of blood vessels in the fingers Fg and palm. Note that the coordinate extraction circuit 45 and the image processing circuit 49 may be omitted.

[0033] The output processing circuit 50 functions as a processing circuit that performs processing based on the outputs from multiple photodiodes PD. Specifically, the output processing circuit 50 in this embodiment outputs a sensor output Vo, which includes at least pulse wave data, based on the detection signal Vdet acquired via the signal processing circuit 44. In this embodiment, the signal processing circuit 44 outputs data indicating the change (amplitude) of the output of the detection signal Vdet of each photodiode PD, which will be described later, and the output processing circuit 50 determines which output is adopted as the sensor output Vo. However, either the signal processing circuit 44 or the output processing circuit 50 may perform both of these actions. The output processing circuit 50 may also include the detection coordinates obtained by the coordinate extraction circuit 45, the two-dimensional information generated by the image processing circuit 49, etc., in the sensor output Vo. Furthermore, the functions of the output processing circuit 50 may be integrated into other configurations (for example, the image processing circuit 49).

[0034] Next, an example of the circuit configuration of the detection device 1 will be described. Figure 3 is a circuit diagram showing the detection device. Figure 4 is a circuit diagram showing multiple sensor pixels. In addition, Figure 4 also shows the circuit configuration of the detection circuit 48.

[0035] As shown in Figure 3, the sensor circuit 10 has a plurality of sensor pixels PAA arranged in a matrix. Each of the plurality of sensor pixels PAA is provided with a photodiode PD. The plurality of sensor pixels PAA, including the photodiode PD, are arranged on a substrate 21. The photodiode PD is an OPD (Organic Photodiode) made of organic semiconductor.

[0036] The gate line GL extends in the first direction Dx and is connected to multiple sensor pixels PAA arranged in the first direction Dx. Furthermore, multiple gate lines GL(1), GL(2), ..., GL(8) are arranged in the second direction Dy and are each connected to the gate line drive circuit 15. In the following explanation, if it is not necessary to distinguish between multiple gate lines GL(1), GL(2), ..., GL(8), they will simply be referred to as gate line GL. Also, while Figure 3 shows eight gate lines GL for clarity, this is merely an example, and there may be M gate lines GL (where M is 8 or more, for example, M=256).

[0037] The signal line SL extends in the second direction Dy and is connected to the photodiodes PD of a plurality of sensor pixels PAA arranged in the second direction Dy. Further, a plurality of signal lines SL(1), SL(2),..., SL(12) are arranged in the first direction Dx and are respectively connected to the signal line selection circuit 16 and the reset circuit 17. In the following description, when it is not necessary to distinguish and describe the plurality of signal lines SL(1), SL(2),..., SL(12), they are simply represented as the signal line SL.

[0038] Further, for the sake of easy understanding, 12 signal lines SL are shown, but this is merely an example, and the signal lines SL may be arranged in N (N is 12 or more, for example, N = 252) numbers. Also, the resolution of the sensor is, for example, 508 dpi (dot per inch), and the number of cells is 252×256. Also, in FIG. 3, a sensor circuit 10 is provided between the signal line selection circuit 16 and the reset circuit 17. However, it is not limited to this, and the signal line selection circuit 16 and the reset circuit 17 may be respectively connected to the ends of the signal line SL in the same direction. Also, the substantial area of one sensor is, for example, substantially 50×50 μm ２ and the area of the detection region AA is, for example, 12.6×12.8 mm ２ is set.

[0039] The gate line driving circuit 15 receives various control signals such as a start signal STV, a clock signal CK, a reset signal RST1, etc. from the control circuit 122 (see FIG. 1). The gate line driving circuit 15 sequentially selects a plurality of gate lines GL(1), GL(2),..., GL(8) in a time-sharing manner based on the various control signals. Thereby, a gate driving signal Vgcl is supplied to a plurality of driving transistors Tr connected to the gate line GL, and a plurality of sensor pixels PAA arranged in the first direction Dx are selected as detection targets.

[0040] Note that the gate line driving circuit 15 may perform different driving for each detection mode of fingerprint detection and information regarding a plurality of different living bodies (pulse wave, pulse, blood vessel image, blood oxygen saturation, etc.). For example, the gate line driving circuit 15 may drive a plurality of gate lines GL bundled together.

[0041] Specifically, the gate line driving circuit 15 may simultaneously select a predetermined number of gate lines GL from among the gate lines GL(1), GL(2),..., GL(8) based on a control signal. For example, the gate line driving circuit 15 simultaneously selects six gate lines GL(1) to GL(6) and supplies a gate driving signal Vgcl. The gate line driving circuit 15 supplies a gate driving signal VGL to a plurality of driving transistors Tr via the selected six gate lines GL. Thereby, group regions PAG1 and PAG2 including a plurality of sensor pixels PAA arranged in the first direction Dx and the second direction Dy are respectively selected as detection targets. The gate line driving circuit 15 bundles and drives a predetermined number of gate lines GL and sequentially supplies a gate driving signal Vgcl for each predetermined number of gate lines GL. Hereinafter, when not particularly distinguishing the positions of each of different group regions such as the group regions PAG1 and PAG2, they are referred to as group region PAG.

[0042] The signal line selection circuit 16 includes a plurality of selection signal lines Lsel, a plurality of output signal lines Lout, and a third switching element TrS. The plurality of third switching elements TrS are provided corresponding to the plurality of signal lines SL respectively. Six signal lines SL(1), SL(2),..., SL(6) are connected to a common output signal line Lout1. Six signal lines SL(7), SL(8),..., SL(12) are connected to a common output signal line Lout2. The output signal lines Lout1 and Lout2 are respectively connected to the detection circuit 48.

[0043] Here, the signal lines SL(1), SL(2),..., SL(6) are defined as the first signal line block, and the signal lines SL(7), SL(8),..., SL(12) are defined as the second signal line block. The plurality of selection signal lines Lsel are respectively connected to the gates of the third switching elements TrS included in one signal line block. Also, one selection signal line Lsel is connected to the gates of the third switching elements TrS of the plurality of signal line blocks.

[0044] Specifically, the selection signal lines Lsel1, Lsel2, ..., Lsel6 are connected to the third switching element TrS corresponding to the signal lines SL(1), SL(2), ..., SL(6), respectively. Furthermore, selection signal line Lsel1 is connected to the third switching element TrS corresponding to signal line SL(1) and the third switching element TrS corresponding to signal line SL(7). Selection signal line Lsel2 is connected to the third switching element TrS corresponding to signal line SL(2) and the third switching element TrS corresponding to signal line SL(8).

[0045] The control circuit 122 (see Figure 1) sequentially supplies the selection signal ASW to the selection signal line Lsel. As a result, the signal line selection circuit 16 sequentially selects the signal line SL in a time-division multiplexer manner within one signal line block through the operation of the third switching element TrS. The signal line selection circuit 16 also selects one signal line SL in each of multiple signal line blocks. With this configuration, the detection device 1 can reduce the number of integrated circuits (ICs) including the detection circuit 48, or the number of terminals of the ICs.

[0046] The signal line selection circuit 16 may also bundle multiple signal lines SL and connect them to the detection circuit 48. Specifically, the control circuit 122 (see Figure 1) simultaneously supplies the selection signal ASW to the selected signal line Lsel. As a result, the signal line selection circuit 16, through the operation of the third switching element TrS, selects multiple signal lines SL (for example, six signal lines SL) in one signal line block and connects the multiple signal lines SL to the detection circuit 48. As a result, the signals detected in each group region PAG are output to the detection circuit 48. In this case, signals from multiple sensor pixels PAA (photodiode PD) are integrated and output to the detection circuit 48 on a group region PAG basis.

[0047] The operation of the gate line drive circuit 15 and the signal line selection circuit 16 allows detection to be performed for each group region PAG, thereby improving the intensity of the detection signal Vdet obtained in a single detection, and thus improving sensor sensitivity. Furthermore, the time required for detection can be shortened. As a result, the detection device 1 can repeatedly perform detection in a short time, thereby improving the signal-to-noise ratio and enabling accurate detection of temporal changes in biological information such as pulse waves.

[0048] As shown in Figure 3, the reset circuit 17 includes a reference signal line Lvr, a reset signal line Lrst, and a fourth switching element TrR. The fourth switching element TrR is provided corresponding to a plurality of signal lines SL. The reference signal line Lvr is connected to either the source or the drain of the plurality of fourth switching elements TrR. The reset signal line Lrst is connected to the gate of the plurality of fourth switching elements TrR.

[0049] The control circuit 122 supplies the reset signal RST2 to the reset signal line Lrst. This turns on multiple fourth switching elements TrR, and multiple signal lines SL are electrically connected to the reference signal line Lvr. The power supply circuit 123 supplies the reference signal COM to the reference signal line Lvr. This supplies the reference signal COM to the capacitive elements Ca (see Figure 4) included in multiple sensor pixels PAA.

[0050] Figure 4 is a circuit diagram showing multiple sensor pixels. Figure 5 is a circuit diagram showing a magnified view of a single sensor pixel. Figure 4 also shows the circuit configuration of the detection circuit 48. In addition, Figure 4 omits the auxiliary capacitor Cs shown in Figure 5. As shown in Figures 4 and 5, the sensor pixel PAA includes a photodiode PD, a capacitive element Ca, an auxiliary capacitor Cs, and a driving transistor Tr. The capacitive element Ca is the capacitance formed between the lower electrode 31 (see Figure 7) and the upper electrode 35 of the photodiode PD. The capacitive element Ca is the capacitance (sensor capacitance) formed in the photodiode PD and is equivalently connected in parallel with the photodiode PD.

[0051] The auxiliary capacitance Cs shown in Figure 5 is a capacitance added to the photodiode PD. One end of the auxiliary capacitance Cs is connected to one end of the capacitive element Ca and the anode of the photodiode PD. A reference potential VR1 is supplied to the other end of the auxiliary capacitance Cs. The reference potential VR1 is a voltage signal with a fixed potential, and may be, for example, the ground potential or the reset potential (reference signal COM).

[0052] Figure 4 shows two gate lines GL(m) and GL(m+1) aligned in the second direction Dy, among the multiple gate lines GL. It also shows two signal lines SL(n) and SL(n+1) aligned in the first direction Dx, among the multiple signal lines SL. The sensor pixel PAA is the region enclosed by the gate lines GL and the signal lines SL. The drive transistor Tr is provided corresponding to the photodiode PD. The drive transistor Tr is composed of a thin-film transistor, and in this example, it is composed of an n-channel MOS (Metal Oxide Semiconductor) type TFT (Thin Film Transistor).

[0053] The gates of the drive transistors Tr belonging to the multiple sensor pixels PAA arranged in the first direction Dx are connected to the gate line GL. The sources of the drive transistors Tr belonging to the multiple sensor pixels PAA arranged in the second direction Dy are connected to the signal line SL. The drains of the drive transistors Tr are connected to the cathode and capacitive element Ca of the photodiode PD.

[0054] The photodiode PD is supplied with a sensor power supply signal VDDSNS from the power supply circuit 123. Additionally, the signal line SL and the capacitive element Ca are supplied with a reference signal COM from the power supply circuit 123, which serves as the initial potential for the signal line SL and the capacitive element Ca.

[0055] When light is shone onto the sensor pixel PAA, a current corresponding to the amount of light flows through the photodiode PD, causing charge to accumulate in the capacitive element Ca. When the drive transistor Tr is turned on, a current flows through the signal line SL according to the charge accumulated in the capacitive element Ca. The signal line SL is connected to the detection circuit 48 via the third switching element TrS of the signal line selection circuit 16. As a result, the detection device 1 can detect a signal corresponding to the amount of light shone onto the photodiode PD for each sensor pixel PAA or for each group region PAG.

[0056] The detection circuit 48 is connected to the signal line SL when the switch SSW is turned on during the readout period. The detection signal amplification circuit 42 of the detection circuit 48 converts the current or charge supplied from the signal line SL into a voltage. A reference potential (Vref) with a fixed potential is input to the non-inverting input terminal (+) of the detection signal amplification circuit 42, and the signal line SL is connected to the inverting input terminal (-). In Embodiment 1, the same signal as the reference signal COM is input as the reference potential (Vref) VR1. The reference potential VR1 is at the same potential as the cathode (lower electrode 31), for example, 0.75V. The detection signal amplification circuit 42 also has a capacitive element Cb and a reset switch RSW. During the reset period, the reset switch RSW is turned on, and the charge of the capacitive element Cb is reset.

[0057] Figure 6 is a plan view showing the reference potential supply area of ​​the detection device according to Embodiment 1. As shown in Figure 6, the detection device 1 is equipped with a reference potential VR1 in the peripheral area GA in a plan view, surrounding the detection area AA. Voltage is supplied to the auxiliary capacitor Cs from the reference potential VR1. The detection device 1 is also equipped with a first capacitance electrode 310 over the entire detection area AA, and the first capacitance electrode 310 is connected to the reference potential VR1. The reference potential VR1 is connected to the respective signal line SL and gate line GL.

[0058] Next, the configuration of the photodiode PD will be described. Figure 7 is a schematic plan view showing the sensor circuit according to Embodiment 1.

[0059] As shown in Figure 7, the photodiode PD, the lower electrode 31, and the drive transistor Tr are located in the region enclosed by the gate line GL and the signal line SL.

[0060] The lower electrode 31 is the cathode electrode of the photodiode PD, and multiple photodiodes PD and multiple lower electrodes 31 are arranged in a matrix on the substrate 21. The lower electrode 31 shown in Figure 7 is merely an example and can be appropriately changed according to the characteristics required of the photodiode PD. For example, the lower electrode 31 may be provided overlapping with at least one of the gate line GL and the signal line SL. Alternatively, the lower electrode 31 may be formed with an area smaller than the area shown in Figure 7. In this case, although the capacitance of the capacitive element Ca will be smaller, leakage current can be suppressed.

[0061] As shown in Figure 7, the drive transistor Tr has a semiconductor layer SC, a source electrode SE, a drain electrode DE, and a gate electrode GE. The semiconductor layer SC extends along the gate line GL and is provided intersecting the gate electrode GE in a plan view. The gate electrode GE is connected to the gate line GL and extends in a direction perpendicular to the gate line GL. The two gate electrode GEs are arranged side by side in the first direction Dx. The drive transistor Tr in this embodiment has a double-gate structure in which the two gate electrode GEs are provided overlapping with the semiconductor layer SC.

[0062] One end of the semiconductor layer SC is connected to the source electrode SE via contact hole CH1. The lower electrode 31 is electrically connected to the source electrode SE of the drive transistor Tr via contact hole CH3. This electrically connects the drive transistor Tr to the photodiode PD. The other end of the semiconductor layer SC is connected to the drain electrode DE via contact hole CH2. The drain electrode DE is connected to the signal line SL.

[0063] Note that the configuration and arrangement of the drive transistor Tr shown in Figure 7 are merely examples and can be modified as appropriate.

[0064] Figure 8 is a cross-sectional view taken along line VIII-VIII' of Figure 7. As shown in Figure 8, the detection device 1 includes a substrate 21, a plurality of first inorganic insulating films (undercoat film 23, gate insulating film 24, interlayer insulating film 25, and superimposed insulating film 250), a drive transistor Tr, an organic insulating film 26, a second inorganic insulating film 27, a barrier film 270, a photodiode PD, and a sealing film 90. In the detection region AA, the plurality of first inorganic insulating films (undercoat film 23, gate insulating film 24, interlayer insulating film 25, and superimposed insulating film 250), the organic insulating film 26, the second inorganic insulating film 27, the photodiode PD, and the sealing film 90 (first inorganic sealing film 91, organic sealing film 92, and second inorganic sealing film 93) are stacked on the substrate 21 in that order.

[0065] The substrate 21 is an insulating substrate formed of a film-like resin, such as glass or a resin material. The substrate 21 is not limited to a flat plate shape and may have a curved surface. In this case, the substrate 21 may be a film-like resin. The drive transistor Tr is provided in a region that overlaps with the lower electrode 31 of the photodiode PD. Specifically, the drive transistor Tr has a semiconductor layer SC, a source electrode SE, a drain electrode DE, and a gate electrode GE.

[0066] In this specification, the direction from the substrate 21 toward the photodiode PD, perpendicular to the surface of the substrate 21, is referred to as "upper side" or simply "up." The direction from the photodiode PD toward the substrate 21 is referred to as "lower side" or simply "down."

[0067] The light-shielding film LS is provided on the substrate 21. The light-shielding film LS is provided between the semiconductor layer SC and the substrate 21. For example, aluminum (Al) or molybdenum tungsten alloy (MoW) can be used for the light-shielding film LS. The light-shielding film LS suppresses the penetration of light from the substrate 21 side into the channel region of the semiconductor layer SC.

[0068] The undercoat film 23 is laminated on the polyimide 22 deposited on the substrate 21, covering the light-shielding film LS and provided on the substrate 21. The undercoat film 23 is formed of an inorganic insulating film such as a silicon nitride film or a silicon oxide film. Note that the configuration of the undercoat film 23 is not limited to that shown in Figure 5. For example, the undercoat film 23 may be a laminated film with two or three or more layers.

[0069] The drive transistor Tr is provided on the substrate 21. The semiconductor layer SC is provided on the undercoat film 23. For example, polysilicon is used for the semiconductor layer SC. However, the semiconductor layer SC is not limited to this and may be a microcrystalline oxide semiconductor, amorphous oxide semiconductor, low-temperature polysilicon, etc. The gate insulating film 24 is provided on the undercoat film 23, covering the semiconductor layer SC. The gate insulating film 24 is an inorganic insulating film such as a silicon oxide film. The gate electrode GE is provided on the gate insulating film 24.

[0070] In the example shown in Figure 8, the driving transistor Tr has a top-gate structure. However, it is not limited to this; the driving transistor Tr may also have a bottom-gate structure, or a dual-gate structure in which gate electrodes GE are provided on both the upper and lower sides of the semiconductor layer SC.

[0071] The interlayer insulating film 25 is provided on the gate insulating film 24, covering the gate electrode GE. The interlayer insulating film 25 has, for example, a laminated structure of a silicon nitride film and a silicon oxide film. The source electrode SE and the drain electrode DE are provided on the interlayer insulating film 25. The source electrode SE is connected to the source region of the semiconductor layer SC via a contact hole CH1 provided through the gate insulating film 24 and the interlayer insulating film 25. The drain electrode DE is connected to the drain region of the semiconductor layer SC via a contact hole CH2 provided through the gate insulating film 24 and the interlayer insulating film 25. The superimposed insulating film 250 is provided on the interlayer insulating film 25, covering the source electrode SE and the drain electrode DE.

[0072] The organic insulating film 26 is provided on top of the superimposed insulating film 250, covering the source electrode SE and drain electrode DE of the drive transistor Tr. The organic insulating film 26 is a planarized film formed of an organic insulating material. In this embodiment, the contact hole CH3 of the organic insulating film 26 is provided in a region that overlaps with the source electrode SE. The lower electrode 31 of the photodiode PD is electrically connected to the source electrode SE at the bottom of the contact hole CH3.

[0073] In addition, the detection device 1 may be configured such that the superimposed insulating film 250 is not provided among the inorganic insulating films (undercoat film 23, gate insulating film 24, interlayer insulating film 25, and superimposed insulating film 250). In this case, the organic insulating film 26 is provided on top of the interlayer insulating film 25, covering the source electrode SE and the drain electrode DE.

[0074] The second inorganic insulating film 27 is provided on top of the organic insulating film 26. The second inorganic insulating film 27 is formed of an inorganic insulating material such as a silicon nitride film (SiN).

[0075] The barrier film 270 is provided on the end of the lower electrode 31, the upper part of the lower electrode 31 in the contact hole CH3, and the second inorganic insulating film 27 in the contact hole CH4. The barrier film 270 is formed of an inorganic insulating material such as silicon nitride (SiN).

[0076] The photodiode PD is provided on the organic insulating film 26 and the second inorganic insulating film 27. The lower electrode 31 is provided between the substrate 21 and the organic insulating film 26 and the photodiode PD, in a direction perpendicular to the surface of the substrate 21.

[0077] The photodiode PD is stacked in the order of a lower buffer layer 32, an active layer 33, and an upper buffer layer 34, in a direction perpendicular to the substrate 21. The photodiode PD in this embodiment is an organic photodiode (OPD) in which an organic semiconductor is used as the active layer 33.

[0078] The lower electrode 31 is formed of a conductive material having translucency, such as ITO (Indium Tin Oxide). The lower buffer layer 32, the active layer 33, the upper buffer layer 34, and the upper electrode 35 are continuously provided across a plurality of photodiodes PD. Specifically, the lower buffer layer 32, the active layer 33, the upper buffer layer 34, and the upper electrode 35 are provided so as to overlap the lower electrode 31 and also overlap the second inorganic insulating film 27 positioned between adjacent lower electrodes 31.

[0079] The characteristics (e.g., voltage-current characteristics and resistance value) of the active layer 33 change according to the light irradiated thereto. An organic material is used as the material of the active layer 33. Specifically, the active layer 33 has a bulk heterojunction structure in which a p-type organic semiconductor and an n-type fullerene derivative (PCBM) which is an n-type organic semiconductor are mixed. As the active layer 33, for example, C ６０ (fullerene), PCBM (phenyl C ６１ methyl butyrate: Phenyl C 61 -butyric acid methyl ester), CuPc (copper phthalocyanine: Copper Phthalocyanine), F １６ CuPc (fluorinated copper phthalocyanine), rubrene (5,6,11,12-tetraphenyltetracene), PDI (a derivative of perylene), etc. can be used.

[0080] The active layer 33 can be formed by a vapor deposition type (Dry Process) using these low molecular weight organic materials. In this case, the active layer 33 is, for example, a laminated film of CuPc and F １６ a laminated film of CuPc and, or a laminated film of rubrene and C ６０It may be a laminated film. The active layer 33 can also be formed by a wet process. In this case, the active layer 33 is made of a material that combines the low molecular weight organic material and the polymer organic material described above. As the polymer organic material, for example, P3HT (poly(3-hexylthiophene)), F8BT (F8-alt-benzothiadiazole), etc. can be used. The active layer 33 can be a film in which P3HT and PCBM are mixed, or a film in which F8BT and PDI are mixed. Note that the active layer 33 is not limited to a bulk heterostructure and may be of the PIN type.

[0081] The lower buffer layer 32 and the upper buffer layer 34 are provided to facilitate the arrival of holes and electrons generated in the active layer 33 at the lower electrode 31 or the upper electrode 35. The lower buffer layer 32 is provided between the lower electrode 31 and the active layer 33 and is in direct contact with both the lower electrode 31 and the active layer 33. The lower buffer layer 32 is also provided covering the second inorganic insulating film 27 between adjacent lower electrodes 31.

[0082] The upper buffer layer 34 is provided between the active layer 33 and the upper electrode 35, and is in direct contact with the active layer 33 and the upper electrode 35. The upper electrode 35 is provided on top of the upper buffer layer 34. The upper electrode 35 is formed of a translucent conductive material such as ITO or IZO. However, it is not limited to this, and the upper electrode 35 may be formed of an opaque conductive material such as silver (Ag).

[0083] In this embodiment, the lower electrode 31 is the cathode electrode of the photodiode PD, and the upper electrode 35 is the anode electrode of the photodiode PD. In this case, the lower buffer layer 32 is an electron transport layer, and the upper buffer layer 34 is a hole transport layer. The material used for the electron transport layer is ethoxylated polyethyleneimine (PEIE). The material used for the hole transport layer is a metal oxide layer. As the metal oxide layer, tungsten oxide (WO) ３ ), molybdenum oxide, etc. are used.

[0084] The lower electrode 31 may be the anode electrode of the photodiode PD, and the upper electrode 35 may be the cathode electrode of the photodiode PD. In this case, the lower buffer layer 32 may be a hole transport layer, and the upper buffer layer 34 may be an electron transport layer.

[0085] The detection device 1 has a first capacitive electrode 310 between the organic insulating film 26 and the second inorganic insulating film 27.

[0086] As shown in Figures 7 and 8, the first capacitive electrode 310 is positioned so as to exclude the portion that overlaps with the contact holes CH1 and CH3.

[0087] The first capacitive electrode 310 is arranged throughout the detection area AA common to the sensor pixels PAA, and either the drain electrode DE or the source electrode SE is connected to the lower electrode 31 via the organic insulating film 26 and a contact hole CH3 provided in the first capacitive electrode 310. The first capacitive electrode 310 is a light-transmitting conductive material such as ITO (Indium Tin Oxide).

[0088] As shown in Figures 7 and 8, the first capacitive electrode 310 faces the lower electrode 31. An auxiliary capacitance Cs is formed between the lower electrode 31 and the first capacitive electrode 310.

[0089] This is expected to expand the dynamic range of light sensitivity, thereby improving detection sensitivity.

[0090] The reference potential VR1 is covered by an organic insulating film 26 and is electrically connected to the first capacitive electrode 310 via a contact hole CH4 provided in the organic insulating film 26. Alternatively, a contact hole may be provided for each sensor pixel PAA, and the gate line GL of each sensor pixel PAA may be electrically connected to the first capacitive electrode 310 via the contact hole.

[0091] Furthermore, the sealing film 90 is provided on the upper electrode 35. Specifically, the sealing film 90 is stacked on the upper electrode 35 in the order of a first inorganic sealing film 91, an organic sealing film 92, and a second inorganic sealing film 93. The first inorganic sealing film 91 and the second inorganic sealing film 93 are formed from inorganic films such as silicon nitride films and aluminum oxide films. The organic sealing film 92 is formed from a resin film such as acrylic. The photodiode PD is well sealed by the sealing film 90, and the intrusion of moisture from the upper side can be suppressed.

[0092] (Comparative Example of Embodiment 1) Figure 9 is a schematic plan view showing a sensor circuit according to a comparative example of Embodiment 1. Figure 10 is a cross-sectional view taken along line X-X' in Figure 9. In the following description, the same reference numerals are used for components that are the same as those described in the above-described embodiments, and redundant explanations are omitted.

[0093] As shown in Figures 9 and 10, in the detection device 1a according to the comparative example of Embodiment 1, the first capacitance electrode 310 is not arranged over the entire detection area AA.

[0094] In contrast, the detection device 1 according to Embodiment 1 is provided with a first capacitive electrode 310. As a result, the detection device 1 is expected to expand the dynamic range of light sensitivity by, for example, about 4.4 times compared to the detection device 1a.

[0095] (Embodiment 2) Figure 11 is a schematic plan view showing a sensor circuit according to Embodiment 2. Figure 12 is a cross-sectional view taken along line XII-XII' in Figure 11. In the following description, the same reference numerals are used for components that are the same as those described in the above-described embodiment, and redundant explanations are omitted.

[0096] As shown in Figure 11, the detection device 1A has a second capacitance electrode 28, a first auxiliary capacitance electrode 61t, and a second auxiliary capacitance electrode 62t. The second capacitance electrode 28, the first auxiliary capacitance electrode 61t, and the second auxiliary capacitance electrode 62t overlap with the lower electrode 31 and are provided in the region enclosed by the gate line GL and the signal line SL. An auxiliary capacitance Cs is formed between the second capacitance electrode 28, the first auxiliary capacitance electrode 61t, and the second auxiliary capacitance electrode 62t, which are facing each other with an insulating film in between. The stacked configuration of the second capacitance electrode 28, the first auxiliary capacitance electrode 61t, and the second auxiliary capacitance electrode 62t will be described later.

[0097] The second capacitance electrode 28 is provided in the same layer as the gate line GL and the gate electrode GE. The second capacitance electrode 28 is provided at a distance from the gate line GL and the gate electrode GE. In a plan view, the second capacitance electrode 28 is provided overlapping with the first auxiliary capacitance electrode 61t and the second auxiliary capacitance electrode 62t. More specifically, the second capacitance electrode 28 includes a first portion 25a, a second portion 25b, and a connecting portion 25s. The second capacitance electrode 28 is formed of a metallic material. The second capacitance electrode 28 is, for example, a molybdenum tungsten alloy (MoW). The first portion 25a is a rectangular portion provided in the region enclosed by the drive transistor Tr, the gate line GL, and the signal line SL, and is positioned adjacent to the drive transistor Tr in the second direction Dy.

[0098] The second portion 25b is formed protruding from the first portion 25a in the second direction Dy and is arranged adjacent to the drive transistor Tr in the first direction Dx.

[0099] The connection portion 25s is provided so as to intersect with the signal line SL in a plan view, and connects adjacent second capacitive electrodes 28 (first portion 25a) in the first direction Dx. The width of the connection portion 25s in the second direction Dy is smaller than the width of the first portion 25a in the second direction Dy. The multiple second capacitive electrodes 28 connected by the connection portion 25s are connected to a reference potential VR1 (see Figure 9) at any point.

[0100] The first auxiliary capacitance electrode 61t is provided in the same layer as the semiconductor layer SC and is connected to the semiconductor layer SC. The first auxiliary capacitance electrode 61t includes a first portion 61ta and a second portion 61tb. The first portion 61ta is arranged adjacent to the drive transistor Tr in the second direction Dy and overlaps with the first portion 25a of the second capacitance electrode 28.

[0101] The second portion 61tb is formed protruding from the first portion 61ta in the second direction Dy. The second portion 61tb is positioned adjacent to the drive transistor Tr in the first direction Dx and is connected to the semiconductor layer SC. The first auxiliary capacitance electrode 61t is provided spaced apart from the gate line GL and the gate electrode GE in a plan view. In other words, the first auxiliary capacitance electrode 61t is provided in an island-like manner for each sensor pixel PAA.

[0102] The second auxiliary capacitance electrode 62t is provided in the same layer as the signal line SL and the source electrode SE, and is connected to the source electrode SE. The second auxiliary capacitance electrode 62t is provided in a region that overlaps with the second capacitance electrode 28 and the first auxiliary capacitance electrode 61t. The second auxiliary capacitance electrode 62t and the source electrode SE are provided covering most of the region demarcated by the gate line GL and the signal line SL, and are arranged at a distance from the gate line GL and the signal line SL. Furthermore, the second capacitance electrode 28 and the first auxiliary capacitance electrode 61t cover most of the region demarcated by the gate line GL and the signal line SL, except for the region where the drive transistor Tr is provided. As a result, a large capacitance value of the auxiliary capacitance Cs is formed.

[0103] In a plan view, the area is formed in the order of second capacitive electrode 28, first auxiliary capacitive electrode 61t, and second auxiliary capacitive electrode 62t, with the area increasing in that order. However, Figure 11 is merely an example, and the shape and area of ​​the second capacitive electrode 28, first auxiliary capacitive electrode 61t, and second auxiliary capacitive electrode 62t can be appropriately changed according to the characteristics and detection sensitivity required of the detection device 1.

[0104] As shown in Figure 12, the second capacitance electrode 28, the first auxiliary capacitance electrode 61t, and the second auxiliary capacitance electrode 62t are provided between the substrate 21 and the photodiode PD in a direction perpendicular to the substrate 21.

[0105] The second capacitance electrode 28, the first auxiliary capacitance electrode 61t, and the second auxiliary capacitance electrode 62t, which form the auxiliary capacitance Cs, are provided in the same layer as the drive transistor Tr. Specifically, the first auxiliary capacitance electrode 61t is formed in the same layer as the semiconductor layer SC, and continuously with the semiconductor layer SC. That is, the first auxiliary capacitance electrode 61t is provided on the gate insulating film 24.

[0106] The second capacitance electrode 28 is provided in the same layer as the gate electrode GE, but spaced apart from the gate electrode GE. That is, the second capacitance electrode 28 is provided on the interlayer insulating film 25 and faces the first auxiliary capacitance electrode 61t via the interlayer insulating film 25 in a direction perpendicular to the substrate 21. An auxiliary capacitance Cs2 is formed between the second capacitance electrode 28 and the first auxiliary capacitance electrode 61t.

[0107] The second auxiliary capacitance electrode 62t is formed in the same layer as the source electrode SE and continuously with the source electrode SE. That is, the second auxiliary capacitance electrode 62t is provided on the superimposed insulating film 250 and faces the second capacitance electrode 28 via the superimposed insulating film 250 in a direction perpendicular to the substrate 21. An auxiliary capacitance Cs1 is formed between the second capacitance electrode 28 and the second auxiliary capacitance electrode 62t.

[0108] The first auxiliary capacitance electrode 61t, interlayer insulating film 25, second capacitance electrode 28, superimposed insulating film 250, and second auxiliary capacitance electrode 62t are stacked in a direction perpendicular to the substrate 21. The auxiliary capacitance Cs is the sum of the auxiliary capacitances Cs1 and Cs2 formed between each layer.

[0109] The organic insulating film 26 is provided on top of the superimposed insulating film 250, covering the source electrode SE, the second auxiliary capacitance electrode 62t, and the drain electrode 63 of the drive transistor Tr. The organic insulating film 26 is an organic planarization film and has superior coverage of wiring steps and surface flatness compared to inorganic insulating materials formed by CVD or the like.

[0110] The lower electrode 31 is provided on the organic insulating film 26 and covers the bottom and inner surfaces of the contact hole CH1 formed in the organic insulating film 26. The lower electrode 31 is connected to the source electrode SE of the drive transistor Tr at the bottom surface of the contact hole CH1.

[0111] Multiple lower electrodes 31 are arranged spaced apart for each sensor pixel PAA (photodiode PD). The lower electrodes 31 overlap the second capacitance electrode 28, the first auxiliary capacitance electrode 61t, and the second auxiliary capacitance electrode 62t. In addition, the photodiode PD has a larger area than the lower electrodes 31 in a plan view and covers the upper surface and outer edge of the lower electrodes 31.

[0112] As described above, the detection device 1A according to Embodiment 2 includes a second capacitance electrode 28 provided between the substrate 21 and the photodiode PD in a direction perpendicular to the substrate 21, and a first auxiliary capacitance electrode (for example, a first auxiliary capacitance electrode 61t in the same layer as the semiconductor layer SC) provided in the same layer as the semiconductor layer SC or the source electrode SE, and facing the second capacitance electrode 28 via an insulating film.

[0113] Furthermore, the detection device 1A according to Embodiment 2 further has a second auxiliary capacitance electrode 62t, the first auxiliary capacitance electrode 61t is provided in the same layer as the semiconductor layer SC and in a continuous manner with the semiconductor layer SC, the second auxiliary capacitance electrode 62t is provided in the same layer as the source electrode SE and in a continuous manner with the source electrode SE, and the second capacitance electrode 28 is provided overlapping the first auxiliary capacitance electrode 61t and the second auxiliary capacitance electrode 62t in a plan view.

[0114] According to this, in the detection device 1A, an auxiliary capacitance Cs is added to the capacitance element Ca formed between the lower electrode 31 and the upper electrode 35 of the photodiode PD, with an insulating film separating it from the opposing second capacitance electrode 28, first auxiliary capacitance electrode 61t, and second auxiliary capacitance electrode 62t. This increases the maximum amount of charge accumulated in the capacitance element Ca and auxiliary capacitance Cs when light is irradiated onto the photodiode PD. As a result, even when a dark current flows through the photodiode PD, the amount of charge in the capacitance element Ca and auxiliary capacitance Cs after a predetermined period is larger compared to a configuration with only the capacitance element Ca, and the output signal V from the photodiode PD is increased. ｏｕｔ The maximum value increases. Therefore, the detection device 1A can improve its detection sensitivity.

[0115] (Modified Example of Embodiment 2) Figure 13 is a schematic plan view showing a sensor circuit according to a modified example of Embodiment 2. Figure 14 is a cross-sectional view taken along line XIV-XIV' in Figure 13. In the following description, the same reference numerals are used for components that are the same as those described in the above-described embodiments, and redundant explanations are omitted.

[0116] As shown in Figures 13 and 14, the detection device 1B according to a modified embodiment 2 has an auxiliary capacitance Cs added to the capacitance element Ca, and further includes a first capacitance electrode 310 over the entire detection region AA excluding the contact holes CH1 and CH3. An auxiliary capacitance Cs3 is formed between the lower electrode 31 and the first capacitance electrode 310. The auxiliary capacitance Cs is the sum of the auxiliary capacitances Cs1, Cs2, and Cs3 formed between each layer.

[0117] As a result, the detection device 1B is expected to expand the dynamic range of light sensitivity by, for example, about 1.2 times compared to the detection device 1 of Embodiment 1, thereby improving detection sensitivity.

[0118] Furthermore, when receiving light from the bottom surface of the detection device 1, the aperture ratio is insufficient, and it is necessary to increase the area of ​​the auxiliary capacitance Cs, so the auxiliary capacitance Cs may be removed.

[0119] The embodiments described above can be combined in any way as appropriate. Furthermore, any other effects and advantages brought about by the embodiments described herein that are obvious from this specification or that can be appropriately conceived by those skilled in the art are naturally considered to be brought about by the present invention.

[0120] 1, 1a, 1A, 1B Detection device 10 Sensor circuit 21 Substrate 23 Undercoat film 24 Gate insulating film 25 Interlayer insulating film 26 Organic insulating film 31 Lower electrode 35 Upper electrode 27 Second inorganic insulating film 28 Second capacitive electrode 250 Superimposed insulating film 270 Barrier film 310 First capacitive electrode Tr Driving transistor PD Photodiode PAA Sensor pixel VR1 Reference potential DE Drain electrode SE Source electrode SC Semiconductor layer SL Signal line AA Detection region GA Peripheral region

Claims

1. A detection device comprising a substrate, a first inorganic insulating film, a drive transistor, an organic insulating film, a second inorganic insulating film, a lower electrode, a photodiode, and an upper electrode, wherein the first inorganic insulating film, the drive transistor, the organic insulating film, the second inorganic insulating film, the lower electrode, the photodiode, and the upper electrode are stacked in that order, and a first capacitive electrode is provided between the organic insulating film and the second inorganic insulating film and faces the lower electrode, the first capacitive electrode is connected to a reference potential.

2. The detection device according to claim 1, comprising a detection region in which a plurality of sensor pixels, each having a photodiode, are arranged in a matrix, and a peripheral region provided on the outer periphery of the detection region, wherein the reference potential surrounding the detection region is provided in the peripheral region, the reference potential is covered by the organic insulating film, and is electrically connected to the first capacitive electrode via a contact hole provided in the organic insulating film.

3. The detection device according to claim 2, wherein the drive transistor has a semiconductor layer, a drain electrode and a source electrode, a second capacitance electrode provided between the substrate and the photodiode in a direction perpendicular to the substrate, and a first auxiliary capacitance electrode provided in the same layer as the semiconductor layer or the source electrode and facing the second capacitance electrode via an insulating film, and the second capacitance electrode is connected to a reference potential.

4. The detection device according to claim 3, further comprising a second auxiliary capacitance electrode, wherein the first auxiliary capacitance electrode is provided in the same layer as the semiconductor layer and continuously with the semiconductor layer, the second auxiliary capacitance electrode is provided in the same layer as the source electrode and continuously with the source electrode, and the second capacitance electrode is provided overlapping the first auxiliary capacitance electrode and the second auxiliary capacitance electrode in a plan view.

5. The detection device according to claim 4, wherein the first capacitive electrode is arranged throughout the detection area in common with the sensor pixels, and either the drain electrode or the source electrode is connected to the lower electrode via a through-hole provided in the organic insulating film and the first capacitive electrode.

6. The detection device according to claim 5, wherein the first capacitive electrode is ITO (Indium Tin Oxide).

7. The detection device according to claim 6, wherein the second capacitive electrode is made of a metallic material.

8. The detection device according to claim 7, wherein the material of the second capacitance electrode is a molybdenum tungsten alloy.

9. The detection device according to claim 8, wherein the photodiode is an OPD (Organic Photodiode).

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