Electron quantum bits on solid-state hydrogen isotopes

Abstract

The disclosed method of quench condensation of hydrogen isotopes for qubit applications includes using a non-hermetic sample cell geometry having an open sample cell with a chip holder surrounded by a radiation shield, and a completely opened geometry without extra chip shielding. The method may include growing thin epitaxial solid hydrogen films from the liquid phase and condensation of hydrogen gas onto the cold chip surface known as quench condensation. A corresponding electron qubit apparatus may include electrons trapped on the surface of solid hydrogen isotopes, H2, D2, and HD. The qubit apparatus may be configured as spin-qubit device based on a double-quantum dot and / or singlet-triplet qubit approach.

Description

135404.045200-ND25-009ELECTRON QUANTUM BITS ON SOLID-STATE HYDROGEN ISOTOPESCross Reference to Related Application

[0001] This application claims the benefit of U.S. Provisional Application No. 63 / 702,427, filed October 2, 2024, the disclosures of which is incorporated, in its entirety, by this reference.Government License Rights

[0002] This invention was made with government support under FA9550-23-1-0636 awarded by the Air Force Office of Scientific Research. The government has certain rights in the invention.Field of the Disclosure

[0003] The present description relates generally to quantum computing and more particularly to electron quantum bits (“qubits”) on solid-state hydrogen isotopes.Background of Related Art

[0004] Quantum electronics is a field that explores the behavior and manipulation of quantum systems for electronic applications. Quantum computing leverages the principles of quantum mechanics to solve complex problems develop new technologies and devices that can outperform classical electronic systems in terms of speed, efficiency, and functionality. Unlike classical computers based on classical bits that take either 0 or 1 state, quantum computers are built upon quantum bits (“qubits”) that can simultaneously take 0 and 1 states. Once available, their immediate applications include financial modeling, traffic optimization, drug discovery, automobile manufacturing, cybersecurity, etc.

[0005] Quantum electronics encompasses a wide range of phenomena and materials, including quantum liquids and solids, which exhibit quantum mechanical effects on a macroscopic scale due to their quantum nature. These materials can include superfluids, Bose-Einstein condensates, and various types of quantum crystals.

[0006] Successful qubits should satisfy five main criteria: ease of initialization, a long lifetime for retaining information (coherence), reliable readout, accurate gate operations, and scalability. The most mature qubit architectures include quantum dots and donor spins in- 1 -ACTIVE 715169316v1135404.045200-ND25-009 semiconductors, superconducting qubits, and qubits based on hyperfine states of rare-earth ions and neutral atoms confined in optical or radio -frequency traps. While there are a known varieties of qubit systems, none of them satisfies all five criteria, and a search for new robust qubit realizations remains a task of utmost importance.Summary

[0007] The present disclosure relates to a novel kind of quantum bits (qubits) based on single electrons trapped on the surfaces of a group of novel substrates: solid-state hydrogen isotopes, which are produced by cryogenically condensing the gas-state hydrogen molecules (H2), deuterium molecules (D2), or hydrogen-deuterium molecules (HD). The disclosed qubits have shown superior performance and hold great promise for quantum computing.Brief Description of the Drawings

[0008] FIG. 1 depicts a top-down view of an example 2-qubit device based on motional states of electrons on solid hydrogen.

[0009] FIG. 2 illustrates a trap region of the example 2-qubit device presented in FIG. 1.

[0010] FIG. 3 illustrates an example chip design for microfluidic filling of the trap region.

[0011] FIG. 4 depicts an example arrangement of a thermionic microemitter and is a crosssection of the microchannel shown in FIG. 3.

[0012] FIG. 5 depicts an example sample cell design for quench condensation of hydrogen isotopes and other rare gases in a side view.

[0013] FIG. 6 depicts an observed transition spectrum of the first eH2 qubit.

[0014] FIG. 7 depicts observed Rabi oscillations that gate the qubit onto different superposition states with varied pulse duration.

[0015] FIG. 8 depicts observed Rabi oscillation with respect to the pulse duration and the pulse detuning from the qubit transition frequency (the Rabi chevron pattern).

[0016] FIG. 9 depicts an observed and fitted Ramsey coherence time T2* of 324 ns.

[0017] FIGS. 10A and 10B depict a schematic of an example single spin-qubit device with interqubit couplers.

[0018] FIG. 11 is a flow diagram of an example method of fabricating a qubit.

[0019] FIG. 12 is a block diagram of an example quantum computing system.- 2 -ACTIVE 715169316v1135404.045200-ND25-009Detailed Description

[0020] The following description of example methods and apparatus is not intended to limit the scope of the description to the precise form or forms detailed herein. Instead, the following description is intended to be illustrative so that others may follow its teachings.

[0021] Disclosed herein are pathways to boost a performance of qubits based on motional charge states of electrons on the surface of solid neon by substituting solid neon with solid hydrogen as a substrate material for hovering electrons. Depending on the implementation, either hydrogen H2, deuterium (D2), or hydrogen deuteride (HD) can be chosen.

[0022] Uneven, porous, and patchy neon coverage in the trap region results in inhomogeneous trapping conditions leading to a faster qubit relaxation, leakage to ground, and poor predictability of simulated devices. In at least one example, solid hydrogen is a material that may be utilized to tackle these challenges. Solid hydrogen films are intrinsically much less disordered due to superior mobility of hydrogen molecules and lattice selfannealing. Moreover, much smaller thermal contraction upon cooling from the triple point to the qubit operation temperature and a smaller lattice mismatch with silicon allow growing a few nanometer thick epitaxial solid H2 films on smooth Si substrates. Hydrogen gas isotopes are flammable and require special storage conditions. This makes them a much more difficult choice for electron qubit research than helium, neon, and other rare gases.

[0023] As disclosed, a hydrogen layer on a silicon or sapphire chip can be deposited by slow solidification of liquid H2. In other implementations, H2 coverage can be made by condensing gaseous H2 onto the chip cooled to approximately 0.5-2K (quench condensation). In the former case, H2 gas is first filled into a hermetic sample cell kept above the hydrogen melting temperature where it liquefies. After that, the sample cell is gradually cooled.Liquid hydrogen may then cover the chip surface uniformly although the exact H2 layer morphology may vary.

[0024] Even small temperature fluctuations in the sample cell during H2 film growth may lead to large H2 film thickness variations. In at least one example, the negative effects of a temperature jump can be alleviated by increasing the sample cell area-to-volume ratio. For instance, in the present example, one method of tackling this challenge may include arranging a small piece of highly porous Vycor Coming 7930 glass or other similar or suitable material near the chip. In this instance, Vycor works as a ballast and smoothens the H2 film thickness- 3 -ACTIVE 715169316v1135404.045200-ND25-009 fluctuations. Thus, the H2 film thickness, in this case, becomes defined by the Vycor pore radius (e.g., approximately 3-5nm).

[0025] In the present example, a more deterministic way of delivering hydrogen into the trap region relies on principles of on-chip micro and nanofluidics. For instance, the trap region is connected to an on-chip liquid hydrogen reservoir via an open microchannel etched in silicon. Once the reservoir is filled with liquid hydrogen, H2 spontaneously flows into the trap region dragged in by the capillary action. A graphene or carbon-nanotube thermionic microemitter may be installed in the channel or reservoir itself to provide electrons locally and then deliver them into the trap region in a controllable manner. This example design can also be used for multi-qubit devices.

[0026] In general, quench condensation relies on condensing H2 gas onto the chip kept at approximately T=0.3-2K. Here, the H2 gas nearly instantaneously freezes when it lands on the chip. In the present example, the disclosed method includes a controlled deposition of thin H2 coverage for qubit applications. In one implementation, the substrate during the H2 film deposition is kept below approximately T=0.5K. This allows monitoring of the H2 layer thickness in situ through any suitable means, including the resonator frequency shift. The deposited H2 layer is then annealed at around T=2K for about an hour. In another implementation, H2 coverage is deposited onto the chip at approximately T=2K without further annealing. These approaches allow one to adopt an open, non-hermetic, sample cell geometry which significantly reduces the sample cell complexity and price. An H2 filling system in this case can also be conveniently embedded in the fast sample exchange unit of a dilution refrigerator or refrigerator itself.

[0027] In another example, a device is used to envision a quantum bit based on charge states of an electron trapped on the surface of solid molecular hydrogen. The device is defined lithographically on a low-loss substrate such as silicon, sapphire, or other suitable substrate. The device includes, but is not limited to, a configurable set of DC electrodes forming an electrostatic trap that holds electrons, readout and coupling microwave resonators, and a set of low-pass filters for noise reduction. An example electron trap implementation consists of a trap, resonator, and guard electrodes. The device is covered with a thin layer of solid hydrogen that forms an inert medium to support electrons levitating about 2nm above its surface. Depending on the implementation, the H2 layer thickness may vary from 1 monolayer to a few tens of nanometers. While the electrons are confined vertically by the mutual action of H2 film image charge and Pauli repulsion, the on-chip trap ensures - 4 -ACTIVE 715169316v1135404.045200-ND25-009 horizontal confinement. The qubit states are manipulated by short microwave pulses and read out through the frequency shift of the nearby superconducting resonator. Extra coupling superconducting resonators can be used to couple qubits in an implementation of multi-qubit devices.

[0028] In the third embodiment, the qubit is based on spin states of electrons trapped on solid-phase parahydrogen. More precisely, example device layouts and measurement methods may conceptually rely on, but are not limited to, a double quantum dot design with a spin- state readout through the Pauli blockade taking place between two electrons in adjacent quantum dots. In this particular implementation, the quantum dots are defined by a set of metallic electrostatic gates deposited onto a high-resistivity silicon or sapphire substrate. A thin solid layer of parahydrogen is deposited on top of the device to hold electrons. After that, electrons are deposited on top of the H2 film by driving an electric current through a nearby tungsten filament or microemitter. In other implementations, field emission or photoemission can be adopted. After that, the device can then be stored for a day or two to carry out ortho-para conversion in the hydrogen film.

[0029] In this particular implementation, the qubit is manipulated in the Coulomb blockade regime by voltage pulses applied to the gates. The magnetic field gradient from the nearby micromagnet helps synthesize an oscillating magnetic field required to flip the electron spin. The spin projection after manipulation is estimated through an outcome of the Pauli blockade using a separate nearby single electron transistor working as a charge sensor. In another implementation, the spin projection can be read out using radiofrequency (rf) gate reflectometry. An estimated coherence time of such spin qubits is of order seconds.

[0030] In still another implementation, the qubit coherence can be pushed even further if qubits rely on composite singlet and triplet spin states of two coupled electrons. In such a configuration, the qubit is also insensitive to uniform magnetic field fluctuations.

[0031] Aspects of the present disclosure depict an implementation of a quantum bit based on charge and spin states of an electron on the surface of solid hydrogen isotopes. Unlike classical computers, based on classical bits that take either 0 or 1 state, quantum computers are built upon quantum bits (qubits) that can simultaneously take 0 and 1 states. Qubits are extremely fragile. Their states can be quickly destroyed by environmental disturbances. To protect qubit states, the environment must be cooled to extremely low temperatures (only a tiny fraction of a degree above absolute zero) to suppress thermal noise.- 5 -ACTIVE 715169316v1135404.045200-ND25-009

[0032] Accordingly, there are different approaches to realize qubits. Solid-state qubits based on fabricated superconductor quantum circuits and semiconductor quantum dots have demonstrated near-term promise toward on-chip quantum information processing. They feature coherence longevity, fast manipulation, operation fidelity, and inter-qubit connectivity. However, compared with natural qubits, such as trapped ions and atoms, solid- state qubits have shorter coherence times and lower gate fidelities, despite shorter gate times.

[0033] The shorter coherence times and lower gate fidelities for fabricated superconductor / semiconductor qubits are commonly believed to originate from the imperfection of host materials. In the past decades, tremendous progress was made in growing materials of a higher crystalline quality and lower spinful isotopes. However, the generally unavoidable imperfections in any conventional materials can still impose ultimate limits on qubit performance. In these circumstances, unconventional materials of intrinsic cleanness offer potentially revolutionary solutions.Electrons on the surface of cryogenic solids

[0034] In the disclosed example qubit platform, electrons serve as quantum information carriers. Electron spin and charge qubits operate in a number of superconductor and semiconductor systems where electrons are essentially occluded inside these solid-state media. Unlike previous efforts, in the present disclosure a qubit platform utilizes isolated single electrons trapped on the surface of ultraclean solid hydrogen in vacuum.

[0035] More particularly, in conventional semiconductor quantum dot qubit implementations, electrons used as qubits tunnel from the attached bias leads. In the disclosed architecture, however, electrons are thermionically emitted from a tungsten filament suspended above a chip 502 or from another material such as a graphene sheet, a carbon nanotube 401 or other suitable material. In other implementations, electrons can be obtained by field emission, photoemission, or by other suitable means.

[0036] Due to a potential barrier of about 0.3eV, electrons landing on the surface of solid hydrogen do not penetrate through the H2 (D2, HD) surface but rather hover around 2nm above it (see Table 1, below). Here they are held by the dual actions of Pauli’s exclusion and image charge attraction from the hydrogen film. At temperatures below a few Kelvin, an electron on solid H2 stays confined in the ground vertical state similar to the electron in a hydrogen atom.- 6 -ACTIVE 715169316v1135404.045200-ND25-009

[0037] In the disclosed architecture, an in-plane electric potential from fabricated electrodes further confines the electron along the surface. This implementation can be seamlessly integrated with on-chip quantum circuits and traps (dots), allowing efficient qubit manipulation via quantum microwave and transport, as that in superconductor / semiconductor qubits.

[0038] As illustrated in Table 1 below, the main properties of solid hydrogens and neon: molar volume change AVm, triple point temperature 7% nuclear spin I, energy for electron injection into solid, Vo. Note that in HD, H and D spins can be flipped separately due to the absence of wavefunction symmetry restrictions. *AVmmeasured from 23K.Table 1Solid-phase molecular hydrogens

[0039] It is believed that solid neon is the only noble-gas solid so far used as a substrate for electron qubits. In the present disclosure, however, solid hydrogen, as a non-noble-gas solid, is the material used to suspend the floating electrons. The molecular hydrogen isotopes: hydrogen (H2), deuterium (D2), and hydrogen deuteride (HD), are much lighter than neon. Like neon, molecular hydrogens are ultra-clean and chemically inert at low temperatures.

[0040] Due to the light mass, hydrogen molecules remain mobile well below T3, so H2 films tend to self-anneal and naturally reduce the number of defects and lattice imperfections. Surface diffusion can also trigger H2 film reorientation at T as low as around 2.5K (0.1877). The heavier isotopes, HD and D2, have less pronounced quantum properties, and are more akin to solid neon where Ne atom diffusion activates at a higher temperature, about 8K (0.3377).- 7 -ACTIVE 715169316v1135404.045200-ND25-009

[0041] Hydrogen gas and its isotopes are flammable and often require special storage conditions. This makes them a much less obvious choice for electron qubit research than helium, neon, and other noble gasses.Ortho-para symmetry

[0042] Another notable distinction of hydrogen from neon and other monoatomic noble gasses is the existence of spin isomers (see Table 1). The homonuclear hydrogen molecules, H2 and D2, are made of two indistinguishable atoms and their rotational quantum numbers (J) and nuclear spin (7) are interrelated through the molecular wavefunction symmetry. For instance, H2 gas at 300K contains 75% of ortho-H2 molecules (7=1, 7=1) and 25% of para-H2 molecules with J=Q, I=Q. H2 gas with such a spin isomer ratio is called normal. Normal (300K) D2 at 300K contains 33% of para-molecules with 1=1 and 66% ortho-D2, J=Q 11% 7=0, 55% 7=2. Rotational transitions with AJ=±7 are forbidden for free H2 and D2 molecules. In solid H2 and D2, they proceed with a rate of about 1% / hr. As a result, H2 and D2 solids right after the deposition contain a large non-equilibrium fraction of J=1 molecules.

[0043] H2 and D2 molecules in the solid phase relax into their ground J=0 state by releasing 170.5 and 86K of energy per molecule as phonons, respectively. Non-equilibrium phonons can elevate the H2 (D2) film temperature above that of the environment. Hydrogen deuteride, HD, is a heteronuclear molecule so the AJ=± / transitions are allowed, making solid HD well thermalized to the environment. For thin H2 and D2, ortho-para conversion is catalyzed by surface electrons themselves as well as traces of other paramagnetic species such as hydroxyl radicals (OH), adsorbed molecular oxygen O2, or unpaired hydrogen atoms (H) inevitably remaining on device surfaces. In some implementations, initial parahydrogen content in the H2 film can also be enriched using an ortho-para converter.

[0044] An equilibrium fraction of ortho-H2 in fully converted solid hydrogen at lOmK is essentially zero. An admixture of the only magnetic molecules, D2 and HD, able to reach the sample cell in commercial research grade hydrogen is below Ippm, so no special isotopic purification is required. Thus, thin parahydrogen films are capable of providing an ideal diamagnetic substrate for levitating electrons.Thermal contraction

[0045] Another property of solid parahydrogen favorable for the examples of the present disclosure is much smaller thermal contraction upon cooling from the triple point to the qubit- 8 -ACTIVE 715169316v1135404.045200-ND25-009 operation temperature of lOmK (see Table 1). The thermal contraction is 1.1% for solid para-H2 as compared with 4.0% for solid Ne. The other isotopes, HD and D2, as well as normal H2 have slightly larger thermal expansion coefficients. A smaller differential thermal contraction makes solid para-H2 less prone to cracking near the interface with a silicon or sapphire substrate upon cooling from the triple point. One of the ways to tackle film cracking used to grow bulk H2 crystals is annealing them right below the triple point. Annealing rounds the film edges and decouples it from a much stiffer substrate or sample cell walls. In implementations related to this disclosure, laser annealing can be conveniently used to locally melt the H2 film in the trap region.W etting / Epitaxy

[0046] Due to strain, thin films of hydrogen isotopes and neon undergo a transition from complete to partial wetting (de-wetting) of most substrates below their triple points. As a result, uniform nanometer- and micron-thick films discussed in the disclosure tend to transform into bulk crystallites connected by a few-monolayer thick uniform film. This so- called Stransky-Krastanov growth can be tackled by growing H2 on matched substrates. Substrate smoothness and careful substrate cleaning also facilitate epitaxy.

[0047] Depending on the growth conditions, thickness, and ortho-para content, hydrogen and its isotopes can crystallize into either hep or fee lattice with the latter one to be more stable at temperatures below 4K. The / cc lattice constant of solid H2 is 5.31 A which is close to 5.43 A for that of silicon. Frank-van der Merwe (layer-by-layer) epitaxial film growth is possible when the lattice mismatch between the film and substrate is below 2%. A 2.2% lattice mismatch between Si and solid para-H2 is close to this criterion. An equilibrium fewnanometer thick solid hydrogen film is thus, in principle, attainable on a smooth and well- cleaned silicon surface. The lattice constant of / cc solid neon, 4.47A, has a much greater mismatch with silicon.

[0048] Another important factor for this disclosure is that uniform H2 films of an arbitrary thickness can be deposited by quench condensation. Due to a higher mobility of H2 molecules on the substrate, quench-condensed hydrogen films are much less disordered than those of Ne and heavier noble-gas solids. Nearly defect-free hydrogen films can be created by quench-condensing H2 gas onto the chip kept at T=2K which is already high enough for a short-range H2 diffusion and self-annealing but below T=2.5K when the H2 surface diffusion reorients smooth hydrogen films into disordered crystallites.- 9 -ACTIVE 715169316v1135404.045200-ND25-009Advantages of hydrogens over neon

[0049] In the present disclosure, a critical improvement to the electron-on-neon hybrid architecture is introduced by substituting neon coverage with a nanometer-thick layer of solid molecular hydrogen and its isotopes: deuterium and hydrogen deuteride.

[0050] The improvements come from at least the following superior properties of solid hydrogens as compared with neon:• inherently more uniform thin solid films due to a greater mobility of H2 molecules and self-annealing of lattice defects;• a smaller lattice mismatch with silicon;• smaller thermal contraction upon cooling from the triple point to lOmK;• a higher Debye temperature (lower phonon density of states) and thus slower qubit relaxation due to thermal phonons;• an ideal diamagnetic parahydrogen environment for spin qubits. Ortho-para conversion is fast in thin H2 films. An admixture of magnetic HD and D2 molecules in a regular research-grade gas is well below Ippm. No need for isotopic purification. Researchgrade neon gas contains 2700ppm of magnetic 1= / 221Ne isotope, so isotopic purification is required for hosting spin qubits; and• In situ H2 film thickness control during quench condensation. Unlike neon requiring higher temperatures, the sample cell can be easily kept below 0.5K during the H2 deposition, so the frequency shift of resonator 109 can be used to determine the H2 film thickness.Solid argon as a spin-free lattice-matching layer

[0051] In some implementations of the present disclosure it is beneficial to utilize solid argon as another candidate for being a substrate for electrons, especially for spin qubits. All stable isotopes of solid argon have a zero spin. However, unlike hydrogen, neon, and helium, it has a slightly positive electron affinity, so electron attachment to the argon atom is exothermic. The electron injection potential into solid argon is slightly negative, so they will naturally tend to enter the solid. In one of the examples, the electron injection potential can be engineered by depositing monolayers of neon, hydrogen, or helium on top of solid argon. The / cc lattice constant of solid argon at 4.2K and below is 5.31 A which is matched with the fee solid hydrogen (5.31 A) lattice and nearly matches with that of silicon (5.43 A). Finally,- 10 -ACTIVE 715169316v1135404.045200-ND25-009 the electron confinement can be further adjusted through the DC field created by on-chip electrodes.

[0052] In still other examples of the present disclosure, the surface of hydrogen films can also be covered with a thin helium layer to support the hovering electrons. Depending on the implementation, this can either be a single monolayer of3He or4He or a thicker layer. In at least one example, this can employ a non-superfluid4He coverage, which is 0.5 helium monolayers on solid H2, 0.8 monolayer on solid HD and 1 monolayer on solid D2. In another embodiment, a thicker layer may be used as desired.Device

[0053] Referring to FIG. 1, a schematic of a two-qubit device 100 that serves as an embodiment of a single qubit device and a prototype for multi-qubit devices is illustrated. The figure shows exemplary on-chip superconducting circuitry for initialization, manipulation, and readout of the electron-on-hydrogen qubits. The first qubit electron trap of the device 100 is shown in FIG. 2. It should be noted that the same discussion applies to the second qubit of device 100 not illustrated in FIG. 2.

[0054] In this implementation, the electrons forming the two qubits levitate above the solid H2 (HD, D2) surface at the open ends (in a “clamp” shape) of quarter-wave coplanar doublestrip line resonators (109) and its branches (109a and 109b). All the metal lines and ground planes are made either of superconducting niobium (Nb) or high-kinetic inductance superconducting materials such as TiN, NbN or NbTiN, deposited on a high resistivity silicon or sapphire substrate. A “trap” electrode (105a), charged with positive voltage, plugs into the open end of the “resonator” (109a, 109b). Four “guard” electrodes, named as “trap guards” and “resonator guards” (107a, 107b, 108a, 108b) surrounding the trap, applied with voltages in pairs, provides precise tuning to the trapping potential and thus the electron transition frequency about the resonator frequency. The double stripline resonator is coupled with coplanar waveguides (CPWs) with the input and output coupling rate Kin and Kmt, respectively, in a transmission measurement configuration (region 104a and 104b). Each DC electrode, biased at Vr, Vf, Vrg, Vtg, respectively, has its own on-chip low-pass LC filter (103a- 103q) that isolates the electron and resonator from the DC electrodes at micro wave frequencies to protect the qubit lifetime and resonator quality factor. The metallic electron sinks (106a-106f) serve to remove excess electrons from the device and reduce the charge- 11 -ACTIVE 715169316v1135404.045200-ND25-009 noise. The device can also be equipped with a liquid hydrogen reservoir (302) and channels (301) for delivering hydrogen into the trap region by means of microfluidics.

[0055] The example device (502) is wire-bonded to a printed-circuit board (504) which is then attached to a sample holder residing at the mixing chamber plate of a3He-4He dilution refrigerator operating at T=10-30mK.

[0056] Other arrangements of electrodes and trapping / guard electric fields may provide a qubit device with access to a plurality of excited states in either or both the x- and y-motion states, as well as arrangements may confine either the x- or y-motion states to a ground state. In the embodiment of FIG. 1 and FIG.2, the z-motion states are confined to the ground state as the electron is trapped in the z-direction (e.g., in and out of the plane of the page) against the trap region presented in FIG.2.

[0057] While not explicitly illustrated, it should be understood by one of ordinary skill in the art that the example device 100 of FIG. 1 may include other elements for performing manipulation and reading of states of the electron. For example, the pads 104a and 104b may be electrically coupled to an amplifier and / or filters to amplify and filter the electrical signal indicative of the state of the electron. Further, the trap electrode 105, probe pad 104b, guard electrodes 107a- 108b, sensing electrode 104a, and resonator 109a, 109b may be electrically coupled to one or more preamplifiers, amplifiers, highpass filters, lowpass filters, bandpass filters, notch filters, integrated circuits, or other electrical components. Further, the qubit platform 100 may include one or more electrical grounds as required to generate the first and second guard electrical fields, and the trap electric field.Growing H2 coverage from the liquid phase

[0058] Depending on the implementation, the solid H2 (HD, D2) layer may be a monolayer of solid H2 or a layer of solid H2 less than approximately 15 nanometers thick. The layer of solid H2 may be any thickness for trapping an electron against the solid H2 using electric fields as described herein.

[0059] In an implementation where the H2 layer is grown from the liquid phase, H2 gas is first filled into the sample cell kept above the triple point, and then the cell is slowly cooled below T3. The amount of filled H2 is adjusted based on the desired resonator shift and the electron-photon coupling strength. In at least one example, the thicknesses of approximately 3-5nm may be optimal for obtaining the strongest electron-photon coupling.- 12 -ACTIVE 715169316v1135404.045200-ND25-009

[0060] In one of the implementations, the film growth procedure can be as follows. First, the sample cell temperature is stabilized at temperature above the triple point and the H2 gas is injected from the room-temperature gas handling system in discrete micromole portions. When a liquid layer starts building up in the sample cell, the condensing line pressure approaches the H2 saturated vapor pressure. After the film is deposited and cooled below the triple point T3, the film is annealed by shining light from an optical fiber (509) installed near the chip (502). The fiber is also used to heat the substrate and keep it warmer than the sample cell walls during the initial cooldown from room temperature. This helps clean the chip surface from adsorbed water and organic molecules, so they become cryopumped by colder sample cell walls.

[0061] With the described exemplary procedure, a 2.5nm smooth and uniform H2 film can be grown from the liquid phase on a smooth and well-cleaned silicon surface before it starts coalescing into polycrystallites. In at least one instance, this thickness provides a nearly optimal electron-photon coupling strength.Integration with microfluidic devices

[0062] Deterministic filling of H2 into the trap region is particularly important for many-qubit devices. In region 300 depicted is a chip arrangement for microfluidic filling of the trap region (200) with liquid hydrogen. Here a reservoir (302) with a typical radius of a few tens of pm and depth of about 1pm is etched in the chip and then filled with liquid hydrogen during the condensation of H2 gas into the sample cell. The reservoir is connected to the trap region (200) via a lx 1pm etched channel (301) with a length of 10- 100pm. The reservoir is filled with liquid H2 just by uniformly condensing saturated H2 vapor onto the chip surface. In this implementation, liquid hydrogen fills the reservoir since its bottom is the lowest point on the chip. Once there is liquid hydrogen in the reservoir (302), the capillary force starts dragging it into the channel and filling the trap region (200). The microchannel geometry should satisfy the main requirement for the open channel spontaneous capillary flow:Pf cosO > — Equation 1Pw

[0063] here & is the wetting angle for liquid hydrogen on silicon (sapphire), pwis a perimeter of the channel wall cross-section, p / is the free perimeter of the open cross-section. For the rectangular channel, cosQ > w / (2h + w), Equation 2- 13 -ACTIVE 715169316v1135404.045200-ND25-009

[0064] Here w is the channel width and h are the channel height. Liquid hydrogen and neon are expected to completely wet silicon, sapphire, and metal substrates above the triple point, but their exact wetting angles are unknown although they should be close to 0. Choosing too shallow channels should be done with caution since this may violate the condition of a spontaneous capillary flow.

[0065] In one implementation, the reservoir can also be utilized as a storage for electrons which can then be shuttled into the trap region one by one. Such a reservoir or channels going to the trap region can be equipped with a thermionic microemitter (400) where a graphene sheet or a single- wall carbon nanotube (401) works as a filament. The microemitter will be residing far enough from the trap region, so only electrons intentionally transferred through the microchannel will reach it. This will greatly reduce the number of stray electrons in the trap region and lower the qubit charge noise. Such an emitter can operate in a pulse mode using sub-microsecond pulses, so the sample cell overheating can be largely avoided. The carbon nanotube / graphene emitter (401) is connected to ohmic contacts (402a, 402b) deposited onto the silicon (sapphire) chip above the nanochannel (301). A metallic electrode (403) is deposited onto the channel bottom to shuttle electrons into the trap region. Liquid hydrogen is filled into the channel from the storage reservoir (302) to the trap region (200).

[0066] In another implementation, the cell can be equipped with a conventional tungsten filament (506) residing next to the chip (502).A Vycor glass ballast for thin H2 films

[0067] The saturated vapor pressure and chemical potential of thin liquid H2 films have a steep dependence on temperature. Therefore, any small temperature fluctuations in the sample cell will lead to strong variations of the liquid H2 layer thickness. Such fluctuations can be significantly dampened by arranging a piece of porous material in the sample cell to work as a ballast. Vycor Corning 7930 glass (505), a vacuum and low-temperature compatible material, has a surface area of about 100m2 / g and a pore radius of 3-5nm. The H2 film thickness in the sample cell will then be defined by the H2 layer thickness in the Vycor glass pores, i.e. the pore radius. An H2 layer thickness of a few nanometers can be optimal for reaching strong electron-photon coupling. In one of the implementations, a 1g piece of Vycor glass can be glued near the chip using Stycast 2850 epoxy as presented as 505.- 14 -ACTIVE 715169316v1135404.045200-ND25-009Quench condensation of H2

[0068] Previous implementations of the electron qubits on the surface of liquid helium and solid neon relied exclusively on using hermetic sample cells. In the present disclosure, depicted is a novel approach to the sample cell design. The main characteristics are as follows: quench condensation for preparing H2 and adopting a non-hermetic sample holder design (500). In one of the implementations, the sample cell walls work only as a radiation shield (507), in another implementation, they can be abandoned completely. In the example illustrated in FIG.5, the chip (502) with deposited H2 (501) is attached to the sample holder (504) and equipped with a tungsten filament (506), onboard filters, connectors, and other surface mounted elements. (503a, 503b). An optical fiber for cleaning the chip surface and annealing the H2 film is shown as 509. The hydrogen condensing line is labeled as 508. In another implementation, a vacuum-tight sealed variant of the open sample holder 500 can be used to grow H2 from the melt. For that, a small, of order 1g, piece of Vycor glass (505) is installed near the chip (502).

[0069] In a perspective, H2 quench condensation approach has at least three major advantages: avoiding triple point de- wetting of H2 and Ne; avoiding H2 film cracking due to differential thermal contraction and a significant reduction of sample cell complexity and overall cost due to the open design, and in situ thickness control by measuring the frequency shift of superconducting resonator (109).Quench condensation procedures

[0070] Because the sample cell temperature can be kept below 0.5K during the deposition, the superconducting resonator (109) frequency can be used as a knob for the H2 film thickness control. In one of the implementations, an H2 film can be condensed directly from the room temperature gas handling system. In another implementation, H2 can be first condensed into the filling line 508 (or a special H2 volume) and then recondensed onto the chip.

[0071] Condensing H2 first into the condensing line or a H2 source volume and then recondense H2 by sublimating it from the H2 volume. Here the condensation rate can be arbitrarily adjusted within several orders of magnitude by stabilizing the H2 source / line temperature with a PID controller.- 15 -ACTIVE 715169316v1135404.045200-ND25-009

[0072] In this implementation, the sample cell temperature can be kept below 0.5K, so the frequency shift of the resonator (109) can provide the thickness of H2 coverage in real time. The H2 film then should be annealed at T=2K.

[0073] In another implementation, H2 coverage can be deposited by keeping the cell at 2K, so no further annealing is required. However, in this case, the H2 coverage thickness cannot be measured in situ with NbN, TiN, or NbTiN resonators unlike pure Nb devices.Experimental demonstration of the first charge electron-on-solid hydrogen qubit

[0074] Through the first series of experiments on eH2 qubits, the inventors have successfully extracted the key information of a single eH2-qubit performance, before any optimization is taken. The most important performance metric, called the Ramsey coherence time T2*, is already 6-fold better than their observed first eNe qubit. Three experimental graphs are included in this application. 600: Observed transition spectrum of the first eH2 qubit showing a quadratic shape and a charge sweet spot where the qubit is resilient to environmental charge noise. 700: Observed Rabi oscillations that gate the qubit onto different superposition states with varied pulse duration. 800: Observed Rabi oscillation with respect to the pulse duration and the pulse detuning from the qubit transition frequency, called the Rabi chevron pattern. 900: Observed and fitted Ramsey coherence time T2* of 324 ns.Concept of a spin qubit based on an electron on H2

[0075] Along with the charge qubit, disclosed is a concept of the qubit based on spin states of electrons trapped on the surface of solid hydrogen (region 1000). Being resilient to charge noise, spin qubits of electrons on the surface of solid hydrogen and neon are predicted to have an unprecedentedly long coherence time, T2E, of order tens of seconds. This value should be even longer for the qubit implementation with a parahydrogen coverage where an equilibrium fraction of spinful ortho-molecules at lOmK is essentially zero.

[0076] An example embodiment of a single spin-qubit device inspired by semiconductor quantum dot qubits is presented in FIG. 10. The main and critical distinction is that the electron (1001a) is floating on the surface of solid hydrogen (1002), not inside the semiconductor. Depending on the implementation, the device is nanofabricated on a silicon or sapphire substrate (1003) with pure Nb, or TiN, NbN, or NbTiN electrodes.

[0077] In this implementation, the single-qubit device has a double-quantum dot design with a separate single-electron transistor (1005) working as a charge sensor and a cobalt- 16 -ACTIVE 715169316v1135404.045200-ND25-009 micromagnet (1009) to provide a static magnetic field gradient. The double dot is defined by the pair of guard electrodes (1006a, 1006b), trap electrodes (1007a, 1007b), and tunnel barrier electrodes (1008a, 1008b), along with resonators (1004a, 1004b).

[0078] The qubit is manipulated in the Coulomb blockade regime by voltage pulses applied to the left trap electrode (1007a) of the first trap which in the presence of a magnetic field gradient produces an oscillating magnetic field capable of flipping the electron spin.

[0079] The double-quantum dot arrangement allows carrying out spin readout based on the Pauli spin-blockade taking place for two spins in adjacent quantum dots. In this implementation, the second electron (1001b) has essentially an auxiliary function. The current through the double quantum dot drastically depends on the mutual spin orientation. If the two spins are aligned in the initial (1,1 - a number of spins at each dot) state, the formation of the (0,2) state is forbidden due to the Pauli principle. If manipulation flips the first spin, the charge sensor near the second quantum dot can then register the presence of two electrons in the second quantum dot.

[0080] In another implementation, the rf gate reflectometry approach can be applied to measure the spin projection using the same double quantum dot arrangement. In this implementation, an extra inductor is added on the chip to electrode 1007b, so the inductor, stray capacitance, and quantum capacitance defined by the electron spin state form a resonance tank circuit. The resonance frequency of this circuit shifts to blue or red depending on the qubit spin orientation.

[0081] An even better performance is expected for singlet-triplet qubits which can be built in the quantum degenerate regime for two-dimensional electron gas (2DEG) on solid H2. The singlet-triplet qubits rely on the singlet, So, and triplet, To, states of two electrons coupled by exchange interaction. In such a configuration, the qubit becomes insensitive to uniform magnetic field fluctuations, thus an even longer coherence time than for single-spin qubits is expected.

[0082] FIG. 11 is a flow diagram of an exemplary method 1100 for fabricating a qubit device as described herein, such as portions of the system(s) illustrated in FIGS. 1-5, 10, and / or 12. The steps shown in FIG. 11 can be performed by any suitable fabrication system and / or methodology. In one example, each of the steps shown in FIG. 11 can be represented by multiple sub-steps, examples of which will be provided in greater detail below.- 17 -ACTIVE 715169316v1135404.045200-ND25-009

[0083] As illustrated in FIG. 11, at step 1102 includes forming, in a substrate, a trap region connected to a reservoir via a channel. For example, reservoir 302, channel 301, and trap region 200 may be etched in a substrate 1003. In some examples, the substrate may be plated / preplated with a monolayer-thick layer of solid argon. For example, solid argon may be deposited onto the substrate (e.g., silicon and / or sapphire) for lattice matching.

[0084] Step 1104 includes depositing a solid diatomic layer (e.g., a solid molecular hydrogen isotope layer) onto the substrate to fill at least the trap region. For example, the solid molecular hydrogen isotope layer (e.g., H2, D2, and / or HD) may be deposited onto the substrate using the quench condensation described herein (e.g., from gas to solid and / or gas to liquid to solid).

[0085] In some examples, the liquid phase diatomic (e.g., liquid molecular hydrogen isotope) may be deposited into the reservoir, which may then fill the channel and the trap region via capillary force. As described herein, dimensions of the reservoir, channel, and / or trap region may be selected to allow this capillary force.

[0086] Step 1106 includes annealing the solid molecular hydrogen isotope layer. For example, optical fiber 509 may be used to anneal the solid molecular hydrogen isotope layer. In some examples, the solid molecular hydrogen isotope layer may also be plated / preplated with at least one of3He or4He.

[0087] Step 1108 includes delivering one or more electrons to the trap region on the solid molecular hydrogen isotope layer via the channel. For example, a local microemitter (e.g., carbon nanotube 401) in the channel or reservoir, thermionic emission from tungsten filament 506, etc., may be used to direct one or more electrons to the trap region.

[0088] Additional processing may be performed as needed, including adding a monolayer (e.g., of3He or4He) onto the diatomic layer as described herein, as well as additional patterning, masking, etching, depositing of materials to form additional structures (e.g., electrodes such as resonators / CPW 1004a, 1004b, guard electrodes 1006a, 1006b, trap electrodes 1007a, 1007b, tunnel barrier electrodes 1008a, 1008b, transistor 1005, micromagnet 1009, etc.) in any order as needed (e.g., before, during, and / or after any of the steps described herein). In other words, the fabrication process described with respect to FIG. 11 is not restricted to the steps discussed above, and may include additional steps as needed for completing a qubit device described herein.- 18 -ACTIVE 715169316v1135404.045200-ND25-009

[0089] FIG. 12 illustrates an example quantum computing environment 1200 including a quantum computing system 1202 and in some implementations, a classical computing device 1204. Quantum computing system 1202 can refer to any device capable of performing quantum calculations and / or quantum algorithms using data / information encoded in qubits and through manipulations of the qubits. Quantum computing system 1202 includes a quantum processing device 1210, a control system 1212, and an input / output device 1214. Quantum processing device 1210 corresponds to a device capable of implementing one or more qubits (e.g., each qubit being a particle that maintains a quantum state and implemented with qubit devices described herein such as qubit device 100 or any other qubit apparatus described herein) akin to a quantum memory, as well as perform operations on the qubits, akin to a quantum processor.

[0090] Control system 1212 corresponds to hardware and / or software that can interface with or otherwise interact with quantum processing device 1210 for executing quantum programs, quantum algorithms, and / or other quantum computing tasks. For example, control system 1212 can apply control signals to program, manipulate (e.g., change states), and / or read / measure quantum states of the qubits of quantum processing device 1210, for instance to apply one or more quantum circuits. A quantum circuit can correspond to a model for quantum computation that can include quantum gates (e.g., analogous to logic gates of a classical computer), measurements (e.g., measuring a qubit which can involve interaction with a quantum measurement device that collapses a superposition of the qubit into a classical state to observe a property such as position, momentum, spin, energy, etc. and extract information), initializing qubits, etc. In some examples, control system 121 may provide signals / voltages to qubit device electrodes of quantum processing device 1210 (e.g., electrodes which may correspond to one or more of trap electrode 105, probe pad 104b, guard electrodes 107a- 108b, sensing electrode 104a, resonator 109a, 109b, guard electrodes (1006a, 1006b), trap electrodes (1007a, 1007b), and tunnel barrier electrodes (1008a, 1008b), resonators (1004a, 1004b), other on-chip electrodes as described herein, etc.) to perform trapping, programming, and / or other qubit operations as described herein. In some implementations, control system 1212 can interface with or otherwise be integrated with a classical computing system (e.g., classical computing device 1204) for implementing quantum circuits (e.g., also referred to as quantum instructions) which in some examples can be written in a quantum programming language.- 19 -ACTIVE 715169316v1135404.045200-ND25-009

[0091] Input / output device 1214 can correspond to any interface device for inputting data into quantum computing system 1202 and / or outputting data from quantum computing system 1202. For instance, control system 1212 can receive quantum instructions (e.g., from classical computing device 1204) via input / output device 1214, perform the quantum instructions using quantum processing device 1210, and output a result of the quantum instructions through input / output device 1214, such as to classical computing device 1204 for further processing / display.

[0092] In some implementations, quantum computing environment 1200 can be a hybrid computing architecture having components of both quantum computers (e.g., quantum computing system 1202) and classical computers (e.g., classical computing device 1204). FIG. 12 illustrates an example classical computing device 1204 that in some implementations can interface with, be integrated with, and / or otherwise operate with a quantum computing system, as described herein. Classical computing device 1204 can correspond to a standalone computing device, such as a desktop computer, a laptop computer, a server, a tablet device, a mobile device, a smartphone, a wearable device, an augmented reality device, a virtual reality device, a network device, and / or an electronic device that can be integrated with another device. As illustrated in FIG. 12, classical computing device 1204 includes one or more memory devices, such as memory 1220. Memory 1220 generally represents any type or form of volatile or non-volatile storage device or medium capable of storing data and / or computer- readable instructions. Examples of memory 1220 include, without limitation, Random Access Memory (RAM), Read Only Memory (ROM), flash memory, Hard Disk Drives (HDDs), Solid-State Drives (SSDs), optical disk drives, caches, variations, or combinations of one or more of the same, and / or any other suitable storage memory.

[0093] As illustrated in FIG. 12, example classical computing device 1204 includes one or more physical processors, such as processor 1206, which can correspond to one or more processors (e.g., a host processor along with a co-processor, which in some examples can be separate processors). Processor 1206 generally represents any type or form of hardware- implemented processing unit capable of interpreting and / or executing computer-readable instructions. In some examples, processor 1206 accesses and / or modifies data and / or instructions stored in memory 1220. Examples of processor 1206 include, without limitation, one or more instances of chiplets (e.g., smaller and in some examples more specialized processing units that can coordinate as a single chip), microprocessors, microcontrollers, Central Processing Units (CPUs), Field-Programmable Gate Arrays (FPGAs) that implement - 20 -ACTIVE 715169316v1135404.045200-ND25-009 softcore processors, Application-Specific Integrated Circuits (ASICs), systems on chip (SoCs), digital signal processors (DSPs), Neural Network Engines (NNEs), accelerators, accelerated processing units (APUs), portions of one or more of the same, variations or combinations of one or more of the same (e.g., a host processor and a co-processor), and / or any other suitable physical processor(s). Further, in some examples, processor 1206 can be a general-purpose processor that can be capable, without significant limitation, of various computing tasks, as opposed to a special purpose processor that can be limited in computing tasks (e.g., specially designed for particular computing tasks such as moving data, performing certain mathematical operations, etc.), although in other examples processor 1206 can correspond to and / or incorporate one or more special purpose processors.

[0094] As also illustrated in FIG. 12, example classical computing device 1204 can in some implementations optionally include one or more physical co-processors, such as co-processor 1211, which in other implementations can be integrated with or otherwise represented by processor 1206. Co-processor 1211 generally represents any type or form of hardware- implemented processing unit capable of interpreting and / or executing computer-readable instructions, which in some examples works in conjunction and / or based on instructions from a host / main processor such as a CPU (e.g., processor 1206). In some examples, co-processor 1211 accesses and / or modifies data and / or instructions stored in memory 1220. Examples of co-processor 1211 include, without limitation, chiplets (e.g., smaller and in some examples more specialized processing units that can coordinate as a single chip), microprocessors, microcontrollers, graphics processing units (GPUs), Field-Programmable Gate Arrays (FPGAs) that implement softcore processors, Application-Specific Integrated Circuits (ASICs), systems on chip (SoCs), digital signal processors (DSPs), Neural Network Engines (NNEs), accelerators, accelerated processing units (APUs), portions of one or more of the same, variations or combinations of one or more of the same, and / or any other suitable physical processor. Further, in some implementations, co-processor 1211 can correspond to a quantum processing device, such as quantum processing device 1210.

[0095] FIG. 12 also includes a bus 1208 that can correspond to any bus, circuitry, connections, and / or any other communicative pathways for sending communicative signals, based on one or more communication protocols, between components / devices (e.g., processor 1206, memory 1220, and / or co-processor 1211, etc.). In some implementations, bus 1208 can further connect, via wireless and / or wired connections, to other devices, such as peripheral devices external to or partially integrated with classical computing device 1204. Although not - 21 -ACTIVE 715169316v1135404.045200-ND25-009 illustrated in FIG. 12, classical computing device 1204 can be coupled to a display device (e.g., via bus 1208).

[0096] The following clauses describe example implementations of the apparatuses, devices, and methods provided herein.

[0097] Clause 1. An electron qubit apparatus comprising: charge (motional) states of electrons trapped on the surface of solid hydrogen isotopes, H2, D2, and HD comprising: a solid-phase hydrogen isotope as the substrate materials for hovering electrons comprising at least one of solid molecular hydrogen, H2, solid molecular deuterium, D2, or solid molecular hydrogen deuteride, HD; and Engineering the electron injection potential by covering solid H2, D2, and HD films with thin films of4He and3He.

[0098] Clause 2. A substrate for electron qubits comprising: solid argon plated within thin films of at least one of hydrogen isotopes, Ne, or3He and4He as the substrate.

[0099] Clause 3. A method of growing solid hydrogen coverage comprising: growing thin epitaxial solid hydrogen films from the liquid phase; and condensation of hydrogen gas onto the cold chip surface known as quench condensation.

[0100] Clause 4. A method of substrate preparation and H2 (D2, HD) film annealing comprising: removing adsorbed molecules with a laser light during the initial cooldown; and annealing hydrogen films right after the triple point using a laser light or resistive heater.

[0101] Clause 5. A Method of controlling the hydrogen film thickness by arranging a porous ballast near the chip.

[0102] Clause 6. A method of delivering liquid hydrogen into the electron trap region using on-chip open-channel micro / nano -fluidics.

[0103] Clause 7. A device schematic with an etched microreservoir and micro / nano -channels for liquid hydrogen microfluidic filling.

[0104] Clause 8. A method of quench condensation of hydrogen isotopes for qubit applications comprising: a non-hermetic sample cell geometry comprising: an open sample cell with a chip holder surrounded by a radiation shield; and a completely opened geometry without extra chip shielding.

[0105] Clause 9. A method as described in Clause 8, further comprising providing electrons by thermionic emission from a tungsten filament or local microemitter located in the micro / nanochannels or microreservoir.- 22 -ACTIVE 715169316v1135404.045200-ND25-009

[0106] Clause 10. A single device of electron on surface of solid hydrogens comprising at least one of a single-qubit device or a two qubit device.

[0107] Clause 11. Shuttling electrons on the surface of liquid or solid hydrogen isotopes into the trap region from the microreservoir of Clause 4 using a set of metallic electrodes.

[0108] Clause 12. A concept of the spin qubit based on electron spin states on the surface of solid hydrogen comprising: a double-quantum dot geometry for qubit initialization, manipulation and readout; spin-state readout using Pauli blockade and an auxiliary singleelectron transistor working as a charge sensor; and qubit state readout using rf gate reflectometry.

[0109] Clause 13. A spin-qubit device based on a double-quantum dot and singlet- triplet qubit approach.

[0110] Although certain example methods and apparatus have been described herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers all methods, apparatus, and articles of manufacture fairly falling within the scope of the appended claims either literally or under the doctrine of equivalents.

[0111] In some aspects, the techniques described herein relate to a qubit device including: a substrate including a trap region; a plurality of electrodes on the substrate and arranged around the trap region; a diatomic layer (e.g., a layer of solid molecular hydrogen isotope) on the substrate and the plurality of electrodes; and an electron on a surface of the diatomic layer in the trap region corresponding to a quantum dot.

[0112] In some aspects, the techniques described herein relate to a qubit device, wherein the substrate includes at least one of silicon, sapphire, or solid argon.

[0113] In some aspects, the techniques described herein relate to a qubit device, further including a monolayer on the diatomic layer.

[0114] In some aspects, the techniques described herein relate to a qubit device, wherein the monolayer includes at least one of3He or4He.

[0115] In some aspects, the techniques described herein relate to a qubit device, wherein the diatomic layer includes at least one of solid H2, solid D2, or solid HD.

[0116] In some aspects, the techniques described herein relate to a qubit device, wherein the diatomic layer is less than approximately 15 nanometers thick.- 23 -ACTIVE 715169316v1135404.045200-ND25-009

[0117] In some aspects, the techniques described herein relate to a qubit device, wherein the plurality of electrodes includes at least one of: a pair of guard electrodes; a pair of trap electrodes; a pair of tunnel barrier electrodes; or a pair of resonators.

[0118] In some aspects, the techniques described herein relate to a qubit device, further including a charge sensor and a micromagnet.

[0119] In some aspects, the techniques described herein relate to a qubit device, further including a second electron on the surface of the diatomic layer in the trap region, wherein the qubit device corresponds to a double-quantum dot.

[0120] In some aspects, the techniques described herein relate to a method including: forming, in a substrate, a trap region connected to a reservoir via a channel; depositing a solid diatomic layer onto the substrate to fill at least the trap region; annealing the solid diatomic layer; and delivering one or more electrons to the trap region on the solid diatomic layer via the channel.

[0121] In some aspects, the techniques described herein relate to a method, wherein depositing the diatomic layer includes: condensing a diatomic gas in a filling line; depositing, from the filling line, a liquid diatomic layer onto the substrate; and solidifying the liquid diatomic layer into the solid diatomic layer by cooling the substrate.

[0122] In some aspects, the techniques described herein relate to a method, wherein cooling the substrate includes cooling the substrate to approximately 0.5-2K.

[0123] In some aspects, the techniques described herein relate to a method, wherein depositing the diatomic layer includes: stabilizing, at a temperature above a triple point of a diatomic gas, a sample cell that holds the substrate; injecting the diatomic gas into the sample cell to form a liquid diatomic layer on the substrate; and cooling the liquid diatomic layer below the triple point to form the solid diatomic layer on the substrate.

[0124] In some aspects, the techniques described herein relate to a method, wherein the annealing is performed by shining light from an optical fiber and the optical fiber is used to heat the substrate warmer than the sample cell during a cooldown.

[0125] In some aspects, the techniques described herein relate to a method, wherein: the sample cell includes a porous material as a ballast; the porous material includes glass; and a pore radius of the glass corresponds to a thickness of the solid diatomic layer.- 24 -ACTIVE 715169316v1135404.045200-ND25-009

[0126] In some aspects, the techniques described herein relate to a method, wherein walls of the sample cell provide radiation shielding.

[0127] In some aspects, the techniques described herein relate to a method, wherein the solid diatomic layer corresponds to at least one of H2, D2, or HD.

[0128] In some aspects, the techniques described herein relate to a method, further including: filling the reservoir with a liquid diatomic layer; and filling the trap region with the liquid diatomic layer using capillary force from the reservoir and through the channel.

[0129] In some aspects, the techniques described herein relate to a method, further including depositing a monolayer onto the solid diatomic layer.

[0130] In some aspects, the techniques described herein relate to a method, wherein delivering the one or more electrons includes: using a microemitter located in the reservoir or channel to shuttle electrons stored in the reservoir to the trap region.

[0131] In some aspects, the techniques described herein relate to a qubit device including: a substrate including a trap region; a plurality of electrodes on the substrate and arranged around the trap region; a solid molecular hydrogen isotope layer on the substrate and the plurality of electrodes; and an electron on a surface of the solid molecular hydrogen isotope layer in the trap region corresponding to a quantum dot.

[0132] In some aspects, the techniques described herein relate to a qubit device, wherein the substrate includes at least one of silicon, sapphire, or solid argon.

[0133] In some aspects, the techniques described herein relate to a qubit device, wherein the substrate is plated with a monolayer-thick layer of solid argon.

[0134] In some aspects, the techniques described herein relate to a qubit device, wherein the solid molecular hydrogen isotope layer is plated with at least one of3He or4He.

[0135] In some aspects, the techniques described herein relate to a qubit device, wherein the solid molecular hydrogen isotope layer includes at least one of solid H2, solid D2, or solid HD.

[0136] In some aspects, the techniques described herein relate to a qubit device, wherein the solid molecular hydrogen isotope layer is less than approximately 15 nanometers thick.- 25 -ACTIVE 715169316v1135404.045200-ND25-009

[0137] In some aspects, the techniques described herein relate to a qubit device, wherein the plurality of electrodes includes at least one of: a pair of guard electrodes; a pair of trap electrodes; a pair of tunnel barrier electrodes; or a pair of resonators.

[0138] In some aspects, the techniques described herein relate to a qubit device, further including a charge sensor and a micromagnet.

[0139] In some aspects, the techniques described herein relate to a qubit device, further including a second electron on the surface of the solid molecular hydrogen isotope layer in the trap region, wherein the qubit device corresponds to a double-quantum dot.

[0140] In some aspects, the techniques described herein relate to a method including: forming, in a substrate, a trap region connected to a reservoir via a channel; depositing a solid molecular hydrogen isotope layer onto the substrate to fill at least the trap region; annealing the solid molecular hydrogen isotope layer; and delivering one or more electrons to the trap region on the solid molecular hydrogen isotope layer via the channel.

[0141] In some aspects, the techniques described herein relate to a method, wherein depositing the solid molecular hydrogen isotope layer includes: condensing a molecular hydrogen isotope gas in a filling line; depositing, from the filling line, a liquid molecular hydrogen isotope layer onto the substrate; and solidifying the liquid molecular hydrogen isotope layer into the solid molecular hydrogen isotope layer by cooling the substrate.

[0142] In some aspects, the techniques described herein relate to a method, wherein cooling the substrate includes cooling the substrate to approximately 0.5-2K.

[0143] In some aspects, the techniques described herein relate to a method, wherein depositing the solid molecular hydrogen isotope layer includes: stabilizing, at a temperature above a triple point of a molecular hydrogen isotope gas, a sample cell that holds the substrate; injecting the molecular hydrogen isotope gas into the sample cell to form a liquid molecular hydrogen isotope layer on the substrate; and cooling the liquid molecular hydrogen isotope layer below the triple point to form the solid molecular hydrogen isotope layer on the substrate.

[0144] In some aspects, the techniques described herein relate to a method, wherein the annealing is performed by shining light from an optical fiber and the optical fiber is used to heat the substrate warmer than the sample cell during a cooldown.- 26 -ACTIVE 715169316v1135404.045200-ND25-009

[0145] In some aspects, the techniques described herein relate to a method, wherein: the sample cell includes a porous material as a ballast; the porous material includes glass; and a pore radius of the glass corresponds to a thickness of the solid molecular hydrogen isotope layer.

[0146] In some aspects, the techniques described herein relate to a method, wherein the solid molecular hydrogen isotope layer corresponds to at least one of H2, D2, or HD.

[0147] In some aspects, the techniques described herein relate to a method, further including: filling the reservoir with a liquid molecular hydrogen isotope layer; and filling the trap region with the liquid molecular hydrogen isotope layer using capillary force from the reservoir and through the channel.

[0148] In some aspects, the techniques described herein relate to a method, further including plating the solid molecular hydrogen isotope layer with a monolayer.

[0149] In some aspects, the techniques described herein relate to a method, wherein delivering the one or more electrons includes: using a microemitter located in the reservoir or channel to shuttle electrons stored in the reservoir to the trap region.

[0150] In some aspects, the techniques described herein relate to a system including: a control system; and a quantum processing device including: a substrate including a trap region; a plurality of electrodes on the substrate and arranged around the trap region, wherein the plurality of electrodes is coupled to the control system; a solid molecular hydrogen isotope layer on the substrate and the plurality of electrodes; and an electron on a surface of the solid molecular hydrogen isotope layer in the trap region corresponding to a quantum dot.

[0151] As detailed above, the computing devices and systems described and / or illustrated herein broadly represent any type or form of computing device or system capable of executing computer-readable instructions, such as those contained within the code / firmware / programs described herein. In their most basic configuration, these computing device(s) each include at least one memory device and at least one physical processor.

[0152] In some examples, the term “memory device” generally refers to any type or form of volatile or non-volatile storage device or medium capable of storing data and / or computer- readable instructions. In one example, a memory device stores, loads, and / or maintains one or more of the instructions and / or circuits described herein. Examples of memory devices include, without limitation, Random Access Memory (RAM), Read Only Memory (ROM), flash memory, Hard Disk Drives (HDDs), Solid-State Drives (SSDs), optical disk drives, - 27 -ACTIVE 715169316v1135404.045200-ND25-009 caches, variations, or combinations of one or more of the same, or any other suitable storage memory.

[0153] In some examples, the term “physical processor” generally refers to any type or form of hardware-implemented processing unit capable of interpreting and / or executing computer- readable instructions. In one example, a physical processor accesses and / or modifies one or more instructions stored in the above-described memory device. Examples of physical processors include, without limitation, chiplets (e.g., smaller and in some examples more specialized processing units that can coordinate as a single chip), microprocessors, microcontrollers, Central Processing Units (CPUs), Field-Programmable Gate Arrays (FPGAs) that implement softcore processors, Application-Specific Integrated Circuits (ASICs), systems on chip (SoCs), digital signal processors (DSPs), Neural Network Engines (NNEs), accelerators, accelerated processing units (APUs), portions of one or more of the same, variations or combinations of one or more of the same (e.g., a host processor and a coprocessor), and / or any other suitable physical processor.

[0154] In some examples, the term “physical processor” also refers to and / or includes a coprocessor that generally refers to any type or form of hardware-implemented processing unit capable of interpreting and / or executing computer-readable instructions, which in some examples works in conjunction with and / or based on instructions from a host / main processor such as a CPU, and further in some examples accesses and / or modifies one or more instructions stored in the above-described memory device. Examples of co-processors include, without limitation, chiplets, microprocessors, microcontrollers, graphics processing units (GPUs), FPGAs that implement softcore processors, ASICs, SoCs, DSPs, NNEs, accelerators, portions of one or more of the same, variations or combinations of one or more of the same, and / or any other suitable physical processor.

[0155] In some examples, the term “quantum processor,” “quantum processing unit (QPU),” “quantum processing device,” “quantum computer” and / or “quantum computing device” generally refers to any hardware and / or logic capable of and / or contributes to quantum computing, in which information (e.g., analogous to bits) are encoded in quantum bits (“qubits”) and more specifically each bit encoded as a state of a single particle, such as electrons or photons, which further allow superpositions of states not possible with classical bits. Examples of quantum processor architectures include solid state quantum computers, superconducting quantum computers, trapped-ion quantum computers, spin qubit quantum- 28 -ACTIVE 715169316v1135404.045200-ND25-009 computers, photonics, linear optical quantum computing, photonic quantum computing, neutral atoms in optical lattices, nuclear magnetic resonance quantum computing, etc.

[0156] Although described as separate elements / steps, the instructions described and / or illustrated herein can represent portions of a single program or application, including instructions implemented in code, firmware, one or more circuits, etc. In addition, in certain implementations one or more of these instructions can represent one or more software applications or programs that, when executed by a computing device, cause the computing device to perform one or more tasks. For example, one or more of the instructions described and / or illustrated herein represent instructions stored and configured to run on one or more of the computing devices or systems described and / or illustrated herein. In some implementations, one or more instructions can be implemented as a circuit or circuitry, including as part of a firmware, a ROM, one or more logic units, etc. One or more of these instructions can also represent or otherwise be implemented with all or portions of one or more special-purpose computers configured to perform one or more tasks.

[0157] In some implementations, the term “computer-readable medium” generally refers to any form of device, carrier, or medium capable of storing or carrying computer-readable instructions. Examples of computer-readable media include, without limitation, transmissiontype media, such as carrier waves, and non-transitory-type media, such as magnetic- storage media (e.g., hard disk drives, tape drives, and floppy disks), optical- storage media (e.g., Compact Disks (CDs), Digital Video Disks (DVDs), and BLU-RAY disks), electronic- storage media (e.g., solid-state drives and flash media), and other distribution systems.

[0158] The process parameters and sequence of the steps described and / or illustrated herein are given by way of example only and can be varied as desired. For example, while the steps illustrated and / or described herein are shown or discussed in a particular order, these steps do not necessarily need to be performed in the order illustrated or discussed. The various exemplary methods described and / or illustrated herein can also omit one or more of the steps described or illustrated herein or include additional steps in addition to those disclosed.

[0159] The preceding description has been provided to enable others skilled in the art to best utilize various aspects of the exemplary implementations disclosed herein. This exemplary description is not intended to be exhaustive or to be limited to any precise form disclosed. Many modifications and variations are possible without departing from the spirit and scope of the present disclosure. The implementations disclosed herein should be considered in all- 29 -ACTIVE 715169316v1135404.045200-ND25-009 respects illustrative and not restrictive. Reference should be made to the appended claims and their equivalents in determining the scope of the present disclosure.

[0160] Unless otherwise noted, the terms “connected to” and “coupled to” (and their derivatives), as used in the specification and claims, are to be construed as permitting both direct and indirect (i.e., via other elements or components) connection. In addition, the terms “a” or “an,” as used in the specification and claims, are to be construed as meaning “at least one of.” Finally, for ease of use, the terms “including” and “having” (and their derivatives), as used in the specification and claims, are interchangeable with and have the same meaning as the word “comprising.”- 30 -ACTIVE 715169316v1

Claims

135404.045200-ND25-009What is claimed is:

1. A qubit device comprising: a substrate including a trap region; a plurality of electrodes on the substrate and arranged around the trap region; a solid molecular hydrogen isotope layer on the substrate and the plurality of electrodes; and an electron on a surface of the solid molecular hydrogen isotope layer in the trap region corresponding to a quantum dot.

2. The qubit device of claim 1, wherein the substrate comprises at least one of silicon, sapphire, or solid argon.

3. The qubit device of claim 1, wherein the substrate is plated with a monolayerthick layer of solid argon.

4. The qubit device of claim 1, wherein the solid molecular hydrogen isotope layer is plated with at least one of3He or4He.

5. The qubit device of claim 1, wherein the solid molecular hydrogen isotope layer comprises at least one of solid H2, solid D2, or solid HD.

6. The qubit device of claim 5, wherein the solid molecular hydrogen isotope layer is less than approximately 15 nanometers thick.

7. The qubit device of claim 1, wherein the plurality of electrodes includes at least one of: a pair of guard electrodes; a pair of trap electrodes; a pair of tunnel barrier electrodes; or a pair of resonators.- 31 -ACTIVE 715169316v1135404.045200-ND25-0098. The qubit device of claim 1, further comprising a charge sensor and a micromagnet.

9. The qubit device of claim 1, further comprising a second electron on the surface of the solid molecular hydrogen isotope layer in the trap region, wherein the qubit device corresponds to a double-quantum dot.

10. A method comprising: forming, in a substrate, a trap region connected to a reservoir via a channel; depositing a solid molecular hydrogen isotope layer onto the substrate to fill at least the trap region; annealing the solid molecular hydrogen isotope layer; and delivering one or more electrons to the trap region on the solid molecular hydrogen isotope layer via the channel.

11. The method of claim 10, wherein depositing the solid molecular hydrogen isotope layer comprises: condensing a molecular hydrogen isotope gas in a filling line; depositing, from the filling line, a liquid molecular hydrogen isotope layer onto the substrate; and solidifying the liquid molecular hydrogen isotope layer into the solid molecular hydrogen isotope layer by cooling the substrate.

12. The method of claim 11, wherein cooling the substrate comprises cooling the substrate to approximately 0.5-2K.

13. The method of claim 10, wherein depositing the solid molecular hydrogen isotope layer comprises: stabilizing, at a temperature above a triple point of a molecular hydrogen isotope gas, a sample cell that holds the substrate; injecting the molecular hydrogen isotope gas into the sample cell to form a liquid molecular hydrogen isotope layer on the substrate; and cooling the liquid molecular hydrogen isotope layer below the triple point to form the solid molecular hydrogen isotope layer on the substrate.- 32 -ACTIVE 715169316v1135404.045200-ND25-00914. The method of claim 13, wherein the annealing is performed by shining light from an optical fiber and the optical fiber is used to heat the substrate warmer than the sample cell during a cooldown.

15. The method of claim 13, wherein: the sample cell comprises a porous material as a ballast; the porous material comprises glass; and a pore radius of the glass corresponds to a thickness of the solid molecular hydrogen isotope layer.

16. The method of claim 10, wherein the solid molecular hydrogen isotope layer corresponds to at least one of H2, D2, or HD.

17. The method of claim 10, further comprising: filling the reservoir with a liquid molecular hydrogen isotope layer; and filling the trap region with the liquid molecular hydrogen isotope layer using capillary force from the reservoir and through the channel.

18. The method of claim 10, further comprising plating the solid molecular hydrogen isotope layer with a monolayer.

19. The method of claim 10, wherein delivering the one or more electrons comprises: using a microemitter located in the reservoir or channel to shuttle electrons stored in the reservoir to the trap region.

20. A system comprising: a control system; and a quantum processing device comprising: a substrate including a trap region; a plurality of electrodes on the substrate and arranged around the trap region, wherein the plurality of electrodes is coupled to the control system;- 33 -ACTIVE 715169316v1135404.045200-ND25-009 a solid molecular hydrogen isotope layer on the substrate and the plurality of electrodes; and an electron on a surface of the solid molecular hydrogen isotope layer in the trap region corresponding to a quantum dot.ACTIVE 715169316v1

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