Electronic device

Abstract

The purpose of the present invention is to improve reliability of an electronic device. This electronic device comprises: a heat sink (3) having a main surface part (4a); and a semiconductor module (10) mounted on the main surface part side of the heat sink. The semiconductor module has: an insulating circuit board (20) that has an upper surface part and a lower surface part positioned on opposite sides, and that is provided with a heat dissipation plate (23) on the lower surface part side; a semiconductor chip (30) that is mounted on the upper surface part side of the insulating circuit board with an adhesive (8) interposed therebetween; a frame (40) that surrounds the periphery of the semiconductor chip; and a resin sealing body (60) that seals the semiconductor chip and the insulating circuit board in a state in which the heat dissipation plate is exposed inside the frame. Each of the resin sealing body and the heat dissipation plate is bonded and fixed to the main surface part side of the heat sink with an adhesive interposed therebetween. The resin sealing body includes a main body part (61) positioned inside the frame, and a protruding part (62) protruding outward from the main body part. At least a part of the frame is held by the adhesive via the protrusion of the resin sealing body.

Description

electronic equipment

[0001] This technology (the technology disclosed herein) relates to electronic devices and semiconductor modules, and in particular to a technology that is effective when applied to electronic devices in which a semiconductor module is mounted on a heat sink with an adhesive interposed therebetween.

[0002] As an electronic device, there is a known electronic device in which a semiconductor module is mounted on a heat sink with an adhesive interposed therebetween. On the other hand, as a semiconductor module, there is a known semiconductor module comprising an insulating circuit board having a heat sink, a semiconductor chip mounted on the side of the insulating circuit board opposite to the heat sink, a frame surrounding the semiconductor chip, and a resin encapsulant that seals the insulating circuit board and semiconductor chip with the heat sink exposed inside the frame. Such electronic devices and semiconductor modules are disclosed, for example, in Patent Documents 1 to 4.

[0003] Japanese Patent Publication No. 2024-003877, Japanese Patent Publication No. 2023-156659, International Publication No. 2021 / 144980, Japanese Patent Publication No. 2015-220382

[0004] Incidentally, the adhesion strength (adhesion) of the semiconductor module frame to the adhesive used to fix the semiconductor module to the heat sink may be inferior to that of the resin encapsulant. In this case, the semiconductor module frame is more likely to peel off from the heat sink, so there was room for improvement from the perspective of the reliability of the electronic device.

[0005] The objective of this technology is to provide a technology that can improve the reliability of electronic devices.

[0006] An electronic device according to one aspect of this technology comprises a heat sink having a main surface portion and a semiconductor module mounted on the main surface portion side of the heat sink. The semiconductor module comprises an insulating circuit board having an upper surface portion and a lower surface portion located on opposite sides of each other, with a heat sink provided on the lower surface portion side, a semiconductor chip mounted on the upper surface portion side of the insulating circuit board, a frame surrounding the semiconductor chip, and a resin encapsulant that seals the semiconductor chip and the insulating circuit board inside the frame with the heat sink portion exposed. The resin encapsulant and the heat sink portion are each bonded and fixed to the main surface portion side of the heat sink via an adhesive. The resin encapsulant includes a main body portion located inside the frame and a protruding portion projecting outward from the main body portion. At least a portion of the frame is held to the adhesive via the protruding portion of the resin encapsulant.

[0007] According to one aspect of this technology, it is possible to improve the reliability of electronic devices.

[0008] This is a schematic plan view showing an example configuration of an electronic device according to the first embodiment of this technology. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the line II-II in Figure 1. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the line III-III in Figure 1. This is a schematic bottom view showing the bottom side of the semiconductor module in Figure 1. This is a schematic perspective view showing the external configuration of the semiconductor module in Figure 1. This is a side view of the main part of the semiconductor module viewed from the direction of arrow S in Figure 5. This is an equivalent circuit diagram of the semiconductor module in Figure 1. This is a schematic longitudinal cross-sectional view showing the steps of the manufacturing method of the electronic device according to the first embodiment of this technology. This is a schematic longitudinal cross-sectional view showing the steps following the step in Figure 8A. This is a schematic longitudinal cross-sectional view showing the steps following the step in Figure 8B. This is a schematic longitudinal cross-sectional view showing the steps following the step in Figure 8C. This is a schematic longitudinal cross-sectional view showing the steps following the step in Figure 8D. This is a schematic longitudinal cross-sectional view showing the steps following the step in Figure 8E. This figure shows a modified example 1-1 according to the first embodiment of this technology, which is a schematic longitudinal cross-sectional view of a main part showing a part of the longitudinal cross-sectional structure. This figure shows a modified example 1-2 according to the first embodiment of this technology, which is a schematic longitudinal cross-sectional view of a main part showing a part of the longitudinal cross-sectional structure. This figure shows a modified example 1-3 according to the first embodiment of this technology, which is a schematic longitudinal cross-sectional view of a main part showing a part of the longitudinal cross-sectional structure. This figure shows a modified example 1-4 according to the first embodiment of this technology, which is a schematic longitudinal cross-sectional view of a main part showing a part of the longitudinal cross-sectional structure. This is a schematic plan view showing an example configuration of an electronic device according to the second embodiment of this technology. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XIV-XIV cutting line of Figure 13. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XV-XV cutting line of Figure 13. This is a schematic bottom view showing the bottom side of the semiconductor module of Figure 13. This is a schematic plan view showing an example configuration of an electronic device according to the third embodiment of this technology. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XVIII-XVIII cutting line of Figure 17. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XIX-XIX cutting line in Figure 17. This is a schematic bottom view showing the bottom side of the semiconductor module in Figure 16. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure of the electronic device according to the fourth embodiment of this technology. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure of the electronic device according to the fifth embodiment of this technology.This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure of an electronic device according to the sixth embodiment of this technology. This is a schematic plan view showing an example configuration of a power conversion device according to the seventh embodiment of this technology. This is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XXV-XXV cutting line in Figure 24.

[0009] The embodiments of this technology will be described in detail below with reference to the drawings. In the drawings referred to in the following description, identical or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between thickness and planar dimensions, the ratio of the thickness of each layer, etc., may differ from reality. Therefore, specific thicknesses and dimensions should be determined by referring to the following description.

[0010] Furthermore, it goes without saying that there may be differences in the dimensional relationships and ratios between drawings. Also, the effects described herein are merely examples and not limiting, and other effects may exist.

[0011] Furthermore, the following embodiments are illustrative examples of apparatus and methods for realizing the technical concept of this technology, and do not limit the configuration to those described below. In other words, the technical concept of this technology can be modified in various ways within the technical scope described in the claims.

[0012] Furthermore, the definitions of directions such as "up," "down," "up and down," "left," "right," and "left and right" in the following explanation are merely for explanatory convenience and do not limit the technical concept of this technology. For example, it is obvious that if an object is rotated 90° and observed, up and down will be converted to left and right and read accordingly, and if it is rotated 180° and observed, up and down will be inverted and read accordingly.

[0013] Furthermore, "top surface" and "bottom surface" in the following explanation may be read as "front surface" and "back surface," respectively. Also, the "first main surface" and "second main surface" of each component are the main surfaces (main surfaces) located on opposite sides of each other. For example, if the "first main surface" is the top surface, then the "second main surface" is the bottom surface. Furthermore, "first main surface" and "second main surface" may be read as "one main surface" and "the other main surface," respectively.

[0014] Furthermore, in the following embodiments, in the three mutually orthogonal directions in space, the first and second mutually orthogonal directions within the same plane are defined as the X direction and the Y direction, respectively, and the third direction orthogonal to each of the first and second directions is defined as the Z direction. In the following embodiments, the stacking direction of the insulating circuit board and wiring board described later will be explained as the Z direction.

[0015] Furthermore, in this specification, when the transistor mounted on the transistor chip is a field-effect transistor (FET) or an electrostatic induction transistor (SIT), the first main electrode means either the source electrode or the drain electrode, the second main electrode means the other remaining electrode, and the control electrode means the gate electrode. When the transistor mounted on the transistor chip is a bipolar junction transistor (BJT), the first main electrode means either the emitter electrode or the collector electrode, the second main electrode means the other remaining electrode, and the control electrode means the base electrode. When the transistor mounted on the transistor chip is an insulated gate bipolar transistor (IGBT), the first main electrode means either the emitter electrode or the collector electrode, the second main electrode means the other remaining electrode, and the control electrode means the gate electrode. In the following embodiments, we will focus on a MISFET, a type of insulated-gate field-effect transistor, as the transistor mounted on the semiconductor chip. Therefore, the first main electrode will be described as the source electrode, the second main electrode as the drain electrode, and the control electrode as the gate electrode.

[0016] Furthermore, in the following embodiments, a plan view refers to the view of the electronic device from the Z direction. A cross-sectional view refers to the view of a cross-section along the Z direction from a direction perpendicular to this cross-section (the Z direction).

[0017] [First Embodiment] In this first embodiment, an example of applying the present technology to an electronic device in which one semiconductor module is mounted on a heat sink will be described.

[0018] <<Overall Configuration of Electronic Device>> As shown in FIGS. 1 to 3, an electronic device 1A according to the first embodiment of the present technology includes a heat sink 3 having a main surface portion (mounting surface portion) 4a, and a semiconductor module 10 mounted on the main surface portion 4a side of the heat sink 3 via an adhesive 8.

[0019] <Heat Sink> As shown in FIGS. 1 to 3, the heat sink 3 includes a plate-shaped base portion 4 having a main surface portion 4a, and heat radiation fins 5 provided on the side opposite to the main surface portion 4a side of the base portion 4 and repeatedly arranged at a predetermined interval in the X direction. That is, the semiconductor module 10 is mounted on the main surface portion 4a side of the base portion 4 via an adhesive 8. The heat sink 3 is made of a metal or alloy having good thermal conductivity such as copper or aluminum.

[0020] <Semiconductor Module> As shown in FIGS. 1 to 3, the semiconductor module 10 has an upper surface portion (first main surface portion) and a lower surface portion (second main surface portion) located on opposite sides in its thickness direction (Z direction), and an insulating circuit board (support substrate) 20 provided with a heat radiation plate 23 on the lower surface portion side, a semiconductor chip 30 mounted on the upper surface portion side of the insulating circuit board 20, a frame (case) 40 surrounding the periphery of the semiconductor chip 30, and a resin sealing body 60 that seals the semiconductor chip 30 and the insulating circuit board 20 in a state where the heat radiation plate 23 is exposed inside the frame 40. Further, the semiconductor module 10 includes a wiring board 50 disposed on the upper surface portion side of the insulating circuit board 20 and separated from the semiconductor chip 30 and the insulating circuit board 20. Further, as shown in FIGS. 1 and 5, the semiconductor module 10 includes a positive electrode terminal 52, a negative electrode terminal 53, an intermediate terminal 54, an output terminal 55, and control terminals 56a, 56b, 56c, 56d, 56e, 56f, 56g, 56h, 56i, 56j, 56k, 56l provided integrally with the frame 40. These terminals are electrically connected to a semiconductor chip described later.

[0021] ((Insulated Circuit Board)) The insulated circuit board 20 shown in Figures 2 and 3, although not shown in detail, has a rectangular shape in plan view. The insulated circuit board 20 has two short sides that are located opposite each other in the longitudinal direction (Y direction) and extend in the short direction (X direction) which is perpendicular to the Y direction, and two long sides that are located opposite each other in the short direction (X direction) and extend in the longitudinal direction (Y direction). The insulated circuit board 20 has thickness in the Z direction (thickness direction) which is perpendicular to the X and Y directions.

[0022] As shown in Figures 2 and 3, the insulating circuit board 20 includes an insulating plate 22 having an upper surface (first main surface) and a lower surface (second main surface) located on opposite sides in the thickness direction (Z direction), a first conductive plate 21a, a second conductive plate 21b, a third conductive plate, and a fourth conductive plate, each of which is provided on the upper surface side of the insulating plate 22, and a heat sink 23 provided on the lower surface side of the insulating plate 22. Here, in Figures 2 and 3, the first conductive plate 21a and the second conductive plate 21b are shown, which are adjacent to each other in the X direction, but the third conductive plate and the fourth conductive plate are omitted from the illustration.

[0023] As the insulating circuit board 20, for example, a direct copper bond (DCB) substrate can be used, in which metal is eutectic bonded to the upper and lower surfaces of a ceramic substrate that are opposite to each other, or an AMB substrate in which metal is provided to the upper and lower surfaces of a ceramic substrate that are opposite to each other by active metal brazing (AMB). As the material for the ceramic substrate, for example, silicon nitride (Si ３ N ４ ), aluminum nitride (AlN), alumina (Al ２ O ３), etc. can be used. The insulating circuit board 20 of this first embodiment uses, for example, an aluminum nitride plate as the insulating plate 22, and uses a metal plate containing copper (Cu) with excellent conductivity and heat conductivity as the conductive plates (first to fourth conductive plates) and the heat dissipation plate 23. Further, the insulating plate 22 may be, for example, a substrate in which a base material such as glass fiber is impregnated with an insulating resin such as an epoxy resin, a substrate formed by molding an insulating resin such as an epoxy resin added with an inorganic filler such as boron nitride (BN) or aluminum nitride (AlN), or a substrate coated with an insulating resin added with the inorganic filler on the surface of a flat metal core.

[0024] (Insulating Plate) Although not shown in detail, the insulating plate 22 shown in FIGS. 2 and 3 has a rectangular planar shape in plan view, for example, a rectangular shape. And the insulating plate 22 has an upper surface portion (first main surface portion) and a lower surface portion (second main surface portion) located on opposite sides in the Z direction, which is the thickness direction thereof. And the insulating plate 22 has two short side portions located on opposite sides in the Y direction and extending in the X direction orthogonal to the Y direction, and two long side portions located on opposite sides in the X direction and extending in the Y direction. In this first embodiment, the two short side portions of the insulating plate 22 become the two short side portions of the insulating circuit board 20, and the two long side portions of the insulating plate 22 become the two long side portions of the insulating circuit board 20.

[0025] (Conductive Plate) Each of the first conductive plate 21a and the second conductive plate 21b shown in FIGS. 2 and 3 has an upper surface portion (first main surface portion) and a lower surface portion (second main surface portion) located on opposite sides in the Z direction, and the lower surface portion side of each is joined to the upper surface portion side of the insulating plate 22. Also, similar to the first and second conductive plates 21a, 21b, each of the third and fourth conductive plates also has an upper surface portion (first main surface portion) and a lower surface portion (second main surface portion) located on opposite sides in the Z direction, and the lower surface portion side of each is joined to the upper surface portion side of the insulating plate 22.

[0026] (Heat sink) The heat sink (metal plate) 23 shown in Figures 2 and 3, although not shown in detail, has a rectangular shape in plan view, similar to the insulating plate 22, and its outer dimensions are slightly smaller than those of the insulating plate 22. As shown in Figures 2 and 3, the heat sink 23 overlaps with the first and second conductive plates 21a and 21b respectively in plan view, and also overlaps with the third and fourth conductive plates respectively, although not shown.

[0027] The heat sink 23 has an upper surface (first main surface) and a lower surface (second main surface) that are located on opposite sides in the thickness direction (Z direction). The upper surface of the heat sink 23 is joined to the lower surface of the insulating plate 22, and the lower surface of the heat sink 23 is exposed from the lower surface of the upper surface (first main surface) and lower surface (second main surface) of the resin encapsulant 60, which are located on opposite sides in the Z direction. The lower surface of the resin encapsulant 60 can be read as the bottom surface.

[0028] ((Semiconductor Chips)) As shown in Figure 2, multiple semiconductor chips 30 are provided. In this first embodiment, although not limited thereto, for example, four chip groups, each consisting of four semiconductor chips 30, are provided, for a total of 16 semiconductor chips 30. Each of the semiconductor chips 30 included in the four chip groups has the same structural configuration. Each semiconductor chip 30 is equipped with a transistor, such as a vertical structure Metal Insulator Semiconductor Field Effect Transistor (MISFET), Insulated Gate Bipolar Transistor (IGBT), or Reverse Conductive - Insulated Gate Bipolar Transistor (RC-IGBT), which are types of insulated gate field-effect transistors. Each semiconductor chip 30 is also equipped with a diode, such as a vertical structure Free Wheeling Diode (FWD). In the case of MISFETs and IGBTs, the body diode may be an FWD. In the case of an RC-IGBT, the IGBT and a diode connected in antiparallel to the IGBT are configured on a single chip.

[0029] Of the four chip groups, the semiconductor chip 30 (30a) of the first chip group is mounted on the upper surface side of the first conductive plate 21a included in the insulating circuit board 20 with a conductive adhesive (bonding material) interposed, as shown in Figure 2. Also, of the four chip groups, the semiconductor chip 30 (30b) of the second chip group is mounted on the upper surface side of the second conductive plate 21b included in the insulating circuit board 20 with a conductive adhesive (bonding material) interposed, as shown in Figure 2. In addition, although not shown, the semiconductor chip 30 of the third chip group is mounted on the upper surface side of the third conductive plate included in the insulating circuit board 20 with a conductive adhesive (bonding material) interposed. Also, although not shown, the semiconductor chip 30 of the fourth chip group is mounted on the upper surface side of the fourth conductive plate included in the insulating circuit board 20 with a conductive adhesive (bonding material) interposed.

[0030] The transistors mounted on each of the four semiconductor chips 30 (30a) of the first chip group are connected in parallel to form a switching element Q1 as shown in Figure 7. Similarly, the transistors mounted on each of the four semiconductor chips 30 (30b) of the second chip group are also connected in parallel to form a switching element Q2 as shown in Figure 7. Furthermore, the transistors mounted on each of the four semiconductor chips 30 of the third chip group are also connected in parallel to form a switching element Q3 as shown in Figure 7. Finally, the transistors mounted on each of the four semiconductor chips 30 of the fourth chip group are also connected in parallel to form a switching element Q4 as shown in Figure 7.

[0031] The FWDs mounted on each of the four semiconductor chips 30 (30a) of the first chip group are connected in parallel to form a rectifier element D1 as shown in Figure 7. Similarly, the FWDs mounted on each of the four semiconductor chips 30 (30b) of the second chip group are also connected in parallel to form a rectifier element D2 as shown in Figure 7. Furthermore, the FWDs mounted on each of the four semiconductor chips 30 of the third chip group are also connected in parallel to form a rectifier element D3 as shown in Figure 7. Finally, the FWDs mounted on each of the four semiconductor chips 30 of the fourth chip group are also connected in parallel to form a rectifier element D4 as shown in Figure 7.

[0032] Each of the four chip groups, referring to the semiconductor chip 30a shown in Figure 2, has an upper surface (main surface) S1 and a lower surface (back surface) S2 located on opposite sides of each other, a first main electrode 31 and a control electrode (not shown) provided on the upper surface S1, and a second main electrode 32 provided on the lower surface S2. In this first embodiment, the first main electrode 31 functions as the source electrode, the second main electrode 32 functions as the drain electrode, and the control electrode functions as the gate electrode. The source region of the MISFET and the anode region of the FWD mounted on the semiconductor chip 30 are electrically connected to the first main electrode 31 of the semiconductor chip 30. The drain region of the MISFET and the cathode region of the FWD mounted on the semiconductor chip 30 are electrically connected to the second main electrode 32 of the semiconductor chip 30. The gate electrode of the MISFET mounted on the semiconductor chip 30 is electrically connected to the control electrode of the semiconductor chip 30. The first main electrode 31 and the control electrode are each made of, for example, an aluminum (Al) film or an alloy film mainly composed of Al. The second main electrode 32 is made of, for example, a copper (Cu) film or an alloy film mainly composed of Cu.

[0033] Each of the four chip groups, specifically the semiconductor chip 30, is composed primarily of a substrate made of a wide-bandgap semiconductor such as Si, SiC, or GaN. Furthermore, it is preferable for the semiconductor chip 30 to employ a vertical structure in which the main current flows in the thickness direction (depth direction: Z direction) of the chip.

[0034] ((Wiring board)) As shown in Figures 2 and 3, the insulating circuit board 20 and the wiring board 50 are stacked in the Z direction with their respective thickness directions aligned in the Z direction. The wiring board 50 is positioned on the opposite side of the insulating circuit board 20 from the heat sink 3, and is separated from the insulating circuit board 20 and the semiconductor chip 30.

[0035] Although not shown in detail, the wiring board 50 has a rectangular shape in plan view, for example, a rectangle. The wiring board 50 has two short sides that are opposite each other in the longitudinal direction (Y direction) and extend in the transverse direction (X direction), which is perpendicular to the Y direction, and two long sides that are opposite each other in the transverse direction (X direction) and extend in the longitudinal direction (Y direction). The wiring board 50 has thickness in the Z direction, which is perpendicular to the X and Y directions. The wiring board 50 is, for example, a conventional printed circuit board, but is not limited to this, and has a multilayer wiring structure.

[0036] As shown in Figure 2, the wiring board 50 is provided with conductive pins 57 that extend in the Z direction, which is the thickness direction of the resin encapsulant 60. One end of the conductive pin 57 is press-fitted into the wiring board 50, and this press-fitting connects it to the main electrode wiring of the wiring board 50. The other end of the conductive pin 57 abuts against the first main electrode 31 of the semiconductor chip 30 from above, and is electrically and mechanically connected to the first main electrode 31 by a bonding material. In other words, one end of the conductive pin 57 is electrically and mechanically connected to the main electrode wiring of the wiring board 50, and the other end is electrically and mechanically connected to the first main electrode 31 of the semiconductor chip 30.

[0037] Although not shown in detail, the wiring board 50 is also provided with control conductive pins extending in the Z direction. One end of the control conductive pin is press-fitted into the wiring board 50, and this press-fitting electrically and mechanically connects it to the control wiring of the wiring board 50. The other end of the control conductive pin abuts against the control electrode of the semiconductor chip 30 from above, and is electrically and mechanically connected to the control electrode by a bonding material.

[0038] ((Frame)) As shown in Figures 1 to 3, the frame 40 has a frame portion 41 that surrounds the insulating circuit board 20 and semiconductor chip 30 in a plan view, a lid portion (top plate portion) 42 that covers the inside of the frame portion 41 and is integrated with the frame portion 41, and terminal arrangement portions 44 and 45 that are provided on opposite sides of the frame portion 41 in a plan view. The terminal arrangement portions 44 and 45 are aligned in the Y direction with the frame portion 41 and the lid portion 42 in between, and are integrated with the frame portion 41 and the lid portion 42.

[0039] (Frame and Lid) As shown in Figure 1, each of the frame 41 and lid 42 has a rectangular shape in plan view, for example, a rectangle. That is, each of the frame 41 and lid 42 has two long sides that are opposite each other in the X direction and extend in the Y direction, and two short sides that are opposite each other in the Y direction and extend in the X direction. Also, each of the frame 41 and lid 42 has four corners C １ , C ２ , C ３ , C ４ It has.

[0040] As shown in Figures 1 and 2, the lid portion 42 is provided with projections 46a, 46b, 46c, 46d, 46e, 46f, and 46g that are integrally provided with the lid portion 42 and project upward from the lid portion 42. Each of the projections 46a, 46b, 46c, 46d, and 46e is provided along one of the two long sides of the lid portion 42 in a plan view. Each of the projections 46f and 46g is provided along the other long side of the lid portion 42 in a plan view.

[0041] ((Terminals)) (Control Terminals) As shown in Figure 2, the control terminal 56a extends both inside and outside the frame 40 in the Z direction. Although not shown in detail, each of the control terminals 56b to 56l also extends both inside and outside the frame 40 in the Z direction, similar to the control terminal 56a.

[0042] As shown in Figure 1, control terminal 56a is fixed to projection 46a and protrudes upward from projection 46a. Control terminals 56b and 56c are each fixed to projection 46b and protrude upward from projection 46b. Control terminals 56d and 56e are each fixed to projection 46c and protrude upward from projection 46c. Control terminals 56f and 56g are each fixed to projection 46d and protrude upward from projection 46d. Control terminal 56h is fixed to projection 46e and protrudes upward from projection 46e. Control terminals 56i and 56j are each fixed to projection 46f and protrude upward from projection 46f. Control terminals 56k and 56l are each fixed to projection 46g and protrude upward from projection 46g. In other words, each of the control terminals 56a to 56l is provided so as to protrude upward from the upper surface of the frame 40.

[0043] Each of the control terminals 56a to 56l is, for example, a press-fit pin. By integrating each of these control terminals 56a to 56l with the frame 40 and having them protrude from the upper surface of the frame 40, miniaturization and low inductance can be achieved.

[0044] As shown in Figure 2, control terminal 56a is press-fitted into the wiring board 50. Although not shown, the remaining control terminals 56b to 56l are also press-fitted into the wiring board 50 in the same way as control terminal 56a. Each of the control terminals 56a to 56l is individually electrically and mechanically connected to the control wiring provided on the wiring board 50 corresponding to that control terminal.

[0045] (Positive terminal, negative terminal, intermediate terminal, and output terminal) As shown in Figures 1 and 5, the positive terminal 52, negative terminal 53, and intermediate terminal 54 are each provided in the terminal arrangement section 44 of the frame 40. On the other hand, the output terminal 55 is provided in the terminal arrangement section 45 of the frame 40. The terminal arrangement section 44 is provided with recesses 47a and 47b through which fastening members pass when attaching a cover to the upper surface of the semiconductor module 10.

[0046] Although not shown in detail, the positive terminal 52 is electrically connected to the second main electrode 32 (see Figure 2) of the semiconductor chip 30 included in the switching element Q1 in Figure 7 via a positive conductive path. The negative terminal 53 is electrically connected to the first main electrode 31 (see Figure 2) of the semiconductor chip 30 included in the switching element Q2 in Figure 7 via a negative conductive path. The intermediate terminal 54 is electrically connected to the second main electrode 32 of the semiconductor chip 30 included in the switching element Q3 in Figure 7 via an intermediate conductive path. The output terminal 55 is electrically connected to the first main electrode 31 of the semiconductor chip 30 included in the switching element Q1 in Figure 7, the second main electrode 32 of the semiconductor chip 30 included in the switching element Q1 in Figure 7, and the first main electrode 31 of the semiconductor chip 30 included in the switching element Q4 in Figure 7, each via an output conductive path.

[0047] The positive electrode conductive path, negative electrode conductive path, intermediate conductive path, and output conductive path include conductive plates on the insulating circuit board 20, wiring on the wiring board 50, conductive pins 57, etc., according to each conductive path. Each of the positive electrode terminal 52, negative electrode terminal 53, intermediate terminal 54, and output terminal 55, and each of the control terminals 56a to 56l described above, are made of a conductive material such as copper (Cu), Cu alloy, aluminum (Al), or Al alloy.

[0048] ((Specific configuration of resin encapsulant and frame)) As shown in Figures 2 and 3, the resin encapsulant 60 and the heat sink 23 are each bonded and fixed to the main surface portion 4a of the heat sink 3 via an adhesive 8. As shown in Figures 2 to 4, the resin encapsulant 60 includes a main body portion 61 located inside the frame 40 and a protruding portion 62 that protrudes from the main body portion 61 toward the outside of the frame 40 in a plan view. The main body portion 61 encapsulates the insulating circuit board 20 and the semiconductor chip 30 inside the frame 40 with the lower surface portion (back surface) of the heat sink 23 exposed. The main body portion 61 and the protruding portion 62 of the resin encapsulant 60 are each held by the adhesive 8 on their respective lower surfaces.

[0049] As shown in FIGS. 2 to 4, at least a part of the frame portion 41 of the frame 40 is held by the adhesive 8 with the protruding portion 62 of the resin sealing body 60 interposed therebetween. In this first embodiment, the frame portion 41 of the frame 40 is not limited thereto, but in a plan view, it overlaps with the protruding portion 62 of the resin sealing body 60 and is held by the adhesive 8 through this protruding portion 62, and a first portion 41a (see FIGS. 3 and 4) and a second portion 41b (see FIGS. 2 and 4) that is detached from the protruding portion 62 of the resin sealing body 60 and held by the adhesive 8. That is, in the frame 40 of this first embodiment, a part is held by the adhesive 8 with the protruding portion 62 of the resin sealing body 60 interposed therebetween, and another part is directly held by the adhesive 8 without the protruding portion 62 of the resin sealing body 60 interposed therebetween.

[0050] In the frame 40 of this first embodiment, as shown in FIG. 4, the second portion 41b of the frame portion 41 is provided at each of the four corner portions C １ , C ２ , C ３ , C ４ of the frame portion 41 (lid portion 42). And the first portion 41a of the frame portion 41 is provided between the two second portions 41b and 41b on one long side portion side (the left side in FIG. 4) of the two long side portions included in the outer peripheral edge (outline) of the frame portion 41 in a plan view. Also, the first portion 41a of the frame portion 41 is provided between the two second portions 41b and 41b on the other long side portion side (the right side in FIG. 4) of the two long side portions included in the outer peripheral edge (outline) of the frame portion 41 in a plan view. Also, the first portion 41a of the frame portion 41 is provided between the two second portions 41b and 41b on one short side portion side (the lower side in FIG. 4, the terminal arrangement portion 44 side) of the two short side portions included in the outer peripheral edge (outline) of the frame portion 41 in a plan view. Also, the first portion 41a of the frame portion 41 is provided between the two second portions 41b and 41b on the other short side portion side (the upper side in FIG. 4, the terminal arrangement portion 45 side) of the two short side portions included in the outer peripheral edge (outline) of the frame portion 41 in a plan view. That is, in the frame 40 of this first embodiment, the second portion 41b is at the four corner portions C １ , C ２ , C ３ , C ４Each corner of the frame is individually provided, and the first portion 41a is individually provided on each of the four sides of the frame 41.

[0051] As shown in Figure 4, the length L1 along the Y direction and the length L2 along the X direction of the protruding portion 62 of the resin encapsulant 60 depend on the distance between the two second portions 41b located at both ends of one side (long side or short side) of the outer edge of the frame portion 41 in a plan view.

[0052] Furthermore, as shown in Figure 6, the thickness T1 of the protruding portion 62 of the resin encapsulant 60 along the Z direction is equal to the bottom surface portion 41a of the first portion 41a in the frame portion 41 of the frame 40. １ and the bottom surface portion 41b of the second part 41b １ It depends on the elevation difference H1.

[0053] ((Adhesion Strength)) In the adhesive 8 shown in Figures 2 and 3, the adhesion strength (adhesion) to the frame 40 is lower than the adhesion strength (adhesion) to the resin encapsulant 60. In this first embodiment, the resin encapsulant 60 and the adhesive 8 are each made of, for example, a thermosetting epoxy resin. On the other hand, the frame 40 is made of, for example, a thermoplastic polyphenylene sulfide (PPS) resin. PPS resin has excellent heat resistance, chemical resistance and dimensional stability, but it has low adhesion strength to epoxy resin. In this first embodiment, the adhesion strength to the adhesive 8 is in the order of frame 40 (PPS resin) < heat sink 23 (copper) < resin encapsulant 60 (epoxy resin).

[0054] <Circuit Configuration of Semiconductor Module> Figure 7 is an equivalent circuit diagram of the semiconductor module 10 according to this first embodiment. As shown in Figure 7, the semiconductor module 10 has a three-level circuit configuration, with a positive terminal P, a negative terminal N, an intermediate terminal M, and an output terminal U. １ It has.

[0055] The drain of switching element Q1 is connected to the positive terminal P. The output terminal U is connected to the source of switching element Q1. １The drain of switching element Q2 is connected to the source of switching element Q2. The source of switching element Q3 is connected to the intermediate terminal M. The drain of switching element Q4 is connected to the drain of switching element Q3. The output terminal U is connected to the source of switching element Q4. １ The source of switching element Q1 and the drain of switching element Q2 are connected, respectively. Rectifier elements D1, D2, D3, and D4 are individually connected in antiparallel to each of the switching elements Q1, Q2, Q3, and Q4.

[0056] Figure 7 shows the positive terminal P, negative terminal N, intermediate terminal M, and output terminal U. １ These correspond to the positive terminal 52, negative terminal 53, intermediate terminal 54, and output terminal 55 shown in Figures 1 and 5. The switching element Q1 and rectifier element D1 shown in Figure 7 are constructed from four semiconductor chips 30 included in the first chip group described above. The switching element Q2 and rectifier element D2 shown in Figure 7 are constructed from four semiconductor chips 30 included in the second chip group described above. The switching element Q3 and rectifier element D3 shown in Figure 7 are constructed from four semiconductor chips 30 included in the third chip group described above. The switching element Q4 and rectifier element D4 shown in Figure 7 are constructed from four semiconductor chips 30 included in the fourth chip group described above.

[0057] The gate terminals G1, G2, G3, and G4 shown in Figure 7 correspond to the control terminals 56b, 56i, 56f, and 56k shown in Figure 1, and the auxiliary source terminals SS1, SS2, SS3, and SS4 shown in Figure 7 correspond to the control terminals 56c, 56j, 56g, and 56l shown in Figure 1. The potential detection terminals E1 and E2 shown in Figure 7 correspond to the control terminals 56a and 56h shown in Figure 1.

[0058] ≪Method of Manufacturing an Electronic Device≫ Next, the method of manufacturing the electronic device 1A will be explained using Figures 8A to 8F. In this first embodiment, the manufacturing method of the electronic device 1A will be described, including the semiconductor module manufacturing process. Figures 8A to 8F are longitudinal cross-sectional views taken at the same position as the II-II cutting line in Figure 1.

[0059] First, the assembly part 70 shown in Figure 8A is prepared. The assembly part 70 has basically the same configuration as the semiconductor module 10 shown in Figures 1 to 3, but differs from the semiconductor module 10 shown in Figure 3 in that it does not have the resin encapsulant 60 shown in Figures 2 and 3. That is, as shown in Figure 8A, the assembly part 70 comprises an insulating circuit board 20 with a heat sink 23 on its lower side, a semiconductor chip 30 mounted on the upper side of the insulating circuit board 20, and a wiring board 50 arranged on the upper side of the insulating circuit board 20, spaced apart from the semiconductor chip 30 and the insulating circuit board 20. The assembly part 70 also comprises a conductive pin 57, one end of which is press-fitted into the wiring board 50 and the other end of which is joined to the first main electrode 31 of the semiconductor chip 30, and a control pin, not shown, one end of which is press-fitted into the wiring board 50 and the other end of which is joined to the control electrode of the semiconductor chip 30. Furthermore, the assembly component 70 includes a frame 40 that surrounds the insulating circuit board 20, semiconductor chip 30, and wiring board 50 in a plan view, and covers the top of the wiring board 50 while being separated from it. Although not shown in detail in Figure 8A, the assembly component 70 also includes the positive terminal 52, negative terminal 53, intermediate terminal 54, output terminal 55, and control terminals 56a, 56b, 56c, 56d, 56e, 56f, 56g, 56h, 56i, 56j, 56k, and 56l shown in Figure 1. The insulating circuit board 20 and wiring board 50 are stacked in the Z direction with their respective thickness directions aligned in the Z direction. The wiring board 50 is supported on the insulating circuit board 20 by conductive pins 57 and control terminals, while being separated from the insulating circuit board 20 and semiconductor chip 30. Although not shown in Figure 8A, the frame 40 surrounds the insulating circuit board 20, semiconductor chip 30, and wiring board 50 with the positive terminal 52, negative terminal 53, intermediate terminal 54, output terminal 55, and control terminals 56a, 56b, 56c, 56d, 56e, 56f, 56g, 56h, 56i, 56j, 56k, 56l shown in Figure 1, and is supported by the insulating circuit board 20 while being separated from the insulating circuit board 20.

[0060] Next, as shown in Figure 8B, the assembly part 70 is placed in the cavity 82 formed by the upper mold 81A and lower mold 81B of the molding die 80 and clamped. A runner 83 is connected to the cavity 82 via a gate 84. Although not shown, a pot for loading resin tablets is also connected to the runner 83. In this process, the lower surface of the heat sink 23 included in the insulating circuit board 20 is pressed against the inner wall surface of the cavity 82 by the clamping force of the molding die 80, and the upper surface of the frame 40 is pressed against the inner wall surface of the cavity 82 by the clamping force of the molding die 80.

[0061] In Figure 8B, as an example, the recess 81A into which the control terminal 56a is inserted is shown. １ As shown in the diagram, the molding die 80 has a recess 81A into which the control terminal 56a is inserted. １ Similarly, it also has recesses into which other control terminals (56b, 56c, 56d, 56e, 56f, 56g, 56h, 56i, 56j, 56k, 56l) are inserted.

[0062] Next, with the assembly part 70 clamped in the cavity 82, a thermosetting epoxy resin, for example, is pressure-injected into the cavity 82 from a pot (not shown) through a runner 83 and a gate 84 to form a resin encapsulant 60 as shown in Figure 8C. In this process, the resin encapsulant 60 includes a main body portion 61 located inside the frame 40 and a protruding portion 62 that protrudes from the main body portion 61 toward the outside of the frame 40 in a plan view. The main body portion 61 seals the insulating circuit board 20 and semiconductor chips 30, etc., inside the frame 40 with the lower surface (back surface) of the heat sink 23 exposed. The protruding portion 62 overlaps with the first portion 41a of the frame portion 41 of the frame 40 in a plan view and is formed between the first portion 41a of the frame portion 41 and the lower mold 81B of the molding die. Through this process, the assembly part 70 further includes the resin encapsulant 60.

[0063] Next, the assembly part 70, which further includes the resin encapsulant 60, is removed from the molding die 80, and any excess resin pieces, such as runner resin connected to the resin encapsulant 60, are removed. This forms the semiconductor module 10, which includes the assembly part 70 and the resin encapsulant 60, as shown in Figure 8D.

[0064] Next, the semiconductor module 10 is placed on the support base 85 with the heat sink 23 side of the semiconductor module 10 facing upwards. Then, as shown in Figure 8E, adhesive 8 is applied to the heat sink 23 of the semiconductor module 10. A thermosetting epoxy resin is used as the adhesive 8.

[0065] Next, with the main surface portion 4a of the heat sink 3 positioned on the side of the heat sink 23 opposite to the semiconductor chip 30, the heat sink 3 is placed with adhesive 8 interposed between them. Then, by pressing the heat sink 3 toward the heat sink 23 side of the semiconductor module 10, the adhesive 8 is spread across the heat sink 23 and the resin encapsulant 60, as shown in Figure 8F, and then heat treatment is applied to harden the adhesive 8. In this process, the heat sink 23 of the semiconductor module 10 is bonded and fixed to the main surface portion 4a of the heat sink 3 with adhesive 8 in between, and the main body portion 61 and protruding portion 62 of the resin encapsulant 60 of the semiconductor module 10 are bonded and fixed to the main surface portion 4a of the heat sink 3 with adhesive 8 in between. Furthermore, in this process, the first portion 41a of the frame portion 41 of the frame 40 is held in place by the adhesive 8 via the protruding portion 62 of the resin encapsulant 60, and although not shown in Figure 8E, the second portion 41b of the frame portion 41 of the frame 40 is held directly in place by the adhesive 8 without the protruding portion 62 of the resin encapsulant 60. This process almost completes the electronic device 1A on which the semiconductor module 10 is mounted with the adhesive 8 interposed on the main surface portion 4a of the heat sink 3.

[0066] <<Main Effects of the First Embodiment>> Next, the main effects of this first embodiment will be explained using Figures 2 and 3, in comparison with the prior art. The drawings of this first embodiment will also be referenced in the explanation of the prior art.

[0067] As shown in Figures 2 and 3, the electronic device 1A according to this first embodiment has a structure in which the semiconductor module 10 is bonded and fixed to the main surface portion 4a of the heat sink 3 with an adhesive 8 interposed therebetween. In such a structure, deformation caused by the heat generated when the semiconductor module 10 is in operation causes strain (stress) in the adhesive 8. Since this strain in the adhesive 8 is a factor that promotes delamination between the heat sink 3 and the semiconductor module 10, in conventional electronic devices, the resin encapsulant 60 located outside the heat sink 23 and the frame portion 41 of the frame 40, which are located outside the heat sink 23 of the semiconductor module 10, are also bonded and fixed to the heat sink 3 with an adhesive 8 interposed therebetween

[0068] However, the strain generated in the adhesive 8 is higher in the peripheral part of the frame 40 than in the central part when viewed from above. That is, the strain generated in the adhesive 8 is higher in the peripheral part that overlaps with the frame portion 41 of the frame 40 than in the central part where the adhesive 8 overlaps with the heat sink 23 when viewed from above. Furthermore, in the case of the electronic device 1A of this first embodiment, where the adhesive 8 and the resin encapsulant 60 are made of a thermosetting epoxy resin with excellent heat resistance, low thermal expansion, and processability, and the frame 40 that forms the outer shell of the semiconductor module 10 is made of thermoplastic PPS resin, the adhesion strength (adhesion) between the frame portion 41 of the frame 40 and the adhesive 8 is lower than the adhesion strength (adhesion) between the resin encapsulant 60 and the adhesive 8. That is, in the peripheral part of the adhesive 8, the generated strain is high, and the adhesion strength with the frame portion 41 of the frame 40 is low, so in conventional electronic devices, delamination between the semiconductor module 10 and the heat sink 3 was likely to occur in the peripheral part of the adhesive 8. The delamination of the adhesive 8 around its periphery later progressed to delamination between the heat sink 23 and the adhesive 8, which reduced the heat dissipation efficiency of the heat sink 23 in releasing (transferring) heat to the heatsink 3. Therefore, from the perspective of the reliability of the electronic device, there was room for improvement.

[0069] Therefore, in the electronic device 1A according to this first embodiment, at least a part of the frame portion 41 of the frame 40 is held in place by the adhesive 8 via the protruding portion 62 of the resin encapsulant 60. In this first embodiment, the frame portion 41 of the frame 40 has a first portion 42a that overlaps with the protruding portion 62 of the resin encapsulant 60 in a plan view and is held in place by the adhesive 8 via the protruding portion 62, and a second portion 41b that is detached from the protruding portion 62 of the resin encapsulant 60 and held directly in place by the adhesive 8. With this configuration, the adhesion strength between the protruding portion 62 of the resin encapsulant 60 and the adhesive 8 is higher than the adhesion strength between the frame portion 41 of the frame 40 and the adhesive 8, so that delamination between the semiconductor module 10 and the heat sink 3 in the peripheral portion where the strain generated in the adhesive 8 is high can be suppressed. As a result, the delamination progresses from the peripheral portion of the adhesive 8 to the delamination between the heat sink 23 and the adhesive 8, and the decrease in heat dissipation performance of the heat sink 23, which releases (transfers) heat to the heat sink 3, can be suppressed, thereby improving the reliability of the electronic device 1A.

[0070] In this first embodiment, the frame 40 is provided with terminal arrangement sections 44 and 45, respectively. However, in the first embodiment described above, the terminal arrangement sections 44 and 45 are not fixed to the heat sink by adhesive 8. Furthermore, since no stress exceeding the adhesion strength is applied to the interface between the frame section 41 and the resin sealant 60, delamination does not occur at the interface between the frame section 41 and the resin sealant 60.

[0071] <Modification of the First Embodiment> <First Modification> Figure 9 is a diagram showing modification 1-1 according to the first embodiment of the present technology, and is a schematic longitudinal cross-sectional view of a main part showing a part of the longitudinal cross-sectional structure.

[0072] As shown in Figure 9, this modified example 1-1 has basically the same configuration as the first embodiment described above, except that the configuration of the protruding portion 62 of the resin encapsulant 60 is different. That is, as shown in Figure 2, the outer tip of the protruding portion 62 of the first embodiment described above is flush with the side wall surface of the first portion 41a of the frame portion 41 of the frame 40.

[0073] In contrast, as shown in Figure 9, the protruding portion 62 of this modified example 1-1 has its outer tip protruding outward from the side wall surface of the first portion 41a of the frame portion 41 of the frame 40. The protruding portion 62 of this modified example 1-1 can be easily formed by changing the shape of the cavity 82 of the molding die 80 shown in Figure 8B.

[0074] In this modified example 1-1, the same effects as in the first embodiment described above can be obtained. Furthermore, in this modified example 1-1, since the tip of the protruding portion 62 of the resin encapsulant 60 protrudes outward from the side portion of the first portion 41a of the frame 40, the area of ​​the adhesive 8 interposed between the resin encapsulant 60 and the heat sink 3 can be increased compared to the first embodiment described above, thereby further improving the peel resistance between the semiconductor module 10 and the heat sink 3.

[0075] <Second Modification> Figure 10 is a diagram showing modification 1-2 according to the first embodiment of the present technology, and is a schematic longitudinal cross-sectional view of a main part showing a part of the longitudinal cross-sectional structure. As shown in Figure 10, this modification 1-2 has basically the same configuration as modification 1-1 described above, but the shape of the adhesive 8 on the protruding portion 62 of the resin encapsulant 60 is different. That is, as shown in Figure 10, the adhesive 8 of this modification 1-2 wraps around the tip of the protruding portion 62 of the resin encapsulant 60 and wraps around to the side wall surface of the frame portion 41 of the frame 40. Such a fillet shape of adhesive 8 can be easily formed by increasing the amount of adhesive 8 and increasing the amount that protrudes to the outside of the semiconductor module 10 from between the semiconductor module 10 and the main surface portion 4a of the heat sink 3.

[0076] In this modified example 1-2, the same effects as in the modified example 1-1 described above can be obtained. Furthermore, in this modified example 1-2, since the adhesive 8 wraps around the tip of the protruding portion 62 of the resin encapsulant 60 and extends to the side wall surface of the frame portion 41 of the frame 40, the peel resistance between the semiconductor module 10 and the heat sink 3 can be further improved compared to the modified example 1-1 described above.

[0077] <Third Modification> Figure 11 is a diagram showing modification 1-3 according to the first embodiment of the present technology, and is a schematic longitudinal cross-sectional view of a main part showing a part of the longitudinal cross-sectional structure. As shown in Figure 11, this modification 1-3 has basically the same configuration as modification 1-1 described above, except that the shape of the protruding portion 62 of the resin encapsulant 60 is different. That is, as shown in Figure 11, the protruding portion 62 of this modification 1-3 includes a recess 62a that is recessed from the heat sink 3 side of the protruding portion 62 to the opposite side and filled with adhesive 8. This recess 62a is separated from the first portion 41a of the frame portion 41 of the frame 40. And, although not shown in detail, the recess 62a extends along the edge of the outer peripheral edge of the frame in a plan view. This recess 62a can be easily formed by changing the shape of the cavity 82 of the molding die 80 shown in Figure 8B.

[0078] In this modified example 1-3, the same effects as in the modified example 1-1 described above can be obtained. Furthermore, in this modified example 1-3, the protruding portion 62 is recessed from the lower surface of the protruding portion 62 on the heat sink 3 side toward the frame portion 41 of the frame 40 and includes a recess 62a filled with adhesive 8. Due to the anchoring effect of the adhesive 8 filled in the recess 62a, the resistance to peeling between the semiconductor module 10 and the heat sink 3 can be further improved compared to the modified example 1-1 described above.

[0079] <Fourth Modification> Figure 12 is a diagram showing modification 1-4 according to the first embodiment of the present technology, and is a schematic longitudinal cross-sectional view of a main part showing a part of the longitudinal cross-sectional structure. As shown in Figure 12, this modification 1-4 has basically the same configuration as modification 1-3 described above, except that the shape of the recess 62a provided in the protruding portion 62 of the resin encapsulant 60 is different.

[0080] That is, as shown in Figure 12, the recess 62a of this modified example 1-4 extends in the Z direction from the protruding portion 62 of the resin sealant 60 to the interior of the first portion 42a of the frame 40.

[0081] In this modified example 1-4, the same effects as in the modified example 1-1 described above can be obtained.

[0082] Furthermore, in this modified example 1-4, the recess 62a of the protruding portion 62 extends from the protruding portion 62 of the resin encapsulant 60 to the interior of the first portion 42a of the frame 40. Therefore, due to the anchoring effect of the adhesive 8 filled in the recess 62a, the peel resistance between the semiconductor module 10 and the heat sink 3 can be further improved compared to the modified example 1-1 described above. The anchoring effect in the recess 62a of this modified example 1-4 is greater than the anchoring effect in 62a of the modified example 1-3 described above.

[0083] [Second Embodiment] Figure 13 is a schematic plan view showing an example configuration of an electronic device according to the second embodiment of this technology. Figure 14 is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XIV-XIV cutting line of Figure 13. Figure 15 is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XV-XV cutting line of Figure 13. Figure 16 is a schematic bottom view showing the bottom side of the semiconductor module of Figure 13.

[0084] As shown in Figures 13 to 16, the electronic device 1B according to the second embodiment of this technology has basically the same configuration as the electronic device 1A according to the first embodiment described above, but the positions of the first portion 41a and the second portion 41b in the frame portion 41 of the frame 40 are reversed.

[0085] That is, as shown in Figures 1 to 4, in the first embodiment described above, the second portion 41b of the frame portion 41 of the frame 40 is the four corner portions C of the frame portion 41 in a plan view. １ , C ２ , C ３ , C ４ Each of these is provided. The first portion 41a of the frame portion 41 is provided between the two second portions 41b and 41b on each of the four sides (two long sides and two short sides) that are included in the outer periphery of the frame portion 41 in a plan view.

[0086] In contrast, as shown in Figures 13 to 16, in this second embodiment, the first portion 41a of the frame portion 41 of the frame 40 is the four corner portions C of the frame portion 41 in a plan view. １ , C ２ , C ３ , C ４Each of these is provided. The second portion 41b of the frame portion 41 is provided between the two first portions 41a and 41a on each of the four sides (two long sides and two short sides) included in the outer periphery of the frame portion 41 in a plan view.

[0087] The first part 41a of this second embodiment is the four corners C of the frame portion 41 of the frame 40. １ , C ２ , C ３ , C ４ In this embodiment, the resin sealant 60 is held in place by the adhesive 8 via the protruding portion 62. In this second embodiment, the second portion 41b is held directly in place by the adhesive 8 without the protruding portion 62 of the resin sealant 60 on four side portions (two long side portions and two short side portions) included in the outer peripheral edge of the frame portion 41 of the frame 40 in a plan view.

[0088] In this second embodiment, the same effects as those of the first embodiment described above can be obtained.

[0089] Furthermore, the strain (stress) generated in the adhesive 8 due to deformation of the semiconductor module 10 and heat sink 3 caused by the heat generated when the semiconductor module 10 is in operation is higher in the peripheral portion overlapping the frame portion 41 of the frame 40 than in the central portion overlapping the heat sink 23 in a plan view, and is even higher at the four corners of the outer edge of the frame portion 41 of the frame 40 in a plan view. Therefore, as in this second embodiment, the four corners C of the frame portion 41 of the frame 40 in a plan view １ , C ２ , C ３ , C ４ By providing the first portion 41a in each of these, the resistance to delamination between the semiconductor module 10 and the heat sink 3 at the corners of the frame portion 41, where stress is high in the adhesive 8, can be further improved.

[0090] [Third Embodiment] Figure 17 is a schematic plan view showing an example configuration of an electronic device according to the third embodiment of this technology. Figure 18 is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XVIII-XVIII cutting line in Figure 17. Figure 19 is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XIX-XIX cutting line in Figure 17. Figure 20 is a schematic bottom view showing the bottom side of the semiconductor module in Figure 17.

[0091] As shown in Figures 17 to 20, the electronic device 1C according to the third embodiment of this technology has basically the same configuration as the electronic device 1A according to the first embodiment described above, except that the configuration of the frame portion 41 of the frame 40 is different.

[0092] That is, as shown in Figures 1 to 4, the frame portion 41 of the frame 40 according to the first embodiment described above includes a first portion 41a that overlaps with the protruding portion 62 of the resin sealant 60 in a plan view and is held by the adhesive 8 with the protruding portion 62 interposed therebetween, and a second portion 41b that is detached from the protruding portion 62 of the resin sealant 60 and held by the adhesive 8.

[0093] In contrast, as shown in Figures 17 to 20, the frame portion 41 of the frame 40 according to this second embodiment includes a first portion 41a that overlaps with the protruding portion 62 of the resin sealant 60 in a plan view and is held in the adhesive 8 via the protruding portion 62, similar to the first embodiment described above, but does not include the second portion 41b shown in Figures 1, 3 and 4 of the first embodiment described above. That is, the entire frame portion 41 of the frame 40 is separated from the adhesive 8 and is held in the adhesive 8 via the protruding portion 62 of the resin sealant 60.

[0094] According to the electronic device 1C of this third embodiment, compared to the electronic devices 1A and 1B of the first and second embodiments described above, there is no portion of the frame portion 41 of the frame 40 that is directly held by the adhesive 8. Therefore, the peel resistance between the semiconductor module 10 and the heat sink 3 can be further improved, and reliability can be further enhanced.

[0095] [Fourth Embodiment] Figure 21 is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure of an electronic device according to the fourth embodiment of this technology. Figure 21 is a longitudinal cross-sectional view taken at the same position as the II-II cutting line in Figure 1.

[0096] As shown in Figure 21, the electronic device 1D according to the fourth embodiment of this technology has basically the same configuration as the electronic device 1A according to the first embodiment described above, except that the configuration of the frame portion 41 of the frame 40 is different. That is, as shown in Figures 1 to 4, the frame 40 according to the first embodiment described above has a frame portion 41 that surrounds the insulating circuit board 20 and semiconductor chip 30 in a plan view, a lid portion (top plate portion) 42 that covers the inside of the frame portion 41 and is integrated with the frame portion 41, and terminal arrangement portions 44 and 45 that are provided on opposite sides of the frame portion 41 in a plan view. In contrast, as shown in Figure 21, the frame 40 according to this fourth embodiment includes the frame portion 41 and omits the lid portion 42 shown in Figures 1 to 3 of the first embodiment described above. And, although not shown in Figure 21, the frame 40 according to this fourth embodiment has terminal arrangement portions 44 and 45, similar to the first embodiment described above.

[0097] As shown in Figure 21, in this fourth embodiment, the resin encapsulant 60 has a main body portion 61 located inside the frame portion 41 of the frame 40, which is exposed from the upper surface side of the frame portion 41 of the frame 40. A control terminal 56a is provided on the frame portion 41, and although not shown in Figure 21, other control terminals 56b to 56l are also provided on the frame portion 41. The frame portion 41 of the frame 40 in this fourth embodiment, although not shown in detail, includes a first portion 41a and a second portion 41b similar to those in the first embodiment described above. In other words, the frame 40 in this fourth embodiment is mainly composed of a frame portion 41 including the first portion 41a and the second portion 41b.

[0098] In this fourth embodiment of the electronic device 1D, the same effects as those of the electronic device 1A according to the first embodiment described above can be obtained.

[0099] Furthermore, the frame portion 41 according to this fourth embodiment may include a first portion 41a and a second portion 41b, similar to those in the second embodiment described above. Also, the frame portion 41 according to this fourth embodiment may have the same configuration as the frame portion 41 of the third embodiment described above. In addition, the frame 40 according to this fourth embodiment may consist only of the frame portion 41, without including the terminal arrangement portions 44 and 45.

[0100] [Fifth Embodiment] Figure 22 is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure of an electronic device according to the fifth embodiment of this technology. Figure 22 is a longitudinal cross-sectional view taken at the same position as the II-II cutting line in Figure 1.

[0101] As shown in Figure 22, the electronic device 1E according to the fifth embodiment of this technology has basically the same configuration as the electronic device 1A according to the first embodiment described above, but the configuration of the heat sink is different.

[0102] That is, as shown in Figure 22, the electronic device 1E according to the fifth embodiment of this technology is equipped with a heat sink 3E instead of the heat sink 3 shown in Figures 1 to 3 of the first embodiment described above.

[0103] As shown in Figure 22, the heat sink 3E according to this fifth embodiment comprises a plate-shaped base portion 4 having a main surface portion 4a, heat dissipation fins 5 provided on the side of the base portion 4 opposite to the main surface portion 4a and repeatedly arranged at predetermined intervals in the X direction, and a cover portion 6 that covers the heat dissipation fins 5 and is attached to the base portion 4.

[0104] This heatsink 3E circulates a cooling medium such as water or air between the heat dissipation fins 5, thereby improving the cooling efficiency of the semiconductor module 10.

[0105] In this fifth embodiment of the electronic device 1E, the same effects as those of the first embodiment of the electronic device 1A described above can be obtained.

[0106] Furthermore, the heat sink 3E according to this fifth embodiment can also be applied to each of the electronic devices 1A, 1B, 1C, and 1D according to the first to fourth embodiments described above.

[0107] [Sixth Embodiment] Figure 23 is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure of the electronic device according to the sixth embodiment of this technology. Figure 23 is a longitudinal cross-sectional view taken at the same position as the II-II cutting line in Figure 1. As shown in Figure 23, the electronic device 1F according to the fifth embodiment of this technology has basically the same configuration as the electronic device 1A according to the first embodiment described above, but the configuration of the heat sink is different. That is, as shown in Figure 23, the electronic device 1F according to the sixth embodiment of this technology is equipped with a heat sink 3F instead of the heat sink 3 shown in Figures 1 to 3 of the first embodiment described above. This heat sink 3F is mainly composed of a plate-shaped base portion 4 having a main surface portion 4a. This heat sink 3F of the sixth embodiment is called a heat spreader.

[0108] In this sixth embodiment of the electronic device 1F, the same effects as those of the electronic device 1A according to the first embodiment described above can be obtained.

[0109] Furthermore, the heat sink 3F according to this sixth embodiment can also be applied to each of the electronic devices 1A, 1B, 1C, 1D, and 1E according to the first to fourth embodiments described above.

[0110] [Seventh Embodiment] In this seventh embodiment, an example of applying the present technology to a power conversion device that converts power from direct current to alternating current will be described as an electronic device. Figure 24 is a schematic plan view showing an example configuration of a power conversion device according to the seventh embodiment of the present technology. Figure 25 is a schematic longitudinal cross-sectional view showing the longitudinal cross-sectional structure along the XXV-XXV cutting line in Figure 24.

[0111] As shown in Figures 24 and 25, the power converter 1G according to the seventh embodiment of this technology comprises a heat sink 3 having a main surface portion 4a, and three semiconductor modules 10 (10u, 10v, 10w) mounted on the main surface portion 4a of the heat sink 3 with an adhesive 8 interposed between them.

[0112] Each of the three semiconductor modules 10 (10u, 10v, 10w) has the same configuration as the semiconductor module 10 of the first embodiment described above. The three semiconductor modules 10 (10u, 10v, 10w) are provided, for example, corresponding to the U phase, V phase, and W phase of a three-phase inductive motor.

[0113] In this seventh embodiment, the power converter 1G receives gate signals (control signals) output from the gate drive circuit at the gate terminals G1, G2, G3, and G4 of the switching elements Q1 to Q4 shown in Figure 6, respectively, in each of the three semiconductor modules 10 (10u, 10v, 10w), thereby connecting to the output terminals U of each semiconductor module 10. １ From this, the motor drive currents for the U-phase, V-phase, and W-phase are supplied to the motor windings of the three-phase induction motor.

[0114] In this seventh embodiment of the power converter 1G, the same effects as those of the electronic device of the first embodiment described above can be obtained.

[0115] Furthermore, the semiconductor module 10 described above according to the second to sixth embodiments can also be used in the power converter 1G according to this seventh embodiment.

[0116] [Other Embodiments] As described above, the present technology (the technology of this disclosure) has been described by the first to seventh embodiments, but the descriptions and drawings that constitute part of this technology should not be understood as limiting the disclosure. Various alternative embodiments, examples and operational techniques will become apparent to those skilled in the art from this technology.

[0117] For example, in the first to seventh embodiments, a case where a positive terminal 52, a negative terminal 53, an intermediate terminal 54, and an output terminal 55 are provided to constitute a three-level circuit is illustrated, but the invention is not limited thereto. For example, a two-level circuit may be provided with a positive terminal 52, a negative terminal 53, and an output terminal 55, or a multi-level circuit with four or more levels may be configured.

[0118] Furthermore, the configurations disclosed in the first to seventh embodiments can be combined as appropriate, provided that they do not create any contradictions. Thus, it goes without saying that this technology includes various embodiments not described herein. Therefore, the technical scope of this technology is determined solely by the inventive features relating to the claims that are appropriate based on the above description.

[0119] Although the present technology has been described in detail based on the above embodiments and their modifications, the present technology (the technology relating to this disclosure) is not limited to the above embodiments and their modifications, and can be modified in various ways without departing from its essence.

[0120] 1A, 1B, 1C, 1D, 1E, 1F... Electronic device 1G... Power converter 3, 3E, 3F... Heat sink (cooler) 4... Base part 4a... Main surface part 5... Heat dissipation fin 6... Cover part (jacket) 8... Adhesive 10, 10u, 10v, 10w... Semiconductor module 20... Insulated circuit board 21a, 21b... Conductive plate 22... Insulating plate 23... Heat sink (metal plate) 30, 30a, 30b... Semiconductor chip 31... First main electrode 32... Second main electrode 40... Frame (case) 41... Frame part 41a... First part 41a １ ...Bottom part 41b...Second part 41b １ …Bottom section 42…Lid section (top plate section) 44, 45…Terminal arrangement section 46a, 46b, 46c, 46d, 46e, 46f, 46g…Protrusions 47a, 47b…Recesses 50…Wiring board 52…Positive terminal 53…Negative terminal 54…Intermediate terminal 55…Output terminal 56a to 56i…Control terminals 57…Conductive pin 60…Resin encapsulant 61…Main body section 62…Protrusion 62a…Recess 70…Assembly part 80…Molding mold 81A…Upper mold 81A １ ...recess 81B...lower mold 82...cavity 83...runner 84...gate 85...support base C １ , C ２ , C ３ , C ４...corner D1, D2, D3, D4...rectifier element E1, E2...potential detection terminal G1, G2, G3, G4...gate terminal H1...height difference L1, L2...length M...intermediate terminal N...negative terminal T1...thickness P...positive terminal Q1, Q2, Q3, Q4...switching element U １ ...Output terminals

Claims

1. An electronic device comprising: a heat sink having a main surface portion; and a semiconductor module mounted on the main surface portion side of the heat sink with an adhesive interposed between them, wherein the semiconductor module comprises: an insulating circuit board having an upper surface portion and a lower surface portion located on opposite sides of each other, with a heat sink plate provided on the lower surface portion side; a semiconductor chip mounted on the upper surface portion side of the insulating circuit board; a frame surrounding the semiconductor chip; and a resin encapsulant sealing the semiconductor chip and the insulating circuit board inside the frame with the heat sink plate exposed, wherein each of the resin encapsulant and the heat sink plate is bonded and fixed to the main surface portion side of the heat sink with the adhesive interposed between them, the resin encapsulant includes a main body portion located inside the frame and a protruding portion projecting outward from the main body portion, and at least a portion of the frame is held in place by the adhesive with the protruding portion of the resin encapsulant interposed between them.

2. The electronic device according to claim 1, wherein the adhesive has a higher adhesion strength to the resin encapsulant than to the frame.

3. The electronic device according to claim 2, wherein each of the resin encapsulant and adhesive is a thermosetting resin, and the frame is a thermoplastic resin.

4. The electronic device according to claim 1, wherein the protruding portion of the resin encapsulant protrudes outward from the frame.

5. The electronic device according to claim 4, wherein the adhesive wraps around the side of the frame so as to enclose the tip of the protruding portion.

6. The electronic device according to claim 1, wherein the protruding portion of the resin encapsulant includes a recess on the opposite side from the heat sink side of the protruding portion, and which is filled with the adhesive.

7. The electronic device according to claim 6, wherein the recess extends into the interior of the protrusion and the frame.

8. The electronic device according to claim 1, wherein the frame has a first portion that overlaps with the protrusion of the resin encapsulant in a plan view, and a second portion that detaches from the protrusion of the resin encapsulant and is held by the adhesive.

9. The electronic device according to claim 8, wherein the frame comprises a frame portion including the first portion and the second portion, and a lid portion provided inside the frame portion.

10. The electronic device according to claim 8, wherein the frame is a frame portion including the first portion and the second portion.

11. The electronic device according to claim 1, wherein the heat sink comprises a base portion including the main surface portion, heat dissipation fins provided on the side of the base portion opposite to the main surface portion, and a cover portion attached to the base portion and covering the heat dissipation fins.

12. The electronic device according to claim 1, wherein the semiconductor module further has terminals provided on the frame and electrically connected to the semiconductor chip.

13. The electronic device according to claim 1, wherein a plurality of the semiconductor modules are mounted on the heat sink.

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