Pixel circuit and driving method therefor, and display panel

Abstract

A pixel circuit (10) and a driving method therefor, and a display panel (100). The pixel circuit (10) comprises a write sub-circuit (11), a first drive sub-circuit (13), a second drive sub-circuit (14) and a selection sub-circuit (12), wherein the write sub-circuit (11) is respectively connected to the first drive sub-circuit (13) and the second drive sub-circuit (14), and is used for receiving a data signal and outputting same; the selection sub-circuit (12) is used for selecting, when a target luminance of a light-emitting device (20) falls within a first luminance range (L1), to transmit to the first drive sub-circuit (13) the data signal output by the write sub-circuit (11), or selecting, when the target luminance of the light-emitting device (20) falls within a second luminance range (L2), to transmit to the second drive sub-circuit (14) the data signal output by the write sub-circuit (11); and the first drive sub-circuit (13) is used for outputting a first drive current to the light-emitting device (20) on the basis of the data signal, and the second drive sub-circuit (14) is used for outputting a second drive current to the light-emitting device (20) on the basis of the data signal.

Description

Pixel circuits and their driving methods, display panels Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a pixel circuit and its driving method, and a display panel. Background Technology

[0002] OLED (Organic Light Emitting Diode) has been widely used in the display field due to its advantages such as self-emission, low driving voltage, high luminous efficiency, fast response speed, and flexible display capability. In an OLED display panel, the brightness of the screen can be controlled by changing the driving voltage or driving current of the OLED to alter its luminous intensity.

[0003] Summary of the Invention

[0004] On one hand, a pixel circuit is provided. The pixel circuit includes: a write sub-circuit, a first drive sub-circuit, a second drive sub-circuit, and a selection sub-circuit. The write sub-circuit is connected to both the first and second drive sub-circuits. The write sub-circuit is used to receive and output data signals.

[0005] The selection sub-circuit is connected to both the first driving sub-circuit and the second driving sub-circuit. The selection sub-circuit is used to select whether to transmit the data signal output from the writing sub-circuit to the first driving sub-circuit when the target brightness of the light-emitting device is within a first brightness range; or, when the target brightness of the light-emitting device is within a second brightness range, to select whether to transmit the data signal output from the writing sub-circuit to the second driving sub-circuit. The minimum value of the first brightness range is greater than or equal to the maximum value of the second brightness range.

[0006] The first driving sub-circuit and the second driving sub-circuit are connected to the light-emitting device. The first driving sub-circuit is used to output a first driving current to the light-emitting device based on a data signal, and the second driving sub-circuit is used to output a second driving current to the light-emitting device based on a data signal. The first driving current is greater than the second driving current.

[0007] In some embodiments, the selection sub-circuit includes a first selection unit and a second selection unit, wherein the first selection unit is connected to a first driving sub-circuit and the second selection unit is connected to a second driving sub-circuit. When the target brightness of the light-emitting device is within a first brightness range, the first selection unit is turned on and the second selection unit is turned off; when the target brightness of the light-emitting device is within a second brightness range, the first selection unit is turned off and the second selection unit is turned on.

[0008] In some embodiments, the first selection unit includes a first selection transistor, and the second selection unit includes a second selection transistor. The control electrode of the first selection transistor and the control electrode of the second selection transistor are connected to the selection signal terminal. The first electrode of the first selection transistor and the first electrode of the second selection transistor are connected to the write sub-circuit. The second electrode of the first selection transistor is connected to the first drive sub-circuit, and the second electrode of the second selection transistor is connected to the second drive sub-circuit.

[0009] In some embodiments, the first driving sub-circuit includes a first driving transistor, the second driving sub-circuit includes a second driving transistor, and the pixel circuit further includes a storage sub-circuit. The control electrode of the first driving transistor and the control electrode of the second driving transistor are connected to the storage sub-circuit, and the common terminal of the control electrode of the first driving transistor, the control electrode of the second driving transistor, and the storage sub-circuit forms a first node; the storage sub-circuit is used to store and maintain the voltage of the first node.

[0010] In some embodiments, the first terminal of the first driving transistor is connected to the second terminal of the first selection transistor, the first terminal of the second driving transistor is connected to the second terminal of the second selection transistor, and the second terminals of the first driving transistor and the second driving transistor are connected to the light-emitting device.

[0011] In some embodiments, the first selection unit includes a first selection transistor, and the second selection unit includes a second selection transistor. The control electrode of the first selection transistor and the control electrode of the second selection transistor are connected to the selection signal terminal. The first electrode of the first selection transistor is connected to the first driving sub-circuit, the first electrode of the second selection transistor is connected to the second driving sub-circuit, and the second electrodes of the first selection transistor and the second selection transistor are connected to the light-emitting device.

[0012] In some embodiments, the first terminal of the first driving transistor and the first terminal of the second driving transistor are connected to the write sub-circuit, the second terminal of the first driving transistor is connected to the first terminal of the first selection transistor, and the second terminal of the second driving transistor is connected to the first terminal of the second selection transistor.

[0013] In some embodiments, one of the first selection transistor and the second selection transistor is a P-type transistor and the other is an N-type transistor.

[0014] In some embodiments, the carrier mobilities of the first selection transistor and the second selection transistor are different.

[0015] In some embodiments, the carrier mobility of the first driving transistor is different from that of the second driving transistor; and / or, the aspect ratio of the channel of the first driving transistor is different from that of the channel of the second driving transistor.

[0016] In some embodiments, the carrier mobility of the first driving transistor is greater than that of the second driving transistor.

[0017] In some embodiments, the material of the first driving transistor includes low-temperature polycrystalline silicon, and the material of the second driving transistor includes amorphous silicon or oxide.

[0018] In some embodiments, the aspect ratio of the channel of the first driving transistor is greater than the aspect ratio of the channel of the second driving transistor.

[0019] In some embodiments, the carrier mobility of the first driving transistor is the same as that of the second driving transistor.

[0020] In some embodiments, the materials of both the first driving transistor and the second driving transistor include low-temperature polycrystalline silicon.

[0021] In some embodiments, the first terminal of the first selection transistor, the first terminal of the second selection transistor, and the common terminal of the write sub-circuit form a second node, and the second terminal of the first driving transistor, the second terminal of the second driving transistor, the compensation sub-circuit, and the common terminal of the first reset sub-circuit form a third node. Alternatively, the first terminal of the first driving transistor, the first terminal of the second driving transistor, and the common terminal of the write sub-circuit form a second node, and the second terminal of the first selection transistor, the second terminal of the second selection transistor, the compensation sub-circuit, and the common terminal of the first reset sub-circuit form a third node.

[0022] The write sub-circuit includes: a data write transistor; the control electrode of the data write transistor is connected to the first scan signal terminal, the first electrode of the data write transistor is connected to the data signal terminal for providing data signals, and the second electrode of the data write transistor is connected to the second node.

[0023] In some embodiments, the pixel circuit further includes a light-emitting control sub-circuit. The light-emitting control sub-circuit is connected to a first selection transistor, a second selection transistor, a first driving transistor, a second driving transistor, and a light-emitting device; the light-emitting control sub-circuit is configured to turn on when the target brightness of the light-emitting device is within a first brightness range or a second brightness range, so that the driving current output by the first driving transistor or the second driving transistor flows to the light-emitting device.

[0024] In some embodiments, the light-emitting control sub-circuit includes: a first light-emitting control transistor and a second light-emitting control transistor; the control electrode of the first light-emitting control transistor and the control electrode of the second light-emitting control transistor are connected to an enable signal terminal; the first electrode of the first light-emitting control transistor is connected to a first voltage terminal; the second electrode of the first light-emitting control transistor is connected to a second node; the first electrode of the second light-emitting control transistor is connected to a third node; and the second electrode of the second light-emitting control transistor is connected to a light-emitting device.

[0025] In some embodiments, the pixel circuit further includes a compensation sub-circuit. The compensation sub-circuit is connected to the first driving transistor, the second driving transistor, and the storage sub-circuit; the compensation sub-circuit is used to store the data signal passing through the first driving transistor or the second driving transistor into the storage sub-circuit.

[0026] In some embodiments, the compensation sub-circuit includes: a compensation transistor, wherein the control electrode of the compensation transistor is connected to the second scan signal terminal, the first electrode of the compensation transistor is connected to the third node, and the second electrode of the compensation transistor is connected to the first node.

[0027] In some embodiments, the pixel circuit further includes: a first reset sub-circuit, which is connected to the compensation sub-circuit; the first reset sub-circuit is used to reset the control electrode of the first driving transistor, the control electrode of the second driving transistor, and the storage sub-circuit when the compensation sub-circuit is turned on.

[0028] In some embodiments, the first reset sub-circuit includes: a first reset transistor; the control electrode of the first reset transistor is connected to a first reset signal terminal, the first electrode of the first reset transistor is connected to a first initialization signal terminal, and the second electrode of the first reset transistor is connected to a third node.

[0029] In some embodiments, the pixel circuit further includes a second reset circuit, which is connected to the light-emitting device; the second reset circuit is used to reset the light-emitting device.

[0030] In some embodiments, the second reset sub-circuit includes: a second reset transistor; the control electrode of the second reset transistor is connected to a second reset signal terminal, the first electrode of the second reset transistor is connected to a second initialization signal terminal, and the second electrode of the second reset transistor is connected to a light-emitting device.

[0031] On the other hand, a display panel is provided. The display panel includes: a substrate, a light-emitting device, and a pixel circuit as described in any of the above embodiments; both the light-emitting device and the pixel circuit are disposed on the substrate, and the light-emitting device is connected to the pixel circuit.

[0032] In some embodiments, the display panel further includes: a first active layer and a second active layer disposed between a substrate and a light-emitting device, wherein the second active layer is located on the side of the first active layer away from the substrate, and the material of the first active layer is different from the material of the second active layer.

[0033] The first driving sub-circuit of the pixel circuit includes a first driving transistor, and the second driving sub-circuit of the pixel circuit includes a second driving transistor. The semiconductor pattern of the first driving transistor and the semiconductor pattern of the second driving transistor are respectively located in the first active layer and the second active layer; or, the semiconductor patterns of the first driving transistor and the second driving transistor are both located in the first active layer or both located in the second active layer.

[0034] In some embodiments, the semiconductor pattern of the first driving transistor and the semiconductor pattern of the second driving transistor are both located in the first active layer; the material of the semiconductor pattern of the first driving transistor includes low-temperature polycrystalline silicon, and the material of the semiconductor pattern of the second driving transistor includes low-temperature polycrystalline silicon or amorphous silicon.

[0035] In some embodiments, the selection sub-circuit of the pixel circuit includes a first selection transistor and a second selection transistor. The semiconductor pattern of the first selection transistor is located in a first active layer, and the material of the semiconductor pattern of the first selection transistor includes low-temperature polycrystalline silicon; the semiconductor pattern of the second selection transistor is located in a second active layer, and the material of the semiconductor pattern of the second selection transistor includes oxide.

[0036] In some embodiments, the semiconductor pattern of the first driving transistor is located in the first active layer, and the material of the semiconductor pattern of the first driving transistor includes low-temperature polycrystalline silicon; the semiconductor pattern of the second driving transistor is located in the second active layer, and the material of the semiconductor pattern of the second driving transistor includes oxide.

[0037] In some embodiments, the selection sub-circuit of the pixel circuit includes a first selection transistor and a second selection transistor. One of the semiconductor patterns of the first selection transistor and the second selection transistor is located in a first active layer, and the other is located in a second active layer; the material of the semiconductor pattern of the first selection transistor located in the first active layer includes low-temperature polycrystalline silicon, and the material of the other located in the second active layer includes oxide.

[0038] In another aspect, a driving method for a pixel circuit is provided. The driving method for the pixel circuit can be used to drive the pixel circuit as described in any of the above embodiments.

[0039] The driving methods for pixel circuits include:

[0040] When the target brightness of the light-emitting device is within the first brightness range, the writing sub-circuit receives and outputs the first data signal, and the selection sub-circuit selects to transmit the first data signal to the first driving sub-circuit; the first driving sub-circuit outputs the first driving current to the light-emitting device based on the first data signal.

[0041] When the target brightness of the light-emitting device is within the second brightness range, the writing sub-circuit receives and outputs the second data signal, and the selection sub-circuit selects to transmit the second data signal to the second driving sub-circuit; the second driving sub-circuit outputs the second driving current to the light-emitting device based on the second data signal.

[0042] Among them, the minimum value of the first brightness range is greater than or equal to the maximum value of the second brightness range, and the first driving current is greater than the second driving current. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0044] Figure 1 is a structural diagram of a display panel according to some embodiments;

[0045] Figure 2 is a structural diagram of a pixel circuit according to some embodiments;

[0046] Figure 3 is a structural diagram of a pixel circuit according to some other embodiments;

[0047] Figure 4 is a structural diagram of a pixel circuit according to some other embodiments;

[0048] Figure 5 is a structural diagram of the pixel circuit shown in Figure 4;

[0049] Figure 6 is a circuit structure diagram of a pixel circuit according to some other embodiments;

[0050] Figure 7 is a structural diagram of the pixel circuit shown in Figure 6;

[0051] Figure 8 is a timing signal diagram based on the various driving signals of the pixel circuit;

[0052] Figure 9 is another structural diagram of the pixel circuit shown in Figure 6;

[0053] Figure 10 is another structural diagram of the pixel circuit shown in Figure 6;

[0054] Figure 11 is another timing signal diagram based on the various driving signals of the pixel circuit;

[0055] Figure 12 is a structural diagram of a pixel circuit according to some other embodiments;

[0056] Figure 13 is a structural diagram of a pixel circuit according to some other embodiments;

[0057] Figure 14 is a structural diagram of the pixel circuit shown in Figure 13;

[0058] Figure 15 is a structural diagram of a pixel circuit according to some other embodiments;

[0059] Figure 16 is a structural diagram of the pixel circuit shown in Figure 15;

[0060] Figure 17 is a plan view of a display panel according to some embodiments;

[0061] Figure 18 is a cross-sectional structure diagram obtained from the cross-section line BB in Figure 17;

[0062] Figure 19 shows another cross-sectional structure diagram obtained from the cross-section line BB in Figure 17;

[0063] Figure 20 shows another cross-sectional structure diagram obtained from the cross-section line BB in Figure 17;

[0064] Figure 21 shows another cross-sectional structure diagram obtained from the cross-section line BB in Figure 17. Detailed Implementation

[0065] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0066] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0067] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0068] In describing some embodiments, the terms "coupled" and "connected," and their derivative expressions, may be used. The term "connected" should be interpreted broadly; for example, a "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection via an intermediate medium. The term "coupled," for example, indicates that two or more components have direct physical or electrical contact. The term "coupled" or "communicatively coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0069] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0070] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0071] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0072] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values ​​may in practice be based on additional conditions or values ​​beyond those stated.

[0073] As used herein, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0074] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0075] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0076] Some embodiments of this disclosure provide a display panel 100.

[0077] As shown in Figure 1, the display panel 100 includes a plurality of pixel circuits 10 and a plurality of light-emitting devices 20, each pixel circuit 10 being connected to at least one light-emitting device 20. The pixel circuit 10 is used to provide driving current or driving voltage to the corresponding light-emitting device 20 to control the light-emitting device 20 to emit light.

[0078] For example, the light-emitting device 20 is an OLED light-emitting device, and correspondingly, the display panel is an OLED display panel.

[0079] The display panel 100 can be any device that displays moving (e.g., video), stationary (e.g., still image), text, or images. More specifically, the embodiments described are contemplated to be implemented in or associated with a variety of electronic devices, including but not limited to mobile phones, wireless devices, PDAs (Personal Digital Assistants), PIAs (Personal Information Assistants), handheld or portable computers, GPS receivers / navigators, cameras, camcorders, game consoles, wearable devices, flat panel displays, computer monitors, automotive displays (e.g., odometer displays), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic billboards or signs, and aesthetic structures (e.g., displays of images of a piece of jewelry).

[0080] For example, the display panel 100 may also include a frame and other electronic components, and the display panel 100 may be disposed within the frame.

[0081] The structure of the pixel circuit 10 and the driving method of the pixel circuit 10 provided in some embodiments of this disclosure are described below.

[0082] In some embodiments, as shown in FIG2, the pixel circuit 10' includes a writing sub-circuit 11 and a driving sub-circuit 13'. The writing sub-circuit 11 is connected to the driving sub-circuit 13', and the writing sub-circuit 11 is used to receive and output data signals. The driving sub-circuit 13' is connected to the light-emitting device 20, and the driving sub-circuit 13' is used to output a driving current to the light-emitting device 20 based on the data signals.

[0083] For example, as shown in FIG2, the write sub-circuit 11 is also connected to the first scan signal terminal S1 and the data voltage terminal Vdt. The write sub-circuit 11 is used to transmit the data voltage (Vdata) provided by the data voltage terminal Vdt to the drive sub-circuit 13' under the control of the first scan signal terminal S1.

[0084] When displaying an image on the display panel 100, the brightness of the light-emitting device 20 can be changed by altering its driving voltage or driving current, thereby changing the display brightness of the display panel 100. The lower the display brightness of the display panel 100, the smaller the value of the driving current output by the driving sub-circuit 13' to the light-emitting device 20 based on the data signal.

[0085] For example, as shown in FIG2, the driving sub-circuit 13' includes a driving transistor T3'. The semiconductor pattern of the driving transistor T3' is made of a material including low temperature polycrystalline silicon (LTPS), amorphous silicon (a-Si), or oxide.

[0086] Among them, the driving transistor T3' is made of low-temperature polycrystalline silicon, which can make the driving transistor T3' have a higher carrier mobility. During the driving process of the pixel circuit 10', the driving transistor T3' can charge and discharge faster, thereby improving the response speed of the light-emitting device 20, enabling the display panel 100 to achieve a higher refresh rate and improving the display effect of the display panel 100.

[0087] However, the uniformity of low-temperature polycrystalline silicon fabrication is poor. Different driving transistors T3' output driving current to the light-emitting device 20 based on the same data signal has a certain deviation, which causes the actual light emission brightness of different light-emitting devices 20 based on the same data signal to have a certain deviation, which has a certain impact on the display uniformity of the display panel 100.

[0088] Based on this, this disclosure provides a pixel circuit 10.

[0089] In some embodiments, as shown in FIG3, the pixel circuit 10 includes: a write sub-circuit 11, a select sub-circuit 12, a first drive sub-circuit 13, and a second drive sub-circuit 14. The write sub-circuit 11 is connected to the first drive sub-circuit 13 and the second drive sub-circuit 14 respectively; the write sub-circuit 11 is used to receive and output data signals.

[0090] For example, as shown in FIG3, the write sub-circuit 11 is also connected to the first scan signal terminal S1 and the data signal terminal Vdt. The write sub-circuit 11 is used to receive and output the data signal provided by the data voltage terminal Vdt under the control of the first scan signal terminal S1.

[0091] The selection sub-circuit 12 is connected to both the first driving sub-circuit 13 and the second driving sub-circuit 14. The selection sub-circuit 12 is used to select whether to transmit the data signal output from the writing sub-circuit 11 to the first driving sub-circuit 13 when the target brightness of the light-emitting device 20 is within a first brightness range; or, when the target brightness of the light-emitting device 20 is within a second brightness range, to select whether to transmit the data signal output from the writing sub-circuit 11 to the second driving sub-circuit 14. The minimum value of the first brightness range is greater than or equal to the maximum value of the second brightness range.

[0092] The first driving sub-circuit 13 and the second driving sub-circuit 14 are connected to the light-emitting device 20. The first driving sub-circuit 13 is used to output a first driving current to the light-emitting device 20 based on a data signal, and the second driving sub-circuit 14 is used to output a second driving current to the light-emitting device 20 based on a data signal. The first driving current is greater than the second driving current.

[0093] When the display brightness of the display panel 100 is within different brightness ranges, the light emission brightness of each light-emitting device 20 in the display panel 100 also changes accordingly. When the display panel 100 displays the image at a higher display brightness, the light emission brightness of the light-emitting device 20 is within the first brightness range; when the display panel 100 displays the image at a lower display brightness, the light emission brightness of the light-emitting device 20 is within the second brightness range.

[0094] For example, the first brightness range and the second brightness range can be a division of the luminous brightness range of the light-emitting device 20. For instance, the first brightness range is 25% to 100% (inclusive) of the maximum luminous brightness of the light-emitting device 20, and the second brightness range is 0% to 25% (exclusive) of the maximum luminous brightness of the light-emitting device 20. Alternatively, the first brightness range is 20% to 100% (inclusive) of the maximum luminous brightness of the light-emitting device 20, and the second brightness range is 0% to 20% (exclusive) of the maximum luminous brightness of the light-emitting device 20. Or, the first brightness range is 30% to 100% (inclusive) of the maximum luminous brightness of the light-emitting device 20, and the second brightness range is 0% to 30% (exclusive) of the maximum luminous brightness of the light-emitting device 20.

[0095] Of course, the division of the first brightness range and the second brightness range is not limited to this. The specific design can be adapted according to actual needs. This is only an exemplary description of some possible implementations of this disclosure and is not intended to limit this disclosure.

[0096] The luminous brightness of the light-emitting device 20 can refer to the target luminous brightness of the light-emitting device 20. In some embodiments of this disclosure, by setting a selection sub-circuit 12, the drive current is output to the light-emitting device 20 through either the first drive sub-circuit 13 or the second drive sub-circuit 14 according to the different target display brightness of the display panel 100. Compared with the pixel circuit 10' shown in Figure 2, the pixel circuit 10 shown in Figure 3 has a drive current range and data signal range that are adapted to different display brightness ranges after passing through the first drive sub-circuit 13 or the second drive sub-circuit 14, so that the display panel 100 can have better display uniformity in different display brightness ranges.

[0097] Meanwhile, if either the first driving sub-circuit 13 or the second driving sub-circuit 14 fails to work properly, the other one that is working properly can be used to transmit driving current to the light-emitting device 20, effectively reducing the display abnormality caused by the light-emitting device 20 failing to emit light properly and resulting in dark spots on the display panel 100.

[0098] For example, if the first driving sub-circuit 13 malfunctions and cannot function properly, even if the target brightness of the light-emitting device 20 is within the first brightness range when displaying an image, driving current can still be transmitted to the light-emitting device 20 through the second driving sub-circuit 14. Thus, as long as at least one of the first driving sub-circuit 13 and the second driving sub-circuit 14 functions properly, the pixel circuit 10 can transmit driving current to the light-emitting device 20, enabling the light-emitting device 20 to emit light and display, thereby improving the reliability of the pixel circuit 10.

[0099] In some embodiments, as shown in FIG4, the selection sub-circuit 12 includes a first selection unit 121 and a second selection unit 122. The first selection unit 121 is connected to the first driving sub-circuit 13, and the second selection unit 122 is connected to the second driving sub-circuit 14. When the target brightness of the light-emitting device 20 is within a first brightness range, the first selection unit 121 is turned on, and the second selection unit 122 is turned off. When the target brightness of the light-emitting device 20 is within a second brightness range, the first selection unit 121 is turned off, and the second selection unit 122 is turned on.

[0100] In this embodiment, by controlling the on or off of the first selection unit 121 and the second selection unit 122, the first driving sub-circuit 13 and the second driving sub-circuit 14 are selected (the selection here refers to selecting to transmit driving current to the light-emitting device 20 through the first driving sub-circuit 13, or selecting to transmit driving current to the light-emitting device 20 through the second driving sub-circuit 14), so that the data signal output by the writing sub-circuit 11 obtains different driving currents and data ranges through the first driving sub-circuit 13 or the second driving sub-circuit 14, so that the display panel 100 displays the image at the target display brightness.

[0101] The selector circuit 12 has a simple structure and the pixel circuit 10 has high overall reliability. Even if one of the first selector unit 121 and the second selector unit 122 fails and cannot work properly, the pixel circuit 10 can still transmit data signals through the other.

[0102] For example, if the first selection unit 121 malfunctions and cannot function properly, even if the target brightness of the light-emitting device 20 is within the first brightness range when displaying an image, the data signal output from the write sub-circuit 11 can still be transmitted to the second drive sub-circuit 14 via the second selection unit 122. Thus, as long as at least one of the first selection unit 121 and the second selection unit 122 functions properly, the pixel circuit 10 can transmit data signals to either the first drive sub-circuit 13 or the second drive sub-circuit 14, improving the reliability of the pixel circuit 10.

[0103] Based on this, in some embodiments, as shown in FIG5, the first selection unit 121 includes a first selection transistor T8, and the second selection unit 122 includes a second selection transistor T9. The control electrode of the first selection transistor T8 and the control electrode of the second selection transistor T9 are connected to the selection signal terminal SS. The first electrode of the first selection transistor T8 and the first electrode of the second selection transistor T9 are connected to the write sub-circuit 11. The second electrode of the first selection transistor T8 is connected to the first drive sub-circuit 13, and the second electrode of the second selection transistor T9 is connected to the second drive sub-circuit 14.

[0104] The selection signal terminal SS is used to output a selection signal to turn on the first selection transistor T8 and turn off the second selection transistor T9; or to turn off the first selection transistor T8 and turn on the second selection transistor T9.

[0105] For example, the display panel 100 also includes a driving circuit board for outputting control signals to the pixel circuit 10, and the selection signal output by the selection signal terminal SS can be provided through the driving circuit board.

[0106] When the target brightness of the light-emitting device 20 is within a first brightness range, the selection signal terminal SS outputs a first selection signal to turn on the first selection transistor T8 and turn off the second selection transistor T9; when the target brightness of the light-emitting device 20 is within a second brightness range, the selection signal terminal SS outputs a second selection signal to turn off the first selection transistor T8 and turn on the second selection transistor T9. For example, when the selection signal terminal SS outputs the first selection signal, it can output a first voltage; when the selection signal terminal SS outputs the second selection signal, it can output a second voltage.

[0107] Based on this, in some embodiments, as shown in FIG5, one of the first selection transistor T8 and the second selection transistor T9 is a P-type transistor and the other is an N-type transistor.

[0108] By making one of the first selection transistor T8 and the second selection transistor T9 a P-type transistor and the other an N-type transistor, the turn-on voltages of the first selection transistor T8 and the second selection transistor T9 are different. When the selection signal output at the selection signal terminal SS remains unchanged, one of the first selection transistor T8 and the second selection transistor T9 is turned on and the other is turned off. Thus, the first driving sub-circuit 13 is selected to participate in the driving process of the light-emitting device 20 through the first selection transistor T8, or the second driving sub-circuit 14 is selected to participate in the driving process of the light-emitting device 20 through the second selection transistor T9.

[0109] Based on the above, in some embodiments, the carrier mobility of the first selection transistor T8 and the second selection transistor T9 is different.

[0110] The material of the semiconductor pattern of the first selection transistor T8 is different from the material of the semiconductor pattern of the second selection transistor T9. For example, the material of the semiconductor pattern of the first selection transistor T8 includes low-temperature polycrystalline silicon, while the material of the semiconductor pattern of the second selection transistor T9 includes oxide; or, the material of the semiconductor pattern of the first selection transistor T8 includes oxide, while the material of the semiconductor pattern of the second selection transistor T9 includes low-temperature polycrystalline silicon.

[0111] In some embodiments, as shown in FIG5, the pixel circuit 10 further includes a storage sub-circuit 15, which is connected to a first voltage terminal VDD, a first driving sub-circuit 13, and a second driving sub-circuit 14. The common terminal of the first driving sub-circuit 13, the second driving sub-circuit 14, and the storage sub-circuit 15 forms a first node N1.

[0112] The write sub-circuit 11 is used to write the data signal (data voltage Vdta) provided by the data voltage terminal Vdt to the storage sub-circuit 15 under the control of the first scan signal terminal S1. The storage sub-circuit 15 is used to store the received data signal.

[0113] One end of the storage sub-circuit 15 is connected to the first voltage terminal VDD, and the other end is connected to the first node N1. The storage sub-circuit 15 can adjust the potential of the first node N1 according to the stored data signal and the potential of the first voltage terminal VDD, so that the potential of the first node N1 remains unchanged. That is, the storage sub-circuit 15 is used to store and maintain the voltage of the first node N1.

[0114] By setting the storage sub-circuit 15, the magnitude of the driving current generated by the first driving sub-circuit 13 or the second driving sub-circuit 14 based on the data signal for driving the light-emitting device 20 to emit light can be matched with the aforementioned data voltage.

[0115] In some embodiments, as shown in FIG5, the first driving sub-circuit 13 includes a first driving transistor T3, and the second driving sub-circuit 14 includes a second driving transistor T10. The control electrode of the first driving transistor T3 and the control electrode of the second driving transistor T10 are connected to the storage sub-circuit 15, and the common terminal of the control electrode of the first driving transistor T3, the control electrode of the second driving transistor T10, and the storage sub-circuit 15 forms a first node N1.

[0116] In some embodiments, as shown in FIG5, the first terminal of the first driving transistor T3 is connected to the second terminal of the first selection transistor T8, the first terminal of the second driving transistor T10 is connected to the second terminal of the second selection transistor T9, and the second terminals of the first driving transistor T3 and the second terminals of the second driving transistor T10 are connected to the light-emitting device 20.

[0117] It should be noted that this application does not limit the types of the first driving transistor T3 and the second driving transistor T10; they can be N-type transistors or P-type transistors.

[0118] The selection sub-circuit 12, the first driving sub-circuit 13, and the second driving sub-circuit 14 in the pixel circuit 10 are considered as a whole driving module, which is connected to the first node N1, the second node N2, and the third node N3, respectively. The common terminal of the first driving sub-circuit 13, the second driving sub-circuit 14, and the storage sub-circuit 15 forms the first node N1.

[0119] The second node N2 can be a common connection of the write sub-circuit 11, the select sub-circuit 12, and the storage sub-circuit 15. Correspondingly, the third node N3 is a common connection of the first driving sub-circuit 13, the second driving sub-circuit 14, and the light-emitting device 20. Alternatively, the second node N2 can be a common connection of the write sub-circuit 11, the first driving sub-circuit 13, the second driving sub-circuit 14, and the storage sub-circuit 15. Correspondingly, the third node N3 can be a common connection of the select sub-circuit 12 and the light-emitting device 20.

[0120] In some embodiments, as shown in Figures 3, 4 and 5, in the pixel circuit 10, the common terminal of the write sub-circuit 11 and the select sub-circuit 12 forms a second node N2, and the common terminal of the first drive sub-circuit 13, the second drive sub-circuit 14 and the light-emitting device 20 forms a third node N3.

[0121] The storage sub-circuit 15 may include a storage capacitor C, one end of which is connected to the first voltage terminal VDD, and the other end is connected to the control electrode of the first driving transistor T3 and the control electrode of the second driving transistor T10. In this way, the storage capacitor C can ensure the stability of the voltage (voltage of the first node N1) at the control electrodes of the first driving transistor T3 and the second driving transistor T10.

[0122] In some embodiments, as shown in FIG5, the storage sub-circuit 15 is connected to the first voltage terminal VDD, the first node N1, and the second node N2.

[0123] Based on the above, in some embodiments, as shown in FIG5, the write sub-circuit 11 includes a data write transistor T4. The control terminal of the data write transistor T4 is connected to the first scan signal terminal S1, the first terminal of the data write transistor T4 is connected to the data signal terminal Vdt for providing data signals, and the second terminal of the data write transistor T4 is connected to the second node N2.

[0124] In some embodiments, as shown in FIG5, the carrier mobility of the first driving transistor T3 is different from that of the second driving transistor T10; and / or, the width-to-length ratio of the channel of the first driving transistor T3 is different from that of the channel of the second driving transistor T10.

[0125] As mentioned above, the minimum value of the first brightness range is greater than or equal to the maximum value of the second brightness range. Therefore, when the target brightness of the light-emitting device 20 is within the first brightness range, the display brightness of the display panel 100 is relatively high; when the target brightness of the light-emitting device 20 is within the second brightness range, the display brightness of the display panel 100 is relatively low.

[0126] The control electrode of the transistor described in this application is the gate electrode of the transistor. Depending on the type of transistor, the first electrode of the transistor may be the source electrode of the transistor and the second electrode may be the drain electrode of the transistor, or the first electrode of the transistor may be the drain electrode of the transistor and the second electrode may be the gate electrode of the transistor.

[0127] The ID-VG curve of the transistor illustrates the relationship between the drain-source current and the gate-source voltage when the drain-source voltage remains constant. With the drain-source voltage of the driving transistor (the voltage between the first and second terminals of the first driving transistor T3, and / or the voltage between the first and second terminals of the second driving transistor T10) remaining constant, the source-drain current of the driving transistor (the first driving current flowing through the first and second terminals of the first driving transistor T3, or the second driving current flowing through the first and second terminals of the second driving transistor T10) differs based on different data signals. This results in different ranges of driving current output to the light-emitting device 20, and correspondingly, different ranges of luminous intensity from the light-emitting device 20.

[0128] With the drain-source voltage of the transistor remaining constant, the source-drain current of the driving transistor in the pixel circuit differs based on different data signals, resulting in different luminous brightness of the light-emitting device 20. The data range refers to the difference in the gate-source voltage of the driving transistor when the light-emitting device 20 emits light at different brightness levels. The larger this value, the smaller the change in the source-drain current of the driving transistor caused by the data signal voltage error, and the smaller the corresponding luminous brightness error of the light-emitting device 20.

[0129] As shown in Figure 5, the light-emitting device 20 is also connected to the second voltage terminal VSS. The first voltage signal provided by the first voltage terminal VDD and the second voltage signal provided by the second voltage terminal VSS are constant voltage signals. That is, the voltage across the light-emitting device 20 remains unchanged, the voltage between the first and second terminals of the first driving transistor T3 remains unchanged, and the voltage between the first and second terminals of the second driving transistor T10 remains unchanged.

[0130] When the materials of the semiconductor pattern of the first driving transistor T3 and the semiconductor pattern of the second driving transistor T10 have different mobility, the ID-VG curves of the first driving transistor T3 and the second driving transistor T10 are different, and the data signal ranges are also different.

[0131] When the materials of the semiconductor patterns of the first driving transistor T3 and the semiconductor patterns of the second driving transistor T10 have the same mobility, but the aspect ratios of the first driving transistor T3 and the second driving transistor T10 are different, the ID-VG curves of the first driving transistor T3 and the second driving transistor T10 are different, and the data signal ranges are also different.

[0132] When the materials of the semiconductor patterns of the first driving transistor T3 and the semiconductor patterns of the second driving transistor T10 have different mobility, and the aspect ratios of the first driving transistor T3 and the second driving transistor T10 are different, the ID-VG curves of the first driving transistor T3 and the second driving transistor T10 may also be different, and the data signal ranges of the first driving transistor T3 and the second driving transistor T10 may also be different.

[0133] As shown in Figure 5, the data signal output by the write sub-circuit 11 is written to the storage sub-circuit 15. The voltage of the first node N1 is related to the data signal written to the storage sub-circuit 15. When the data signals written from the write sub-circuit 11 to the storage sub-circuit 15 are the same, the voltage of the first node N1 is the same.

[0134] In summary, when the ID-VG curves of the first driving transistor T3 and the second driving transistor T10 are different, the ranges of the first driving current output to the light-emitting device 20 through the first driving transistor T3 and the second driving current output to the light-emitting device 20 through the second driving transistor T10 are different based on the data signal written by the writing sub-circuit 11; and the ranges of the data signals of the first driving transistor T3 and the second driving transistor T10 are also different.

[0135] Based on the same data signal, a larger driving current can be obtained through the first driving transistor T3, so that the light-emitting device 20 can emit light with higher brightness, thereby achieving high-brightness display of the display panel 100. Furthermore, since the semiconductor pattern of the first driving transistor T3 has a high material mobility and / or a large width-to-length ratio, based on the same data signal, a larger range of driving current can be obtained through the first driving transistor T3, thereby making the brightness adjustment range of the light-emitting device 20 wider and improving the brightness range of the display panel 100 under high-brightness display.

[0136] Based on the same data signal, a smaller driving current can be obtained through the second driving transistor T10, enabling the light-emitting device 20 to emit light at a lower brightness, thus achieving low-brightness display. Since the semiconductor pattern of the second driving transistor T10 has a low material mobility and / or a small width-to-length ratio, a smaller range of driving current can be obtained through the second driving transistor T10 based on the same data signal, resulting in a smaller brightness adjustment range for the light-emitting device 20. Furthermore, the smaller data signal range of the second driving transistor T10 can improve the brightness adjustment precision of the display panel 100 under low-brightness display, reduce the brightness error of the light-emitting device 20, and improve the display uniformity under low-brightness display.

[0137] Based on the above, in some embodiments, as shown in FIG5, the carrier mobility of the first driving transistor T3 is greater than that of the second driving transistor T10.

[0138] When the carrier mobilities of the first driving transistor T3 and the second driving transistor T10 are different, the width-to-length ratio of the channels of the first driving transistor T3 and the second driving transistor T10 can be the same or different, as long as different driving current ranges and data signal ranges can be obtained through the first driving transistor T3 and the second driving transistor T10 based on the same data signal.

[0139] For example, as shown in FIG5, the material of the first driving transistor T3 includes low-temperature polycrystalline silicon, and the material of the second driving transistor T10 includes amorphous silicon or oxide.

[0140] The first driving transistor T3 used for high-brightness display driving adopts a low-temperature polycrystalline silicon transistor. Compared with amorphous silicon and oxide, low-temperature polycrystalline silicon has a higher carrier mobility, which can make the display panel 100 display brighter. In addition, the first driving transistor T3 can charge and discharge faster, thereby improving the response speed and refresh rate of the light-emitting device 20, and thus improving the display effect.

[0141] When the target brightness of the light-emitting device 20 is within the second brightness range, the target driving current of the light-emitting device 20 is relatively small. The second driving transistor T10 used for low-brightness display driving adopts an amorphous silicon transistor or an oxide transistor. Compared with low-temperature polycrystalline silicon, the preparation uniformity of amorphous silicon and oxide is better, so that the fluctuation of the difference between the actual driving current and the target driving current of the second driving transistor T10 flowing through each pixel circuit 10 in the display panel 100 is smaller, thereby improving the uniformity of image quality under low-brightness display.

[0142] In some embodiments, the width-to-length ratio of the channel of the first driving transistor T3 is greater than the width-to-length ratio of the channel of the second driving transistor T10.

[0143] By utilizing the different channel width-to-length ratios of the first driving transistor T3 and the second driving transistor T10, based on the same data signal, different driving current ranges and data signal ranges can be obtained by transmitting the first driving current to the light-emitting device 20 through the first driving transistor T3 and the second driving current to the light-emitting device 20 through the second driving transistor T10, thereby improving the uniformity of image quality under low brightness display.

[0144] Based on this, when the width-to-length ratio of the channels of the first driving transistor T3 and the second driving transistor T10 is different, the carrier mobility of the first driving transistor T3 and the second driving transistor T10 can be the same or different, as long as different driving current ranges and data signal ranges can be obtained through the first driving transistor T3 and the second driving transistor T10 based on the same data signal.

[0145] For example, as shown in FIG5, the carrier mobility of the first driving transistor T3 is the same as that of the second driving transistor T10.

[0146] For example, the materials of the first driving transistor T3 and the second driving transistor T10 can both include low-temperature polycrystalline silicon.

[0147] When the materials of the first driving transistor T3 and the second driving transistor T10 include low-temperature polycrystalline silicon, the response speed of the first driving transistor T3 and the second driving transistor T10 is relatively fast, enabling the display panel 100 to display images at a high refresh rate under both high-brightness and low-brightness display conditions.

[0148] However, since the width-to-length ratio of the channels of the first driving transistor T3 and the second driving transistor T10 are different, based on the same data signal, transmitting the first driving current to the light-emitting device 20 through the first driving transistor T3 and transmitting the second driving current to the light-emitting device 20 through the second driving transistor T10 can result in different driving current ranges and data signal ranges. The data signal range of the second driving transistor T10 is smaller, thereby improving the uniformity of image quality under low brightness display.

[0149] In some embodiments, as shown in FIG6, the pixel circuit 10 further includes a light emission control sub-circuit 16. The light emission control sub-circuit 16 is connected to the enable signal terminal EM, the first voltage terminal VDD, the selection sub-circuit 12, the first driving sub-circuit 13, the second driving sub-circuit 14, and the light emission device 20.

[0150] The light-emitting control sub-circuit 16 is used to turn on when the target brightness of the light-emitting device 20 is within the first brightness range, and to transmit the first driving current generated by the first driving sub-circuit 13 under the action of the first voltage terminal VDD, the second voltage terminal VSS and the data signal (data voltage Vdata) written to the storage sub-circuit 15 to the light-emitting device 20.

[0151] The light-emitting control sub-circuit 16 is also used to turn on when the target brightness of the light-emitting device 20 is within the second brightness range, and to transmit the second driving current generated by the second driving sub-circuit 14 under the action of the first voltage terminal VDD, the second voltage terminal VSS and the data signal (data voltage Vdata) written to the storage sub-circuit 15 to the light-emitting device 20.

[0152] For example, as shown in FIG7, the light-emitting control sub-circuit 16 is connected to the first selection transistor T8, the second selection transistor T9, the first driving transistor T3, the second driving transistor T10, and the light-emitting device 20. The light-emitting control sub-circuit 16 is used to turn on when the target brightness of the light-emitting device 20 is within a first brightness range or a second brightness range, so that the driving current output by the first driving transistor T3 or the second driving transistor T10 flows to the light-emitting device 20.

[0153] For example, as shown in FIG7, the light-emitting control sub-circuit 16 includes: a first light-emitting control transistor T5 and a second light-emitting control transistor T6. The control terminals of the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are connected to the enable signal terminal EM. The first terminal of the first light-emitting control transistor T5 is connected to the first voltage terminal VDD. The second terminal of the first light-emitting control transistor T5 is connected to the second node N2. The first terminal of the second light-emitting control transistor T6 is connected to the third node N3. The second terminal of the second light-emitting control transistor T6 is connected to the light-emitting device 20.

[0154] In some embodiments, as shown in FIG6, the pixel circuit 10 further includes a compensation sub-circuit 17. The compensation sub-circuit 17 is connected to the storage sub-circuit 15, the first driving sub-circuit 13, and the second driving sub-circuit 14. The compensation sub-circuit 17 is used to store the data signal passing through the first driving sub-circuit 13 or the second driving sub-circuit 14 into the storage sub-circuit 15.

[0155] For example, as shown in FIG7, the compensation sub-circuit 17 is connected to the first driving transistor T3, the second driving transistor T10 and the storage sub-circuit 15; the compensation sub-circuit 17 is used to store the data signal passing through the first driving transistor T3 or the second driving transistor T10 into the storage sub-circuit 15.

[0156] The compensation sub-circuit 17 is also used to compensate the threshold voltage Vth of the first driving transistor T3 in the first driving sub-circuit 13 or the second driving transistor T10 in the second driving sub-circuit 14.

[0157] For example, as shown in FIG7, the compensation sub-circuit 17 includes a compensation transistor T2. The control terminal of the compensation transistor T2 is connected to the second scan signal terminal, the first terminal of the compensation transistor T2 is connected to the third node N3, and the second terminal of the compensation transistor T2 is connected to the first node N1.

[0158] In some embodiments, as shown in FIG6, the pixel circuit 10 further includes a first reset sub-circuit 18. The first reset sub-circuit 18 is connected to the first reset signal terminal Rst1, the first initial voltage terminal Vint1, and the third node N3.

[0159] The first reset sub-circuit 18 is used to transmit the first initialization signal from the first initialization signal terminal Vint1 to the third node N3 under the control of the first reset signal terminal Rst1, so as to reset the voltage of the third node N3.

[0160] The first reset sub-circuit 18 is also used to transmit the first initialization signal from the first initialization signal terminal Vint1 to the third node N3 when the compensation sub-circuit 17 is turned on, so as to reset the voltage of the first node N1.

[0161] For example, as shown in FIG7, the first reset sub-circuit 18 includes a first reset transistor T1. The control terminal of the first reset transistor T1 is connected to the first reset signal terminal Rst1, the first terminal of the first reset transistor T1 is connected to the first initialization signal terminal Vint1, and the second terminal of the first reset transistor T1 is connected to the third node N3.

[0162] The first reset sub-circuit 18 is used to reset the control electrode of the first driving transistor T3, the control electrode of the second driving transistor T10, and the storage sub-circuit 15 when the compensation sub-circuit 17 (compensation transistor T2) is turned on.

[0163] In some embodiments, as shown in FIG6, the pixel circuit 10 further includes a second reset sub-circuit 19. The common terminal of the light-emitting control sub-circuit 16 and the light-emitting device 20 forms a fourth node N4. The second reset sub-circuit 19 is connected to the second reset signal terminal Rst2, the second initial voltage terminal Vint2, and the fourth node N4. The second reset sub-circuit 19 is used to transmit a second initialization signal from the second initialization signal terminal Vint2 to the fourth node N4 under the control of the second reset signal terminal Rst2, so as to reset the voltage of the fourth node N4.

[0164] As shown in Figure 6, the second reset sub-circuit 19 is connected to the light-emitting device 20. The second reset sub-circuit 19 is turned on under the control of the second reset signal terminal Rst2 to transmit the second initialization signal from the second initialization signal terminal Vint2 to the light-emitting device 20 to reset the light-emitting device 20.

[0165] For example, as shown in FIG7, the second reset sub-circuit 19 includes a second reset transistor T7. The control terminal of the second reset transistor T7 is connected to the second reset signal terminal Rst2, the first terminal of the second reset transistor T7 is connected to the second initialization signal terminal Vint2, and the second terminal of the second reset transistor T7 is connected to the light-emitting device 20.

[0166] Based on the above, in the pixel circuit 10, the first reset sub-circuit 18 and the second reset sub-circuit 19 can be controlled by different reset signal terminals Rst, as shown in Figure 7. The first reset sub-circuit 18 is controlled by the first reset signal terminal Rst1, and the second reset sub-circuit 19 is controlled by the second reset signal terminal Rst2. This facilitates the individual control of the first reset sub-circuit 18 and the second reset sub-circuit 19.

[0167] Alternatively, the first reset sub-circuit 18 and the second reset sub-circuit 19 can also be controlled by the same reset signal terminal Rst. The first reset sub-circuit 18 and the second reset sub-circuit 19 are connected to the same reset signal terminal Rst. Under the control of the reset signal terminal Rst, the first reset sub-circuit 18 receives and outputs a first initialization signal, and the second reset sub-circuit 19 receives and outputs a second initialization signal under the control of the reset signal terminal Rst. This reduces the number of control terminals and simplifies the structure of the pixel circuit 10.

[0168] Based on the above, in some embodiments, as shown in FIG7, the first terminal of the first selection transistor T8, the first terminal of the second selection transistor T9, and the common terminal of the write sub-circuit 11 form the second node N2, and the second terminal of the first driving transistor T3, the second terminal of the second driving transistor T10, the compensation sub-circuit 17, and the common terminal of the first reset sub-circuit 18 form the third node N3.

[0169] The following describes some embodiments of this disclosure by taking the example of the first reset circuit 18 and the second reset circuit 19 being connected to the same reset signal terminal Rst.

[0170] Based on any of the above embodiments, the driving method of the pixel circuit 10 includes:

[0171] When the target brightness of the light-emitting device 20 is within the first brightness range, the writing sub-circuit 11 receives and outputs the first data signal, and the selection sub-circuit 12 selects to transmit the first data signal to the first driving sub-circuit 13; the first driving sub-circuit 13 outputs the first driving current to the light-emitting device 20 based on the first data signal.

[0172] When the target brightness of the light-emitting device 20 is within the second brightness range, the writing sub-circuit 11 receives and outputs the second data signal, and the selection sub-circuit 12 selects to transmit the second data signal to the second driving sub-circuit 14; the second driving sub-circuit 14 outputs the second driving current to the light-emitting device 20 based on the second data signal.

[0173] Among them, the minimum value of the first brightness range is greater than or equal to the maximum value of the second brightness range, and the first driving current is greater than the second driving current.

[0174] In the display panel 100, the display brightness can be adjusted by changing the brightness of the light-emitting device 20. The brightness of the light-emitting device 20 can be adjusted by regulating the driving current of the light-emitting device 20.

[0175] Referring to the previous description of the pixel circuit 10, when driving current is transmitted to the light-emitting device 20 through the first driving sub-circuit 13 or the second driving sub-circuit 14 based on the same data signal, the range of the driving current and the range of the data signal are different. Based on the same data signal, the second driving sub-circuit 14 used for low-brightness display can obtain a smaller range of driving current compared to the first driving sub-circuit 13 used for high-brightness display. Therefore, when the light-emitting brightness of the light-emitting device 20 is within the second brightness range, the light-emitting brightness of the light-emitting device 20 can be more finely controlled, which is beneficial for achieving precise control of brightness under low-brightness display.

[0176] Furthermore, based on the same data signal, when the output current is sent to the light-emitting device 20 through the second driving sub-circuit 14, the range of data signals that can be obtained is smaller. In this way, the difference between the actual light-emitting brightness and the target light-emitting brightness of the light-emitting device 20 is smaller, which is beneficial to improving the brightness uniformity of the display panel 100 under low brightness display.

[0177] Based on any of the above embodiments, the transistors used in the pixel circuit 10 of this disclosure can be P-type switching transistors or N-type switching transistors. The P-type switching transistor is turned on when the control level is low and turned off when the control level is high; the N-type switching transistor is turned on when the control level is high and turned off when the control level is low.

[0178] It should be noted that, in actual use, the type of each transistor in the pixel circuit 10 of this embodiment is not limited. Each transistor can be configured as an N-type switching transistor or a P-type switching transistor as needed, and the effective levels (also referred to as operating levels or operating voltages) of the enable signal terminal EM, the select signal terminal SS, the first scan signal terminal S1, the second scan signal terminal S2, and the reset signal terminal Rst can be configured accordingly. When the transistors in the pixel circuit 10 are N-type transistors, the effective level of the N-type transistor is a high-level signal.

[0179] Furthermore, the control signals provided by the multiple control signal terminals in the various embodiments of this disclosure, as well as the voltages of each node, all correspond to working levels and non-working levels (which may also be referred to as first voltage and second voltage, or first level and second level, etc.). Working level and non-working level only represent two different voltage states of the signal and do not mean that the working level or non-working level has a specific value throughout the text.

[0180] Figure 8 is a timing signal diagram based on the various driving signals of the pixel circuit. The following describes the driving method of the pixel circuit of some embodiments of the present disclosure using the operation process of the pixel circuit 10 within an image frame as an example. The image frame includes an initialization stage P1, a write compensation stage P2, and a light emission stage P3.

[0181] In some embodiments, as shown in FIG7, in the pixel circuit 10, the first reset transistor T1, the first driving transistor T3, the data writing transistor T4, the first light-emitting control transistor T5, the second light-emitting control transistor T6, the second reset transistor T7, and the first selection transistor T8 are P-type transistors; the compensation transistor T2, the second selection transistor T9, and the second driving transistor T10 are N-type transistors.

[0182] A P-type transistor conducts when its control electrode is connected to a first voltage level and is turned off when its control electrode is connected to a second voltage level; an N-type transistor conducts when its control electrode is connected to a second voltage level and is turned off when its control electrode is connected to a first voltage level.

[0183] "0" indicates that the control signal output from the control signal terminal is at the first level, and "1" indicates that the control signal output from the control signal terminal is at the second level.

[0184] Taking the target brightness of the light-emitting device 20 as an example, where the brightness is in the first brightness range L1.

[0185] Referring to Figures 7 and 8, when the target brightness of the light-emitting device 20 is within the first brightness range L1, the selection signal provided by the selection signal terminal SS is at the first level, SS = 0; the first selection transistor T8 is a P-type transistor, and the second driving transistor T10 is an N-type transistor. Therefore, when the display panel 100 is displayed at high brightness, in an image frame including the initialization stage P1, the write compensation stage P2, and the light-emitting stage P3, the first selection transistor T8 is always on, and the second selection transistor T9 is always off.

[0186] During the initialization phase P1:

[0187] The enable signal provided by the enable signal terminal EM is at the second level, EM=1; the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned off.

[0188] The first scan signal provided by the first scan signal terminal S1 is at the second level, and there is no input data signal at the data signal terminal Vdt, S1=1, Vdt=0; the data writing transistor T4 is turned off.

[0189] The reset signal provided by the reset signal terminal Rst changes from the second level to the first level, Rst = 1 → 0; the first reset transistor T1 and the second reset transistor T7 are turned on after the reset signal changes to the first level. The first reset transistor T1 transmits the first initialization signal provided by the first initialization signal terminal Vint1 to the third node N3 to initialize and reset the voltage of the third node N3; the second reset transistor T7 transmits the second initialization signal provided by the second initialization signal terminal Vint2 to the fourth node N4 to initialize and reset the voltage of the fourth node N4.

[0190] The second scan signal provided by the second scan signal terminal S2 changes from the first level to the second level, S2 = 0 → 1; the compensation transistor T2 turns on after the second scan signal changes to the second level, and after the second scan signal provided by the second scan signal terminal S2 changes to the second level, the reset signal provided by the reset signal terminal Rst changes to the first level, and the first initialization signal provided by the first initialization signal terminal Vint1 is transmitted to the first node N1 through the first reset transistor T1 and the compensation transistor T2 to reset the first node N1.

[0191] After the second scan signal changes to the second level, the reset signal changes from the second level to the first level after a certain interval. Thus, when the reset signal is transmitted to the first node N1 and the third node N3 through the first reset transistor T1, the compensation transistor T2 has already been turned on, ensuring the effective reset of the first node N1.

[0192] During the compensation writing phase P2:

[0193] The enable signal provided by the enable signal terminal EM is at the second level, EM=1; the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned off.

[0194] The reset signal provided by the reset signal terminal Rst is at the second level, Rst = 1; the first reset transistor T1 and the second reset transistor T7 are turned off.

[0195] The first scan signal provided by the first scan signal terminal S1 changes from the second level to the first level, and there is no input data signal at the data signal terminal Vdt. S1 = 1 → 0, Vdt = 0 → 1. The data writing transistor T4 turns on after the first scan signal changes to the first level, thereby writing the data signal output from the data signal terminal Vdt to the first terminal of the first driving transistor T3 through the data writing transistor T4 and the first selection transistor T8.

[0196] The second scan signal provided by the second scan signal terminal S2 is at the second level, S2=1; the compensation transistor T2 is turned on, and the data signal output by the data signal terminal Vdt is transmitted to the storage capacitor C through the data writing transistor T4, the first driving transistor T3 and the compensation transistor T2. The storage capacitor C receives the board and stores the data signal.

[0197] After the reset signal changes to the first level, after a certain interval, the first scan signal changes from the second level to the first level, and the writing of the data signal begins. This ensures that during the writing of the data signal to the storage sub-circuit 15, the first reset sub-circuit 18 and the second reset sub-circuit 19 are turned off, avoiding any potential impact of the delayed shutdown of the first reset sub-circuit 18 and the second reset sub-circuit 19 on the writing of the data signal, and guaranteeing the correctness of the written data signal.

[0198] During the luminescence stage P3:

[0199] The reset signal provided by the reset signal terminal Rst is at the second level, Rst = 1; the first reset transistor T1 and the second reset transistor T7 are turned off.

[0200] The first scan signal provided by the first scan signal terminal S1 is at the second level, and there is no input data signal at the data signal terminal Vdt, S1=1, Vdt=0; the data writing transistor T4 is turned off.

[0201] The second scan signal provided by the second scan signal terminal S2 changes from the second level to the first level, S2 = 1 → 0; the compensation transistor T2 is turned off after the second scan signal changes to the first level.

[0202] The enable signal provided by the enable signal terminal EM changes from the second level to the first level, EM = 1 → 0; the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned on after the enable signal changes to the first level. The first driving transistor T3 is in saturation at this time. Therefore, the first driving transistor T3 is turned on, and the first driving current is transmitted to the light-emitting device 20 through the first light-emitting control transistor T5, the first selection transistor T8, the first driving transistor T3 and the second light-emitting control transistor T6 to drive the light-emitting device 20 to emit light.

[0203] Referring to Figures 7 and 8, when the target brightness of the light-emitting device 20 is within the second brightness range L2, the selection signal provided by the selection signal terminal SS is at the second level, SS=1; the first selection transistor T8 is a P-type transistor, and the second driving transistor T10 is an N-type transistor. Therefore, when the display panel 100 is displayed at low brightness, in an image frame including the initialization stage P1, the write compensation stage P2, and the light-emitting stage P3, the first selection transistor T8 is always off, and the second selection transistor T9 is always on.

[0204] In this case, the specific driving process of the pixel circuit 10 is described above in the description of the driving process of the light-emitting device 20 when the target brightness is in the first brightness range L1, and will not be repeated here.

[0205] Based on the above, in some other embodiments, as shown in FIG9, in the pixel circuit 10, the first reset transistor T1, the first driving transistor T3, the data writing transistor T4, the first light-emitting control transistor T5, the second light-emitting control transistor T6, the second reset transistor T7, the first selection transistor T8, and the second driving transistor T10 are P-type transistors; the compensation transistor T2 and the second selection transistor T9 are N-type transistors.

[0206] The timing diagram of each driving signal of the pixel circuit 10 shown in Figure 9 can be as shown in Figure 8. For the specific driving process of the pixel circuit 10 shown in Figure 9, please refer to the description of the driving process of the pixel circuit 10 shown in Figure 7 above, which will not be repeated here.

[0207] In some other embodiments, as shown in FIG10, in the pixel circuit 10, the first reset transistor T1, the first driving transistor T3, the data writing transistor T4, the first light-emitting control transistor T5, the second light-emitting control transistor T6, the second reset transistor T7, and the second selection transistor T9 are P-type transistors; the compensation transistor T2, the first selection transistor T8, and the second driving transistor T10 are N-type transistors.

[0208] The timing diagram of each driving signal of the pixel circuit 10 shown in Figure 10 can be as shown in Figure 11. For the specific driving process of the pixel circuit 10 shown in Figure 10, please refer to the description of the driving process of the pixel circuit 10 shown in Figure 7 above, which will not be repeated here.

[0209] Based on the above, some other embodiments of this disclosure also provide another pixel circuit 10, in which the selection sub-circuit 16, the first driving sub-circuit 13, and the second driving sub-circuit 14 are regarded as a whole driving module, which is connected to the first node N1, the second node N2, and the third node N3, respectively. Unlike the pixel circuit 10 shown in Figures 3, 4, and 5, as shown in Figures 12, 13, and 14, the common terminal of the write sub-circuit 11, the first driving sub-circuit 13, and the second driving sub-circuit 14 forms the second node N2, and the common terminal of the selection sub-circuit 12 and the light-emitting device 20 forms the third node N3.

[0210] As shown in Figures 6 and 15, the structure, connection and driving method of the other sub-circuits in the pixel circuit 10 shown in Figure 16, except for the driving module, can be the same as those of the pixel circuit 10 shown in Figure 6.

[0211] Based on this, in some embodiments, as shown in FIG16, the first terminal of the first driving transistor T3 and the first terminal of the second driving transistor T10 are connected to the write sub-circuit 11, the second terminal of the first driving transistor T3 is connected to the first terminal of the first selection transistor T8, and the second terminal of the second driving transistor T10 is connected to the first terminal of the second selection transistor T9.

[0212] In some embodiments, as shown in FIG16, the first selection unit 121 includes a first selection transistor T8, and the second selection unit 122 includes a second selection transistor T9. The control electrode of the first selection transistor T8 and the control electrode of the second selection transistor T9 are connected to the selection signal terminal SS. The first electrode of the first selection transistor T8 is connected to the first driving sub-circuit 13, the first electrode of the second selection transistor T9 is connected to the second driving sub-circuit 14, and the second electrodes of the first selection transistor T8 and the second electrode of the second selection transistor T9 are connected to the light-emitting device 20.

[0213] In some embodiments, as shown in FIG16, the first terminal of the first driving transistor T3, the first terminal of the second driving transistor T10, and the common terminal of the write sub-circuit 11 form the second node N2, and the second terminal of the first selection transistor T8, the second terminal of the second selection transistor T9, the common terminal of the compensation sub-circuit 17, and the first reset sub-circuit 18 form the third node N3.

[0214] It should be noted that Figures 3 to 16 show some exemplary structures of the pixel circuit 10 and its sub-circuits, as well as some driving timing diagrams of the pixel circuit 10. Those skilled in the art will understand that the structure of the pixel circuit 10 and its sub-circuits, as well as the driving timing diagrams of the pixel circuit 10, are not limited to those shown in Figures 3 to 16, as long as they can achieve their functions.

[0215] The specific structure of any sub-circuit in the pixel circuit 10 (e.g., the write sub-circuit 11 and the storage sub-circuit 15, etc.) may be other than those described in some embodiments of this application. Furthermore, while ensuring normal image display of the display panel 100, the remaining sub-circuits in the pixel circuit 10, apart from the basic circuit structures shown in FIG3 and FIG12, can be selected and configured as needed.

[0216] The following describes the film structure of the display panel 100 provided in some embodiments of this disclosure.

[0217] In some embodiments, as shown in FIG17, the display panel includes: a substrate 1, and a pixel circuit 10 and a light-emitting device 20 disposed on the substrate 1; the light-emitting device 20 is connected to the pixel circuit 10.

[0218] For example, substrate 1 can be a single-layer substrate comprising one layer of substrate material, or a composite substrate comprising at least two layers of substrate material stacked together. The substrate material can be a rigid material or a flexible material. Rigid substrate materials include, but are not limited to, rigid glass, quartz, or plastic, while flexible substrate materials include, but are not limited to, flexible glass, FPC, PI-based film (Polyimide), PC (Polycarbonate), or PVC (Polyvinyl Chloride), etc.

[0219] Accordingly, substrate 1 can be a rigid substrate or a flexible substrate. A rigid substrate can include one or more rigid substrate materials, or it can include at least one rigid substrate material and at least one flexible substrate material stacked together.

[0220] It should be noted that the material selection of the substrate 1 is related to the specific design of the display panel 100 and can be selected according to actual needs. This is only an example and is not intended to limit the present disclosure.

[0221] In some embodiments, as shown in Figures 18, 19, 20 and 21, the display panel 100 further includes a first active layer 2 and a second active layer 3 disposed between the substrate 1 and the light-emitting device 20, wherein the second active layer 3 is located on the side of the first active layer 2 away from the substrate 1, and the material of the first active layer 2 is different from the material of the second active layer 3.

[0222] As shown in Figures 18 and 20, the semiconductor patterns of the first driving transistor T3 and the second driving transistor T10 can be located in the first active layer 2 and the second active layer 3, respectively.

[0223] As shown in Figures 19 and 21, the semiconductor patterns of the first driving transistor T3 and the second driving transistor T10 can both be located in the first active layer 2 or both in the second active layer 3.

[0224] In some embodiments, as shown in FIG18, the semiconductor pattern of the first driving transistor T3 is located within the first active layer 2, and the material of the semiconductor pattern of the first driving transistor T3 includes low-temperature polycrystalline silicon; the semiconductor pattern of the second driving transistor T10 is located within the second active layer 3, and the material of the semiconductor pattern of the second driving transistor T10 includes oxide.

[0225] In this case, as shown in FIG18, the semiconductor pattern of the first selection transistor T8 may be located within the first active layer 2, and the material of the semiconductor pattern of the first selection transistor T8 includes low-temperature polycrystalline silicon; the semiconductor pattern of the second selection transistor T9 may be located within the second active layer 3, and the material of the semiconductor pattern of the second selection transistor T9 includes oxide.

[0226] In some embodiments, as shown in Figures 19 and 20, the semiconductor pattern of the first driving transistor T3 and the semiconductor pattern of the second driving transistor T10 are both located in the first active layer 2; the material of the semiconductor pattern of the first driving transistor T3 includes low-temperature polycrystalline silicon, and the material of the semiconductor pattern of the second driving transistor T10 includes low-temperature polycrystalline silicon or amorphous silicon.

[0227] In this case, as shown in Figures 19 and 20, the semiconductor pattern of the first selection transistor T8 may be located within the first active layer 2, and the material of the semiconductor pattern of the first selection transistor T8 includes low-temperature polycrystalline silicon; the semiconductor pattern of the second selection transistor T9 may be located within the second active layer 3, and the semiconductor pattern of the second selection transistor T9 includes oxide.

[0228] In some embodiments, as shown in FIG21, the semiconductor pattern of the first driving transistor T3 is located in the first active layer 2, and the material of the semiconductor pattern of the first driving transistor T3 includes low-temperature polycrystalline silicon; the semiconductor pattern of the second driving transistor T10 is located in the second active layer 3, and the material of the semiconductor pattern of the second driving transistor T10 includes oxide.

[0229] In this case, as shown in FIG21, the semiconductor pattern of the first selection transistor T8 may be located within the second active layer 3, and the material of the semiconductor pattern of the first selection transistor T8 includes oxide; the semiconductor pattern of the second selection transistor T9 may be located within the first active layer 2, and the material of the semiconductor pattern of the second selection transistor T9 includes low-temperature polycrystalline silicon.

[0230] Based on the above, in some embodiments, as shown in Figures 18, 19, 20 and 21, the display panel 100 further includes: a first gate conductive layer 4 disposed between the first active layer 2 and the second active layer 3, a second gate conductive layer 5 disposed between the first active layer 2 and the second active layer 3, and a third gate conductive layer 6 disposed on the side of the second active layer 3 away from the substrate.

[0231] As shown in Figure 18, the control electrode of the first driving transistor T3 and the control electrode of the first selection transistor T8 can be located within the first gate conductive layer 4. The second driving transistor T10 and the second selection transistor T9 can be dual-gate transistors. The first control electrode of the second driving transistor T10 and the first control electrode of the second selection transistor T9 are located within the second gate conductive layer 5, and the second control electrode of the second driving transistor T10 and the second control electrode of the second selection transistor T9 are located within the third gate conductive layer 6.

[0232] As shown in Figures 19 and 20, the control electrode of the first driving transistor T3, the control electrode of the first selection transistor T8, and the second driving transistor T10 can be located within the first gate conductive layer 4. The second selection transistor T9 can be a dual-gate transistor, with its first control electrode located within the second gate conductive layer 5 and its second control electrode located within the third gate conductive layer 6.

[0233] As shown in Figure 21, the control electrode of the first driving transistor T3 and the control electrode of the second selection transistor T9 can be located within the first gate conductive layer 4.

[0234] The first selection transistor T8 and the second driving transistor T10 can be dual-gate transistors. The first control electrode of the first selection transistor T8 and the first control electrode of the second driving transistor T10 are located in the second gate conductive layer 5, and the second control electrode of the first selection transistor T8 and the second control electrode of the second driving transistor T10 are located in the third gate conductive layer 6.

[0235] In some embodiments, the display panel 100 further includes multiple gate insulating layers GI, such as the first gate insulating layer GI1, the second gate insulating layer GI2, the third gate insulating layer GI3, and the fourth gate insulating layer GI4 shown in FIG18, FIG19, FIG20, and FIG21.

[0236] The first gate insulating layer GI1 is disposed between the first active layer 2 and the first gate conductive layer 4, the second gate insulating layer GI2 is disposed between the first gate conductive layer 4 and the second gate conductive layer 5, the third gate insulating layer GI3 is disposed between the second gate conductive layer 5 and the second active layer 3, and the fourth gate insulating layer GI4 is disposed between the second active layer 3 and the third gate conductive layer 6.

[0237] In some embodiments, as shown in Figures 18, 19, 20 and 21, the display panel 100 further includes a source / drain conductive layer 7, which includes connecting lines. The parts of each sub-circuit in the pixel circuit 10 that need to be connected can be electrically connected through the connecting lines.

[0238] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A pixel circuit, comprising: Write sub-circuit, first drive sub-circuit, second drive sub-circuit, and selection sub-circuit; The writing sub-circuit is connected to the first driving sub-circuit and the second driving sub-circuit respectively, and is used to receive and output data signals; The selection sub-circuit is connected to the first driving sub-circuit and the second driving sub-circuit respectively, and is used to select to transmit the data signal output by the writing sub-circuit to the first driving sub-circuit when the target brightness of the light-emitting device is within the first brightness range; or, when the target brightness of the light-emitting device is within the second brightness range, select to transmit the data signal output by the writing sub-circuit to the second driving sub-circuit. The minimum value of the first brightness range is greater than or equal to the maximum value of the second brightness range; The first driving sub-circuit and the second driving sub-circuit are connected to the light-emitting device. The first driving sub-circuit is used to output a first driving current to the light-emitting device based on the data signal, and the second driving sub-circuit is used to output a second driving current to the light-emitting device based on the data signal. The first driving current is greater than the second driving current.

2. The pixel circuit according to claim 1, wherein, The selection sub-circuit includes a first selection unit and a second selection unit, wherein the first selection unit is connected to the first driving sub-circuit and the second selection unit is connected to the second driving sub-circuit. When the target brightness of the light-emitting device is within the first brightness range, the first selection unit is turned on and the second selection unit is turned off. When the target brightness of the light-emitting device is within the second brightness range, the first selection unit is turned off and the second selection unit is turned on.

3. The pixel circuit according to claim 2, wherein, The first selection unit includes a first selection transistor, and the second selection unit includes a second selection transistor; The control terminals of the first and second selection transistors are connected to the selection signal terminal. The first terminals of the first and second selection transistors are connected to the write sub-circuit. The second terminal of the first selection transistor is connected to the first drive sub-circuit. The second terminal of the second selection transistor is connected to the second drive sub-circuit.

4. The pixel circuit according to claim 2, wherein, The first selection unit includes a first selection transistor, and the second selection unit includes a second selection transistor; The control terminals of the first and second selection transistors are connected to the selection signal terminal. The first terminal of the first selection transistor is connected to the first driving sub-circuit, the first terminal of the second selection transistor is connected to the second driving sub-circuit, and the second terminals of the first and second selection transistors are connected to the light-emitting device.

5. The pixel circuit according to claim 3 or 4, wherein, One of the first selection transistor and the second selection transistor is a P-type transistor, and the other is an N-type transistor.

6. The pixel circuit according to any one of claims 3 to 5, wherein, The first selection transistor and the second selection transistor have different carrier mobilities.

7. The pixel circuit according to any one of claims 3 to 6, wherein the pixel circuit further comprises: Storage sub-circuit; The first driving sub-circuit includes a first driving transistor, and the second driving sub-circuit includes a second driving transistor. The control terminals of the first driving transistor and the second driving transistor are connected to the storage sub-circuit. The common terminal of the first driving transistor, the control terminal of the second driving transistor, and the storage sub-circuit forms a first node. The storage sub-circuit is used to store and maintain the voltage of the first node; When the first terminal of the first selection transistor and the first terminal of the second selection transistor are connected to the writing sub-circuit, the second terminal of the first selection transistor is connected to the first driving sub-circuit, and the second terminal of the second selection transistor is connected to the second driving sub-circuit, the first terminal of the first driving transistor is connected to the second terminal of the first selection transistor, the first terminal of the second driving transistor is connected to the second terminal of the second selection transistor, and the second terminals of the first driving transistor and the second driving transistor are connected to the light-emitting device. When the first terminal of the first selection transistor is connected to the first driving sub-circuit, the first terminal of the second selection transistor is connected to the second driving sub-circuit, and the second terminals of the first selection transistor and the second selection transistor are connected to the light-emitting device, the first terminals of the first driving transistor and the second driving transistor are connected to the writing sub-circuit, the second terminal of the first driving transistor is connected to the first terminal of the first selection transistor, and the second terminal of the second driving transistor is connected to the first terminal of the second selection transistor.

8. The pixel circuit according to claim 7, wherein, The carrier mobility of the first driving transistor is different from that of the second driving transistor; and / or, The width-to-length ratio of the channel of the first driving transistor is different from that of the channel of the second driving transistor.

9. The pixel circuit according to claim 8, wherein, The carrier mobility of the first driving transistor is greater than that of the second driving transistor.

10. The pixel circuit according to claim 8 or 9, wherein, The first driving transistor is made of low-temperature polycrystalline silicon, and the second driving transistor is made of amorphous silicon or oxide.

11. The pixel circuit according to claim 8, wherein, The width-to-length ratio of the channel of the first driving transistor is greater than that of the channel of the second driving transistor.

12. The pixel circuit according to claim 11, wherein, The carrier mobility of the first driving transistor is the same as that of the second driving transistor.

13. The pixel circuit according to claim 11 or 12, wherein, Both the first driving transistor and the second driving transistor are made of low-temperature polycrystalline silicon.

14. A display panel, comprising: Substrate; A light-emitting device is disposed on the substrate; The pixel circuit as described in any one of claims 1 to 13 is disposed on the substrate and connected to the light-emitting device.

15. The display panel according to claim 14, further comprising: A first active layer and a second active layer are disposed between the substrate and the light-emitting device, and the second active layer is located on the side of the first active layer away from the substrate; The material of the first active layer is different from the material of the second active layer; The first driving sub-circuit of the pixel circuit includes a first driving transistor, and the second driving sub-circuit of the pixel circuit includes a second driving transistor. The semiconductor pattern of the first driving transistor and the semiconductor pattern of the second driving transistor are located in the first active layer and the second active layer, respectively. or, The semiconductor patterns of the first driving transistor and the second driving transistor are both located in the first active layer or both are located in the second active layer.

16. The display panel according to claim 15, wherein, The semiconductor patterns of the first driving transistor and the second driving transistor are both located in the first active layer. The semiconductor pattern of the first driving transistor is made of low-temperature polycrystalline silicon, and the semiconductor pattern of the second driving transistor is made of low-temperature polycrystalline silicon or amorphous silicon.

17. The display panel according to claim 16, wherein, The selection sub-circuit of the pixel circuit includes a first selection transistor and a second selection transistor; The semiconductor pattern of the first selection transistor is located in the first active layer, and the material of the semiconductor pattern of the first selection transistor includes low-temperature polycrystalline silicon. The semiconductor pattern of the second selection transistor is located in the second active layer, and the material of the semiconductor pattern of the second selection transistor includes oxide.

18. The display panel according to claim 15, wherein, The semiconductor pattern of the first driving transistor is located in the first active layer, and the material of the semiconductor pattern of the first driving transistor includes low-temperature polycrystalline silicon. The semiconductor pattern of the second driving transistor is located in the second active layer, and the material of the semiconductor pattern of the second driving transistor includes oxide.

19. The display panel according to claim 18, wherein, The selection sub-circuit of the pixel circuit includes a first selection transistor and a second selection transistor; One of the semiconductor patterns of the first selection transistor and the second selection transistor is located in the first active layer, and the other is located in the second active layer. In the semiconductor patterns of the first and second selection transistors, the material of one of the first active layers includes low-temperature polycrystalline silicon, and the material of the other of the second active layers includes oxide.

20. A driving method for a pixel circuit, used to drive the pixel circuit as described in any one of claims 1 to 13, the driving method for the pixel circuit comprising: When the target brightness of the light-emitting device is within the first brightness range, the writing sub-circuit receives and outputs the first data signal, and the selection sub-circuit selects to transmit the first data signal to the first driving sub-circuit. The first driving sub-circuit outputs a first driving current to the light-emitting device based on the first data signal; When the target brightness of the light-emitting device is within the second brightness range, the writing sub-circuit receives and outputs the second data signal, and the selection sub-circuit selects to transmit the second data signal to the second driving sub-circuit. The second driving sub-circuit outputs a second driving current to the light-emitting device based on the second data signal; Wherein, the minimum value of the first brightness range is greater than or equal to the maximum value of the second brightness range, and the first driving current is greater than the second driving current.

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