Bend-type phase shifter and digital phase shifter

Abstract

According to the present invention, a bend-type phase shifter comprises a first phase shift circuit, a second phase shift circuit, and a connection unit that connects the first phase shift circuit and the second phase shift circuit, wherein: the first phase shift circuit and the second phase shift circuit each include a signal line, a first inner line and a second inner line, an outer line provided only to the outside of the second inner line, a first ground conductor, a second ground conductor, a first electronic switch, and a second electronic switch, and are configured to be set to a low delay mode or a high delay mode; the first phase shift circuit and the second phase shift circuit are disposed so that the first inner lines thereof are close to each other, lines extending from the signal lines intersect each other, lines extending from the first inner lines intersect each other, lines extending from the second inner lines intersect each other, and lines extending from the outer lines intersect each other; the first ground conductor of the first phase shift circuit and the second ground conductor of the second phase shift circuit are electrically connected; and the connection unit includes a first connection line that electrically connects the signal line of the first phase shift circuit and the signal line of the second phase shift circuit.

Description

Bend-Type Phase Shifter and Digital Phase Shifter

[0001] The present invention relates to a bend-type phase shifter and a digital phase shifter. This application claims priority based on Japanese Patent Application No. 2024-189035 filed in Japan on October 28, 2024, and incorporates its content herein by reference.

[0002] In recent years, the development of digitally controlled phase shifters (digital phase shifters) for high-frequency signals such as microwaves, millimeter waves, or millimeter waves has been underway. A digital phase shifter has a configuration in which a plurality of digital phase shift circuits are connected in series as unit units. When the digital phase shifter has a configuration in which the digital phase shift circuits are connected in a row, the length of the digital phase shifter becomes long.

[0003] Patent Document 1 discloses a digital phase shifter with a reduced length by using a bent configuration with a connecting portion such as a bend-type line having a bent structure. Specifically, Patent Document 1 below discloses a digital phase shifter having a configuration bent using a 180° bend-type connecting portion and a digital phase shifter having a configuration bent using a 90° bend-type connecting portion.

[0004] Japanese Patent No. 7076658

[0005] In the digital phase shifter disclosed in Patent Document 1, when the number of digital phase shift circuits increases, the number of bends is often increased so that the length is minimized. For example, the digital phase shifter may be in a zigzag shape (or meander shape) or a spiral shape. Here, since the connecting portion does not have the function of a phase shifter, as the number of bends increases, the exclusive area of the portion that does not function as a phase shifter increases, and as a result, the mounting area of the digital phase shifter increases.

[0006] The present invention has been made in view of the above circumstances, and an object thereof is to provide a bend-type phase shifter and a digital phase shifter capable of reducing the mounting area as compared with the prior art.

[0007] A bend-type phase shifter according to a first aspect of the present invention comprises a first phase shift circuit, a second phase shift circuit, and a connecting portion connecting the first phase shift circuit and the second phase shift circuit, wherein the first phase shift circuit and the second phase shift circuit each comprise a signal line, a first inner line and a second inner line provided on both sides of the signal line, an outer line provided only on the outside of the second inner line among the first and second inner lines, a first ground conductor connected to the first end of the first inner line, the second inner line, and the outer line, a second ground conductor connected to the second end of the outer line, a first electronic switch provided between the second end of the first inner line and the second ground conductor, and a second electronic switch provided between the second end of the second inner line and the second ground conductor. The first and second electronic switches are configured to be set to a low-latency mode in which the first and second electronic switches are closed, or to a high-latency mode in which the first and second electronic switches are open, and the first and second phase shift circuits are arranged such that the first inner lines are close to each other, the extended lines of the signal lines intersect each other, the extended lines of the first inner lines intersect each other, the extended lines of the second inner lines intersect each other, and the extended lines of the outer lines intersect each other, and the first ground conductor of the first phase shift circuit and the second ground conductor of the second phase shift circuit are electrically connected, and the connection part includes a first connecting line that electrically connects the signal line of the first phase shift circuit and the signal line of the second phase shift circuit.

[0008] A bend-type phase shifter according to a first aspect of the present invention comprises a first phase shift circuit and a second phase shift circuit connected by a connector, wherein the first inner lines are arranged in close proximity to each other, and the extended lines of signal lines, etc., intersect each other. This allows the bend-type phase shifter to achieve both the function of bending the signal path and the function of a phase shifter. By applying such a bend-type phase shifter to a digital phase shifter, the mounting area can be reduced compared to conventional models.

[0009] A bend-type phase shifter according to a second aspect of the present invention is a bend-type phase shifter according to a first aspect of the present invention, wherein the connection portion comprises a pair of second connecting lines that electrically connect each of the first inner line and the second inner line of the first phase shift circuit to each of the first inner line and the second inner line of the second phase shift circuit.

[0010] A bend-type phase shifter according to a third aspect of the present invention is a bend-type phase shifter according to a first or second aspect of the present invention, wherein the connection portion includes a third connection line that electrically connects the outer line of the first phase shift circuit and the outer line of the second phase shift circuit.

[0011] A bend-type phase shifter according to a fourth aspect of the present invention is a bend-type phase shifter according to any one of the first to third aspects of the present invention, wherein the connection portion includes a ground conductor that connects the first ground conductor of the first phase shift circuit and the second ground conductor of the second phase shift circuit.

[0012] A bend-type phase shifter according to a fifth aspect of the present invention is a bend-type phase shifter according to any one of the first to fourth aspects of the present invention, wherein the distance between the signal line and the outer line in the first phase shift circuit is shorter than the distance between the signal line and the outer line in the second phase shift circuit.

[0013] A bend-type phase shifter according to a sixth aspect of the present invention is a bend-type phase shifter according to any one of the first to fifth aspects of the present invention, wherein the first phase shift circuit has a smaller phase shift amount compared to the second phase shift circuit.

[0014] A bend-type phase shifter according to a seventh aspect of the present invention is a bend-type phase shifter according to any one of the first to sixth aspects of the present invention, wherein the length of the outer line of the second phase shift circuit is longer than the length of the outer line of the first phase shift circuit.

[0015] A digital phase shifter according to a first aspect of the present invention comprises: a first digital phase shift circuit group in which a plurality of digital phase shift circuits are connected in cascaded order; a second digital phase shift circuit group in which a plurality of digital phase shift circuits are connected in cascaded order; a third digital phase shift circuit electrically connected to a first digital phase shift circuit located at the first end of the first digital phase shift circuit group, and a second digital phase shift circuit located at the first end of the second digital phase shift circuit group, among the plurality of digital phase shift circuits forming the second digital phase shift circuit group; a first bend-type phase shifter which is a bend-type phase shifter according to any of the first to seven aspects described above, connecting the first digital phase shift circuit and the third digital phase shift circuit; and a second bend-type phase shifter which is a bend-type phase shifter according to any of the first to seven aspects described above, connecting the second digital phase shift circuit and the third digital phase shift circuit.

[0016] A digital phase shifter according to a second aspect of the present invention is a digital phase shifter according to a first aspect of the present invention, wherein the plurality of digital phase shift circuits forming the first digital phase shift circuit group, the plurality of digital phase shift circuits forming the second digital phase shift circuit group, and the third digital phase shift circuit each comprise a signal line, a first inner line and a second inner line provided on both sides of the signal line, a first outer line and a second outer line provided outside the first inner line and the second inner line, respectively, and the first inner line, the second inner line, the first outer line, and the The circuit comprises a first grounding conductor connected to each first end of the second outer line, a second grounding conductor connected to each second end of the first outer line and the second outer line, a first electronic switch provided between the second end of the first inner line and the second grounding conductor, and a second electronic switch provided between the second end of the second inner line and the second grounding conductor, and is configured to be set to a low-delay mode in which the first electronic switch and the second electronic switch are closed, or a high-delay mode in which the first electronic switch and the second electronic switch are open.

[0017] A digital phase shifter according to a third aspect of the present invention is a digital phase shifter according to a first aspect of the present invention, wherein the plurality of digital phase shift circuits forming the first digital phase shift circuit group, the plurality of digital phase shift circuits forming the second digital phase shift circuit group, and the third digital phase shift circuit each comprise a signal line, a first inner line and a second inner line provided on both sides of the signal line, an outer line provided only on the outside of the second inner line among the first inner line and the second inner line, and the first inner line, the second inner line, The device comprises a first grounding conductor connected to each first end of the outer line, a second grounding conductor connected to the second end of the outer line, a first electronic switch provided between the second end of the first inner line and the second grounding conductor, and a second electronic switch provided between the second end of the second inner line and the second grounding conductor, and is configured to be set to a low-latency mode in which the first electronic switch and the second electronic switch are closed, or a high-latency mode in which the first electronic switch and the second electronic switch are open.

[0018] A digital phase shifter according to a fourth aspect of the present invention is a digital phase shifter according to a first aspect of the present invention, wherein the plurality of digital phase shift circuits forming the first digital phase shift circuit group and the plurality of digital phase shift circuits forming the second digital phase shift circuit group each comprises a signal line, a first inner line and a second inner line provided on both sides of the signal line, a first outer line and a second outer line provided outside the first inner line and the second inner line, respectively, and the first inner line, The circuit comprises the second inner line, the first outer line, and a first grounding conductor connected to the first end of the second outer line; a second grounding conductor connected to the second end of the first outer line and the second outer line; a first electronic switch provided between the second end of the first inner line and the second grounding conductor; and a second electronic switch provided between the second end of the second inner line and the second grounding conductor, wherein the first electronic switch and the second electronic switch are in the closed state. The third digital phase shift circuit is configured to be set to a low-latency mode in which the first electronic switch and the second electronic switch are in an open state, and comprises a signal line, a first inner line and a second inner line provided on both sides of the signal line, an outer line provided only on the outside of the second inner line among the first inner line and the second inner line, a first ground conductor connected to the first ends of the first inner line, the second inner line and the outer line, a second ground conductor connected to the second end of the outer line, a first electronic switch provided between the second end of the first inner line and the second ground conductor, and a second electronic switch provided between the second end of the second inner line and the second ground conductor, and is configured to be set to a low-latency mode in which the first electronic switch and the second electronic switch are in a closed state or a high-latency mode in which the first electronic switch and the second electronic switch are in an open state.

[0019] A fifth aspect of the present invention is a digital phase shifter according to any second to fourth aspect of the present invention, wherein the first ground conductor in the first digital phase shift circuit and the second ground conductor in the third digital phase shift circuit are in close proximity to each other, and the first ground conductor in the third digital phase shift circuit and the second ground conductor in the second digital phase shift circuit are in close proximity to each other.

[0020] According to the above-described embodiment of the present invention, the mounting area of ​​the digital phase shifter can be reduced compared to conventional methods.

[0021] This is a plan view showing the schematic configuration of a digital phase shifter according to the first embodiment of the present invention. This is a perspective view showing the configuration of a digital phase shift circuit in the first embodiment of the present invention. This is a diagram illustrating the high-latency mode of the digital phase shift circuit in the first embodiment of the present invention. This is a diagram illustrating the low-latency mode of the digital phase shift circuit in the first embodiment of the present invention. This is a plan view showing the configuration of a bent-type phase shifter according to the first embodiment of the present invention. This is a perspective view showing the configuration of a digital phase shift circuit provided in the bent-type phase shifter in the first embodiment of the present invention. This is a plan view showing the configuration of a bent-type phase shifter according to a first modified example in the first embodiment of the present invention. This is a plan view showing the configuration of a bent-type phase shifter according to a second modified example in the first embodiment of the present invention. This is a plan view showing the configuration of a bent-type phase shifter according to a third modified example in the first embodiment of the present invention. This is a plan view showing the configuration of a bent-type phase shifter according to a fourth modified example in the first embodiment of the present invention. This is a plan view showing the configuration of a bent-type phase shifter according to a fifth modified example in the first embodiment of the present invention. This is a plan view showing the configuration of a bent-type phase shifter according to a sixth modified example in the first embodiment of the present invention. This is a diagram illustrating a bent-type phase shifter according to a seventh modified example in the first embodiment of the present invention. This is a diagram illustrating a bent-type phase shifter according to a seventh modification in the first embodiment of the present invention. This is a diagram illustrating a bent-type phase shifter according to a seventh modification in the first embodiment of the present invention. This is a diagram illustrating a bent-type phase shifter according to a seventh modification in the first embodiment of the present invention. This is a plan view showing the schematic configuration of a digital phase shifter according to the second embodiment of the present invention. This is a plan view showing the schematic configuration of a digital phase shifter according to the third embodiment of the present invention.

[0022] Hereinafter, with reference to the drawings, a bent-type phase shifter and a digital phase shifter according to embodiments of the present invention will be described in detail.

[0023] [First Embodiment] <Digital Phase Shifter> Figure 1 is a plan view showing the schematic configuration of a digital phase shifter according to the first embodiment of the present invention. As shown in Figure 1, the digital phase shifter 100 of this embodiment comprises a plurality of digital phase shift circuits 10 (10-1 to 10-11), a bent phase shifter 20a (first bent phase shifter), and a bent phase shifter 20b (second bent phase shifter). The digital phase shifter 100 shifts a signal S in a predetermined frequency band using a plurality of digital phase shift circuits 10 and bent phase shifters 20a and 20b connected in cascaded order. The signal S is a high-frequency signal having a frequency band such as microwave, quasi-millimeter wave, or millimeter wave.

[0024] Multiple digital phase shift circuits 10 are electrically connected in cascaded order. In the example shown in Figure 1, eleven digital phase shift circuits 10 are electrically connected in cascaded order. However, the number of digital phase shift circuits 10 is not limited to the example shown in Figure 1; any number of three or more is acceptable. In the example shown in Figure 1, for the sake of explanation, the eleven electrically connected digital phase shift circuits 10 are designated as digital phase shift circuits 10-1, 10-2, ..., 10-11 in the order in which the signal S flows. However, the direction in which the signal S flows may be reversed.

[0025] In the example shown in Figure 1, the first to fifth digital phase shift circuits 10-1 to 10-5, which are connected in cascaded order, constitute the first digital phase shift circuit group 30. The seventh to eleventh digital phase shift circuits 10-7 to 10-11, which are connected in cascaded order, constitute the second digital phase shift circuit group 31. The sixth digital phase shift circuit 10-6 is located between the first digital phase shift circuit group 30 and the second digital phase shift circuit group 31 and is electrically connected to both groups.

[0026] The bent phase shifters 20a and 20b have a 90° bend shape. The bent phase shifter 20a connects the digital phase shift circuit 10-5 (first digital phase shift circuit), located at the first end (one end) of the first digital phase shift circuit group 30, to the first end (one end) of the digital phase shift circuit 10-6 (third digital phase shift circuit). The bent phase shifter 20b connects the digital phase shift circuit 10-7 (second digital phase shift circuit), located at the first end (one end) of the second digital phase shift circuit group 31, to the second end (other end) of the digital phase shift circuit 10-6 (third digital phase shift circuit). The specific configurations of the bent phase shifters 20a and 20b will be described later.

[0027] The digital phase shifter 100 does not have a structure in which multiple digital phase shift circuits 10 are all arranged in a single line, but rather has a structure in which they are bent in the middle by bend-type phase shifters 20a and 20b. For example, the digital phase shifter 100 is bent when the first digital phase shift circuit group 30 and the second digital phase shift circuit group 31 are electrically connected by bend-type phase shifters 20a and 20b. As a result, the first digital phase shift circuit group 30 and the second digital phase shift circuit group 31 are arranged in parallel with a distance H between them.

[0028] <Digital Phase Shift Circuit> Figure 2 is a perspective view showing the configuration of a digital phase shift circuit in a first embodiment of the present invention. As shown in Figure 2, the digital phase shift circuit 10 includes a signal line 1, a pair of inner lines 2 (first inner line 2a and second inner line 2b), a pair of outer lines 3 (first outer line 3a and second outer line 3b), a pair of ground conductors 4 (first ground conductor 4a and second ground conductor 4b), a capacitor 5, a plurality of connecting conductors 6, four electronic switches 7 (first electronic switch 7a, second electronic switch 7b, third electronic switch 7c, and fourth electronic switch 7d), and a switch control unit 8.

[0029] The signal line 1 is a straight, strip-shaped conductor extending in a predetermined direction. That is, the signal line 1 is a long, plate-shaped conductor having a constant width W1, a constant thickness, and a predetermined length. The signal line 1 has an input end (second end, other end) into which the signal S is input, and an output end (first end, one end) into which the signal S is output. In the example shown in Figure 2, the signal S flows through the signal line 1 from the front to the back. That is, in the example shown in Figure 2, the input end of the signal line 1 is the front end, and the output end of the signal line 1 is the back end. In the following description, in the digital phase shift circuit 10, one direction that intersects (for example, is perpendicular to) the direction in which the signal line 1 extends is called the up-down direction, and the direction that intersects (for example, is perpendicular to) the direction in which the signal line 1 extends and the up-down direction is called the left-right direction. The up-down direction is the up-down direction in Figure 2, and the left-right direction is the left-right direction in Figure 2. Note that the up-down direction does not have to coincide with the vertical direction. Furthermore, the upper and lower directions do not necessarily coincide with the upper and lower directions in the vertical direction. Also, instead of defining the right and left sides in Figure 2 as the right and left directions respectively, they may be defined as the left and right directions respectively.

[0030] The first inner line 2a is a straight, strip-shaped conductor. That is, the first inner line 2a is a long, plate-shaped conductor having a constant width, a constant thickness, and a predetermined length. The first inner line 2a extends in the same direction as the signal line 1. The first inner line 2a is provided parallel to the signal line 1 and is separated from the signal line 1 by a predetermined distance M1 on one side of the signal line 1 (the right side in Figure 2).

[0031] The second inner line 2b is a straight, strip-shaped conductor. That is, the second inner line 2b is a long, plate-shaped conductor having a constant width, a constant thickness, and a predetermined length, similar to the first inner line 2a. The second inner line 2b extends in the same direction as the signal line 1. The second inner line 2b is provided parallel to the signal line 1 and is separated from the other side of the signal line 1 (the left side in Figure 2) by a predetermined distance M1.

[0032] The first outer line 3a is a straight, strip-shaped conductor provided on one side of the signal line 1, at a position further from the signal line 1 than the first inner line 2a. The first outer line 3a is a long, plate-shaped conductor having a constant width, a constant thickness, and a predetermined length. The first outer line 3a is provided parallel to the signal line 1 at a predetermined distance, with the first inner line 2a in between. The first outer line 3a extends in the same direction as the signal line 1, similar to the first inner line 2a and the second inner line 2b.

[0033] The second outer line 3b is a straight, strip-shaped conductor located on the other side of the signal line 1, further from the signal line 1 than the second inner line 2b. Similar to the first outer line 3a, the second outer line 3b is a long, plate-shaped conductor having a fixed width, fixed thickness, and predetermined length. The second outer line 3b is provided parallel to the signal line 1 at a predetermined distance, with the second inner line 2b in between. Similar to the first inner line 2a and the second inner line 2b, the second outer line 3b extends in the same direction as the signal line 1.

[0034] The first grounding conductor 4a is a straight, strip-shaped conductor provided on the first end (one end) side of each of the first inner line 2a, the second inner line 2b, the first outer line 3a, and the second outer line 3b. The first grounding conductor 4a is electrically connected to the first end of each of the first inner line 2a, the second inner line 2b, the first outer line 3a, and the second outer line 3b. The first grounding conductor 4a is a long, plate-shaped conductor having a constant width, a constant thickness, and a predetermined length.

[0035] The first grounding conductor 4a is provided so as to be perpendicular to the first inner track 2a, the second inner track 2b, the first outer track 3a, and the second outer track 3b, which extend in the same direction. The first grounding conductor 4a extends in the left-right direction. The first grounding conductor 4a is provided below the first inner track 2a, the second inner track 2b, the first outer track 3a, and the second outer track 3b at a predetermined distance.

[0036] The first grounding conductor 4a is set such that its first end (one end, the right end in Figure 2) in the left-right direction is approximately the same position as the right edge of the first outer line 3a in the left-right direction. Furthermore, the second end (the other end, the left end in Figure 2) of the first grounding conductor 4a is set such that it is approximately the same position as the left edge of the second outer line 3b in the left-right direction.

[0037] The second grounding conductor 4b is a straight, strip-shaped conductor provided on the second end (other end) side of each of the first inner track 2a, the second inner track 2b, the first outer track 3a, and the second outer track 3b. The second grounding conductor 4b is a long, plate-shaped conductor having a constant width, a constant thickness, and a predetermined length, similar to the first grounding conductor 4a.

[0038] The second grounding conductor 4b is arranged parallel to the first grounding conductor 4a and, like the first grounding conductor 4a, is provided perpendicular to the first inner track 2a, the second inner track 2b, the first outer track 3a, and the second outer track 3b. The second grounding conductor 4b extends in the left-right direction. The second grounding conductor 4b is provided below the first inner track 2a, the second inner track 2b, the first outer track 3a, and the second outer track 3b at a predetermined distance.

[0039] The second grounding conductor 4b is positioned such that its first end (one end, the right end in Figure 2) in the left-right direction is approximately the same position as the right edge of the first outer line 3a in the left-right direction. Furthermore, the second end (the other end, the left end in Figure 2) of the second grounding conductor 4b is positioned approximately the same position as the left edge of the second outer line 3b in the left-right direction. In other words, the position of the second grounding conductor 4b in the left-right direction is the same as that of the first grounding conductor 4a.

[0040] The capacitor 5 is provided between the second end of the signal line 1 and the second ground conductor 4b. For example, the upper electrode of the capacitor 5 is connected to the signal line 1, and the lower electrode is electrically connected to the fourth electronic switch 7d. For example, the capacitor 5 is a thin-film capacitor with a MIM (Metal Insulator Metal) structure. Incidentally, the capacitor 5 has a capacitance Ca corresponding to the opposing area of the parallel plates. However, as the capacitor 5, a comb-tooth capacitor may be used instead of the parallel plate capacitor.

[0041] The plurality of connection conductors 6 includes at least connection conductors 6a to 6f. The connection conductor 6a is a conductor that electrically and mechanically connects the first end of the first inner line 2a and the first ground conductor 4a. For example, the connection conductor 6a is a conductor extending in the vertical direction, with the first end (one end, upper end) connected to the lower surface of the first inner line 2a and the second end (the other end, lower end) connected to the upper surface of the first ground conductor 4a.

[0042] The connection conductor 6b is a conductor that electrically and mechanically connects the first end of the second inner line 2b and the first ground conductor 4a. For example, the connection conductor 6b is a conductor extending in the vertical direction, similar to the connection conductor 6a, with the first end (one end, upper end) connected to the lower surface of the second inner line 2b and the second end (the other end, lower end) connected to the upper surface of the first ground conductor 4a.

[0043] The connection conductor 6c is a conductor that electrically and mechanically connects the first end of the first outer line 3a and the first ground conductor 4a. For example, the connection conductor 6c is a conductor extending in the vertical direction, with the first end (one end, upper end) connected to the lower surface at the first end of the first outer line 3a and the second end (the other end, lower end) connected to the upper surface of the first ground conductor 4a.

[0044] The connection conductor 6d is a conductor that electrically and mechanically connects the second end of the first outer line 3a and the second ground conductor 4b. For example, the connection conductor 6d is a conductor extending in the vertical direction, with the first end (one end, upper end) connected to the lower surface at the second end of the first outer line 3a and the second end (the other end, lower end) connected to the upper surface of the second ground conductor 4b.

[0045] The connection conductor 6e is a conductor that electrically and mechanically connects the first end of the second outer line 3b and the first ground conductor 4a. For example, the connection conductor 6e is a conductor extending in the vertical direction, with the first end (one end, upper end) connected to the lower surface at the first end of the second outer line 3b, and the second end (the other end, lower end) connected to the upper surface of the first ground conductor 4a.

[0046] The connection conductor 6f is a conductor that electrically and mechanically connects the second end of the second outer line 3b and the second ground conductor 4b. For example, the connection conductor 6f is a conductor extending in the vertical direction, with the first end (one end, upper end) connected to the lower surface at the second end of the second outer line 3b, and the second end (the other end, lower end) connected to the upper surface of the second ground conductor 4b.

[0047] The connection conductor 6g is a conductor that electrically and mechanically connects the second end of the signal line 1 and the upper electrode of the capacitor 5. For example, the connection conductor 6g is a conductor extending in the vertical direction, with the first end (one end, upper end) connected to the lower surface at the second end of the signal line 1, and the second end (the other end, lower end) connected to the upper electrode of the capacitor 5.

[0048] The first electronic switch 7a is located between the second end of the first inner line 2a and the second ground conductor 4b and is electrically connected to the second end of the first inner line 2a and the second ground conductor 4b. The first electronic switch 7a is, for example, a MOS-type FET (metal-oxide-semiconductor field-effect transistor), with the drain terminal electrically connected to the second end of the first inner line 2a, the source terminal electrically connected to the second ground conductor 4b, and the gate terminal electrically connected to the switch control unit 8.

[0049] The first electronic switch 7a is controlled to be in a closed state or an open state based on the gate signal input to the gate terminal from the switch control unit 8. The closed state is a state where the drain terminal and the source terminal are conducting. The open state is a state where the drain terminal and the source terminal are not conducting and the electrical connection is interrupted. The first electronic switch 7a is controlled by the switch control unit 8 to be in a conducting state where the second end of the first inner line 2a and the second ground conductor 4b are electrically connected or a non-conducting state where the electrical connection is interrupted.

[0050] The second electronic switch 7b is located between the second end of the second inner line 2b and the second ground conductor 4b, and is electrically connected to the second end of the second inner line 2b and the second ground conductor 4b. The second electronic switch 7b is, for example, a MOS-type FET, with its drain terminal connected to the second end of the second inner line 2b, its source terminal connected to the second ground conductor 4b, and its gate terminal connected to the switch control unit 8.

[0051] The second electronic switch 7b is controlled to be either closed or open based on a gate signal input to the gate terminal from the switch control unit 8. The second electronic switch 7b, under the control of the switch control unit 8, either electrically connects the second end of the second inner line 2b and the second ground conductor 4b to a conductive state or disconnects that electrical connection to a disconnected state.

[0052] The third electronic switch 7c is located between the second end of the signal line 1 and the second ground conductor 4b, and is electrically connected to the second end of the signal line 1 and the second ground conductor 4b. The third electronic switch 7c is, for example, a MOS-type FET, with its drain terminal connected to the second end of the signal line 1, its source terminal connected to the second ground conductor 4b, and its gate terminal connected to the switch control unit 8. In the example shown in Figure 2, the third electronic switch 7c is provided on the second end side of the signal line 1, but is not limited to this, and may be provided on the first end side of the signal line 1. The third electronic switch 7c may not be used if it is not necessary.

[0053] The third electronic switch 7c is controlled to be either closed or open based on a gate signal input to the gate terminal from the switch control unit 8. The third electronic switch 7c is controlled by the switch control unit 8 to either a conductive state, where the second end of the signal line 1 and the second ground conductor 4b are electrically connected, or a disconnected state, where the electrical connection is broken.

[0054] The fourth electronic switch 7d is connected in series with the capacitor 5 between the second end of the signal line 1 and the second ground conductor 4b. The fourth electronic switch 7d is, for example, a MOS-type FET. In the example shown in Figure 2, the drain terminal of the fourth electronic switch 7d is connected to the lower electrode of the capacitor 5, the source terminal is connected to the second ground conductor 4b, and the gate terminal is connected to the switch control unit 8.

[0055] The fourth electronic switch 7d is controlled to be either closed or open based on a gate signal input to the gate terminal from the switch control unit 8. The fourth electronic switch 7d is controlled by the switch control unit 8 to either a conductive state in which the lower electrode of the capacitor 5 and the second ground conductor 4b are electrically connected, or a disconnected state in which the electrical connection is broken.

[0056] The switch control unit 8 is a control circuit that controls a plurality of electronic switches 7, namely the first electronic switch 7a, the second electronic switch 7b, the third electronic switch 7c, and the fourth electronic switch 7d. For example, the switch control unit 8 has four output ports. The switch control unit 8 controls each of the plurality of electronic switches 7 individually to an open or closed state by outputting individual gate signals from each output port and supplying them to each gate terminal of the plurality of electronic switches 7.

[0057] Figure 2 shows a schematic diagram of the digital phase shift circuit 10 from an oblique angle to make its mechanical structure easier to understand. However, the actual digital phase shift circuit 10 is formed as a multilayer structure using semiconductor manufacturing technology.

[0058] As an example, in the digital phase shift circuit 10, the signal line 1, the first inner line 2a, the second inner line 2b, the first outer line 3a, and the second outer line 3b are formed in the first conductive layer. The first ground conductor 4a and the second ground conductor 4b are formed in the second conductive layer, which is opposite the first conductive layer with an insulating layer in between. The components formed in the first conductive layer and the components formed in the second conductive layer are interconnected by via holes. Multiple connecting conductors 6 correspond to via holes embedded in the insulating layer.

[0059] Next, the operation of the digital phase shift circuit 10 in this embodiment will be described. The digital phase shift circuit 10 has two operating modes: a high-latency mode and a low-latency mode. The digital phase shift circuit 10 operates in either the high-latency mode or the low-latency mode.

[0060] High-Latency Mode Figure 3 illustrates the high-latency mode of the digital phase shift circuit in the first embodiment of the present invention. The high-latency mode is a mode in which a first phase difference is generated in the signal S. In the high-latency mode, as shown in Figure 3, the first electronic switch 7a and the second electronic switch 7b are controlled to be in the open state, and the fourth electronic switch 7d is controlled to be in the closed state.

[0061] When the first electronic switch 7a is controlled to the open state, the electrical connection between the second end of the first inner line 2a and the second ground conductor 4b is interrupted. When the second electronic switch 7b is controlled to the open state, the electrical connection between the second end of the second inner line 2b and the second ground conductor 4b is interrupted. When the fourth electronic switch 7d is controlled to the closed state, the second end of the signal line 1 is connected to the second ground conductor 4b via the capacitor 5.

[0062] When a signal S propagates through signal line 1 from the input terminal (second terminal) to the output terminal (first terminal), a return current R1 flows from the first terminal to the second terminal, which is in the opposite direction to the signal S. In high-delay mode, since the first electronic switch 7a and the second electronic switch 7b are open, the return current R1 flows mainly through the first outer line 3a and the second outer line 3b, as shown in Figure 3.

[0063] In high-latency mode, the return current R1 flows through the first outer line 3a and the second outer line 3b, resulting in a higher inductance value L compared to low-latency mode. A larger delay can be obtained in high-latency mode than in low-latency mode. Furthermore, when the fourth electronic switch 7d is closed, the second end of the signal line 1 and the second ground conductor 4b are electrically connected by the capacitor 5, resulting in a higher capacitance value C of the digital phase shift circuit 10. Therefore, a larger delay can be obtained in high-latency mode than in low-latency mode.

[0064] 《Low-Latency Mode》 Figure 4 illustrates the low-latency mode of the digital phase shift circuit in the first embodiment of the present invention. The low-latency mode is a mode in which a second phase difference smaller than the first phase difference is generated in the signal S. In the low-latency mode, as shown in Figure 4, the first electronic switch 7a and the second electronic switch 7b are controlled to the closed state, and the fourth electronic switch 7d is controlled to the open state.

[0065] When the first electronic switch 7a is controlled to the closed state, the second end of the first inner line 2a and the second grounding conductor 4b are electrically connected. When the second electronic switch 7b is controlled to the closed state, the second end of the second inner line 2b and the second grounding conductor 4b are electrically connected.

[0066] When a signal S propagates through signal line 1 from the input terminal (second terminal) to the output terminal (first terminal), a return current R2 flows from the first terminal to the second terminal in the opposite direction to the signal S. In low-latency mode, since the first electronic switch 7a and the second electronic switch 7b are closed, the return current R2 flows mainly through the first inner line 2a and the second inner line 2b, as shown in Figure 4.

[0067] In low-latency mode, the return current R2 flows through the first inner line 2a and the second inner line 2b, resulting in a lower inductance value L compared to high-latency mode. The delay in low-latency mode is smaller than the delay in high-latency mode. Although a capacitor 5 is connected to the second end of signal line 1, the fourth electronic switch 7d is open, so the capacitance of capacitor 5 does not function (it is not visible from signal line 1), and only a parasitic capacitance extremely small compared to the capacitance of capacitor 5 exists. Therefore, a smaller delay can be obtained in low-latency mode than in high-latency mode.

[0068] In the low-latency mode, the loss of the signal line 1 can be intentionally increased by controlling the third electronic switch 7c to a closed state. This is done to make the loss of the high-frequency signal in the low-latency mode equivalent to the loss of the high-frequency signal in the high-latency mode.

[0069] In other words, the loss of high-frequency signals in low-latency mode may be smaller than the loss of high-frequency signals in high-latency mode. This difference in loss causes an amplitude difference in the high-frequency signals output from the digital phase shift circuit 10 when the operating mode is switched between low-latency mode and high-latency mode. To address this issue, the digital phase shift circuit 10 may eliminate the above amplitude difference by controlling the third electronic switch 7c to a closed state in low-latency mode. However, depending on the design, the loss of high-frequency signals in low-latency mode may be larger than the loss of high-frequency signals in high-latency mode.

[0070] <Bent-type phase shifter> Figure 5 is a plan view showing the configuration of a bent-type phase shifter according to the first embodiment of the present invention. The digital phase shifter 100 of this embodiment includes bent-type phase shifters 20a and 20b, but since the bent-type phase shifters 20a and 20b have similar configurations, only the bent-type phase shifter 20a will be described here, and the description of the bent-type phase shifter 20b will be omitted. As shown in Figure 5, the bent-type phase shifter 20a includes a digital phase shift circuit 40-1 (first phase shift circuit), a digital phase shift circuit 40-2 (second phase shift circuit), and a connection part 50.

[0071] Figure 6 is a perspective view showing the configuration of a digital phase shift circuit provided in a bend-type phase shifter according to the first embodiment of the present invention. In Figure 6, components corresponding to the configuration shown in Figure 2 are denoted by the same reference numerals. As shown in Figure 6, the digital phase shift circuit 40 (digital phase shift circuits 40-1, 40-2) is a configuration in which one of the outer lines 3 (first outer line 3a) and connecting conductors 6c, 6d of the digital phase shift circuit 10 shown in Figure 2 are omitted. In addition, as these are omitted, the right-hand ends of the grounding conductor 4 (first grounding conductor 4a and second grounding conductor 4b) are omitted, and the length of the grounding conductor 4 in the left-right direction is shortened.

[0072] Thus, in the digital phase shift circuit 40, the first outer line 3a is omitted from the digital phase shift circuit 10, and only the second outer line 3b is provided. For this reason, in the following, the second outer line 3b of the digital phase shift circuit 40 will be referred to as "outer line 3".

[0073] The digital phase shift circuit 40, like the digital phase shift circuit 10 shown in Figure 2, has a high-latency mode and a low-latency mode as operating modes, and operates in either the high-latency mode or the low-latency mode. In other words, the digital phase shift circuit 40 operates in high-latency mode when the first electronic switch 7a and the second electronic switch 7b shown in Figure 6 are controlled to be in the open state and the fourth electronic switch 7d is controlled to be in the closed state. The digital phase shift circuit 40 also operates in low-latency mode when the first electronic switch 7a and the second electronic switch 7b shown in Figure 6 are controlled to be in the closed state and the fourth electronic switch 7d is controlled to be in the open state.

[0074] Digital phase shift circuits 40-1 and 40-2 are arranged such that the first inner lines 2a are close to each other, the extensions of the signal line 1 intersect each other, the extensions of the first inner line 2a intersect each other, the extensions of the second inner line 2b intersect each other, and the extensions of the outer line 3 intersect each other. In other words, digital phase shift circuit 40-2 is rotated 90° clockwise in a plan view relative to digital phase shift circuit 40-1, and is arranged so that the first inner line 2a of digital phase shift circuit 40-1 and the first inner line 2a of digital phase shift circuit 40-2 are close to each other. Note that the first inner lines 2a of digital phase shift circuits 40-1 and 40-2 are inner lines 2 located on the side of the first outer line 3a, which is omitted from the digital phase shift circuit 10 shown in Figure 2, relative to the signal line 1.

[0075] The connection section 50 includes a first connection line 51 and a grounding conductor 54. The first connection line 51 is, for example, a long, plate-shaped conductor having a constant width W2, a constant thickness, and a predetermined length. The first connection line 51 connects the signal line 1 of the digital phase shift circuit 40-1 to the signal line 1 of the digital phase shift circuit 40-2. The signal S output from the signal line 1 of the digital phase shift circuit 40-1 is input to the signal line 1 of the digital phase shift circuit 40-2 via the first connection line 51. The width W2 of the first connection line 51 may be the same as the width W1 of the signal line 1.

[0076] The grounding conductor 54 is a conductor with a rectangular shape in plan view. The grounding conductor 54 is formed in the same layer as the grounding conductors 4 of the digital phase shift circuits 40-1 and 40-2, and connects the first grounding conductor 4a of the digital phase shift circuit 40-1 and the second grounding conductor 4b of the digital phase shift circuit 40-2. The length of the first side (one side) of the grounding conductor 54 is approximately the same as the length of the first grounding conductor 4a of the digital phase shift circuit 40-1, and the first side of the grounding conductor 54 is connected over the entire length of the first grounding conductor 4a of the digital phase shift circuit 40-1. Furthermore, the length of the second side (the other side, the side perpendicular to the first side of the grounding conductor 54) is approximately the same as the length of the second grounding conductor 4b of the digital phase shift circuit 40-2, and the second side of the grounding conductor 54 is connected over the entire length of the second grounding conductor 4b of the digital phase shift circuit 40-2.

[0077] The digital phase shift circuit 40-1 of the bent phase shifter 20a is connected to the digital phase shift circuit 10-5 located at the first end of the first digital phase shift circuit group 30, and the digital phase shift circuit 40-2 of the bent phase shifter 20a is connected to the first end of the digital phase shift circuit 10-6. The bent phase shifter 20b is the same as the bent phase shifter 20a shown in Figure 5, rotated 90° clockwise in a plan view. Therefore, the digital phase shift circuit 40-1 of the bent phase shifter 20b is connected to the second end of the digital phase shift circuit 10-6, and the digital phase shift circuit 40-2 of the bent phase shifter 20b is connected to the digital phase shift circuit 10-7 located at the first end of the second digital phase shift circuit group 31.

[0078] Furthermore, the digital phase shift circuits 10-5 and 10-6 connected by the bend-type phase shifter 20a are kept apart. For example, in the proximity section C1 shown in Figure 1, the digital phase shift circuits 10-5 and 10-6 are kept apart so that the first ground conductor 4a of the digital phase shift circuit 10-5 and the second ground conductor 4b of the digital phase shift circuit 10-6 do not come into contact. This is because if the first ground conductor 4a of the digital phase shift circuit 10-5 and the second ground conductor 4b of the digital phase shift circuit 10-6 were in contact, the return current would short-circuit the bend-type phase shifter 20a, affecting the phase shift operation of the bend-type phase shifter 20a.

[0079] Similarly, the digital phase shift circuits 10-6 and 10-7 connected by the bend-type phase shifter 20b are also spaced apart. For example, in the proximity section C2 shown in Figure 1, the digital phase shift circuits 10-6 and 10-7 are spaced apart so that the first ground conductor 4a of the digital phase shift circuit 10-6 and the second ground conductor 4b of the digital phase shift circuit 10-7 do not come into contact. This is because if the first ground conductor 4a of the digital phase shift circuit 10-6 and the second ground conductor 4b of the digital phase shift circuit 10-7 were in contact, the return current would short-circuit the bend-type phase shifter 20b, affecting the phase shift operation of the bend-type phase shifter 20b.

[0080] In this embodiment, smaller digital phase shift circuits 40-1 and 40-2, which are smaller than the digital phase shift circuit 10 shown in Figure 2, are provided in the bend-type phase shifters 20a and 20b, with one of the outer lines 3 (first outer line 3a) of the digital phase shift circuit 10 omitted. The digital phase shift circuits 40-1 and 40-2 are arranged so as to be rotated 90° relative to each other and connected at the connection part 50. As a result, the digital phase shift circuits 40-1 and 40-2 can achieve both the function of bending the signal path S by 90° and the function of a phase shifter without significantly increasing the mounting area.

[0081] <Operation of the Digital Phase Shifter> The digital phase shifter 100 can achieve several different delays (phase shift amounts) by setting the operating modes of each digital phase shift circuit 10, 40 that constitute the digital phase shifter 100 to high-latency mode or low-latency mode. For example, the following two operations can be considered for the operation of the digital phase shifter 100.

[0082] ・First Operation The first operation is to switch the digital phase shift circuits 10 and 40 from a state where all of them are in high-latency mode to low-latency mode sequentially, in the order of connection of the digital phase shift circuits 10 and 40, from digital phase shift circuit 10-1 to digital phase shift circuit 10-11. In other words, in the first operation, the digital phase shift circuits 10-1 to 10-5, the digital phase shift circuits 40-1 and 40-2 of the bend-type phase shifter 20a, digital phase shift circuit 10-6, the digital phase shift circuits 40-1 and 40-2 of the bend-type phase shifter 20b, and the digital phase shift circuits 10-7 to 10-11 are sequentially switched to low-latency mode in that order.

[0083] ・Second Operation The second operation is an operation in which the digital phase shift circuits 10 and 40 are sequentially switched to high-latency mode from a state in which all of the digital phase shift circuits 10 and 40 are in low-latency mode, in the order of connection of the digital phase shift circuits 10-1 to 10-11. In other words, in the second operation, the digital phase shift circuits 10-1 to 10-5, the digital phase shift circuits 40-1 and 40-2 of the bend-type phase shifter 20a, the digital phase shift circuit 10-6, the digital phase shift circuits 40-1 and 40-2 of the bend-type phase shifter 20b, and the digital phase shift circuits 10-7 to 10-11 are sequentially switched to high-latency mode in that order.

[0084] As described above, the bend-type phase shifters 20a and 20b of this embodiment are equipped with smaller digital phase shift circuits 40-1 and 40-2 than the digital phase shift circuit 10 shown in Figure 2, with one of the outer lines 3 (the first outer line 3a) omitted. The digital phase shift circuits 40-1 and 40-2 are connected by a connection part 50 in a state where they are rotated 90° relative to each other. This makes it possible to realize bend-type phase shifters 20a and 20b that add the function of a phase shifter to the function of a conventional connection part, which is to bend the signal path S by 90°, without increasing the mounting area.

[0085] Since the bend-type phase shifters 20a and 20b have the function of bending the signal path S by 90° and the function of a phase shifter, even if the number of bends of the digital phase shifter 100 increases, the area occupied by the part that does not function as a phase shifter does not increase. As a result, the mounting area of ​​the digital phase shifter can be reduced compared to conventional designs.

[0086] <Modifications> Modifications of the bend-type phase shifter according to the first embodiment of the present invention will be described below. In the figures used in the following description, components corresponding to the configuration shown in Figure 5 are denoted by the same reference numerals. In addition, the bend-type phase shifter 20a will be described below, and the description of the bend-type phase shifter 20b will be omitted.

[0087] 《First Modified Example》 Figure 7 is a plan view showing the configuration of a bent-type phase shifter according to the first modified example in the first embodiment of the present invention. As shown in Figure 7, the bent-type phase shifter 20a of this modified example has a second connecting line 52 added to the connecting portion 50 of the bent-type phase shifter 20a shown in Figure 5.

[0088] The second connecting line 52 is a long, plate-shaped conductor having a fixed width, fixed thickness, and predetermined length. The second connecting line 52 extends in the same direction as the extending direction of the first connecting line 51. The second connecting line 52 is provided parallel to the first connecting line 51 and is spaced apart by a predetermined distance M2. Specifically, a pair of second connecting lines 52 are arranged on both sides of the first connecting line 51, spaced apart by a predetermined distance M2 from the first connecting line 51. The predetermined distance M2 may be equivalent to a predetermined distance M1. In the following description, the second connecting line 52 arranged on one side of the first connecting line 51 may be referred to as "second connecting line 52a," and the second connecting line 52 arranged on the other side of the first connecting line 51 may be referred to as "second connecting line 52b."

[0089] The second connecting line 52 connects the inner line 2 of the digital phase shift circuit 40-1 to the inner line 2 of the digital phase shift circuit 40-2. In the example shown in Figure 7, the first end (one end) of the second connecting line 52a is connected to the first inner line 2a of the digital phase shift circuit 40-1, and the second end (the other end) is connected to the first inner line 2a of the digital phase shift circuit 40-2. The first end (one end) of the second connecting line 52b is connected to the second inner line 2b of the digital phase shift circuit 40-1, and the second end (the other end) is connected to the second inner line 2b of the digital phase shift circuit 40-2.

[0090] 《Second Modification》 Figure 8 is a plan view showing the configuration of a bent phase shifter according to a second modification of the first embodiment of the present invention. As shown in Figure 8, the bent phase shifter 20a of this modification has a configuration in which a third connecting line 53 is added to the connecting portion 50 of the bent phase shifter 20a shown in Figure 7.

[0091] The third connecting line 53 is a long, plate-shaped conductor having a fixed width, fixed thickness, and predetermined length. The third connecting line 53 is a strip-shaped conductor provided on the other side of the first connecting line 51, at a position further from the first connecting line 51 than the second connecting line 52. The third connecting line 53 is provided parallel to the first connecting line 51 at a predetermined distance, with the second connecting line 52b in between. The third connecting line 53 is not provided on one side of the first connecting line 51. This is because the first outer line 3a is omitted in the digital phase shift circuits 40-1 and 40-2.

[0092] The third connecting line 53 connects the outer line 3 of the digital phase shift circuit 40-1 and the outer line 3 of the digital phase shift circuit 40-2. Specifically, the first end (one end) of the third connecting line 53 is connected to the outer line 3 of the digital phase shift circuit 40-1, and the second end (the other end) is connected to the outer line 3 of the digital phase shift circuit 40-2.

[0093] <Third Modification> Figure 9 is a plan view showing the configuration of a bent phase shifter according to a third modification of the first embodiment of the present invention. As shown in Figure 9, the bent phase shifter 20a of this modification has a configuration in which the grounding conductor 54 in the connection portion 50 of the bent phase shifter 20a shown in Figure 8 is omitted. As mentioned above, the grounding conductor 54 connects the first grounding conductor 4a of the digital phase shift circuit 40-1 and the second grounding conductor 4b of the digital phase shift circuit 40-2. In the configuration shown in Figure 9, the first grounding conductor 4a of the digital phase shift circuit 40-1 and the second grounding conductor 4b of the digital phase shift circuit 40-2 are electrically connected via a third connection line 53, so the grounding conductor 54 can be omitted.

[0094] 《Fourth Modification》 Figure 10 is a plan view showing the configuration of a bent phase shifter according to a fourth modification of the first embodiment of the present invention. As shown in Figure 10, the bent phase shifter 20a of this modification has a configuration in which the second connecting line 52 in the connection portion 50 of the bent phase shifter 20a shown in Figure 9 is omitted. In the configuration shown in Figure 10 as well, the first grounding conductor 4a of the digital phase shift circuit 40-1 and the second grounding conductor 4b of the digital phase shift circuit 40-2 are electrically connected via the third connecting line 53, so the grounding conductor 54 can be omitted. For the same reason, the second connecting line 52 can also be omitted.

[0095] 《Fifth Modification》 Figure 11 is a plan view showing the configuration of a bent phase shifter according to a fifth modification of the first embodiment of the present invention. As shown in Figure 11, in the bent phase shifter 20a of this modification, the distance between the second inner line 2b and the outer line 3 in the digital phase shift circuit 40-1 is shorter than the distance between the second inner line 2b and the outer line 3 in the digital phase shift circuit 40-2.

[0096] The reason for this configuration is to mitigate the large jump in the phase shift amount that occurs when the digital phase shift circuit 40-1 of the bend-type phase shifter 20a is switched from high-latency mode to low-latency mode in the first operation described above. This jump in the phase shift amount is caused by a large change in the shape of the return current path when the digital phase shift circuit 40-1 of the bend-type phase shifter 20a is switched from high-latency mode to low-latency mode.

[0097] 《Sixth Modification》 Figure 12 is a plan view showing the configuration of a bent-type phase shifter according to the sixth modification of the first embodiment of the present invention. As shown in Figure 12, in the bent-type phase shifter 20a of this modification, the length of the outer line 3 in the digital phase shift circuit 40-2 is longer than the length of the outer line 3 in the digital phase shift circuit 40-1.

[0098] The reason for this configuration is to increase the phase shift amount of the digital phase shift circuit 40-2 in the bend-type phase shifter 20a. When the length of the digital phase shift circuits 40-1 and 40-2 is set to be shorter than that of the digital phase shift circuit 10 shown in Figure 2, the phase shift amount will be smaller than that of the digital phase shift circuit 10 shown in Figure 2. Also, in the first operation described above, even if the digital phase shift circuit 40-2 of the bend-type phase shifter 20a is changed from high-latency mode to low-latency mode, the large jump in the phase shift amount described above does not occur. For this reason, the phase shift amount of the digital phase shift circuit 40-2 is increased by increasing the length of the outer line 3 in the digital phase shift circuit 40-2.

[0099] Furthermore, the method for increasing the length of the outer line 3 in the digital phase shift circuit 40-2 is arbitrary. For example, as shown in Figure 12, the length of the outer line 3 in the digital phase shift circuit 40-2 may be increased by making it a convex shape facing the second inner line 2b, or by making it a convex shape facing in the opposite direction to the second inner line 2b. However, the latter method increases the mounting area of ​​the bend-type phase shifter 20a compared to the former method, so the former method is preferred.

[0100] 《Seventh Modification》 Figures 13A to 13D illustrate a bend-type phase shifter according to the seventh modification of the first embodiment of the present invention. In this modification, the digital phase shift circuit 40-1 provided in the bend-type phase shifter 20a is used as a mitigation circuit. Here, the mitigation circuit is a circuit that mitigates the large jump in the phase shift amount that occurs when the operating mode of the digital phase shift circuit 40-1 provided in the bend-type phase shifter 20a is changed. The digital phase shift circuit 40-1 as a mitigation circuit has a slightly different configuration from the digital phase shift circuit 40-2 so that it has a smaller phase shift amount compared to the digital phase shift circuit 40-2.

[0101] For example, the digital phase shift circuit 40-1, as a relaxation circuit, has a configuration that satisfies at least one of the following conditions: • Condition 1: The length of the digital phase shift circuit 40-1 is shorter than that of the digital phase shift circuit 40-2. • Condition 2: The distance between the signal line 1 and the inner line 2 in the digital phase shift circuit 40-1 is longer than that of the digital phase shift circuit 40-2. • Condition 3: The distance between the signal line 1 and the outer line 3 in the digital phase shift circuit 40-1 is shorter than that of the digital phase shift circuit 40-2. • Condition 4: The capacitor 5 of the digital phase shift circuit 40-1 is smaller than that of the digital phase shift circuit 40-2. • Condition 5: The electronic switches 7a and 7b of the digital phase shift circuit 40-1 are smaller than those of the digital phase shift circuit 40-2.

[0102] Figure 13A shows a digital phase shift circuit 40-1 that satisfies the above "Condition 1". In the digital phase shift circuit 40-1 shown in Figure 13A, the length Pa (length of signal line 1, inner line 2, outer line 3, etc.) is shorter than the length P of the digital phase shift circuit 40-2.

[0103] Figure 13B shows a digital phase shift circuit 40-1 that satisfies the above "condition 2". In the digital phase shift circuit 40-1 shown in Figure 13B, the distance Qa between the signal line 1 and the inner line 2 (first inner line 2a and second inner line 2b) is longer than the distance Q between the signal line 1 and the inner line 2 (first inner line 2a and second inner line 2b) in the digital phase shift circuit 40-2.

[0104] Figure 13C shows a digital phase shift circuit 40-1 that satisfies the above "condition 3". In the digital phase shift circuit 40-1 shown in Figure 13C, the distance Ra between the signal line 1 and the outer line 3 is shorter than the distance R between the signal line 1 and the outer line 3 in the digital phase shift circuit 40-2.

[0105] Figure 13D shows a digital phase shift circuit 40-1 that satisfies the above "condition 4". In the digital phase shift circuit 40-1 shown in Figure 13D, the size of capacitor 5 is smaller than the size of capacitor 5 in the digital phase shift circuit 40-2. Although not shown in the figure, in the digital phase shift circuit 40-1 that satisfies the above "condition 5", the sizes of the first electronic switch 7a and the second electronic switch 7b (see Figure 6) are smaller than the sizes of the first electronic switch 7a and the second electronic switch 7b in the digital phase shift circuit 40-2.

[0106] By making the digital phase shift circuit 40-1 provided in the bend-type phase shifter 20a the mitigation circuit described above, for example, in the first operation described above, it is possible to mitigate the large jump in the amount of phase shift that occurs when the digital phase shift circuit 40-1 of the bend-type phase shifter 20a is changed from high-latency mode to low-latency mode.

[0107] [Second Embodiment] Figure 14 is a plan view showing the schematic configuration of a digital phase shifter according to the second embodiment of the present invention. As shown in Figure 14, the digital phase shifter 200 of this embodiment is configured to have a digital phase shift circuit 60 (60-1 to 60-11) instead of the digital phase shift circuit 10 of the digital phase shifter 100 of the first embodiment.

[0108] In other words, in this embodiment, the first to fifth digital phase shift circuits 60-1 to 60-5, which are connected in cascaded order, constitute the first digital phase shift circuit group 30. The seventh to eleventh digital phase shift circuits 60-7 to 60-11, which are connected in cascaded order, constitute the second digital phase shift circuit group 31. The sixth digital phase shift circuit 60-6, which is connected in cascaded order, is located between the first digital phase shift circuit group 30 and the second digital phase shift circuit group 31, and is electrically connected between the first digital phase shift circuit group 30 and the second digital phase shift circuit group 31 by bend-type phase shifters 20a and 20b.

[0109] The digital phase shift circuit 60 in this embodiment has the same configuration as the digital phase shift circuit 40 shown in Figure 6. In other words, the digital phase shift circuit 60 is a configuration in which one of the outer lines 3 (first outer line 3a) and connecting conductors 6c and 6d of the digital phase shift circuit 10 shown in Figure 2 are omitted. As a result of these omissions, the ends of the grounding conductors 4 (first grounding conductor 4a and second grounding conductor 4b) on the inner line 2a side relative to the signal line 1 are omitted, and the length of the grounding conductors 4 is shortened.

[0110] The digital phase shift circuits 60-1 to 60-5 that constitute the digital phase shift circuit group 30 and the digital phase shift circuits 60-7 to 60-11 that constitute the digital phase shift circuit group 31 are arranged so that their first inner lines 2a face each other. In addition, the digital phase shift circuit 60-6 is arranged so that its first inner line 2a faces the bent inward side.

[0111] In this embodiment as well, the bend-type phase shifters 20a and 20b described with reference to Figures 5, 7 to 13D can be used. Since the bend-type phase shifters 20a and 20b have the function of bending the signal path S by 90° and the function of a phase shifter, even if the number of bends of the digital phase shifter 200 increases, the area occupied by the part that does not function as a phase shifter does not increase. As a result, the mounting area of ​​the digital phase shifter can be reduced compared to conventional designs.

[0112] [Third Embodiment] Figure 15 is a plan view showing a schematic configuration of a digital phase shifter according to the third embodiment of the present invention. As shown in Figure 15, the digital phase shifter 300 of this embodiment is configured in which a digital phase shift circuit 60-6 is provided in place of the digital phase shift circuit 10-6 of the digital phase shifter 100 of the first embodiment.

[0113] The digital phase shifter 200 according to the second embodiment described above had a configuration in which all of the digital phase shift circuits 10 of the digital phase shifter 100 shown in Figure 1 were replaced with digital phase shift circuits 60. In contrast, the digital phase shifter 300 according to this embodiment has a configuration in which only the digital phase shift circuits 10-6 of the digital phase shifter 100 shown in Figure 1 were replaced with digital phase shift circuits 60-6.

[0114] In this embodiment, the plan view shapes of the digital phase shift circuits 10-1 to 10-5 constituting the digital phase shift circuit group 30 and the digital phase shift circuits 10-7 to 10-11 constituting the digital phase shift circuit group 31 are symmetrical. Therefore, the first outer lines 3a of the digital phase shift circuits 10-1 to 10-5 constituting the digital phase shift circuit group 30 and the first outer lines 3a of the digital phase shift circuits 10-7 to 10-11 constituting the digital phase shift circuit group 31 can be bent so that they face each other. Furthermore, the second outer lines 3b of the digital phase shift circuits 10-1 to 10-5 constituting the digital phase shift circuit group 30 and the second outer lines 3b of the digital phase shift circuits 10-7 to 10-11 constituting the digital phase shift circuit group 31 can also be bent so that they face each other. Thus, in this embodiment, for example, it is possible to increase the number of bends to create a zigzag shape (or meander shape).

[0115] Furthermore, in this embodiment as well, the bend-type phase shifters 20a and 20b described with reference to Figures 5, 7 to 13D can be used. Since the bend-type phase shifters 20a and 20b have the function of bending the signal path S by 90° and the function of a phase shifter, even if the number of bends of the digital phase shifter 300 increases, the area occupied by the part that does not function as a phase shifter does not increase. As a result, the mounting area of ​​the digital phase shifter can be reduced compared to conventional designs.

[0116] Although embodiments of the present invention have been described above, the present invention is not limited to the above embodiments and can be freely modified within the scope of the present invention. For example, the bent phase shifters 20a and 20b according to the first to third embodiments described above had a 90° bend shape. However, the bent phase shifter may have a shape other than a 90° bend (for example, a 45° bend shape).

[0117] Furthermore, the digital phase shifters 100 to 300 according to the first to third embodiments described above had a U-shaped plan view. However, the digital phase shifter may have a plan view shape other than U-shaped (for example, a spiral shape or a meander shape). Such a digital phase shifter can be realized by connecting multiple digital phase shift circuit groups with multiple bend-type phase shifters.

[0118] 1...Signal line, 2, 2a, 2b...Inner line, 3, 3a, 3b...Outer line, 4a...First grounding conductor, 4b...Second grounding conductor, 7a, 7b...Electronic switch, 10, 10-1 to 10-11...Digital phase shift circuit, 20a, 20b...Bend-type phase shifter, 30...First digital phase shift circuit group, 31...Second digital phase shift circuit group, 40, 40-1, 40-2...Digital phase shift circuit, 50...Connection section, 51...First connection line, 52...Second connection line, 53...Third connection line, 54...Grounding conductor, 60, 60-1 to 60-11...Digital phase shift circuit, 100, 200, 300...Digital phase shifter

Claims

1. It comprises a first phase shift circuit, a second phase shift circuit, and a connection part that connects the first phase shift circuit and the second phase shift circuit, The first phase shift circuit and the second phase shift circuit each include a signal line, a first inner line and a second inner line provided on both sides of the signal line, an outer line provided only on the outside of the second inner line among the first and second inner lines, a first ground conductor connected to the first ends of the first inner line, the second inner line, and the outer line, a second ground conductor connected to the second end of the outer line, a first electronic switch provided between the second end of the first inner line and the second ground conductor, and a second electronic switch provided between the second end of the second inner line and the second ground conductor, and are configured to be set to a low-latency mode in which the first and second electronic switches are closed, or a high-latency mode in which the first and second electronic switches are open. The first phase shift circuit and the second phase shift circuit are arranged such that the first inner lines are close to each other, the extensions of the signal lines intersect each other, the extensions of the first inner lines intersect each other, the extensions of the second inner lines intersect each other, and the extensions of the outer lines intersect each other; the first ground conductor of the first phase shift circuit and the second ground conductor of the second phase shift circuit are electrically connected; and the connection part includes a first connecting line that electrically connects the signal line of the first phase shift circuit and the signal line of the second phase shift circuit, wherein the bend-type phase shifter.

2. The bend-type phase shifter according to claim 1, wherein the connection portion comprises a pair of second connecting lines that electrically connect each of the first inner line and the second inner line of the first phase shift circuit to each of the first inner line and the second inner line of the second phase shift circuit.

3. The bend-type phase shifter according to claim 1 or 2, wherein the connection portion comprises a third connecting line that electrically connects the outer line of the first phase shift circuit and the outer line of the second phase shift circuit.

4. The bend-type phase shifter according to any one of claims 1 to 3, wherein the connection portion comprises a grounding conductor that connects the first grounding conductor of the first phase shift circuit and the second grounding conductor of the second phase shift circuit.

5. The bend-type phase shifter according to any one of claims 1 to 4, wherein the distance between the signal line and the outer line in the first phase shift circuit is shorter than the distance between the signal line and the outer line in the second phase shift circuit.

6. The bend-type phase shifter according to any one of claims 1 to 5, wherein the first phase shift circuit has a smaller phase shift amount compared to the second phase shift circuit.

7. The bend-type phase shifter according to any one of claims 1 to 6, wherein the length of the outer line of the second phase shift circuit is longer than the length of the outer line of the first phase shift circuit.

8. A digital phase shifter comprising: a first digital phase shift circuit group in which a plurality of digital phase shift circuits are connected in cascaded order; a second digital phase shift circuit group in which a plurality of digital phase shift circuits are connected in cascaded order; a third digital phase shift circuit electrically connected to a first digital phase shift circuit located at the first end of the first digital phase shift circuit group and to a second digital phase shift circuit located at the first end of the second digital phase shift circuit group among the plurality of digital phase shift circuits forming the second digital phase shift circuit group; a first bend-type phase shifter, which is a bend-type phase shifter according to any one of claims 1 to 7, for connecting the first digital phase shift circuit and the third digital phase shift circuit; and a second bend-type phase shifter, which is a bend-type phase shifter according to any one of claims 1 to 7, for connecting the second digital phase shift circuit and the third digital phase shift circuit.

9. The plurality of digital phase shift circuits forming the first digital phase shift circuit group, the plurality of digital phase shift circuits forming the second digital phase shift circuit group, and the third digital phase shift circuit each include a signal line, a first inner line and a second inner line provided on both sides of the signal line, a first outer line and a second outer line provided outside the first inner line and the second inner line, respectively, a first grounding conductor connected to the first end of each of the first inner line, the second inner line, the first outer line, and the second outer line, and the A digital phase shifter according to claim 8, comprising: a second grounding conductor connected to the second ends of the first outer line and the second outer line; a first electronic switch provided between the second end of the first inner line and the second grounding conductor; and a second electronic switch provided between the second end of the second inner line and the second grounding conductor, wherein the digital phase shifter is configured to be set to a low-latency mode in which the first electronic switch and the second electronic switch are closed, or a high-latency mode in which the first electronic switch and the second electronic switch are open.

10. The plurality of digital phase shift circuits forming the first digital phase shift circuit group, the plurality of digital phase shift circuits forming the second digital phase shift circuit group, and the third digital phase shift circuit each include a signal line, a first inner line and a second inner line provided on both sides of the signal line, an outer line provided only on the outside of the second inner line among the first and second inner lines, a first ground conductor connected to the first end of the first inner line, the second inner line, and the outer line, and the A digital phase shifter according to claim 8, comprising: a second grounding conductor connected to the second end of an outer line; a first electronic switch provided between the second end of the first inner line and the second grounding conductor; and a second electronic switch provided between the second end of the second inner line and the second grounding conductor, wherein the digital phase shifter is configured to be set to a low-latency mode in which the first electronic switch and the second electronic switch are closed, or to a high-latency mode in which the first electronic switch and the second electronic switch are open.

11. Each of the plurality of digital phase shift circuits forming the first digital phase shift circuit group and the plurality of digital phase shift circuits forming the second digital phase shift circuit group comprises a signal line, a first inner line and a second inner line provided on both sides of the signal line, a first outer line and a second outer line provided outside the first inner line and the second inner line, respectively, a first grounding conductor connected to the first end of each of the first inner line, the second inner line, the first outer line, and the second outer line, and the The system comprises a second grounding conductor connected to the second ends of the first outer line and the second outer line, a first electronic switch provided between the second end of the first inner line and the second grounding conductor, and a second electronic switch provided between the second end of the second inner line and the second grounding conductor, and is configured to be set to a low-latency mode in which the first electronic switch and the second electronic switch are closed, or a high-latency mode in which the first electronic switch and the second electronic switch are open. The third digital phase shift circuit comprises a signal line, a first inner line and a second inner line provided on both sides of the signal line, an outer line provided only on the outside of the second inner line among the first inner line and the second inner line, a first ground conductor connected to the first ends of the first inner line, the second inner line, and the outer line, a second ground conductor connected to the second end of the outer line, a first electronic switch provided between the second end of the first inner line and the second ground conductor, and a second electronic switch provided between the second end of the second inner line and the second ground conductor, and is configured to be set to a low-latency mode in which the first electronic switch and the second electronic switch are closed, or a high-latency mode in which the first electronic switch and the second electronic switch are open, as described in claim 8.

12. The digital phase shifter according to any one of claims 9 to 11, wherein the first ground conductor in the first digital phase shift circuit and the second ground conductor in the third digital phase shift circuit are in close proximity to each other, and the first ground conductor in the third digital phase shift circuit and the second ground conductor in the second digital phase shift circuit are in close proximity to each other.

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