Glass substrate for semiconductor package and method for producing same

Abstract

According to the present invention, the relationship α × T ≤ 4 is established, where α (ppm / K) is the coefficient of thermal expansion of a glass substrate for a semiconductor package, and T (mm) is the thickness of the glass substrate for a semiconductor package.

Description

Glass substrate for semiconductor packaging and method for manufacturing the same

[0001] This invention relates to a glass substrate for semiconductor packaging and a method for manufacturing the same.

[0002] Traditionally, organic substrates made of glass fibers and resin have been widely used as substrates for semiconductor packaging. However, this has presented a challenge in meeting the recent demand for miniaturized wiring. Therefore, glass substrates are sometimes used as substrates for semiconductor packaging to achieve miniaturized wiring.

[0003] For semiconductor packaging glass substrates, it is necessary to form numerous through-holes for wiring. For example, one method for forming through-holes in a glass substrate is etching (see, for example, Patent Document 1).

[0004] This etching method comprises the steps of forming a silicon mask made of a silicon substrate on a glass substrate, etching the glass substrate through the silicon mask, and removing the silicon mask from the glass substrate (see claim 1 of the same document).

[0005] Japanese Patent Publication No. 2008-88017

[0006] Conventional glass substrate manufacturing methods involve multiple steps, including the formation of a silicon mask, etching, and removal of the silicon mask. Furthermore, the etching process itself requires a long processing time, making it difficult to efficiently form a large number of through-holes.

[0007] This invention has been made in view of the above circumstances, and its technical objective is to efficiently form holes in a glass substrate for semiconductor packaging.

[0008] (1) The present invention, devised to solve the above problems, is a glass substrate for semiconductor packaging having holes that penetrate in the thickness direction, characterized in that when the coefficient of thermal expansion is α (ppm / K) and the thickness is T (mm), the relationship α × T ≤ 4 holds.

[0009] As described above, by appropriately adjusting the coefficient of thermal expansion α and the thickness T of the glass substrate for semiconductor packages, it becomes possible to efficiently form holes in the glass substrate for semiconductor packages.

[0010] (2) In the configuration of (1) above, it is preferable that the relationship α × T ≤ 1.5 holds. Thereby, the occurrence of cracks in the holes formed in the glass substrate for semiconductor packages can be suppressed.

[0011] (3) In the configuration of (1) or (2) above, for the glass substrate for semiconductor packages, it is preferable that α ≤ 8 and the distortion point is 1000 °C or lower.

[0012] (4) In any of the configurations from (1) to (3) above, for the glass substrate for semiconductor packages, it is preferable that 0.1 ≤ T ≤ 1.2.

[0013] (5) In any of the configurations from (1) to (4) above, for the glass substrate for semiconductor packages, when the Young's modulus is E (GPa), it is preferable that the relationship α × T / E ≤ 0.020 holds.

[0014] (6) In any of the configurations from (1) to (5) above, for the glass substrate for semiconductor packages, when the diameter of the hole is D (mm), it is preferable that the relationship α × T × D ≤ 1.0 holds.

[0015] (7) In any of the configurations from (1) to (6) above, the glass substrate for semiconductor packages has a hole formation region in which a plurality of the holes with a diameter of 0.1 mm or less are densely provided, and it is preferable that 1 to 4000 holes are provided per 10 mm square in the hole formation region.

[0016] For the glass substrate for semiconductor packages according to the present invention, fine holes can be formed at high density. Therefore, for example, it can sufficiently meet the demand for miniaturization of wiring in an interposer, a core substrate, an image sensor, etc.

[0017] (8) In any of the configurations from (1) to (7) above, the glass substrate for semiconductor packages may be for an interposer.

[0018] (9) In any of the configurations (1) to (7) above, the glass substrate for the semiconductor package may be a core substrate.

[0019] (10) In any of the configurations (1) to (7) above, the glass substrate for the semiconductor package may be a substrate for an image sensor.

[0020] (11) The present invention, which was devised to solve the above problems, is a method for manufacturing a glass substrate for semiconductor packaging, comprising a preparation step of preparing a glass substrate such that the relationship α × T ≤ 4 is satisfied when the coefficient of thermal expansion is α (ppm / K) and the thickness is T (mm), and a step of applying CO to the glass substrate ２ The invention is characterized by comprising a hole-drilling process, in which a laser is irradiated to form a hole that penetrates in the thickness direction.

[0021] As described above, by appropriately adjusting the thermal expansion coefficient α and thickness T of the glass substrate for semiconductor packaging, it becomes possible to efficiently form holes in the glass substrate for semiconductor packaging.

[0022] (12) The present invention, which was devised to solve the above problems, is a glass substrate for semiconductor packaging having holes that penetrate in the thickness direction, wherein the content is SiO in mol% ２ 65-85%, B ２ O ３ 14-25%, R ２ It is characterized by containing 0.5 to 5% O (R = Li, Na, K).

[0023] (13) In the glass substrate for semiconductor packaging described in (12) above, in mol% Al ２ O ３ It may contain 0-3%.

[0024] (14) The semiconductor package glass substrate described in (12) or (13) above may contain 0 to 5% of MO (M = Mg, Ca, Sr, Ba, Zn) in mol%.

[0025] According to the present invention, holes can be efficiently formed in a glass substrate for semiconductor packaging.

[0026] This is a plan view showing a glass substrate for a semiconductor package according to this embodiment. This is a cross-sectional view showing an enlarged view of the hole formation region of the glass substrate for the semiconductor package in Figure 1. This is a cross-sectional view showing a semiconductor package according to this embodiment.

[0027] Hereinafter, embodiments for carrying out the present invention will be described with reference to the accompanying drawings.

[0028] <Glass Substrate for Semiconductor Packaging> As an example of a glass substrate for semiconductor packaging according to the present invention, borosilicate glass is used, but the material of the glass substrate for semiconductor packaging is not limited to this embodiment.

[0029] As shown in Figure 1, the semiconductor package glass substrate 1 is rectangular in shape, with a vertical dimension L1 × horizontal dimension L2 of 300 mm × 300 mm or more. From the viewpoint of obtaining multiple core substrates, the substrate size (L1 × L2) of the semiconductor package glass substrate 1 is preferably 350 mm × 350 mm or more, more preferably 400 mm × 400 mm or more, even more preferably 450 mm × 450 mm or more, and particularly preferably 500 mm × 500 mm or more. However, if the substrate size of the semiconductor package glass substrate 1 becomes excessively large, the manufacturing of the substrate itself becomes difficult, so the substrate size (L1 × L2) of the semiconductor package glass substrate 1 is preferably 700 mm × 700 mm or less, more preferably 650 mm × 650 mm or less, even more preferably 600 mm × 600 mm or less, and particularly preferably 550 mm × 550 mm or less.

[0030] The thickness T of the semiconductor package glass substrate 1 is preferably 0.1 to 1.2 mm (0.1 ≤ T ≤ 1.2). For interposer applications, it is preferably 0.15 to 0.45 mm, more preferably 0.20 to 0.40 mm, and particularly preferably 0.25 to 0.35 mm. For core substrate applications, it is preferably 0.4 to 1.2 mm, more preferably 0.5 to 1.0 mm, and particularly preferably 0.6 to 0.9 mm. Such thicknesses make it easier to ensure the rigidity of the semiconductor package glass substrate 1.

[0031] The glass substrate 1 for semiconductor packages contains, in mol%, SiO ２ 65 to 85%, B ２ O ３ 14 to 25%, R ２ O (R = Li, Na, K) 0.5 to 5%.

[0032] SiO ２ is a component that forms the glass skeleton and also a component that enhances chemical durability. The upper limit of the content of SiO ２ is 85%, preferably 83%, particularly preferably 81%. On the other hand, the lower limit of the content of SiO ２ is 65%, preferably 68%, preferably 71%, 73%, 75%, particularly preferably 76%. When SiO ２ is within the above upper and lower limits, it becomes easy to efficiently form holes in the glass substrate for semiconductor packages.

[0033] B ２ O ３ is a component that forms the glass skeleton and also a component that enhances chemical durability. The upper limit of the content of B ２ O ３ is 25%, preferably 23%, preferably 21%, particularly preferably 20%. On the other hand, the lower limit of the content of B ２ O ３ is 14%, preferably 15%, particularly preferably 16%. When B ２ O ３ is within the above upper and lower limits, it becomes easy to efficiently form holes in the glass substrate for semiconductor packages.

[0034] The upper limit of the content of Al ２ O ３ is preferably 3.0% or less, preferably 2.5%, 2.0%, 1.5%, 1.2%, 1.0%, 0.5%, 0.3%, 0.1%, particularly preferably substantially not contained. If the content of Al ２ O ３ is too high, in addition to the high-temperature viscosity increasing and the meltability decreasing, CO ２The area around the holes formed by laser irradiation is prone to cracks and other damage. ２ O ３ "Substantially does not contain" means that it is intentionally omitted from the raw materials, and does not mean that impurity levels of contamination are eliminated. Objectively, Al ２ O ３ This refers to a content of 0.5% or less.

[0035] R ２ O (R = Li, Na, K) can reduce high-temperature viscosity and improve productivity. ２ The upper limit of the O content is 5.0%, preferably 4.5%, and most preferably 4.0%, 3.5%, and especially 3.0%. On the other hand, R ２ The lower limit of the O content is 0.5%, preferably 0.7%, and more preferably 1.0%, 1.3%, 1.5%, 1.7%, 1.9%, and particularly preferably 2.0%. ２ By keeping O within the above upper and lower limits, it becomes easier to efficiently form holes in the glass substrate for semiconductor packaging. ２ O, Na ２ O and K ２ The same applies to the upper and lower limits of the O content.

[0036] The upper limit of the MO (M = Mg, Ca, Sr, Ba, Zn) content is preferably 5.0%, with 4.0%, 3.5%, 3.0%, 2.5%, 2.0%, 1.5%, 1.0%, 0.7%, and particularly 0.6% being preferred. If the MO content is too high, the coefficient of thermal expansion increases, leading to larger dimensional changes in the glass substrate during heating and cooling, increased residual stress during laser drilling, and a higher likelihood of cracks and other damage around the holes. On the other hand, the lower limit of the MO content is preferably greater than 0%, with 0.05%, 0.1%, 0.2%, 0.3%, and particularly 0.4% being preferred. By keeping the MO content within the above upper and lower limits, the high-temperature viscosity can be reduced, improving productivity. The same applies to the upper and lower limits of the content of each component MgO, CaO, SrO, BaO, and ZnO.

[0037] TiO２ The upper limit of the content is preferably 10% or less, and preferably 5% or less, 3% or less, 1% or less, or especially preferably substantially absent. ２ If the content is too high, the melting temperature increases, which tends to decrease productivity. It also makes the glass more prone to discoloration. Furthermore, because it acts as a nucleating agent in the glass, crystal precipitation becomes more likely.

[0038] ZrO ２ The upper limit of the content is preferably 10% or less, preferably 5% or less, 3% or less, 1% or less, and especially preferably substantially absent. ２ If the content is too high, the melting temperature increases, which tends to decrease productivity. Also, because it acts as a nucleating agent in the glass, crystal precipitation becomes more likely.

[0039] The strain point of the semiconductor package glass substrate 1 is preferably 500°C or higher and 1000°C or lower. The thermal expansion coefficient of the semiconductor package glass substrate 1 is preferably 0.5 ppm / K or higher and 8.0 ppm / K or lower, more preferably 1.0 ppm / K or higher and 8.0 ppm / K or lower, more preferably 1.3 ppm / K or higher and 5.0 ppm / K or lower, even more preferably 1.6 ppm / K or higher and 3.0 ppm / K or lower, and most preferably 1.6 ppm / K or higher and 2.0 ppm / K or lower. The thermal expansion coefficient of the semiconductor package glass substrate 1 can be measured by a thermal expansion measuring device (TMA). If the strain point is within the above range, when slow cooling is performed to relieve the internal stress of the semiconductor package glass substrate 1, it is not necessary to raise the temperature, and the time required to cool to room temperature can be shortened, thus improving the manufacturing efficiency of the semiconductor package glass substrate 1. If the coefficient of thermal expansion is within the above range, dimensional changes of the semiconductor package glass substrate 1 due to heating and cooling in the semiconductor package manufacturing process can be suppressed. Furthermore, changes in the diameter of holes in the glass substrate that may occur due to heating and cooling can also be suppressed. Here, the strain point refers to the value measured according to the ASTM C336 method.

[0040] In the semiconductor package glass substrate 1 according to this embodiment, when the thermal expansion coefficient is α (ppm / K) and the thickness is T (mm), the relationship α × T ≤ 4 holds. This allows for suitable hole drilling of the semiconductor package glass substrate 1. α × T is preferably 1.5 or less, and particularly preferably 1.3 or less. This allows for laser (e.g., CO) to be used. ２ Even when drilling holes using a laser, cracks and other damage around the holes are less likely to occur.

[0041] In the semiconductor package glass substrate 1 according to this embodiment, α / T is preferably 0.1 or more and 10 or less, 1.0 or more and 9.5 or less, and particularly preferably 4.0 or more and 8.0 or less. By setting the numerical range to this extent, lasers (for example, CO) ２ Even when drilling holes using a laser, cracks and other damage around the holes become less likely to occur.

[0042] If the Young's modulus of the substrate is defined as E (GPa), then α (ppm / K) × T (mm) / E (GPa) is preferably 0.020 or less, preferably 0.015 or less, and particularly preferably 0.010 or less. By setting the value within this range, the change in fracture strength before and after drilling can be minimized. Although the mechanism is not entirely clear, it is thought that satisfying this parameter makes it less likely for cracks to originate from the holes. The Young's modulus is the value measured by the bending resonance method on a glass substrate before drilling.

[0043] As shown in Figure 2, the semiconductor package glass substrate 1 has a first main surface 1c and a second main surface 1d. In addition, a pore-forming region in which multiple holes H are densely arranged may be formed in the central part 1b of the semiconductor package glass substrate 1, excluding the peripheral part 1a. Note that the holes H are not shown in Figure 1. The pore-forming region may be, for example, a rectangular region in plan view, and multiple such regions may be provided in the central part 1b of the semiconductor package glass substrate 1.

[0044] When multiple hole-forming regions are provided, a strip-shaped region without holes H is formed between adjacent hole-forming regions. Holes H are holes that penetrate in the thickness direction of the semiconductor package glass substrate 1, for example, CO ２ The holes H are formed by laser irradiation. These holes H can be used, for example, as vias to electrically connect wiring.

[0045] The hole H is preferably 1.0 mm or less in diameter D, and is preferably 0.75 mm or less, 0.30 mm or less, 0.15 mm or less, 0.10 mm or less, and particularly preferably 0.075 mm or less.

[0046] α (ppm / K) × T (mm) × D (mm) is preferably 1 or less, and is preferably 0.7 or less, 0.5 or less, 0.35 or less, and particularly preferably 0.15 or less. By setting the numerical range to this extent, the laser (for example, CO) ２ Even when drilling holes using a laser, cracks and other damage around the holes become less likely to occur.

[0047] Preferably, there are 1 to 4000 holes H per 10 mm square within the hole-forming region. More preferably, there are 3600 or fewer holes H per 10 mm square within the hole-forming region, 3200 or fewer holes H, 2800 or fewer holes H, 2500 or fewer holes H, and most preferably 1600 or fewer holes H per 10 mm square within the hole-forming region. Furthermore, more preferably, there are 10 or more holes H per 10 mm square within the hole-forming region, 50 or more holes H, 100 or more holes H, 500 or more holes H, and 1000 or more holes H per 10 mm square within the hole-forming region.

[0048] By ensuring that the holes H meet the above-mentioned diameter and the number of holes per 10 mm square within the above-mentioned hole-forming region, the semiconductor package glass substrate 1 can be suitably used as a substrate for semiconductor packages. Furthermore, by keeping the number of holes below the above-mentioned upper limit, the crack occurrence rate when holes are formed can be reduced to 1% or less.

[0049] The width W of the peripheral edge 1a of the semiconductor package glass substrate 1 is preferably 10 mm or less, more preferably 5 mm or less, and even more preferably 3 mm or less. By reducing the width W of the peripheral edge 1a, the area of ​​the central portion 1b from which the core substrate or the like can be collected can be increased.

[0050] <Semiconductor Package> As shown in Figure 3, the semiconductor package 11 according to this embodiment comprises a core substrate 12, a semiconductor element 13, and an interposer 14 disposed between the core substrate 12 and the semiconductor element 13. Although not shown in the figures, the core substrate 12 and the interposer 14 have wiring and holes (vias) that electrically connect the wiring formed therein.

[0051] The core substrate 12 is a single-layer substrate taken from the central portion 1b of the semiconductor package glass substrate 1. In other words, in this embodiment, multiple core substrates 12 are taken from the central portion 1b of the semiconductor package glass substrate 1.

[0052] The interposer 14 is a relay board for electrically connecting the core substrate 12 and the semiconductor element 13. Note that the semiconductor package 11 does not necessarily have to include the interposer 14. In other words, the semiconductor package 11 may have a configuration in which the semiconductor element 13 is directly placed on the core substrate 12.

[0053] <Method for manufacturing a glass substrate for semiconductor packaging> This manufacturing method comprises a preparation step of preparing a glass substrate 1 for semiconductor packaging of predetermined dimensions, and a hole-drilling step of forming holes H in the glass substrate 1 for semiconductor packaging.

[0054] In the preparation process, a large glass plate is manufactured by a known molding method, such as the overflow downdraw method. The glass plate is manufactured such that the relationship α × T ≤ 4 is satisfied, as described above. Subsequently, multiple semiconductor package glass substrates 1 are obtained by cutting this glass plate.

[0055] In the hole-drilling process, CO2 is introduced into the hole-forming region of the central part 1b of the semiconductor package glass substrate 1. ２ Multiple holes H are formed by irradiating with a laser. In the hole-punching process, a pulsed laser is irradiated from the first main surface 1c side of the semiconductor package glass substrate 1 (hereinafter referred to as the "first irradiation process"), and then a pulsed laser is similarly irradiated from the second main surface 1d side of the semiconductor package glass substrate 1 (hereinafter referred to as the "second irradiation process").

[0056] By performing the first irradiation process, a recess is formed from the first main surface 1c side, and a hole H is formed. Alternatively, the hole shape may be such that the hole diameter is larger on the first main surface 1c side and smaller on the second main surface 1d side.

[0057] In the following second irradiation step, CO2 is emitted from the second main surface 1d side. ２ The laser is irradiated. As a result, the diameter of the holes H on the second main surface 1d becomes approximately the same as the diameter of the holes H on the first main surface 1c. In this way, by performing the first and second irradiation steps, holes H with a uniform diameter can be formed in the semiconductor package glass substrate 1.

[0058] In this embodiment, it is preferable that the number of pulsed laser shots in the first irradiation step and the number of pulsed laser shots in the second irradiation step are the same, but the embodiment is not limited to this and may be different.

[0059] Furthermore, this manufacturing method may further include a cutting step after the drilling step, in which multiple substrates (for example, core substrates, etc.) of a size to be mounted on the semiconductor package 11 are taken from the central portion 1b of the semiconductor package glass substrate 1.

[0060] The present invention is not limited to the configuration of the above embodiments, nor is it limited to the effects described above. The present invention can be modified in various ways without departing from the spirit of the invention.

[0061] In the above embodiment, the semiconductor package glass substrate 1 was described as being rectangular in shape, but it is not limited to this. For example, the semiconductor package glass substrate 1 may be circular in shape or the like.

[0062] In the above embodiment, the case in which the semiconductor package glass substrate 1 is used as the core substrate 12 was described, but the invention is not limited to this. For example, the semiconductor package glass substrate 1 may be used as an interposer 14 or a substrate for an image sensor. Experimental example

[0063] The present invention will be described in detail below based on experimental examples, but the present invention is not limited to these experimental examples.

[0064] The inventors conducted a test to form holes through a glass substrate for semiconductor packaging by irradiating it with a laser. In this test, several glass substrates for semiconductor packaging with different coefficients of thermal expansion and thicknesses were prepared as samples. CO2 was applied to each of the semiconductor packaging glass substrates. ２ We irradiated the material with a laser (pulsed laser) to check whether or not a hole was formed, and if so, whether or not there were cracks.

[0065] The semiconductor package glass substrate used in this test is configured in a rectangular shape measuring 100 mm x 100 mm.

[0066] In this test, CO ２ The laser wavelength is 9.4 μm, the pulse width is 2 μs, and CO ２ The laser power density is 7 MW / cm². ２ CO ２ The number of laser shots was set to 8 for a thickness of 0.4 mm, 14 for a thickness of 0.8 mm, and 18 for a thickness of 1.1 mm. In the experimental examples in Table 1, the hole diameter was set to 0.75 mm once a hole was formed.

[0067] Regarding the evaluation of the test, CO ２ A laser was irradiated onto one side (first main surface) of a semiconductor package glass substrate for a predetermined number of shots, and a microscope was used to confirm whether or not an opening formed by a hole was created on the other side (second main surface) of the semiconductor package glass substrate.

[0068] If a through-hole was confirmed, the semiconductor package glass substrate was cut at the location of the hole to observe the inside of the hole. ２ If laser irradiation does not create holes in the semiconductor package glass substrate, a recess will be formed on one side (the first main surface) of the semiconductor package glass substrate. In this case as well, the semiconductor package glass substrate was cut at the location of the recess in order to observe the inside of the recess.

[0069] Subsequently, an electron microscope was used to check for the presence or absence of cracks. The presence or absence of cracks was determined by viewing a cross-section of the formed hole; if a crack was found inside the hole, it was judged as "crack present," and if no crack was found inside the hole, it was judged as "crack absent."

[0070] Furthermore, load tests were performed on the substrate before and after drilling. One hole was made in the center. The center refers to the point where the diagonals of the glass substrate intersect. The breaking load was measured by a ring-on-ring test. The conditions for this test were a diameter of 12.5 mm for the piston-side ring, a diameter of 25 mm for the support-side ring, and a descent speed of 0.5 mm / s for the piston-side ring. For each experimental example, the above ring-on-ring test was performed, and the change in breaking load before and after hole formation (breaking load before hole formation (N) / breaking load after hole formation (N)) was evaluated as "○" if it was less than 2.0, and "×" if it was greater than 2.0.

[0071] The Young's modulus is a value measured by the resonance method on a glass substrate for semiconductor packaging before drilling. The coefficient of thermal expansion is a value measured by a thermal expansion measuring device (TMA).

[0072] The strain point refers to the value measured according to the ASTM C336 method.

[0073] The test results are shown in Tables 1, 2, and 3. Table 4 shows the compositions of the semiconductor package glass substrates related to Experimental Examples 1 to 11 in Table 1.

[0074]

[0075]

[0076]

[0077]

[0078] As shown in Table 1, for experimental examples 1 to 8, α × T is 4 or less, and the CO for each thickness as described above is ２ The holes could be suitably formed by the number of laser shots. In experimental examples 9 to 11, α × T exceeded 4, and the CO for each thickness as described above was ２The number of laser shots was insufficient to form a hole.

[0079] Furthermore, in experimental examples 1, 2, and 4-6, it was found that cracks had formed inside the holes and recesses. In contrast, no cracks were observed inside the holes in experimental examples 3, 7, and 8. From this, it can be seen that by setting α×T to 1.5 or less, it is possible to suitably manufacture glass substrates for semiconductor packages that have crack-free holes.

[0080] Furthermore, in experimental examples 3, 7, and 8, where α × T / E was 0.020 or less, the change in fracture load before and after hole formation (fracture load before hole formation (N) / fracture load after hole formation (N)) was less than 2.0 in each case. From this, it can be seen that by setting α × T / E to 0.020 or less, the change in fracture strength before and after drilling can be reduced.

[0081] Furthermore, Table 2 shows Experimental Examples 3-1-1 to 3-1-6, in which the hole diameter of Experimental Example 3 is varied. From Table 2, it can be seen that if α × T × D is 1 or less, it is possible to suitably manufacture glass substrates for semiconductor packages that have crack-free holes.

[0082] Table 3 also shows Experimental Examples 3-2-1 to 3-2-8, in which the hole diameter of Experimental Example 3 was set to 0.075 mm and the number of holes per 10 mm square was varied. From these experimental examples, it can be seen that crack-free hole formation is possible when providing between 1 and 4000 holes with a diameter of 0.1 mm or less per 10 mm square. In this test, the surface of the opening was observed under a microscope to check for the presence or absence of cracks, but the presence or absence of cracks in the cross-section was not checked.

[0083] The inventors conducted additional tests to form through-holes in semiconductor package glass substrates by irradiating them with a laser. In these tests, several semiconductor package glass substrates with different thermal expansion coefficients and compositions were prepared as samples. Each sample had a thickness of 0.4 mm. CO2 was applied to each semiconductor package glass substrate under the same conditions as described above. ２A through-hole was formed by irradiating it with a laser (pulsed laser), and the crack occurrence rate in this case was measured.

[0084] The results of the additional tests are shown in Table 5.

[0085]

[0086] According to experimental examples 12-18 and 20-25 shown in Table 5, α×T is between 0.96 and 1.19, and the mol% is SiO ２ 76.6-80.5%, B ２ O ３ 16.8-19.2%, R ２ In a glass substrate for semiconductor packaging containing 1.0-4.0% O (R = Li, Na, K), the crack rate was reduced to zero.

[0087] 1. Glass substrate for semiconductor packaging 11. Semiconductor package 12. Core substrate 13. Semiconductor element 14. Interposer H-hole

Claims

1. A glass substrate for semiconductor packaging having holes that penetrate in the thickness direction, characterized in that, when the coefficient of thermal expansion is α (ppm / K) and the thickness is T (mm), the relationship α × T ≤ 4 holds.

2. The glass substrate for semiconductor packaging according to claim 1, wherein the relationship α × T ≤ 1.5 holds.

3. The glass substrate for semiconductor packaging according to claim 1, wherein α ≤ 8 and the strain point is 1000°C or less.

4. A glass substrate for semiconductor packaging according to any one of claims 1 to 3, wherein 0.1 ≤ T ≤ 1.

2.

5. A glass substrate for semiconductor packaging according to any one of claims 1 to 3, wherein the relationship α × T / E ≤ 0.020 holds when the Young's modulus is E (GPa).

6. A glass substrate for semiconductor packaging according to any one of claims 1 to 3, wherein the relationship α × T × D ≤ 1.0 holds when the diameter of the hole is D (mm).

7. A glass substrate for semiconductor packaging according to any one of claims 1 to 3, having a hole-forming region in which a plurality of holes with a diameter of 0.1 mm or less are densely arranged, wherein the number of holes is 1 to 4,000 per 10 mm square within the hole-forming region.

8. A glass substrate for a semiconductor package according to any one of claims 1 to 3, which is for use in an interposer.

9. A glass substrate for a semiconductor package according to any one of claims 1 to 3, which is for use as a core substrate.

10. A glass substrate for a semiconductor package according to any one of claims 1 to 3, which is for use as a substrate for an image sensor.

11. A method for manufacturing a glass substrate for semiconductor packaging, comprising: a preparation step of preparing a glass substrate such that the relationship α × T ≤ 4 is satisfied when the coefficient of thermal expansion is α (ppm / K) and the thickness is T (mm); and a CO2 solution is applied to the glass substrate. ２ A method for manufacturing a glass substrate for semiconductor packaging, characterized by comprising a hole-drilling step of irradiating with a laser to form holes that penetrate in the thickness direction.

12. A glass substrate for semiconductor packaging having holes that penetrate in the thickness direction, wherein the content is SiO2 in mol%. ２ 65-85%, B ２ O ３ 14-25%, R ２ A glass substrate for semiconductor packaging characterized by containing 0.5 to 5% of O (R = Li, Na, K).

13. Al in mol% ２ O ３ A glass substrate for semiconductor packaging according to claim 12, containing 0 to 3%.

14. A glass substrate for semiconductor packaging according to claim 12 or 13, containing 0 to 5% MO (M = Mg, Ca, Sr, Ba, Zn) in mol%.

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