Semiconductor device, light-emitting substrate and manufacturing method therefor

Abstract

A semiconductor device, a light-emitting substrate and a manufacturing method therefor. The semiconductor device comprises a substrate, a first electrode assembly (200) and a second electrode assembly (300), and a light-emitting structure layer (100), wherein the first electrode assembly (200) or the second electrode assembly (300) is provided on the substrate, the first electrode assembly (200) and the second electrode assembly (300) are stacked in the direction perpendicular to the substrate, and the first electrode assembly (200) and / or the second electrode assembly (300) comprise a first electrode (401) and a second electrode (402). The light-emitting structure layer (100) is provided between the first electrode assembly (200) and the second electrode assembly (300). The first electrode (401) is in contact with the light-emitting structure layer (100), and the second electrode (402) is provided in an insulated manner on the light-emitting structure layer (100) and extends along the periphery of the light-emitting structure layer (100).

Description

A semiconductor device, a light-emitting substrate, and a method for fabricating the same.

[0001] This application claims priority to Chinese Patent Application No. 202411651731.2, filed on November 18, 2024, entitled "A Semiconductor Device, a Light-Emitting Substrate and a Method for Preparing the Same Thereof," the contents of which shall be construed as incorporated herein by reference. Technical Field

[0002] This article relates to display technology, and in particular to a semiconductor device, a light-emitting substrate, and a method for preparing the same. Background Technology

[0003] Semiconductor light-emitting diode (LED) technology has been developing for nearly thirty years, from its initial use as a solid-state lighting power source to its application as a backlight source in the display field, and then to LED displays, providing a solid foundation for its wider application. Among them, with the development of chip manufacturing and packaging technologies, sub-millimeter light-emitting diode (Mini LED) displays and micro light-emitting diode (Micro LED) displays have gradually become a hot technology.

[0004] Currently, the external quantum efficiency (EQE) of micro LEDs is not ideal, and the structure of micro LEDs is not conducive to the detection of electrical and luminous performance. Summary of the Invention

[0005] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0006] This disclosure provides a semiconductor device, including:

[0007] Substrate;

[0008] A first electrode assembly and a second electrode assembly are disposed on the substrate. The first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode.

[0009] A light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly;

[0010] The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulated on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

[0011] In some exemplary embodiments, an insulating layer is further included, which is disposed between the second electrode and the light-emitting structure layer, wherein the orthographic projection of the second electrode on the substrate lies within the orthographic projection of the insulating layer on the substrate.

[0012] In some exemplary embodiments, the insulating layer is disposed on the outer periphery of the first electrode and forms a ring.

[0013] In some exemplary embodiments, the orthographic projection of the insulating layer on the substrate is configured to overlap with the orthographic projection of the second electrode on the substrate.

[0014] In some exemplary embodiments, the end of the insulating layer away from the first electrode is configured to extend away from the second electrode in a direction perpendicular to the substrate, and the insulating layer is configured to cover part or all of the sidewalls of the light-emitting structure layer.

[0015] In some exemplary embodiments, the dimensions of the light-emitting structure layer in the direction parallel to the substrate are configured to decrease linearly in the direction away from the substrate, and the insulating layer is configured to be horn-shaped in the direction perpendicular to the substrate.

[0016] In some exemplary embodiments, the second electrode is located on the outer periphery of the first electrode and forms a ring.

[0017] In some exemplary embodiments, the center of the first electrode is configured to be collinear with the center of the second electrode in a direction perpendicular to the substrate.

[0018] In some exemplary embodiments, the first electrode and the second electrode are disposed in the same layer.

[0019] In some exemplary embodiments, the ratio of the area of ​​the second electrode projected onto the substrate to the area of ​​the light-emitting structure layer projected onto the substrate is 5% to 20%.

[0020] In some exemplary embodiments, the edge of the second electrode near the first electrode in the direction parallel to the substrate is defined as the inner edge, and the edge of the second electrode away from the first electrode in the direction parallel to the substrate is defined as the outer edge.

[0021] The maximum distance between the inner edge and the outer edge is set to L1, the maximum dimension of the light-emitting structure layer in the direction parallel to the substrate is set to L2, and the ratio of L2 to L1 is set to be greater than or equal to 10.

[0022] In some exemplary embodiments, the first electrode assembly includes a first electrode and a second electrode, and the second electrode assembly includes a third electrode, wherein the third electrode is in contact with the light-emitting structure layer;

[0023] Alternatively, the second electrode assembly includes a first electrode and a second electrode, and the first electrode assembly includes a third electrode, wherein the third electrode is in contact with the light-emitting structure layer;

[0024] Alternatively, both the first electrode assembly and the second electrode assembly may include a first electrode and a second electrode.

[0025] In some exemplary embodiments, the light-emitting structure layer includes a first semiconductor layer, a quantum well layer, and a second semiconductor layer stacked in a direction perpendicular to the substrate;

[0026] The first electrode is disposed on the first semiconductor layer and / or the second semiconductor layer, and the second electrode is disposed insulated from the first semiconductor layer and / or the second semiconductor layer.

[0027] This application provides a light-emitting substrate, including:

[0028] Back panel;

[0029] Multiple semiconductor devices are spaced apart on the backplane. Each semiconductor device includes a first electrode assembly, a second electrode assembly, and a light-emitting structure layer. The first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode. The light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly. The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulated on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

[0030] In some exemplary embodiments, a filler layer is also included, which is disposed on the backplane and fills the space between adjacent semiconductor devices.

[0031] In some exemplary embodiments, the first electrodes of a plurality of semiconductor devices are bonded to the backplane, and the second electrodes of adjacent semiconductor devices are electrically connected.

[0032] In some exemplary embodiments, the plurality of semiconductor devices include a first device and a second device;

[0033] The first electrode assembly of the first device and the second electrode assembly of the second device are disposed on the back plate and each includes a first electrode and a second electrode.

[0034] The second electrode assembly of the first device and the first electrode assembly of the second device are electrically connected.

[0035] This application provides a method for preparing a light-emitting substrate, including:

[0036] A light-emitting structure layer, a first electrode assembly, and a second electrode assembly are sequentially formed. The first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode. The light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly. The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulated on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

[0037] In some exemplary embodiments, the sequential formation of the light-emitting structure layer, the first electrode assembly, and the second electrode assembly includes:

[0038] A light-emitting structure layer is formed on the substrate;

[0039] An insulating layer is formed on the light-emitting structure layer, and the insulating layer is disposed on the outer periphery of the first electrode and forms a ring.

[0040] In some exemplary embodiments, forming an insulating layer on the light-emitting structure layer includes:

[0041] An insulating film is deposited on the light-emitting structure layer;

[0042] The insulating film is etched to form an insulating pattern, the insulating pattern including the insulating layer and a first through hole, the insulating layer surrounding the first through hole to accommodate the first electrode.

[0043] The semiconductor device of this application embodiment includes a second electrode that is insulated from the light-emitting structure layer. This electrode can reduce the electric field strength at the edge region, thereby decreasing the probability of electron-hole recombination and improving external quantum efficiency. The semiconductor device of this application embodiment can achieve contactless electrical detection.

[0044] After reading and understanding the accompanying diagrams and detailed descriptions, other aspects can be understood.

[0045] Overview of the attached figures

[0046] The accompanying drawings are used to provide an understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.

[0047] Figure 1 is a top view of a semiconductor device according to an exemplary embodiment of the present invention;

[0048] Figure 2 is a schematic diagram of the AA-direction section in Figure 1;

[0049] Figure 3 is a top view of another semiconductor device according to this exemplary embodiment;

[0050] Figure 4 is a top view of yet another semiconductor device according to this exemplary embodiment;

[0051] Figure 5 is a top view of another semiconductor device according to this exemplary embodiment;

[0052] Figure 6 is a schematic diagram of another semiconductor device according to this exemplary embodiment;

[0053] Figure 7 is a schematic diagram of another semiconductor device according to this exemplary embodiment;

[0054] Figure 8 is a schematic diagram of another semiconductor device according to this exemplary embodiment;

[0055] Figure 9 is a schematic diagram of another semiconductor device according to this exemplary embodiment;

[0056] Figure 10 is a diagram showing the electric field line distribution of the semiconductor device according to this exemplary embodiment;

[0057] Figure 11 is a schematic diagram of the electric field intensity at the edge of the semiconductor device in this exemplary embodiment;

[0058] Figure 12 is a schematic diagram of the electric field mode at position C1 of the semiconductor device according to this exemplary embodiment;

[0059] Figure 13 is a schematic diagram of the electric field intensity y component at position C1 of the semiconductor device of this exemplary embodiment;

[0060] Figure 14 is a schematic diagram of a light-emitting substrate according to an exemplary embodiment of the present invention;

[0061] Figure 15 is a cross-sectional view of a light-emitting substrate according to an exemplary embodiment of the present invention;

[0062] Figure 16 is a schematic diagram of a method for preparing a light-emitting substrate according to an exemplary embodiment of the present invention;

[0063] Figure 17 is a first fabrication schematic diagram of a light-emitting substrate according to an exemplary embodiment of the present invention;

[0064] Figure 18 is a second fabrication schematic diagram of a light-emitting substrate according to an exemplary embodiment of the present invention;

[0065] Figure 19 is a third fabrication schematic diagram of a light-emitting substrate according to an exemplary embodiment of the present invention;

[0066] Figure 20 is a fourth fabrication schematic diagram of a light-emitting substrate according to this exemplary embodiment;

[0067] Figure 21 is a fifth schematic diagram of the fabrication of a light-emitting substrate according to this exemplary embodiment;

[0068] Figure 22 is a sixth fabrication schematic diagram of a light-emitting substrate according to this exemplary embodiment;

[0069] Figure 23 is a seventh fabrication schematic diagram of a light-emitting substrate according to this exemplary embodiment;

[0070] Figure 24 is a schematic diagram of another light-emitting substrate of this exemplary embodiment.

[0071] Detailed Explanation

[0072] This application describes several embodiments, but these descriptions are exemplary and not limiting, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.

[0073] This application includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this application can also be combined with any conventional features or elements to form unique inventive solutions. Any feature or element of any embodiment can also be combined with features or elements from other inventive solutions to form another unique inventive solution. Therefore, it should be understood that any feature shown and / or discussed in this application can be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes can be made within the scope of the appended claims.

[0074] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that it does not depend on such a specific order. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims concerning the method and / or process should not be limited to the steps performed in the written order, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments of this application.

[0075] In some exemplary embodiments, a semiconductor device includes a substrate, a first electrode assembly and a second electrode assembly, and a light-emitting structure layer. The first electrode assembly or the second electrode assembly is disposed on the substrate, and the first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode. The light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly. The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulatedly disposed on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

[0076] In some exemplary embodiments, the semiconductor device further includes an insulating layer disposed between the second electrode and the light-emitting structure layer, wherein the orthographic projection of the second electrode on the substrate lies within the orthographic projection of the insulating layer on the substrate.

[0077] In some exemplary embodiments, the end of the insulating layer away from the first electrode is configured to extend away from the second electrode in a direction perpendicular to the substrate, and the insulating layer is configured to cover part or all of the sidewalls of the light-emitting structure layer.

[0078] In some exemplary embodiments, the ratio of the area of ​​the second electrode projected onto the substrate to the area of ​​the light-emitting structure layer projected onto the substrate is 5% to 20%.

[0079] In some exemplary embodiments, the edge of the second electrode near the first electrode in the direction parallel to the substrate is defined as the inner edge, and the edge of the second electrode away from the first electrode in the direction parallel to the substrate is defined as the outer edge.

[0080] The maximum distance between the inner and outer edges is set to L1, the maximum dimension of the light-emitting structure layer in the direction parallel to the substrate is set to L2, and the ratio of L2 to L1 is set to be greater than or equal to 10.

[0081] Currently, the applicant has discovered that edge effects in Micro LEDs cause nonradiative recombination of electrons and holes at the sidewall edges of the light-emitting structure, ultimately leading to a decrease in the external quantum efficiency of the semiconductor device. Electroluminescence detection is an important detection method that can evaluate the electrical and luminescent properties of Micro LEDs. Electroluminescence detection technology mainly includes contact detection, which involves injecting current into the two electrodes of the Micro LED using a miniature electrical probe to record its electrical and luminescent properties. Although this method is relatively mature, it is slow and may damage the electrodes and surface of the Micro LED.

[0082] Figure 1 is a top view of a semiconductor device according to an exemplary embodiment of the present invention, and Figure 2 is a cross-sectional view along the AA direction in Figure 1. This exemplary embodiment provides a semiconductor device, as shown in Figures 1 and 2. The semiconductor device may include a substrate (not shown), a first electrode assembly 200, a second electrode assembly 300, and a light-emitting structure layer 100. The first electrode assembly 200 or the second electrode assembly 300 may be disposed on the substrate (not shown), and the first electrode assembly 200 and the second electrode assembly 300 may be stacked in a direction perpendicular to the substrate (not shown) (i.e., a first direction). The first electrode assembly 200 and / or the second electrode assembly 300 may include a first electrode 401 and a second electrode 402. The light-emitting structure layer 100 may be located between the first electrode assembly 200 and the second electrode assembly 300. The first electrode 401 may be in contact with the light-emitting structure layer 100, and the second electrode 402 may be insulatedly disposed on the light-emitting structure layer 100 and extend along the circumferential edge of the light-emitting structure layer 100. The semiconductor device in this example has a second electrode 402 that is insulated from the light-emitting structure layer 100. It can reduce the probability of electron-hole recombination at the edge by reducing the electric field strength in the edge region, thereby improving the external quantum efficiency. Moreover, the semiconductor device can achieve contactless electrical detection.

[0083] In some exemplary embodiments, as shown in Figures 1 and 2, the light-emitting structure layer 100 may include a first semiconductor layer 101, a quantum well layer 102, and a second semiconductor layer 103 sequentially stacked in a direction perpendicular to the substrate (not shown in the figures) (i.e., a first direction). The material of the first semiconductor layer 101 may include p-type gallium nitride (i.e., P-GaN), a semiconductor material that can be achieved by doping gallium nitride (GaN) with p-type dopants such as magnesium (Mg). The material of the second semiconductor layer 103 may include N-type gallium nitride (i.e., N-GaN), a group III / V direct bandgap semiconductor material that can be achieved by doping gallium nitride (GaN) with group V elements (such as phosphorus, arsenic, antimony, etc.). The quantum well layer 102 may be a multilayer structure fabricated in a semiconductor material. The thickness of the semiconductor device can be the dimension of the semiconductor device in the first direction, and the thickness of the semiconductor device can be from 1 micrometer to 10 micrometers; the thickness of the first semiconductor layer 101 can be the dimension of the first semiconductor layer 101 in the first direction, and the thickness of the first semiconductor layer 101 can be from 100 nanometers to 500 nanometers. In this example, the thickness of the first semiconductor layer 101 can be 200 nanometers; the thickness of the quantum well layer 102 can be the dimension of the quantum well layer 102 in the first direction, and the thickness of the quantum well layer 102 can be from 20 nanometers to 300 nanometers. In this example, the thickness of the quantum well layer 102 can be 100 nanometers; the thickness of the second semiconductor layer 103 can be the dimension of the second semiconductor layer 103 in the first direction, and the thickness of the second semiconductor layer 103 can be from 1 micrometer to 3 micrometers. In this example, the thickness of the second semiconductor layer 103 can be 2 micrometers. The first electrode assembly 200 can be located on the side of the first semiconductor layer 101 away from the quantum well layer 102, and the second electrode assembly 300 can be located on the side of the second semiconductor layer 103 away from the quantum well layer 102.

[0084] In some exemplary embodiments, as shown in Figures 1 and 2, the cross-section of the light-emitting structure layer 100 parallel to the substrate is circular, but not limited to this; for example, it can be rectangular, rhomboid, elliptical, triangular, pentagonal, etc. The light-emitting structure layer 100 is erected along a first direction, and the sidewall 104 of the light-emitting structure layer 100 can be the circumferential outer wall of the light-emitting structure layer 100. In some exemplary embodiments, the sidewall 104 of the light-emitting structure layer 100 extends along the first direction, making the light-emitting structure layer 100 as a whole cylindrical. In some exemplary embodiments, the diameter of the light-emitting structure layer 100 can be from 10 micrometers to 100 micrometers; in this example, the diameter of the light-emitting structure layer 100 can be 20 micrometers.

[0085] In some exemplary embodiments, as shown in Figures 1 and 2, the semiconductor device further includes an insulating layer 500, which may be disposed between the second electrode 402 and the light-emitting structure layer 100, serving as an insulating layer between the second electrode 402 and the light-emitting structure layer 100. The material of the insulating layer 500 may include silicon dioxide (SiO2), but is not limited thereto; for example, it may include insulating materials such as silicon nitride (SiN).

[0086] In some exemplary embodiments, as shown in Figures 1 and 2, the first electrode assembly 200 includes a first electrode 401 and a second electrode 402, and the second electrode assembly 300 includes a third electrode 403. The first electrode 401 may be disposed on the end face of the first semiconductor layer 101 away from the quantum well layer 102, forming contact with the first semiconductor layer 101, and serves as the P-electrode of the semiconductor device. The third electrode 403 may be disposed on the end face of the second semiconductor layer 103 away from the quantum well layer 102 and cover the entire end face of the second semiconductor layer 103 away from the quantum well layer 102, forming contact with the second semiconductor layer 103, and serves as the N-electrode of the semiconductor device. An insulating layer 500 may be disposed on the end face of the first semiconductor layer 101 away from the quantum well layer 102, and the second electrode 402 is located on the end face of the insulating layer 500 away from the first semiconductor layer 101. The insulating layer 500 separates the second electrode 402 from the light-emitting structure layer 100, preventing the second electrode 402 from contacting the light-emitting structure layer 100.

[0087] In some exemplary embodiments, as shown in Figures 1 and 2, the orthographic projection of the second electrode 402 onto the substrate (not shown) lies within the orthographic projection of the insulating layer 500 onto the substrate. A first through-hole 501 may be formed at the center of the insulating layer 500, making the insulating layer 500 generally annular, and the first electrode 401 is located within the first through-hole 501, forming an insulating layer 500 surrounding the first electrode 401. The second electrode 402 may extend along the first semiconductor layer 101 and form a ring, such that the second electrode 402 is located on the outer periphery of the first electrode. In some exemplary embodiments, the orthographic projection of the insulating layer 500 onto the substrate (not shown) may overlap with the orthographic projection of the second electrode 402 onto the substrate.

[0088] In some exemplary embodiments, as shown in Figures 1 and 2, the first electrode 401 is centrally disposed on the light-emitting structure layer 100, that is, the center of the first electrode 401 and the center of the light-emitting structure layer 100 are collinear in a first direction. The center of the first electrode 401 can be its geometric center, and the center of the light-emitting structure layer 100 can be its geometric center. Furthermore, the center of the first electrode 401 can be collinear with the center of the second electrode 402 in the first direction, and the center of the second electrode 402 can be its geometric center. In some exemplary embodiments, the first electrode 401 can be circular, such that the center of the first electrode 401 and the center of the annulus of the second electrode 402 are collinear in the first direction. In some exemplary embodiments, the first electrode 401 and the second electrode 402 are disposed in the same layer, that is, the first electrode 401 and the second electrode 402 can be formed by a patterning process using the same metal thin film.

[0089] In some exemplary embodiments, as shown in Figures 1 and 2, the edge of the second electrode 402 closest to the first electrode 401 in a direction parallel to the substrate (not shown) can be an inner edge 405, and the edge of the second electrode 402 furthest from the first electrode 401 in a direction parallel to the substrate (not shown) can be an outer edge 406. The maximum distance between the inner edge 405 and the outer edge 406 can be a first distance (L1), and the maximum dimension of the light-emitting structure layer 100 in the second or third direction can be a second distance (L2). The ratio of L2 to L1 is set to be greater than or equal to 10, making the width of the second electrode 402 narrower and avoiding the influence of the second electrode 402 on the light-emitting area. The second and third directions are both perpendicular to the first direction, and the second and third directions are perpendicular to each other. The distance of the first electrode 401 from the inner edge 405 in the second direction can be a third distance (L3), and the distance from the edge of the first electrode 401 to the inner edge 405 can be equal to the third distance (L3) and the distance in each circumferential direction can be one. The ratio of the area of ​​the second electrode 402 projected onto the substrate (not shown) to the area of ​​the light-emitting structure layer 100 projected onto the substrate (not shown) is 5% to 20%, which avoids the influence of the second electrode 402 on the light-emitting area and ensures that the second electrode 402 has a sufficiently large area for non-contact electrical detection.

[0090] Figure 3 is a top view of another semiconductor device according to this exemplary embodiment, Figure 4 is a top view of yet another semiconductor device according to this exemplary embodiment, and Figure 5 is a top view of yet another semiconductor device according to this exemplary embodiment. In some exemplary embodiments, as shown in Figures 1 to 5, the first electrode 401 is not limited to being circular, but may be rectangular, triangular, elliptical, semi-circular, rhomboid, pentagonal, etc.; the second electrode 402 is not limited to being annular, and the annular structure of the second electrode 402 can be adjusted according to the shape of the light-emitting structure layer 100. For example, if the light-emitting structure layer 100 is a cube with a square cross-section, the second electrode 402 may be a rectangular ring. In some exemplary embodiments, as shown in Figure 3, the first electrode 401 may be rectangular, and the second electrode 402 may be a rectangular ring. In some exemplary embodiments, as shown in Figure 4, the first electrode 401 may be circular, and the second electrode 402 may be a rectangular ring. In some exemplary embodiments, as shown in Figure 5, the first electrode 401 may be rectangular, and the second electrode 402 may be an annular.

[0091] Figure 6 is a schematic diagram of another semiconductor device according to this exemplary embodiment. In some exemplary embodiments, as shown in Figure 6, the second electrode assembly 300 may include a first electrode 401 and a second electrode 402, and the first electrode assembly 200 may include a third electrode 403. The third electrode 403 may be disposed on the end face of the first semiconductor layer 101 away from the quantum well layer 102 and cover the entire end face of the first semiconductor layer 101 away from the quantum well layer 102, forming contact with the first semiconductor layer 101. The third electrode 403 serves as the P electrode of the semiconductor device. The first electrode 401 may be disposed on the end face of the second semiconductor layer 103 away from the quantum well layer 102, forming contact with the second semiconductor layer 103. The first electrode 401 serves as the N electrode of the semiconductor device. An insulating layer 500 may be disposed on the end face of the second semiconductor layer 103 away from the quantum well layer 102. The second electrode 402 is located on the end face of the insulating layer 500 away from the second semiconductor layer 103. The insulating layer 500 separates the second electrode 402 from the light-emitting structure layer 100, so that the second electrode 402 and the light-emitting structure layer 100 do not contact each other.

[0092] Figure 7 is a schematic diagram of another semiconductor device according to this exemplary embodiment. In some exemplary embodiments, as shown in Figure 7, the first electrode assembly 200 and the second electrode assembly 300 may both include a first electrode 401 and a second electrode 402, that is, the first electrode assembly 200 includes a first electrode 401a and a second electrode 402a, and the second electrode assembly 300 includes a first electrode 401b and a second electrode 402b. The first electrode 401a may be disposed on the end face of the first semiconductor layer 101 away from the quantum well layer 102, forming a contact with the first semiconductor layer 101, and the first electrode 401a serves as the P electrode of the semiconductor device; the first electrode 401b may be disposed on the end face of the second semiconductor layer 103 away from the quantum well layer 102, forming a contact with the second semiconductor layer 103, and the first electrode 401b serves as the N electrode of the semiconductor device. The insulating layer 500 can be located on the first semiconductor layer 101 and the second semiconductor layer 103 respectively. That is, the insulating layer 500a can be located on the end face of the first semiconductor layer 101 away from the quantum well layer 102, and the second electrode 402a is located on the end face of the insulating layer 500a away from the first semiconductor layer 101. The insulating layer 500a separates the second electrode 402a and the light-emitting structure layer 100. The insulating layer 500b can be located on the end face of the second semiconductor layer 103 away from the quantum well layer 102, and the second electrode 402b is located on the end face of the insulating layer 500b away from the second semiconductor layer 103. The insulating layer 500b separates the second electrode 402b and the light-emitting structure layer 100.

[0093] Figure 8 is a schematic diagram of another semiconductor device according to the present exemplary embodiment. In some exemplary embodiments, as shown in Figure 8, one end of the insulating layer 500 away from the first electrode 401 extends in a first direction toward the side away from the second electrode 402, so that the insulating layer 500 is cylindrical, and the insulating layer 500 can cover the sidewall 104 of the light-emitting structure layer 100.

[0094] Figure 9 is a schematic diagram of another semiconductor device according to this exemplary embodiment. In some exemplary embodiments, as shown in Figure 9, the dimensions of the light-emitting structure layer 100 in the direction parallel to the substrate are set to decrease linearly in the direction away from the substrate, such that the light-emitting structure layer 100 forms a frustum of a circle, and the sidewall 104 of the light-emitting structure layer 100 may be an inclined curved surface. The end of the insulating layer 500 away from the first electrode 401 may extend in the first direction away from the second electrode 402, and the insulating layer 500 may cover the sidewall 104 of the light-emitting structure layer 100, forming a trumpet shape.

[0095] In some exemplary embodiments, as shown in FIG2, the thickness of the first semiconductor layer 101 may be 200 nanometers, the thickness of the quantum well layer 102 may be 100 nanometers, the thickness of the second semiconductor layer 103 may be 2 micrometers, and the value of the second distance (L2) may be 20 micrometers, with a voltage applied to the semiconductor device. FIG10 is an electric field line distribution diagram of the semiconductor device of this exemplary embodiment, and FIG11 is a schematic diagram of the electric field intensity at the edge of the semiconductor device of this exemplary embodiment. In FIG11, the horizontal axis represents the size of the semiconductor device in the direction parallel to the substrate, with the unit of size being micrometers, and the vertical axis represents the electric field mode, which can be represented as... Ex represents the transverse electric field strength, and Ey represents the longitudinal electric field strength. The longitudinal direction can be a first direction, and the transverse direction can be a second direction. The unit of the electric field mode is V / m. Line segment d0 represents the electric field mode of the edge of an existing semiconductor device, and line segment d1 can represent the electric field mode of the edge of the semiconductor device in this example. In some exemplary embodiments, a positive voltage is applied to the second electrode 402. In this example, the voltage of the second electrode 402 is 10V, and the first electrode 401 and the third electrode 403 are both applied with a voltage of 0V. The electric field line distribution is shown in Figure 10. As shown in Figures 10 and 11, it can be seen that the electric field lines of the quantum well layer below the insulating layer are reversed. Holes can move along the electric field lines, and electrons can move along the electric field lines in the opposite direction. Therefore, it can be considered that electrons and holes do not recombine below the insulating layer, reducing the probability of electron-hole edge recombination. The probability of electron-hole edge recombination refers to the probability that electrons and holes meet and recombine in the edge region in a semiconductor material. Moreover, the electric field strength of the semiconductor device in this example at the edge can be 3500 to 4000, which is much smaller than the electric field strength of existing semiconductor devices at the edge (approximately 7500 to 10500).

[0096] In some exemplary embodiments, as shown in FIG2, a voltage change is applied to the second electrode 402, while the first electrode 401 and the third electrode 403 are both applied with a voltage of 0V. The position of line C1 in FIG3 is monitored, wherein the voltage change of the second electrode 402 can vary from -5V to 5V. FIG12 is a schematic diagram of the electric field mode at position C1 of the semiconductor device in this exemplary embodiment, and FIG13 is a schematic diagram of the electric field intensity y-component at position C1 of the semiconductor device in this exemplary embodiment. The horizontal axis of FIG12 and FIG13 is the dimension in the second direction, the vertical axis of FIG12 is the electric field mode, and the vertical axis of FIG13 is the electric field intensity y-component. According to FIG2, FIG12 and FIG13, the electric field mode at the center position of the conductor device decreases (i.e., the electric field mode data within the dashed box in FIG12), but the electric field intensity y-component remains unchanged at each voltage, that is, the electric field intensity y-component is the same at each voltage within the dashed box in FIG13. When the voltage of the second electrode 402 is less than 0V, the electric field direction is upward, and electrons and holes will not move to the edge position. Therefore, by preparing an insulating layer and a second electrode 402 at the edge, the problem of non-radiative recombination of electrons and holes at the edge can be solved. The greater the voltage difference between the applied voltage to the second electrode 402 and the first electrode 401, the better. When the voltage of the second electrode 402 is 0V, it can be considered that the light-emitting structure layer below the second electrode 402 does not emit light.

[0097] Contactless electroluminescence detection (CEP) is a method for inspecting the performance of Micro LEDs, characterized by high efficiency and accuracy. It achieves scanning-style, contactless CEP inspection of millions of Micro LED chips on a wafer by applying an alternating electric field to induce periodic emission of the Micro LEDs. The working principle is that when the applied electric field points from p-GaN to n-GaN, electrons in the n-GaN region and holes in the p-GaN region diffuse towards the quantum well, where radiative recombination occurs. CEP avoids the problem of artificially high yield rates caused by photoluminescence and eliminates the need for precise contact between the probe and the semiconductor device, resulting in the fastest inspection speed. CEP enables batch inspection of Micro LEDs without applying any external force, preventing additional damage to the chips during inspection. CEP can also inspect Micro LED chip arrays with high inspection efficiency. In some exemplary embodiments, contactless electrical detection is performed on the semiconductor device shown in FIG2. At this time, the voltage of the second electrode 402 can be 0V, and a high-frequency AC signal can be provided to the second electrode 402 through an external signal.

[0098] Figure 14 is a schematic diagram of a light-emitting substrate according to an exemplary embodiment of the present invention, and Figure 15 is a cross-sectional view of a light-emitting substrate according to an exemplary embodiment of the present invention. In some exemplary embodiments, as shown in Figures 14 and 15, the light-emitting substrate includes a back plate 600 and a plurality of semiconductor devices. The plurality of semiconductor devices are spaced apart on the back plate 600, and the space between adjacent semiconductor devices is a first gap P0. The first electrode assemblies 200 of the plurality of semiconductor devices are correspondingly arranged on the back plate 600, wherein the first electrode 401 of the first electrode assembly 200 can be bonded to the bond 601 on the back plate 600 to form a bond. The second electrode assemblies 300 of the plurality of semiconductor devices are interconnected so that the plurality of semiconductor devices share a common N electrode. Moreover, the light-emitting substrate also includes a filling layer 700, which can be located on the back plate 600 and fill the space between adjacent semiconductor devices, that is, fill the first gap P0.

[0099] In some exemplary embodiments, as shown in Figures 14 and 15, multiple semiconductor devices may include adjacent first devices P1 and second devices P2, with a first gap P0 between them. The first electrodes 401 of both first devices P1 and P2 can be bonded to a backplane 600. The second electrodes 402-1 of first device P1 and 402-2 of second device P2 can be connected via a first connecting line 404. The second electrodes 402 of other adjacent semiconductor devices can also be connected via connecting lines, so that the second electrodes 402 of all semiconductor devices are connected together and can simultaneously provide potential through a peripheral circuit board.

[0100] Figure 16 is a schematic diagram of a method for fabricating a light-emitting substrate according to an exemplary embodiment of the present invention; Figure 17 is a first schematic diagram of fabricating a light-emitting substrate according to an exemplary embodiment of the present invention; Figure 18 is a second schematic diagram of fabricating a light-emitting substrate according to an exemplary embodiment of the present invention; Figure 19 is a third schematic diagram of fabricating a light-emitting substrate according to an exemplary embodiment of the present invention; Figure 20 is a fourth schematic diagram of fabricating a light-emitting substrate according to an exemplary embodiment of the present invention; Figure 21 is a fifth schematic diagram of fabricating a light-emitting substrate according to an exemplary embodiment of the present invention; Figure 22 is a sixth schematic diagram of fabricating a light-emitting substrate according to an exemplary embodiment of the present invention; and Figure 23 is a seventh schematic diagram of fabricating a light-emitting substrate according to an exemplary embodiment of the present invention. In some exemplary embodiments, a method for fabricating a light-emitting substrate can be applied to the light-emitting substrates shown in Figures 14 and 15, and the fabrication method includes:

[0101] Step S1: A stacked structure 900 is formed on the first substrate 801.

[0102] In some exemplary embodiments, as shown in FIG17, a stacked structure 900 is formed on a first substrate 801, including: sequentially epitaxially forming a first semiconductor film 901, a second semiconductor film 902, and a third semiconductor film 903 on the first substrate 801. The first substrate 801 may be a sapphire substrate. The material of the first semiconductor film 901 may include N-type gallium nitride. The material of the second semiconductor film 902 may include III-V group semiconductor materials, II-VI group semiconductor materials, IV-VI group semiconductor materials, or IV group semiconductor materials. The material of the third semiconductor film 903 may include P-type gallium nitride. The first semiconductor film 901, the second semiconductor film 902, and the third semiconductor film 903 may constitute the stacked structure 900.

[0103] Step S2: Transfer the stacked structure 900 onto the second substrate 802.

[0104] In some exemplary embodiments, transferring the stacked structure 900 onto the second substrate includes: moving the stacked structure 900 onto the second substrate 802 by means of transfer, wherein the first semiconductor film 901 of the stacked structure 900 is located on the second substrate 802.

[0105] Step S3: Etch to form the light-emitting structure layer 100.

[0106] In some exemplary embodiments, as shown in FIG18, etching to form a light-emitting structure layer 100 includes: etching a stacked structure 900 to form a notch 904 on the stacked structure 900, thereby pixelating the stacked structure 900, and the notch 904 separating multiple light-emitting structure layers 100.

[0107] Step S4: Deposit an insulating film 904.

[0108] In some exemplary embodiments, as shown in Figures 18 and 19, depositing an insulating film 904 includes depositing an insulating film 904 on the light-emitting structure layer 100. The material of the insulating film 904 may include silicon dioxide. The insulating film 904 covers the sidewalls of the light-emitting structure layer 100 and the end face of the light-emitting structure layer 100 away from the second substrate 802. The space between adjacent light-emitting structure layers 100 may be a first gap P0. Moreover, the sidewalls of the light-emitting structure layer 100 may be repaired before depositing the insulating film 904.

[0109] Step S5, deposit the filling layer 700.

[0110] In some exemplary embodiments, as shown in Figures 19 and 20, depositing a filler layer 700 includes depositing a filler layer 700 on a second substrate 802, the filler layer 700 filling the space between adjacent light-emitting structure layers 100. The material of the filler layer 700 may include silicon dioxide, and the end face of the filler layer 700 away from the second substrate 802 may be flush with the end face of the insulating film 904 away from the second substrate 802, such that the filler layer 700 smooths out the end face away from the second substrate 802.

[0111] Step S6: Pattern the insulating film 904.

[0112] In some exemplary embodiments, as shown in Figures 20 and 21, the patterning process of the insulating film 904 includes: etching the insulating film 904 to form an insulating pattern, the insulating pattern including an insulating layer 500 and a first through hole 501, the insulating layer 500 surrounding the first through hole 501 accommodating the first electrode 401.

[0113] Step S7: Form the first electrode assembly 200 and the first connecting line 404.

[0114] In some exemplary embodiments, as shown in Figures 21 and 22, forming a first electrode assembly 200 and a first connecting line 404 includes: depositing a first conductive thin film, and then performing a patterning process on the first conductive thin film, i.e., etching the first conductive thin film, to form a first electrode 401, a second electrode 402 and a first connecting line 404.

[0115] Step S8, backplate 600 bonding.

[0116] In some exemplary embodiments, as shown in Figures 22 and 23, the backplate 600 bonding includes: flipping the structure formed in step S7 and then bonding it to the backplate 600. The first electrode 401 can make one-to-one contact with the bonds 601 on the backplate 600 to form a bond.

[0117] Step S9: Form the second electrode assembly.

[0118] In some exemplary embodiments, as shown in FIG23, forming a second electrode assembly includes depositing a second conductive film on the end face of the light-emitting structure layer 100 away from the back plate to form the second electrode assembly.

[0119] Figure 24 is a schematic diagram of another light-emitting substrate according to this exemplary embodiment. In some exemplary embodiments, as shown in Figure 24, multiple semiconductor devices may include adjacent first devices P1 and second devices P2. The space between the first devices P1 and the second devices P2 may be a first gap. The first devices P1 and the second devices P2 may be connected in series. The first electrode assembly 200-1 of the first device P1 may be bonded to the back plate 600, and the second electrode assembly 300-1 of the first device P1 is located on the side away from the back plate 600. The second electrode assembly 300-2 of the second device P2 may be bonded to the back plate 600, and the first electrode assembly 200-2 of the second device P2 is located on the side away from the back plate 600. The first electrode assembly 200-1 of the first device P1 includes a first electrode 401-1 and a second electrode 402-1. The second electrode assembly 300-1 of the first device P1 includes a third electrode 403-1. The first electrode 401-1 of the first device P1 may be bonded to the back plate 600, and the third electrode 403-1 of the first device P1 may be located on the side away from the back plate 600. The second electrode assembly 300-2 of the second device P2 includes a first electrode 401-2 and a second electrode 402-2. The first electrode assembly 200-2 of the second device P2 includes a third electrode 403-2. The first electrode 401-2 of the second device P2 can be bonded to the back plate 600, and the third electrode 403-2 of the second device P2 can be located on the side away from the back plate 600.

[0120] In some exemplary embodiments, as shown in FIG24, on the side near the backplate 600, the second electrode 402-1 of the first electrode assembly 200-1 of the first device P1 can be connected to the second electrode 402-1 of the second electrode assembly 300-1 of the second device P2 via the first connecting line 404. On the side away from the backplate 600, the third electrode 403-1 of the second electrode assembly 300-1 of the first device P1 can be connected to the third electrode 402-2 of the first electrode assembly 200-2 of the second device P2 via the second connecting line 407. In this example, when the light-emitting substrate performs contactless electrical detection, the first electrode of the first device P1 is grounded, and the first electrode of the second device P2 is connected to a sinusoidal signal, thereby realizing the detection of two semiconductor devices at once. It is not limited to two semiconductor devices; for example, multiple semiconductor devices can be connected in series, and multiple semiconductor devices can be detected simultaneously during contactless electrical detection.

[0121] In some exemplary embodiments, a display device includes the aforementioned light-emitting substrate. The display device provided in this disclosure can be applied to electronic devices, which can be mobile phones, tablets, televisions, monitors, laptops, digital photo frames, navigators, in-vehicle displays, or any product or component with display functionality, such as wearable devices, smartwatches, smart bracelets, smart glasses, smart headphones, smart clothing, head-mounted displays, etc.

[0122] This application provides a light-emitting substrate, including a backplane and a plurality of semiconductor devices. The plurality of semiconductor devices are spaced apart on the backplane. Each semiconductor device includes a first electrode assembly, a second electrode assembly, and a light-emitting structure layer. The first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode. The light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly. The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulatedly disposed on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

[0123] In some exemplary embodiments, a filler layer is also included, which is disposed on the backplane and fills the space between adjacent semiconductor devices.

[0124] In some exemplary embodiments, the first electrodes of a plurality of semiconductor devices are bonded to a backplane, and the second electrodes of adjacent semiconductor devices are electrically connected.

[0125] In some exemplary embodiments, a plurality of semiconductor devices include a first device and a second device. A first electrode assembly of the first device and a second electrode assembly of the second device are disposed on a backplane and both include a first electrode and a second electrode; the second electrode assembly of the first device and the first electrode assembly of the second device are electrically connected.

[0126] This application provides a method for preparing a light-emitting substrate, including:

[0127] A light-emitting structure layer, a first electrode assembly, and a second electrode assembly are sequentially formed. The first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode. The light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly. The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulatedly disposed on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

[0128] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0129] Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include at least one of those features.

[0130] In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise expressly and specifically limited.

[0131] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," "fixing," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0132] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0133] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0134] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A semiconductor device, wherein, include: Substrate; A first electrode assembly and a second electrode assembly are disposed on the substrate. The first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode. A light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly; The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulated on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

2. The semiconductor device of claim 1, wherein, It also includes an insulating layer disposed between the second electrode and the light-emitting structure layer, wherein the orthographic projection of the second electrode on the substrate lies within the orthographic projection of the insulating layer on the substrate.

3. The semiconductor device of claim 2, wherein, The insulating layer is disposed on the outer periphery of the first electrode and forms a ring.

4. The semiconductor device of claim 3, wherein, The orthographic projection of the insulating layer on the substrate is configured to overlap with the orthographic projection of the second electrode on the substrate.

5. The semiconductor device of claim 2, wherein, The end of the insulating layer away from the first electrode is configured to extend away from the second electrode in a direction perpendicular to the substrate, and the insulating layer is configured to cover part or all of the sidewalls of the light-emitting structure layer.

6. The semiconductor device of claim 5, wherein, The dimensions of the light-emitting structure layer in the direction parallel to the substrate are set to decrease linearly in the direction away from the substrate, and the insulating layer is set to be funnel-shaped in the direction perpendicular to the substrate.

7. The semiconductor device of claim 1, wherein, The second electrode is located on the outer periphery of the first electrode and forms a ring.

8. The semiconductor device of claim 7, wherein, The center of the first electrode is configured to be collinear with the center of the second electrode in a direction perpendicular to the substrate.

9. The semiconductor device of claim 7, wherein, The first electrode and the second electrode are disposed in the same layer.

10. The semiconductor device of claim 7, wherein, The ratio of the area of ​​the second electrode projected onto the substrate to the area of ​​the light-emitting structure layer projected onto the substrate is 5% to 20%.

11. The semiconductor device of claim 7, wherein, The second electrode has its inner edge near the first electrode in a direction parallel to the substrate, and its outer edge away from the first electrode in a direction parallel to the substrate. The maximum distance between the inner edge and the outer edge is set to L1, the maximum dimension of the light-emitting structure layer in the direction parallel to the substrate is set to L2, and the ratio of L2 to L1 is set to be greater than or equal to 10.

12. The semiconductor device according to any one of claims 1 to 11, wherein The first electrode assembly includes a first electrode and a second electrode, and the second electrode assembly includes a third electrode, wherein the third electrode is in contact with the light-emitting structure layer; Alternatively, the second electrode assembly includes a first electrode and a second electrode, and the first electrode assembly includes a third electrode, wherein the third electrode is in contact with the light-emitting structure layer; Alternatively, both the first electrode assembly and the second electrode assembly may include a first electrode and a second electrode.

13. The semiconductor device according to any one of claims 1 to 11, wherein The light-emitting structure layer includes a first semiconductor layer, a quantum well layer, and a second semiconductor layer stacked in a direction perpendicular to the substrate; The first electrode is disposed on the first semiconductor layer and / or the second semiconductor layer, and the second electrode is disposed insulated from the first semiconductor layer and / or the second semiconductor layer.

14. A light-emitting substrate, wherein, include: Back panel; Multiple semiconductor devices are spaced apart on the backplane. Each semiconductor device includes a first electrode assembly, a second electrode assembly, and a light-emitting structure layer. The first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode. The light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly. The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulated on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

15. The light-emitting substrate of claim 14, wherein, It also includes a filler layer disposed on the backplane and filling the space between adjacent semiconductor devices.

16. The light emitting substrate of claim 14, wherein, The first electrodes of a plurality of semiconductor devices are bonded to the backplane, and the second electrodes of adjacent semiconductor devices are electrically connected.

17. The light emitting substrate of claim 14, wherein, The plurality of semiconductor devices include a first device and a second device; The first electrode assembly of the first device and the second electrode assembly of the second device are disposed on the back plate and each includes a first electrode and a second electrode. The second electrode assembly of the first device and the first electrode assembly of the second device are electrically connected.

18. A method of manufacturing a light-emitting substrate, wherein, include: A light-emitting structure layer, a first electrode assembly, and a second electrode assembly are sequentially formed. The first electrode assembly and the second electrode assembly are stacked in a direction perpendicular to the substrate. The first electrode assembly and / or the second electrode assembly includes a first electrode and a second electrode. The light-emitting structure layer is disposed between the first electrode assembly and the second electrode assembly. The first electrode is in contact with the light-emitting structure layer, and the second electrode is insulated on the light-emitting structure layer and extends along the circumferential edge of the light-emitting structure layer.

19. The method of claim 18, wherein the light-emitting substrate is prepared by a method comprising: The sequential formation of the light-emitting structure layer, the first electrode assembly, and the second electrode assembly includes: A light-emitting structure layer is formed on the substrate; An insulating layer is formed on the light-emitting structure layer, and the insulating layer is disposed on the outer periphery of the first electrode and forms a ring.

20. The method of claim 19, wherein the light-emitting substrate is prepared by a method comprising: The formation of an insulating layer on the light-emitting structure layer includes: An insulating film is deposited on the light-emitting structure layer; The insulating film is etched to form an insulating pattern, the insulating pattern including the insulating layer and a first through hole, the insulating layer surrounding the first through hole to accommodate the first electrode.

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