Memory assembly, memory, computing device and data access method

By using hybrid bonding to connect media cells and utilizing photoelectric conversion and serial-to-parallel conversion technologies, the bandwidth limitation problem when connecting HBM to the processor is solved, achieving efficient data transmission and fast response of the storage component.

WO2026103670A1PCT designated stage Publication Date: 2026-05-21HUAWEI TECH CO LTD
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
HUAWEI TECH CO LTD
Filing Date
2025-11-10
Publication Date
2026-05-21

AI Technical Summary

Technical Problem

High bandwidth memory (HBM) cannot form a high-density connection when connected to the processor in computing devices, which means that its high bandwidth cannot be fully realized, and traditional packaging methods limit the internal bandwidth of the storage components.

Method used

The medium unit is connected by a hybrid bonding method and communicates through optical and electrical interfaces. The control unit interacts with external devices using optical signals to achieve photoelectric conversion and serial-to-parallel conversion, thereby improving the internal bandwidth of the storage component.

Benefits of technology

It improves the internal bandwidth of the storage components, ensuring high-speed transmission and interference resistance of optical signals, avoiding encapsulation limitations, and supporting efficient data access and fast response.

✦ Generated by Eureka AI based on patent content.

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Abstract

A memory assembly, a memory, a computing device and a data access method. In the present application, the memory assembly comprises an optical interface, an electrical interface, a control unit and a medium unit, wherein the medium unit comprises memory dies, and the control unit and the medium unit are connected in a hybrid bonding manner; the control unit receives power supply to the memory assembly by means of the electrical interface, so as to ensure that the memory assembly can operate normally; and the control unit receives an external data access instruction, the control unit accesses target data on the medium unit, and the control unit sends, by means of the optical interface, a first optical signal which carriers a data access response, the data access response indicating a result of the control unit accessing the target data. By means of hybrid bonding, the internal bandwidth of the memory assembly can be increased; and the control unit performs optical communication with the outside, and the efficiency of data transmission based on an optical signal is better, thereby ensuring that the internal bandwidth capability of the memory assembly is more fully presented to the outside.
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Description

A storage component, a memory, a computing device, and a data access method.

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411649486.1, filed on November 18, 2024, entitled "A Storage Component, Memory, Computing Device and Data Access Method", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of communication technology, and in particular to a storage component, memory, computing device, and data access method. Background Technology

[0004] As a storage device that directly interacts with the processor, the greater the bandwidth of the memory, the higher the efficiency of data exchange with the processor. Currently, memory bandwidth is typically increased by increasing the number of bits in the memory and the data transfer rate.

[0005] High bandwidth memory (HBM) is a type of memory capable of achieving high bandwidth. When HBM is deployed in a computing device, if it is only connected to the processor within the device via traditional copper wires, a high-density connection cannot be formed between the processor and the HBM, thus failing to fully utilize the HBM's high bandwidth. Therefore, when deploying HBM in a computing device, it needs to be encapsulated with the processor through an interposer. This method prevents the full utilization of the HBM's internal bandwidth, meaning that the bandwidth of the HBM directed to the processor is somewhat limited. Summary of the Invention

[0006] This application provides a storage component, memory, computing device, and data access method to improve memory bandwidth.

[0007] In a first aspect, embodiments of this application provide a storage component, which includes an optical interface, an electrical interface, a control unit, and a media unit. The control unit and the media unit are connected using a hybrid bonding method. The media unit includes one or more media dies and is used to store data.

[0008] The control unit receives power from the storage component via an electrical interface to ensure that the storage component can operate normally.

[0009] The control unit can communicate optically with devices other than the storage component (such as a processor), that is, interact via optical signals. For example, the control unit receives a data access command from an external source, which instructs the access to target data; after receiving the data access command, the control unit accesses the target data on the medium unit, and the control unit sends a first optical signal carrying a data access response through an optical interface, the data access response indicating the result of the control unit accessing the target data.

[0010] Through the aforementioned storage component, the internal bandwidth of the storage component can be improved by using a hybrid bonding method between the control unit and the media unit. The control unit communicates optically with the outside, transmitting a first optical signal. The optical signal has a high transmission rate and better data transmission efficiency, thus ensuring that the internal bandwidth capability of the storage component is fully presented to the outside. Moreover, given the high speed and strong anti-interference properties of optical signals, the evolution of the internal bandwidth of the storage component is not limited. That is, with the development of technology, the internal bandwidth of the storage component can be significantly improved, and the internal bandwidth of the storage component can still be presented to the outside. In addition, since the data access response is sent using the first optical signal, the storage component is connected to the outside (such as the processor) via optical fiber, and does not need to be packaged together. This allows the storage component to be used as an external memory for components such as processors without being packaged together.

[0011] In one possible implementation, when the control unit receives a data access command, it can receive a second optical signal carrying the data access command via an optical interface; the control unit can also receive a first electrical signal carrying the data access command via an electrical interface.

[0012] Through the aforementioned storage components, the control unit can receive data access commands via optical or electrical signals, making it suitable for various application scenarios.

[0013] In one possible implementation, the storage component may include one media unit or multiple media units. When the storage component includes multiple media units, the multiple media units are connected based on a hybrid bonding method.

[0014] With the aforementioned storage component, the bonding points of multiple media cells are smaller in the hybrid bonding connection method, which increases the number of input / output (IO) that the storage component can handle, further improving the internal bandwidth of the storage component.

[0015] In one possible implementation, the control unit includes switching circuit logic and control circuit logic.

[0016] After accessing the target data in the medium unit, the control circuit logic generates a second electrical signal, which carries the data access response. The conversion circuit logic has photoelectric conversion capabilities, which can convert the second electrical signal into a first optical signal.

[0017] Through the aforementioned storage components, the control unit internally performs photoelectric conversion, which converts the second electrical signal carrying the data access response into a first optical signal carrying the data access response, enabling the initiator of the data access command to promptly know the result of accessing the target data.

[0018] In one possible implementation, when a data access instruction is carried on a second optical signal, the conversion circuit logic converts the second optical signal into a third electrical signal, which carries the data access instruction; the control circuit logic accesses the target data on the medium unit according to the third electrical signal.

[0019] Through the aforementioned storage components, the control unit performs photoelectric conversion on the second optical signal and then processes the third electrical signal to ensure efficient processing of the data access command.

[0020] In one possible implementation, the storage component supports the processing of serial optical signals. The conversion circuit logic also has a serial-to-parallel conversion function. When the second optical signal is a serial optical signal, then the third electrical signal is a parallel electrical signal. For example, the conversion circuit logic can convert the second optical signal into a parallel optical signal, and then convert the parallel optical signal into a third electrical signal. Alternatively, the conversion circuit logic can convert the second optical signal into a serial electrical signal, and then convert the serial electrical signal into a third electrical signal.

[0021] Through the aforementioned storage components, the transmission rate of high-speed serial optical signals is higher. The storage components can obtain and process third electrical signals carrying data access instructions through photoelectric conversion and serial-to-parallel conversion, enabling the storage components to process serial optical signals and further improving the bandwidth of the storage components.

[0022] In one possible implementation, the storage component supports the transmission of serial optical signals. The conversion circuit logic has a serial-to-parallel conversion function. When the first optical signal is a serial optical signal, the second electrical signal is a parallel electrical signal. For example, the conversion circuit logic can convert the second electrical signal into a parallel optical signal, and then convert the parallel optical signal back into the first optical signal. Alternatively, the conversion circuit logic can convert the second electrical signal into a serial electrical signal, and then convert the serial electrical signal back into the first optical signal.

[0023] With the aforementioned storage components, the transmission rate of high-speed serial optical signals is higher. The storage components can obtain and transmit serial optical signals carrying data access responses through photoelectric conversion and serial-to-parallel conversion, enabling the storage components to promptly provide feedback to the outside world on the results of accessing the target data.

[0024] Secondly, a memory is provided, comprising a storage component as described in the first aspect and any possible implementation thereof, the memory further comprising a power management module for managing the power supply to the storage component. The structure and function of the storage component are described above and will not be repeated here.

[0025] Thirdly, a computing device is provided, comprising a processor and a storage component as described in the first aspect and any possible implementation thereof. The processor and the storage component can communicate via optical signals. For example, the processor can send a second optical signal or a first electrical signal carrying a data access instruction to the memory to access target data in the storage component within the memory. The storage component can send a first optical signal carrying a data access response to the processor to provide feedback to the processor on the result of accessing the target data.

[0026] Fourthly, a data access method is provided, which is executed by a storage component. This storage component is the same as that described in the first aspect and any possible implementation thereof. The beneficial effects can be found in the relevant description of the first aspect, and will not be repeated here. The storage component includes an optical interface, an electrical interface, a control unit, and a media unit. The media unit includes multiple media dies. The control unit and the media unit are connected using a hybrid bonding method. In this method:

[0027] The control unit receives power from the storage components via an electrical interface, enabling the storage components to operate normally.

[0028] The control unit receives a data access command from an external source and accesses the target data on the medium unit; it then sends a first optical signal carrying a data access response via an optical interface, the data access response indicating the result of the control unit accessing the target data.

[0029] In one possible implementation, when the control unit receives a data access command from an external source, it receives a second optical signal carrying the data access command via an optical interface; or it receives a first electrical signal carrying the data access command via an electrical interface.

[0030] In one possible implementation, the storage component includes one or more media units, and when the storage component includes multiple media units, the multiple media units are connected based on a hybrid bonding method.

[0031] In one possible implementation, the control unit includes conversion circuit logic and control circuit logic; when the control unit sends a first optical signal carrying a data access response through the optical interface, the control circuit logic accesses the target data in the medium unit and generates a second electrical signal carrying a data access response; the conversion circuit logic converts the second electrical signal into the first optical signal.

[0032] In one possible implementation, when the control unit receives a second optical signal carrying a data access instruction, the conversion circuit logic converts the second optical signal into a third electrical signal, which carries the data access instruction; the control circuit logic then accesses the target data on the medium unit based on the third electrical signal. When the control unit receives a first electrical signal carrying a data access instruction, the control circuit logic accesses the target data in the medium unit based on the first electrical signal.

[0033] In one possible implementation, the second electrical signal is a parallel electrical signal, and the first optical signal is a serial optical signal. For example, the conversion circuit logic converts the second electrical signal into a serial electrical signal, and then converts the serial electrical signal into the first optical signal. Alternatively, the conversion circuit logic converts the second electrical signal into a parallel optical signal, and then converts the parallel optical signal into the first optical signal.

[0034] In one possible implementation, the second optical signal is a serial optical signal, and the third electrical signal is a parallel electrical signal. For example, the conversion circuit logic converts the second optical signal into a parallel optical signal, and then converts the parallel optical signal into the third electrical signal. Alternatively, the conversion circuit logic converts the second optical signal into a serial electrical signal, and then converts the serial electrical signal into the third electrical signal.

[0035] For the technical effects that can be achieved by the second to fourth aspects mentioned above, please refer to the description of the technical effects that can be achieved by the corresponding design scheme in the first aspect mentioned above. This application will not repeat them here. Attached Figure Description

[0036] Figure 1 is a schematic diagram of a storage component provided in an embodiment of this application;

[0037] Figure 2 is a schematic diagram of the connection between media units provided in an embodiment of this application;

[0038] Figure 3 is a schematic diagram of a medium unit provided in an embodiment of this application;

[0039] Figures 4A and 4B are schematic diagrams showing the connection between a media unit and a control unit according to an embodiment of this application;

[0040] Figures 5A and 5B are schematic diagrams illustrating the deployment of a media unit and a control unit according to an embodiment of this application;

[0041] Figure 6 is a schematic diagram of a control unit provided in an embodiment of this application;

[0042] Figure 7 is a schematic diagram of the structure of a memory provided in an embodiment of this application;

[0043] Figure 8A is a schematic diagram of a memory module provided in an embodiment of this application;

[0044] Figure 8B is a schematic diagram of the structure of a memory disk provided in an embodiment of this application;

[0045] Figure 9 is a schematic diagram of the structure of a computing device provided in an embodiment of this application;

[0046] Figure 10 is a schematic diagram of a data access method provided in an embodiment of this application. Detailed Implementation

[0047] As shown in Figure 1, a storage component 10 is provided in an embodiment of this application. The storage component 10 includes an optical interface 50, an electrical interface 40, a control unit 30, and at least one media unit 20.

[0048] In the storage component 10, the control unit 30 can control the media unit 20, such as writing data to or reading data from the media unit 20. The media unit 20 is a component in the storage component 10 used for storing data. The media unit 20 includes a plurality of media dies. The media unit 20 may be based on an unpackaged wafer, and the media chip includes the entire wafer. The media chip may also be based on a portion of an unpackaged wafer, which may also be referred to as a wafer region, and the media chip includes the wafer region.

[0049] The embodiments of this application do not limit the type of the medium unit 20. Taking memory as an example, the medium unit 20 can be read-only memory (ROM), dynamic random access memory (DRAM), or storage class memory (SCM), static random access memory (SRAM), high bandwidth memory (HBM), flash memory, NAND flash memory. Any unit that has storage function and contains a die can be used as the medium unit 20.

[0050] It should be noted that, in this embodiment, the medium unit 20 must at least contain a medium die for storing data. In other words, the medium unit 20 refers to a wafer or wafer region containing a medium die but not packaged. The medium unit 20 may not contain circuitry for reading and writing data from the medium die, i.e., the input / output (I / O) circuitry mentioned below. This I / O circuitry may be included in the control circuitry of the control unit 30. Alternatively, the medium unit 20 may contain only a portion of the circuitry for reading and writing data from the medium die (the remaining circuitry may be deployed in the control unit 30, such as being included in the control circuitry of the control unit 30). The medium unit 20 may also contain I / O circuitry for reading and writing data from the medium die. In this case, the control circuitry within the control unit 30 includes circuitry for controlling the I / O circuitry, for example, the circuitry sending control commands to the I / O circuitry. Therefore, the various possible types of the aforementioned media unit 20 refer to the fact that the media unit 20 can be a wafer or wafer region containing media dies in the memory listed above.

[0051] The following sections will introduce each component of storage component 10.

[0052] (1) Optical interface 50.

[0053] Optical interface 50 is a module in storage component 10 that receives or transmits optical signals. In other words, all optical signals sent to storage component 10 (such as the second optical signal mentioned below) must pass through optical interface 50 after arriving at storage component 10 before being transmitted to control unit 30 by optical interface 50. All optical signals that need to be sent outside storage component 10 (such as the first optical signal mentioned below) must pass through optical interface 50, and optical interface 50 transmits the optical signal outside storage component 10.

[0054] (2) Electrical interface 40.

[0055] Electrical interface 40 is a module in storage component 10 that receives or transmits electrical signals. In other words, all electrical signals sent to storage component 10 (such as the first electrical signal, management signal, power supply signal, etc. mentioned below) must pass through electrical interface 40 after arriving at storage component 10 before being transmitted to control unit 30 by electrical interface 40. All electrical signals that need to be sent outside storage component 10 (such as signals transmitted from storage component 10 to basic management circuitry, signals transmitted from storage component 10 to power management module) must pass through electrical interface 40, which transmits the electrical signals outside storage component 10.

[0056] (3) Medium unit 20.

[0057] The storage component 10 may include one or more media cells 20. When the storage component 10 includes multiple media cells 20, the multiple media cells 20 are connected based on hybrid bonding. Hybrid bonding is a process that interconnects multiple media cells 20 through metal. Hybrid bonding can achieve three-dimensional stacking of chips with bump-free permanent bonding through copper-copper metal bonding or silicon dioxide-silicon dioxide dielectric layer bonding.

[0058] Figure 2 shows the connection method of the plurality of media units 20 provided in this embodiment of the application. The plurality of media units 20 are stacked together and connected by a hybrid bonding method. As can be seen from Figure 2, the connection between the plurality of media units 20 is perpendicular to the media unit 20. In other words, when transmitting instructions to the plurality of media units 20, they can be transmitted through the bonding positions between the plurality of media units 20, and these bonding positions are perpendicular to the media unit 20. Because the hybrid bonding method results in a smaller diameter of the bonding positions, the bandwidth of the plurality of media units 20 can be significantly improved. The bandwidth of the plurality of media units 20 can be understood as the number of bits of data transmitted to the media unit 20 per unit time.

[0059] Assuming that the internal bus width of the multiple media units 20 is 8192 after hybrid bonding, and the data transfer rate of the media units 20 is 400 megabits per second (Mbps), then theoretically the bandwidth that the storage component 10 composed of the multiple media units 20 can achieve can reach 400 gigabytes per second (GB / s).

[0060] Figure 3 shows a schematic diagram of the structure of a dielectric unit 20 provided in an embodiment of this application. The dielectric unit 20 is based on a wafer or wafer region 200, and includes lattice-shaped grains on the dielectric unit 20. Each grain includes multiple banks.

[0061] The medium unit 20 is connected to the control unit 30. The embodiments of this application do not limit the connection method between the medium unit 20 and the control unit 30. The medium unit 20 and the control unit 30 can be connected by hybrid bonding or by other methods.

[0062] Here are two implementation methods for connecting the media unit 20 and the control unit 30 through a hybrid bonding connection.

[0063] Implementation Method 1: As shown in Figure 4A, the media unit 20 also has input / output (I / O) circuits connected to each die; the die and the I / O circuits are connected and integrated together. The I / O circuits can read data from the bank of the connected die or write data from each bank. The control unit 30 is connected to each die (i.e., the I / O control circuit connected to each die) through internal wiring formed based on a hybrid bonding method.

[0064] In this connection method, the I / O circuit is equivalent to the control circuit deployed on the periphery of the die. The control unit 30 acts as the "central controller," controlling each I / O circuit to write or read data from the die's bank.

[0065] Connection Method Two: As shown in Figure 4B, the control unit 30 is connected to the banks in each die via internal wiring formed using a hybrid bonding method. That is, each bank is connected to the control unit 30. Each bank and the control unit 30 can be connected via internal wiring formed using a hybrid bonding method. The control unit 30 can directly control each bank and access data to each bank, such as writing data to or reading data from the bank.

[0066] (4) Control unit 30.

[0067] The control unit 30 is the control core of the storage component 10. It can receive data access commands (such as those sent by a processor) from external sources via the electrical interface 40 or optical interface 50, and then parse and process these commands. The control unit 30 can also control the media unit 20, enabling access to the target data stored in the media unit 20, i.e., reading and writing the target data.

[0068] Facing the external interface of the storage component 10, the control unit 30 can interact with external components (such as a processor) via the optical interface 50 based on optical signals. In other words, the information exchanged between the control unit 30 and the external interface can be carried in optical signals. The control unit 30 can also interact with external components (such as a processor, basic management circuitry, or power management module 70) via the electrical interface 40 based on electrical signals. In other words, the information exchanged between the control unit 30 and the external interface can be carried in electrical signals.

[0069] In this embodiment, the control unit 30 can receive a second optical signal carrying a data access instruction from an external source via the optical interface 50; the data access instruction is used to indicate access to target data. After processing the data access instruction (accessing the target data on the medium unit 20), the control unit 30 sends a first optical signal carrying a data access response to the outside via the optical interface 50, the data access vector carrying the result of accessing the target data.

[0070] The control unit 30 can also receive a first electrical signal carrying a data access command from an external source via the electrical interface 40; this data access command is used to indicate access to target data. After processing the data access command (accessing the target data on the medium unit 20), the control unit 30 sends a first optical signal carrying a data access response to an external device via the optical interface 50; this data access vector carries the result of accessing the target data.

[0071] The control unit 30 can also receive power supply to the storage component 10 via the electrical interface 40. The normal operation of the storage component 10 requires electrical power. The electrical power supplied to the storage component 10 can be transmitted to the storage component 10 via the electrical interface 40 through the power supply signal. The control unit 30 receives the power supply signal, operates based on the electrical power, and can also supply electrical power to the medium unit 20 in the storage component 10.

[0072] Within the storage component 10, the control unit 30 controls the medium unit 20 based on electrical signals. The control unit 30 can convert received optical signals into electrical signals and process the converted electrical signals. The control unit 30 can also convert internally generated electrical signals into optical signals and transmit the optical signals to the outside.

[0073] When the control unit 30 receives a second optical signal carrying a data access command, it converts the second optical signal into a third electrical signal carrying the data access command. The control unit 30 processes the third electrical signal and accesses the target data on the medium unit 20 according to the third electrical signal. After accessing the target data in the medium unit 20, the control unit 30 generates a second electrical signal carrying a data access response and converts the second electrical signal into a first optical signal carrying the data access response.

[0074] When the control unit 30 receives a first electrical signal carrying a data access command, it processes the first electrical signal and accesses the target data on the medium unit 20 according to the first electrical signal. After accessing the target data on the medium unit 20, the control unit 30 generates a second electrical signal carrying a data access response and converts the second electrical signal into a first optical signal carrying a data access response.

[0075] The data access response is a response to the data access command. When the data access command instructs the reading of target data, the control unit 30 reads the target data from the media unit 20, and the data access response includes the target data. When the data access command instructs the writing of target data, the control unit 30 writes the target data into the media unit 20, and the data access response can indicate whether the target data writing was successful or failed.

[0076] In this embodiment, the storage component 10 supports the processing of serial optical signals and is capable of receiving and processing serial optical signals (which carry data access instructions). Within the storage component 10, the control unit 30 is capable of performing serial-to-parallel conversion and photoelectric conversion, converting the serial optical signal into a parallel electrical signal, and processing the parallel electrical signal (i.e., processing the data access instructions).

[0077] When the second optical signal is a serial optical signal, the control unit 30 can convert the second optical signal into a third electrical signal through serial-to-parallel conversion and photoelectric conversion. The third electrical signal is a parallel electrical signal.

[0078] This application does not limit the order of serial-to-parallel conversion and photoelectric conversion performed by the control unit 30 when converting the second optical signal into a third electrical signal. For example, the control unit 30 may first perform serial-to-parallel conversion on the second optical signal, converting it into a parallel optical signal; after obtaining the parallel optical signal, the control unit 30 may perform photoelectric conversion on the parallel optical signal, converting it into a parallel electrical signal (i.e., the third electrical signal). Alternatively, the control unit 30 may first perform photoelectric conversion on the second optical signal, converting it into a serial electrical signal; after obtaining the serial electrical signal, the control unit 30 may perform serial-to-parallel conversion on the serial electrical signal, converting it into a parallel electrical signal (i.e., the third electrical signal).

[0079] The storage component 10 supports the transmission of serial optical signals, capable of converting internally generated parallel electrical signals into serial optical signals and transmitting them. Within the storage component 10, the control unit 30 is capable of performing serial-to-parallel conversion and photoelectric conversion, converting parallel electrical signals into serial optical signals, and transmitting these serial optical signals via optical receiver.

[0080] When the second electrical signal is a parallel electrical signal, the control unit 30 can convert the second electrical signal into a first optical signal through serial-to-parallel conversion and photoelectric conversion. The first optical signal is a serial optical signal.

[0081] This application does not limit the order of serial-to-parallel conversion and photoelectric conversion performed by the control unit 30 when converting the second electrical signal into the first optical signal. For example, the control unit 30 may first perform serial-to-parallel conversion on the second electrical signal, converting it into a serial electrical signal; after obtaining the serial electrical signal, the control unit 30 may perform photoelectric conversion on the serial electrical signal, converting it into a serial optical signal (i.e., the first optical signal). Alternatively, the control unit 30 may first perform photoelectric conversion on the second electrical signal, converting it into a parallel optical signal; after obtaining the parallel optical signal, the control unit 30 may perform serial-to-parallel conversion on the parallel optical signal, converting it into a serial optical signal (i.e., the first optical signal).

[0082] The high speed of the optical signal (such as the second optical signal) ensures efficient interaction between the storage component 10 and the outside world. Inside the storage component 10, the control unit 30 converts the serial, high-speed optical signal into a parallel electrical signal. Processing this parallel electrical signal ensures efficient processing of data access commands carried in the optical signal from the outside, enabling a rapid response to the data access command. The control unit 30 can also convert the internally generated electrical signal carrying the data access response into a serial, high-speed optical signal and transmit it to promptly notify the outside world of the result of accessing the target data.

[0083] The relative positions of the control unit 30 and the media unit 20 are not limited in this embodiment. Several deployment methods of the control unit 30 and the media unit 20 are listed below.

[0084] Deployment Method 1: As shown in Figure 5A, this is a schematic diagram illustrating the relative positions of a control unit 30 and a media unit 20 according to an embodiment of this application. In Figure 5A, the control unit 30 can be located below or above multiple media units 20, and stacked together with the multiple media units 20.

[0085] The control unit 30 is connected to the dielectric unit 20. For example, the control unit 30 can be connected to the dielectric unit 20 via hybrid bonding. Another example is that the control unit 30 is connected to the dielectric unit 20 via through-silicon vias (TSVs). TVS is a technology that allows vertical interconnection of silicon wafers (or chips). Yet another example is that the control unit 30 can be connected to the dielectric unit 20 via wire bonding. Wire bonding refers to using metal wires (gold wire, aluminum wire, etc.) and employing thermo-pressing or ultrasonic energy to complete the internal interconnection of solid-state circuits in microelectronic devices. The above are only two possible connection methods; the embodiments of this application do not limit the connection method between dielectric units 20.

[0086] Deployment Method Two: As shown in Figure 5B, this is a schematic diagram illustrating the relative positions of a control unit 30 and a media unit 20 according to an embodiment of this application. In Figure 5A, the control unit 30 and the plurality of media units 20 are arranged side by side, meaning that the control unit 30 and one of the media units 20 are located in the same plane. The control unit 30 is connected to the media unit 20. Similarly, this embodiment of the application does not limit the connection method between the media units 20 in this deployment method.

[0087] The structure of the control unit 30 will be described below. As shown in Figure 6, which is a schematic diagram of the structure of the control unit 30 provided in the embodiment of this application, from a logical point of view, the control unit 30 includes control circuit logic 310 and conversion circuit logic 320.

[0088] 1. Logic 320 of the conversion circuit.

[0089] The conversion circuit logic 320 is used to implement photoelectric conversion. The conversion circuit logic 320 can convert an external optical signal (such as a second optical signal carrying a data access command) into an electrical signal (such as a third electrical signal carrying a data access command), and transmit the third electrical signal to the control circuit logic 310 so that the control circuit logic 310 can process the data access command. The conversion circuit logic 320 can also convert an electrical signal (such as a second electrical signal carrying a data access response) obtained from the control circuit logic 310 into an optical signal (such as a first optical signal carrying a data access response).

[0090] In this embodiment, the conversion circuit logic 320 also has serial-to-parallel conversion capability. The conversion circuit logic 320 performs serial-to-parallel conversion and photoelectric conversion on the received serial optical signal (such as the second optical signal), converting the serial optical signal into a parallel electrical signal (such as the third electrical signal), and then sends the parallel electrical signal to the control circuit logic 310. The method by which the conversion circuit logic 320 performs serial-to-parallel conversion and photoelectric conversion on the serial optical signal can be found in the relevant description of the aforementioned control unit 30, and will not be repeated here. The conversion circuit logic 320 also performs serial-to-parallel conversion and photoelectric conversion on the parallel electrical signal (such as the second electrical signal) generated by the control circuit logic 310, converting the parallel electrical signal into a serial optical signal (such as the first optical signal), and then sends the serial optical signal to the outside. The method by which the conversion circuit logic 320 performs serial-to-parallel conversion and photoelectric conversion on the parallel electrical signal can be found in the relevant description of the aforementioned control unit 30, and will not be repeated here.

[0091] As shown in Figure 6, from a logical perspective, the conversion circuit logic 320 includes photoelectric conversion circuit logic 321 and serial-to-parallel conversion circuit logic 322.

[0092] The photoelectric conversion circuit logic 321 has a photoelectric conversion function. The photoelectric conversion circuit logic 321 can convert optical signals into electrical signals, such as converting a second optical signal into a third electrical signal, and can also convert electrical signals into optical signals, such as converting a second electrical signal into a first optical signal, and transmit the electrical signals to the control circuit logic 310.

[0093] For example, photoelectric conversion circuit logic 321 can receive a second electrical signal carrying a data access response from control circuit logic 310 and convert the second electrical signal into a first optical signal. Photoelectric conversion circuit logic 321 transmits this first optical signal to optical interface 50, which receives the first optical signal and sends it to an external source (such as a processor). Photoelectric conversion control circuit logic 310 can obtain a second optical signal carrying a data access command from optical interface 50, convert the second optical signal into a third electrical signal, and transmit the third electrical signal to control circuit logic 310.

[0094] When the storage component 10 supports the processing and transmission of serial optical signals, the storage component 10 may also include serial-to-parallel conversion circuit logic 322.

[0095] The serial-to-parallel conversion circuit logic 322 has a serial-to-parallel conversion function. The serial-to-parallel conversion circuit logic 322 can convert serial signals into parallel signals, or parallel signals into serial signals.

[0096] For example, serial-to-parallel conversion circuit logic 322 receives a serial optical signal (i.e., the second optical signal) carrying a data access command from optical interface 50. Serial-to-parallel conversion circuit logic 322 converts the serial optical signal into a parallel optical signal; it then transmits the parallel optical signal to photoelectric conversion circuit logic 321. Photoelectric conversion circuit logic 321 converts the parallel optical signal into a parallel electrical signal (i.e., the third electrical signal), and transmits the parallel electrical signal to control circuit logic 310.

[0097] The photoelectric conversion circuit logic 321 receives a parallel electrical signal (i.e., the second electrical signal) carrying a data access response from the control circuit logic 310, and converts the parallel electrical signal into a parallel optical signal. The photoelectric conversion circuit logic 321 transmits the parallel optical signal to the serial-to-parallel conversion circuit logic 322. The serial-to-parallel conversion circuit logic 322 converts the parallel optical signal into a serial optical signal (i.e., the first optical signal) carrying a data access response, and sends the serial optical signal through the optical interface 50.

[0098] For another example, the photoelectric conversion circuit logic 321 receives a serial optical signal (i.e., the second optical signal) carrying a data access command from the optical interface 50. The photoelectric conversion circuit logic 321 converts the serial optical signal into a serial electrical signal; and transmits the serial electrical signal to the serial-to-parallel conversion circuit logic 322. The serial-to-parallel conversion circuit logic 322 converts the serial electrical signal into a parallel electrical signal (i.e., the third electrical signal), and transmits the parallel electrical signal to the control circuit logic 310.

[0099] The serial-to-parallel conversion circuit logic 322 receives a parallel electrical signal (i.e., the second electrical signal) carrying a data access response from the control circuit logic 310, and converts the parallel electrical signal into a serial electrical signal. The serial-to-parallel conversion circuit logic 322 transmits the serial electrical signal to the photoelectric conversion circuit logic 321. The photoelectric conversion circuit logic 321 converts the serial electrical signal into a serial optical signal (i.e., the first optical signal) carrying a data access response, and sends the serial optical signal through the optical interface 50.

[0100] In this embodiment, the control unit 30 may be configured with one or more photoelectric conversion circuit logic 321s. When multiple photoelectric conversion circuit logic 321s are configured, the control unit 30 can be equipped with multiple optical interfaces 50, which can synchronously receive multiple optical signals (such as multiple serial optical signals), further improving the bandwidth (i.e., the data transmission speed and width) of the storage component 10. Currently, optical signal-based serializers / deserializers (Serdes) can achieve a data transmission rate of 3.2 tera bytes per second (Tbps), meaning that the storage component 10 can present a data transmission rate of at least 3.2 Tbps. With the evolution of optical signal Serdes, the storage component 10 will achieve even higher data transmission rates and bandwidths.

[0101] 2. Control circuit logic 310.

[0102] The control circuit logic 310 is connected to the medium unit 20 and controls the medium unit 20. Here, "control" can be understood as managing the data on the medium unit 20. The control circuit logic 310 can access the data on the medium unit 20, such as reading data from the medium unit 20 or writing data to the medium unit 20. The control circuit logic 310 can also perform error detection or correction on the data on the medium unit 20; that is, the control circuit logic 310 can perform error checking and correcting (ECC). Of course, the control circuit logic 310 can also have other functions; only some of the "control" operations are listed here.

[0103] In this embodiment, the control circuit logic 310 is an "electrical"-based module. The control circuit logic 310 can process a third electrical signal carrying a data access instruction, obtained from the photoelectric conversion circuit logic 321 or the serial conversion circuit logic 320, and access the target data on the medium unit 20 according to the data access instruction. The control circuit logic 310 can also receive a first electrical signal carrying a data access instruction from the electrical interface 40 and access the target data on the medium unit 20 according to the data access instruction. When the data access instruction indicates reading the target data, the control circuit logic 310 reads the target data from the medium unit 20. When the data access instruction indicates writing the target data, the control circuit logic 310 writes the target data to the medium unit 20.

[0104] The control circuit logic 310 can also generate a response to the data access command (i.e., a data access response), which is carried in a second electrical signal. The control circuit logic 310 can send the second electrical signal carrying the data access response to the photoelectric conversion circuit logic 321 or the serial-to-parallel conversion circuit logic 322.

[0105] It should be noted that the division of modules (such as control unit 30, conversion circuit logic 320, and control circuit logic 310) in the embodiments of this application is illustrative and only represents one logical function division. In actual implementation, there may be other division methods. The functional modules in the embodiments of this application can be integrated into one module, or each module can exist physically separately, or two or more modules can be integrated into one module. For example, serial-to-parallel conversion circuit logic 322 can be integrated with photoelectric conversion control circuit logic 310 into one module. Another example is that photoelectric conversion circuit logic 321 and control circuit logic 310 are integrated together. Yet another example is that serial-to-parallel conversion circuit logic 322 and control circuit logic 310 are integrated together. The integrated modules described above can be implemented in hardware or as software functional modules (such as computer program instructions that can run on hardware).

[0106] As shown in Figure 1, the storage component 10 can be applied to various memories 60. Figure 7 shows a schematic diagram of the structure of a memory 60 provided in an embodiment of this application. The memory 60 includes a power management module 70 and the aforementioned storage component 10. The structure and function of the storage component 10 can be found in the foregoing content and will not be repeated here.

[0107] The power management module 70 manages the power supply to the storage component 10. This embodiment does not limit the method by which the power management module 70 manages the power supply to the storage component 10. For example, the power supply signal first passes through the power management module 70, which performs voltage conversion on the signal, such as converting high voltage to low voltage or low voltage to high voltage (e.g., converting AC voltage to DC voltage or vice versa). The converted power supply signal is then transmitted to the storage component 10 (control unit 30) through the electrical interface 40. Furthermore, the power management module 70 can control whether power is needed to the storage component 10. When it is determined that no power is needed to the storage component 10, the power management module 70 blocks the power supply signal. When it is determined that power needs to be restored to the storage component 10, the power management module 70 transmits the power supply signal to the storage component 10.

[0108] It should be noted that the memory 60 may also include other modules, such as a basic management circuit. This basic management circuit performs basic management operations on the memory component 10, including but not limited to: reset, signal noise filtering, and fault detection of the memory component 10. The basic management circuit can send management signals to the electrical interface 40 of the memory component 10. These management signals are carried out as electrical signals and are used to indicate the execution of basic management operations.

[0109] The embodiments of this application do not limit the specific form of the memory 60. For example, the memory 60 can be deployed as memory in a computing device. Alternatively, the memory 60 can be deployed as persistent storage 60 in a computing device.

[0110] When the storage device 60 is used as RAM, it can exist in the form of a RAM module or a RAM disk. The following sections will explain these two forms respectively:

[0111] Type 1: Memory module.

[0112] Figure 8A shows a structural entity diagram of a memory module provided in an embodiment of this application, in which one or more storage components 10 are disposed. For example, eight storage components 10 can be disposed on the memory module.

[0113] Any storage component 10, such as the optical interface 50 within the storage component 10, can be connected to the processor in the computing device containing the memory module via optical fiber. It can interact with the processor based on optical signals, such as receiving data access commands carried by a second optical signal from the processor, or sending data access responses carried by a first optical signal to the processor. The storage component 10 can also interact with the processor via an electrical interface 40, such as receiving data access commands carried by a first electrical signal from the processor.

[0114] When a memory module has multiple storage components 10, each of these storage components 10 can interact with the processor in the computing device. For example, if a memory module can have eight storage components 10, and each storage component 10 can achieve a bandwidth of 400 GB / s, then the total bandwidth of the eight storage components 10 is 3.2 TB / s.

[0115] The memory module also includes a basic management circuit, which is mainly responsible for the basic management of the memory module, such as power-on, initialization, reset, and memory module testing.

[0116] Type 2: RAM disk.

[0117] Figure 8B shows a structural diagram of a memory disk provided in an embodiment of this application. Unlike memory modules, which are typically directly connected to the motherboard of a computing device, the memory disk is pluggable and can be flexibly connected to or disconnected from the computing device. The memory disk can exist in the form of a peripheral component interconnect express (PCIe) card, meaning that the computing device has a PCIe interface, and the memory disk can be inserted into this PCIe interface.

[0118] The structure of the memory disk is similar to that of a memory module, meaning that multiple storage components 10 can be installed in the memory disk. The memory disk also includes basic management circuitry, which handles the basic management of the memory module. Because the memory disk is removable, it is not limited by the size of the motherboard on the computing device, allowing for the deployment of a larger number of storage components 10, such as 16 storage components 10. The more storage components 10 there are, the greater the bandwidth that the memory disk can achieve.

[0119] The above description only uses memory modules and memory disks as examples. In fact, the memory 60 can also take other physical forms, such as memory modules, AIC (All In Card) cards, U.2 memory, E1 memory, and E3 memory.

[0120] As shown in Figure 9, a computing device 900 provided in an embodiment of this application includes a memory 920 and a processor 910. Optionally, it also includes a communication interface 930.

[0121] The processor 910 and the memory 920 can be connected via optical fiber. The information transmitted between the processor 910 and the memory 920 can be carried in optical signals. For example, the processor 910 can transmit an optical signal carrying a data access command, which can be a serial optical signal, to the memory 920. Alternatively, the memory 920 can transmit an optical signal carrying a data access response to the processor 910.

[0122] The processor 910 can be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or a programmable logic device (PLD). The PLD can be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), a data processing unit (DPU), a system on chip (SoC), or any combination thereof.

[0123] The memory 920 includes one or more storage components 10 as shown in FIG1. ​​The memory 920 may be the main memory in the computing device, that is, the memory 920 that interacts directly with the processor 910. The memory 920 may be a persistent storage memory within the computing device, and the memory 920 may be a hard disk.

[0124] The communication interface 930 is used to interact with devices outside the computing device. The communication interface 930 receives messages sent by external devices and transmits the received messages to the processor 910 so that the processor 910 can process the messages. The communication interface 930 can also send messages to external devices under the instruction of the processor 910.

[0125] This application does not limit the connection method between the processor 910 and the communication interface 930. For example, the processor 910 and the communication interface 930 can be connected via a system bus. The system bus can be a PCIe line, or a bus using compute express link (CXL), unified bus (Ubus or UB), cache coherent interconnect for accelerators (CCIX), or other protocols. If connected via a system bus, the communication interface 930 and the processor 910 interact via electrical signals; that is, the information exchanged between the communication interface 930 and the processor 910 is carried in electrical signals. Alternatively, the processor 910 and the communication interface 930 can be connected via optical fiber. If connected via optical fiber, the communication interface 930 and the processor 910 interact via optical signals; that is, the information exchanged between the communication interface 930 and the processor 910 is carried in optical signals.

[0126] In this embodiment, the media units 20 inside the storage component 10 are stacked together using hybrid bonding, which significantly increases the internal bandwidth of the storage component 10, i.e., increases the data transmission rate and bandwidth, and increases the number of bits (or bits) that can be transmitted per unit time. The control unit 30 supports photoelectric conversion and serial-to-parallel conversion, enabling interaction with external devices via optical signals. Since optical signals have a higher transmission rate, this provides a foundation for the storage component 10 to exhibit high bandwidth to external devices (such as processors). Based on this, the high internal bandwidth formed by hybrid bonding within the storage component 10 is fully realized, allowing the storage component 10 to truly achieve high bandwidth.

[0127] Furthermore, in this embodiment, the medium unit 20 and the control unit 30 can also be connected via hybrid bonding, which improves the efficiency of information transmission between them. The control unit 30 contains circuit logic for photoelectric conversion and serial-to-parallel conversion. The more photoelectric conversion circuit logic 321 and optical interfaces 50 present in the control unit 30, the higher the efficiency of optical signal transmission between the storage component 10 and external devices, further increasing the bandwidth of the storage component 10.

[0128] Compared to common double data rate (DDR) memory chips, a single DDR memory chip can achieve a data transfer rate of 6400 Mbps. Assuming a memory module has eight DDR memory chips, its bandwidth would be approximately 51.2 GB / s. If the memory module is configured with eight of the storage components 10 provided in this embodiment, the total bandwidth of the memory module can reach 3.2 TB / s or even higher. Therefore, the memory module with the storage components 10 provided in this embodiment has a significantly greater bandwidth.

[0129] Based on the aforementioned storage component 10, this application embodiment provides a data access method, which can be executed by the storage component 10 (such as the control unit 30 in the storage component 10). Figure 10 illustrates a data access method provided by this application embodiment, the method comprising:

[0130] Step 1000: The control unit 30 receives power from the storage component 10 through the electrical interface 40.

[0131] Through step 1000, the control unit 30 and the media unit 20 in the storage component 10 can operate normally.

[0132] Step 1001: Control unit 30 receives a data access instruction from an external source (such as a processor) for accessing the target data.

[0133] The data access instruction indicates whether to read or write target data. This application embodiment does not limit the manner in which the control unit 30 receives the data access instruction. For example, the control unit may receive a second optical signal carrying the data access instruction via the optical interface 50; or, for example, the control unit 30 may receive a first electrical signal carrying the data access instruction via the electrical interface 40.

[0134] Step 1002: Control unit 30 accesses target data on media unit 20.

[0135] When a data access command is carried on a second optical signal, the control unit 30 needs to convert the second optical signal into a third electrical signal carrying the data access command before executing step 1002. Then, step 1002 is executed, and the control unit 30 accesses the target data on the medium unit 20 based on this third electrical signal. The method by which the control unit 30 converts the second optical signal into the third optical signal can be found in the foregoing description of the control unit 30, and will not be repeated here.

[0136] If the data access command instructs that target data be read, the control unit 30 reads the target data from the media unit 20. If the data access command instructs that target data be written, the control unit 30 writes the target data into the media unit 20.

[0137] When a data access command is carried on a first electrical signal, the control unit 30 executes step 1002 by accessing the target data on the medium unit 20 based on the first electrical signal. The method by which the control unit 30 accesses the target data on the medium unit 20 based on the first electrical signal is similar to the method by which the control unit 30 accesses the target data on the medium unit 20 based on the third electrical signal; for details, please refer to the foregoing description, which will not be repeated here.

[0138] Step 1003: The control unit 30 generates a data access response, which indicates the result of the control unit 30 accessing the target data.

[0139] When a data access command instructs the reading of target data, the result of the control unit 30 accessing the target data is the target data itself; that is, the data access response carries the target data. When a data access command instructs the writing of target data, the result of the control unit 30 accessing the target data is either a successful write or a failed write; that is, the data access response indicates either a successful write or a failed write.

[0140] Step 1004: The control unit 30 sends a first optical signal carrying a data access response through the optical interface 50.

[0141] Since the control unit 30 controls the medium unit 20 based on electrical signals, the data access response initially generated by the control unit 30 carries the second electrical signal. Before executing step 1004, the control unit 30 converts the second electrical signal into a first optical signal. The method of converting the second electrical signal into the first optical signal can be found in the foregoing description, and will not be repeated here.

[0142] The descriptions of the processes corresponding to the above-mentioned figures each have their own emphasis. For parts of a process that are not described in detail, please refer to the relevant descriptions of other processes.

[0143] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or modules may be electrical, mechanical, or other forms.

[0144] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0145] The above description is merely a specific embodiment of the present invention. Those skilled in the art can conceive of variations or substitutions based on the specific embodiments provided by the present invention, and all such variations or substitutions should be covered within the scope of protection of the present invention.

Claims

1. A memory assembly, comprising: The storage component includes an optical interface, an electrical interface, a control unit, and a media unit. The media unit includes multiple media dies. The control unit and the media unit are connected using a hybrid bonding method. The control unit is configured to receive power from the storage component via the electrical interface; The control unit is also configured to receive data access instructions from an external source to access target data on the medium unit; and to send a first optical signal carrying a data access response through the optical interface, the data access response indicating the result of the control unit accessing the target data.

2. The assembly of claim 1, wherein, The control unit is used for: Receive a second optical signal carrying the data access command through the optical interface; or The first electrical signal carrying the data access instruction is received through the electrical interface.

3. The assembly of claim 1 or 2, wherein, The storage component includes a plurality of media units, which are connected in a hybrid bonding manner.

4. The assembly of any one of claims 1 to 3, wherein, The control unit includes switching circuit logic and control circuit logic; The control circuit logic is used to generate a second electrical signal after accessing the target data in the medium unit, the second electrical signal carrying the data access response; The conversion circuit logic is used to convert the second electrical signal into the first optical signal.

5. The component as claimed in claim 4, characterized in that, The conversion circuit logic is further configured to: convert the second optical signal into a third electrical signal, wherein the third electrical signal carries the data access instruction; The control circuit logic is also used to access the target data on the medium unit according to the third electrical signal.

6. The assembly of claim 4, wherein, The second electrical signal is a parallel electrical signal, and the first optical signal is a serial optical signal.

7. The assembly of claim 5, wherein, The second optical signal is a serial optical signal, and the third electrical signal is a parallel electrical signal.

8. A memory, comprising: The memory includes a power management module and a storage component. The storage component includes an optical interface, an electrical interface, a control unit, and a media unit. The media unit includes multiple media dies. The control unit and the media unit are connected using a hybrid bonding method. The power management module is used to: manage the power supply to the storage component; The control unit is configured to: receive power from the storage component via the electrical interface; The control unit is further configured to: receive a data access command from an external source to access target data on the medium unit; and send a first optical signal carrying a data access response through the optical interface, the data access response indicating the result of the control unit accessing the target data.

9. The memory of claim 8, wherein, The control unit is used for: Receive a second optical signal carrying the data access command through the optical interface; or The first electrical signal carrying the data access instruction is received through the electrical interface.

10. The memory of claim 8 or 9, wherein, The storage component includes a plurality of media units, which are connected in a hybrid bonding manner.

11. The memory of any one of claims 8 to 10, wherein, The control unit includes switching circuit logic and control circuit logic; The control circuit logic is used to: after accessing the target data in the medium unit, generate a second electrical signal, the second electrical signal carrying the data access response; The conversion circuit logic is used to convert the second electrical signal into the first optical signal.

12. A computing device, comprising: The computing device includes a processor and a storage component. The storage component includes an optical interface, an electrical interface, a control unit, and a media unit. The media unit includes multiple media dies. The control unit and the media unit are connected using a hybrid bonding method. The control unit is configured to receive power from the storage component via the electrical interface; The processor is used to send data access instructions to the memory; The control unit is further configured to receive the data access instruction, access the target data on the medium unit, and send a first optical signal carrying a data access response through the optical interface, the data access response indicating the result of the control unit accessing the target data.

13. The computing device of claim 12, wherein, The control unit is used for: Receive a second optical signal carrying the data access command through the optical interface; or The first electrical signal carrying the data access instruction is received through the electrical interface.

14. The computing device of either of claims 12 or 13, wherein, The storage component includes a plurality of media units, which are connected in a hybrid bonding manner.

15. The computing device of any of claims 12-14, wherein, The control unit includes switching circuit logic and control circuit logic; The control circuit logic is used to: after accessing the target data in the medium unit, generate a second electrical signal, the second electrical signal carrying the data access response; The conversion circuit logic is used to convert the second electrical signal into the first optical signal.

16. A data access method, characterized by, The method is applied to a storage component, the storage component including an optical interface, an electrical interface, a control unit, and a media unit, the media unit including multiple media dies, and the control unit and the media unit being connected using a hybrid bonding method; the method includes: The control unit receives power from the storage component via the electrical interface; The control unit receives a data access command from an external source to access the target data in the medium unit; and sends a first optical signal carrying a data access response through the optical interface, the data access response indicating the result of the control unit accessing the target data.

17. The method of claim 16, wherein, The control unit receives data access commands from external sources, including: The control unit receives a second optical signal carrying the data access command via the optical interface; or The control unit receives a first electrical signal carrying the data access command through the electrical interface.

18. The method of claim 16 or 17, wherein, The storage component includes a plurality of media units, which are connected in a hybrid bonding manner.

19. The method of any one of claims 16 to 18, wherein, The control unit includes conversion circuit logic and control circuit logic; the control unit transmits a first optical signal carrying a data access response through the optical interface, including: After the control circuit logic accesses the target data in the medium unit, it generates a second electrical signal, which carries the data access response. The conversion circuit logic converts the second electrical signal into the first optical signal.

20. The method of claim 19, wherein, The control unit receives a second optical signal carrying the data access command, including: The conversion circuit logic converts the second optical signal into a third electrical signal, and the third electrical signal carries the data access instruction; The control circuit logic accesses the target data in the medium unit according to the third electrical signal.

21. The method of claim 19, wherein, The second electrical signal is a parallel electrical signal, and the first optical signal is a serial optical signal.

22. The method of claim 20, wherein, The second optical signal is a serial optical signal, and the third electrical signal is a parallel electrical signal.