Power supply method, power supply circuit, audio apparatus, chip, and electronic device

Abstract

The present application relates to the technical field of audio power amplifiers, and discloses a power supply method and circuit, an audio apparatus, a chip, and an electronic device. The method comprises: generating a first flag signal on the basis of an audio input signal, a step-down threshold, and a corresponding step-down hysteresis threshold; on the basis of the first flag signal, determining whether same indicates a step-down, and if the first flag signal indicates a step-down, generating a step-down control signal; and starting a step-down mode on the basis of the step-down control signal, using a step-down charge pump to reduce the power supply voltage of a power output stage circuit in an audio power amplifier from a first power supply voltage to a second power supply voltage, and outputting the second power supply voltage to supply power to the power output stage circuit, wherein the second power supply voltage is lower than the power supply voltage of the audio power amplifier.

Description

Power supply methods, power supply circuits, audio devices, chips and electronic devices

[0001] This application claims priority to Chinese Patent Application No. 202411660372.7, filed on November 19, 2024, entitled "Power Supply Method, Power Supply Circuit, Audio Device, Chip and Electronic Equipment", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of audio power amplifier technology, and in particular to a power supply method, power supply circuit, audio device, chip, and electronic device. Background Technology

[0003] As portable devices such as smartphones demand increasingly higher levels of static and dynamic power consumption, audio amplifiers also require lower static and dynamic power consumption. Audio amplifiers include a power output stage circuit, responsible for converting the amplified audio signal into sufficient power to drive the speakers. The energy distribution of audio signals is mainly concentrated in the mid-to-low frequency range. Since low-frequency signals have a larger amplitude, providing a higher supply voltage to the power output stage circuit can prevent compression of low-frequency signals, thereby improving the dynamic range of the low-frequency range and optimizing the audio output effect.

[0004] However, when the amplitude of the input audio signal is small and there is no need to increase the dynamic range of the audio signal, if the power output stage circuit has a high supply voltage, it will result in high power loss of the audio amplifier, i.e., high power consumption. Summary of the Invention

[0005] This application provides a power supply method, a power supply circuit, an audio device, a chip, and an electronic device.

[0006] In a first aspect, embodiments of this application provide a power supply method, the method comprising: generating a first flag signal based on an audio input signal, a buck threshold, and a corresponding buck hysteresis threshold; determining whether bucking is indicated based on the first flag signal; if the first flag signal indicates bucking, generating a buck control signal; and, based on the buck control signal, activating a buck mode, using a buck charge pump to reduce the power supply voltage of the power output stage circuit in the audio power amplifier from a first power supply voltage to a second power supply voltage, and outputting the second power supply voltage to power the power output stage circuit, wherein the second power supply voltage is lower than the power supply voltage of the power source. The buck threshold is less than the buck hysteresis threshold.

[0007] It is understood that the aforementioned first supply voltage is greater than or equal to the power supply voltage of the audio amplifier, such as being equal to that power supply voltage. In this case, the power supply circuit can switch the power supply mode of the power output stage circuit from pass-through mode to buck mode, thereby reducing the supply voltage of the power output stage circuit from the first supply voltage to the second supply voltage. In this way, by reducing the supply voltage of the power output stage circuit, the power consumption of the power output stage circuit can be reduced, thereby reducing the overall power consumption of the device.

[0008] In one possible implementation, the step-down charge pump is a 1 / 2 charge pump, where the difference between the second supply voltage and half the supply voltage is less than or equal to a preset difference. In this case, the aforementioned step-down charge pump is a 1 / 2 charge pump.

[0009] In one possible implementation, the method further includes: if the first flag signal indicates no voltage reduction, enabling the pass-through mode, and the output power supply voltage supplies power to the power output stage circuit. In this case, there is no need to perform voltage reduction processing on the power supply voltage.

[0010] In one possible implementation, if the differential signal of the audio input signal is less than or equal to the buck threshold, the first flag signal is used to indicate bucking; if the differential signal of the audio input signal is greater than or equal to the buck hysteresis threshold corresponding to the buck threshold, the first flag signal is used to indicate no bucking.

[0011] In one possible implementation, the buck threshold is related to the power supply voltage, wherein the buck threshold and the corresponding buck hysteresis threshold increase with the increase of the power supply voltage, and the buck threshold and the corresponding buck hysteresis threshold decrease with the decrease of the power supply voltage.

[0012] In one possible implementation, the power supply voltage is within a first voltage range, and the buck threshold and buck hysteresis threshold correspond to the first voltage range; wherein, the first voltage range is one of a plurality of preset voltage ranges, each voltage range corresponds to a buck threshold and a buck hysteresis threshold, and the preset voltage range with a smaller minimum voltage value corresponds to a smaller buck threshold and a smaller buck hysteresis threshold.

[0013] In one possible implementation, reducing the supply voltage of the power output stage circuit in the audio amplifier from a first supply voltage to a second supply voltage includes: using a buck charge pump to reduce the supply voltage of the power output stage circuit from the first supply voltage to the second supply voltage.

[0014] Secondly, embodiments of this application provide a power supply circuit, comprising: a voltage detection circuit connected to the power supply of the power supply circuit, configured to generate a first flag signal based on the audio input signal of the audio amplifier, a buck threshold, and a corresponding buck hysteresis threshold, wherein the first flag signal is used to indicate whether bucking is required; a control circuit connected to the voltage detection circuit, configured to determine whether bucking is required based on the first flag signal, and if the first flag signal indicates bucking, generate a bucking control signal; and an adaptive buck circuit connected to the control circuit, configured to use a buck charge pump to reduce the power supply voltage of the power output stage circuit in the audio amplifier from a first power supply voltage to a second power supply voltage based on the bucking control signal, and output the second power supply voltage to power the power output stage circuit, wherein the second power supply voltage is lower than the power supply voltage of the power supply.

[0015] In one possible implementation, the voltage detection circuit includes: a voltage generation circuit and a signal detection circuit. The signal detection circuit includes a first comparator, a second comparator, and a logic circuit. One end of the voltage generation circuit is connected to a power supply, and the other end is connected to the negative input terminals of the first and second comparators. The output terminals of the first and second comparators are connected to the logic circuit. The voltage generation circuit is used to generate a buck threshold and a corresponding buck hysteresis threshold based on the power supply voltage. The first comparator is used to generate a first comparison value based on a first differential signal of the audio input signal and the buck threshold or buck hysteresis threshold. The second comparator is used to generate a second comparison value based on a second differential signal of the audio input signal and the buck threshold or buck hysteresis threshold. The logic circuit is used to compare the first comparison value and the second comparison value to generate a first flag signal.

[0016] In one possible implementation, the positive input terminals of the first and second comparators are respectively connected to the two input terminals of the first stage amplifier of the audio power amplifier; or, the positive input terminals of the first and second comparators are respectively connected to the two output terminals of the first stage amplifier of the audio power amplifier; or, the positive input terminals of the first and second comparators are respectively connected to the two input terminals of the second stage amplifier of the audio power amplifier; or, the positive input terminals of the first and second comparators are respectively connected to the two output terminals of the second stage amplifier of the audio power amplifier.

[0017] In one possible implementation, the voltage generating circuit includes a first resistor and a second resistor. One end of the first resistor is connected to the power supply, and the other end of the first resistor is connected to the voltage detection circuit and one end of the second resistor. The other end of the second resistor is grounded. The voltage circuit is used to divide the power supply voltage to obtain a step-down threshold or a step-down hysteresis threshold. The resistance value of the first resistor is (1-k)*R, the resistance value of the second resistor is k*R, and the step-down threshold is k times the power supply voltage.

[0018] In one possible implementation, the voltage generating circuit includes: a first resistor, a second resistor, an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a third resistor, a fourth resistor, and a fifth resistor. One end of the first resistor is connected to a power supply, and the other end of the first resistor is connected to one end of the second resistor and the positive input terminal of the operational amplifier circuit. The negative input terminal of the operational amplifier circuit is connected to one end of the third resistor and the source of the first transistor. The output terminal of the operational amplifier circuit is connected to the gate of the first transistor. The drain of the first transistor is connected to the gate and source of the second transistor and the gate of the third transistor. The drain of the second transistor is connected to the power supply, and the gate of the second transistor is connected to the gate of the third transistor. The drain of the third transistor is connected to the power supply, and the source of the third transistor is connected to one end of the fourth resistor. The other end of the fourth resistor is connected to one end of the fifth resistor. The other ends of the second, third, and fifth resistors are grounded. The voltage generating circuit is used to perform voltage division and regulation on the power supply voltage to obtain a step-down threshold or a step-down hysteresis threshold.

[0019] In one possible implementation, the adaptive buck circuit includes: a charge pump power transistor circuit, a flying capacitor, an output voltage detection circuit, and an undervoltage protection circuit. The charge pump power transistor circuit and the flying capacitor are connected in parallel. The first input terminal of the charge pump power transistor circuit is connected to the power supply, the second input terminal of the charge pump power transistor circuit is connected to the output terminal of the control circuit, the output terminal of the charge pump power transistor circuit is connected to one end of the output voltage detection circuit, the other end of the output voltage detection circuit is connected to one end of the undervoltage protection circuit, and the other end of the undervoltage protection circuit is connected to the control circuit. The charge pump power transistor circuit is used to regulate the power supply voltage according to a voltage regulation control signal to output a supply voltage. The voltage regulation control signal is used to control the switching state of the power transistor switch in the charge pump power transistor circuit to control the charging and / or discharging of the flying capacitor. The output voltage detection module is used to detect the supply voltage output by the charge pump power transistor circuit to obtain a detection voltage. The undervoltage protection circuit is used to compare the detection voltage and a reference voltage to obtain a clamping signal, which is used to clamp the supply voltage output by the charge pump power transistor circuit. The control circuit is used to generate a voltage regulation control signal based on the clamping signal and a first flag signal.

[0020] In one possible implementation, the charge pump power transistor circuit includes a first switch, a second switch, a third switch, and a fourth switch. One end of the first switch is connected to the upper plate of the input capacitor and the power supply, and the other end of the first switch is connected to one end of the fourth switch and the upper stage board of the flying capacitor. One end of the second switch is connected to the lower stage board of the flying capacitor and one end of the third switch, and the other end of the second switch is connected to the upper stage board of the output capacitor and the power output stage circuit. The other end of the third switch is connected to the lower plate of the input capacitor and grounded. The other end of the fourth switch is connected to the upper stage board of the output capacitor, and the lower stage board of the output capacitor is grounded.

[0021] In one possible implementation, the adaptive buck circuit is a 1 / 2 charge pump, the voltage regulation control signal is a buck control signal, and the clamping signal is used to clamp the supply voltage output by the charge pump power transistor circuit to a voltage between 1 / 2 times the supply voltage and the supply voltage. The charge pump power transistor circuit is used to control the first and second switches to turn on and the third and fourth switches to turn off according to the buck control signal, so as to control the flying capacitor to charge, making the voltage on the flying capacitor 1 / 2 times the supply voltage; and to control the first and second switches to turn off and the third and fourth switches to turn on, so as to control the flying capacitor to discharge, making the supply voltage output by the charge pump power transistor circuit the second supply voltage, and the second supply voltage is 1 / 2 times the supply voltage.

[0022] In one possible implementation, the voltage regulation control signal is a pass-through control signal, and the clamping signal is used to clamp the supply voltage output by the charge pump power transistor circuit to the power supply voltage. The charge pump power transistor circuit is used to control the first switch and the fourth switch to be turned on and the second switch and the third switch to be turned off according to the pass-through control signal, so as to control the supply voltage output by the charge pump power transistor circuit to be the power supply voltage.

[0023] In one possible implementation, the second supply voltage is equal to half the supply voltage minus the product of the target current and the target impedance, where the target current is the current flowing through the charge pump power transistor circuit, and the target impedance is the sum of the impedances of the fourth switch and the third switch.

[0024] Thirdly, embodiments of this application provide an audio device, which includes an audio power amplifier and a power supply circuit. The audio power amplifier includes a power output stage circuit, and the power supply circuit includes: a voltage detection circuit connected to the power supply of the power supply circuit, and generating a first flag signal based on the audio input signal of the audio power amplifier, a buck threshold, and a corresponding buck hysteresis threshold, wherein the first flag signal is used to indicate whether bucking is required; a control circuit connected to the voltage detection circuit, and generating a buck control signal if the first flag signal indicates bucking; and an adaptive buck circuit connected to the control circuit, and responding to the buck control signal by using a buck charge pump to reduce the power supply voltage of the power output stage circuit in the audio power amplifier from a first power supply voltage to a second power supply voltage, and outputting the second power supply voltage to power the power output stage circuit, wherein the second power supply voltage is lower than the power supply voltage of the power supply of the power supply circuit.

[0025] In one possible implementation, the step-down charge pump is a 1 / 2 charge pump, and the difference between the second supply voltage and 1 / 2 times the supply voltage is less than or equal to a preset difference.

[0026] In one possible implementation, the power output stage circuit includes a first H-bridge power transistor circuit and a second H-bridge power transistor circuit, and a switching circuit. The power output stage circuit is used to detect if the amplitude of the audio input signal is greater than a comparison threshold, control the switching circuit to turn on, control the first H-bridge power transistor circuit to input the audio input signal, and control the supply voltage of the first H-bridge power transistor circuit to a first supply voltage. The power output stage circuit is also used to detect if the amplitude of the audio input signal is less than or equal to a comparison threshold, control the switching circuit to turn off, control the second H-bridge power transistor circuit to input the audio input signal, and control the supply voltage of the second H-bridge power transistor circuit to a second supply voltage.

[0027] In one possible implementation, both the first H-bridge power transistor circuit and the second H-bridge power transistor circuit include four transistors; or, the first H-bridge power transistor circuit includes four transistors and the second H-bridge power transistor circuit includes two transistors.

[0028] In one possible implementation, the power output stage includes a third H-bridge power transistor circuit, wherein the power output stage circuit is used to detect that the amplitude of the audio input signal is less than or equal to a comparison threshold, control the third H-bridge power transistor circuit to input the audio input signal, and control the supply voltage of the third H-bridge power transistor circuit to be a second supply voltage.

[0029] Fourthly, embodiments of this application provide a chip, the chip including circuitry, the circuitry being used to implement the audio device as described in the third aspect above and any possible implementation thereof.

[0030] Fifthly, embodiments of this application provide an electronic device, which includes a chip and a speaker as described in the fourth aspect above, wherein the chip is used to drive the speaker to emit sound.

[0031] It is understandable that the beneficial effects of the second to fifth aspects mentioned above can be referred to the description of the first aspect, and will not be repeated here. Attached Figure Description

[0032] Figure 1A illustrates a scenario where a boost power supply provides power output voltage to a power output stage circuit, as provided in an embodiment of this application.

[0033] Figure 1B illustrates a scenario where a high-voltage power supply provides power to a power output stage circuit, according to an embodiment of this application.

[0034] Figure 2 is a schematic flowchart of a power supply method provided in an embodiment of this application;

[0035] Figure 3 is a flowchart illustrating a power supply method provided in an embodiment of this application;

[0036] Figure 4 is a schematic diagram of a power supply circuit 10 provided in an embodiment of this application;

[0037] Figure 5 is a structural schematic diagram of an audio device 100 provided in an embodiment of this application;

[0038] Figure 6 is a schematic diagram of the relevant structure of a voltage generation circuit 111 and a signal detection circuit 112 provided in an embodiment of this application;

[0039] Figure 7 is a schematic diagram of a rule for setting the voltage reduction threshold VTH according to an embodiment of this application;

[0040] Figure 8A is a schematic diagram of a voltage generation circuit 111 provided in an embodiment of this application;

[0041] Figure 8B is a schematic diagram of a voltage generation circuit 111 provided in an embodiment of this application;

[0042] Figure 9 is a schematic diagram of the relevant structure of an adaptive buck circuit provided in an embodiment of this application;

[0043] Figure 10A is a schematic diagram of a charge pump power transistor circuit 131 provided in an embodiment of this application;

[0044] Figure 10B is a schematic diagram of a charge pump power transistor circuit 131 provided in an embodiment of this application;

[0045] Figure 11 is a schematic diagram of the electrical structure of a power output stage provided in an embodiment of this application;

[0046] Figure 12 is a schematic diagram of a power output stage circuit provided in an embodiment of this application;

[0047] Figure 13 is a schematic diagram of a power output stage circuit provided in an embodiment of this application;

[0048] Figure 14 illustrates a block diagram of a system-on-a-chip (SoC) according to some embodiments of this application. Detailed Implementation

[0049] The illustrative embodiments of this application include, but are not limited to, power supply methods and circuits, audio devices, chips, and electronic devices.

[0050] First, the terminology used in the embodiments of this application will be introduced.

[0051] 1. Static power consumption, also known as leakage power consumption or standby power consumption, refers to the power consumed by an audio amplifier due to the static current in its internal circuitry when there is no signal input or output. Static power consumption is usually caused by leakage current of components, bias current, and other static current sources in the circuit.

[0052] 2. Dynamic power consumption refers to the power consumed by an audio amplifier when processing audio signals due to dynamic changes in the signal (such as amplitude and frequency). The magnitude of dynamic power consumption is related to factors such as the characteristics of the audio signal, the output power of the amplifier, and its efficiency.

[0053] 3. A charge pump, also known as a switched capacitor voltage converter, is an electronic device that uses the properties of capacitance to convert voltage. For example, a 1 / 2 charge pump, also called a step-down charge pump, can reduce the input voltage to half of its original voltage.

[0054] Referring to Figure 1A, a scenario in the related art where a boost power supply provides power to the power output stage circuit is illustrated. In this scenario, the boost power supply can be adjusted to either pass-through mode or boost mode depending on the amplitude of the audio signal. When the input audio signal amplitude is small and does not reach the set boost threshold, the boost power supply is adjusted to pass-through mode, and the power output stage circuit is directly powered by a power supply such as a battery. When the input audio signal increases and reaches or exceeds the boost threshold, the boost power supply is switched from pass-through mode to boost mode, boosting the voltage to the set value to provide greater output power to the audio amplifier. However, in the case of a small input audio signal amplitude, the power output stage circuit is in pass-through mode and directly powered by the power supply. When the output power is low, such as less than 0.28 watts (W), the power consumption is still relatively high.

[0055] Referring to Figure 1B, this illustrates a scenario where a high-voltage power supply is used to provide power to the power output stage circuit in the related art. For example, this scenario can be applied to Internet of Things (IoT) devices powered by two or more batteries. In this case, the power supply voltage of the audio amplifier is relatively high, such as 8.5V for two batteries or 12.5V for three batteries, resulting in a high quiescent current for the amplifier. Furthermore, when the amplitude of the dynamically input audio signal is small, the output power is low, such as less than 2W, leading to high power consumption in the power output stage.

[0056] As is known from the background art, when the amplitude of the input audio signal is small, if the supply voltage of the power output stage circuit in the audio amplifier is large, the power consumption of the audio amplifier will be large. For example, in the power supply scenarios shown in Figures 1A and 1B above, the power consumption of the audio amplifier is large when the amplitude of the input audio signal is small.

[0057] To address the aforementioned issues, this application provides a power supply method that employs an adaptive buck mechanism. Based on a set buck threshold and the corresponding buck hysteresis voltage, it determines whether bucking is necessary. If bucking is required, the supply voltage to the power output stage circuit in the audio amplifier is reduced. This reduces power loss in the power output stage circuit, such as lowering power consumption when the output power of the power output stage circuit is low.

[0058] In some embodiments, the aforementioned buck threshold can be varied in sync with the power supply voltage to further reduce power consumption at lower output power, thereby improving the overall efficiency of the audio amplifier.

[0059] In some embodiments, the power supply method provided in this application can be implemented by a power supply circuit, which can supply power to drive circuits such as audio amplifiers or motor drivers. The following embodiments primarily use the example of a power supply circuit supplying power to an audio amplifier to drive a speaker to produce sound to illustrate the power supply method and the power supply circuit.

[0060] It is understood that this application aims to provide a power supply circuit and power supply method that can reduce the power consumption of audio power amplifiers, improve the efficiency of small and medium-sized signals (i.e., small amplitude audio input signals) driving speakers, reduce power loss, and extend the service life of audio power amplifiers.

[0061] In some embodiments, the aforementioned power supply circuit can be applied to wearable devices such as watches or electronic devices such as IoT devices. It is understood that with technological advancements, wearable devices such as watches and IoT devices are developing towards functional integration, diversified interaction, and lightweight form factors, with their application scenarios continuously expanding. For wearable devices with limited space, battery capacity is lower, typically around 50mAh to 100mAh, requiring low-power design to ensure a longer battery life and meet users' needs for extended use. Therefore, this application proposes an adaptive buck method in wearable devices or IoT devices to reduce the power supply voltage of the audio amplifier's power output stage circuit, thereby reducing the audio amplifier's power consumption.

[0062] As an example, the electronic devices in this application are not limited to low-power IoT devices, but can also be open wearable stereo (OWS), true wireless stereo (TWS), etc.

[0063] Figure 2 shows a power supply method provided in an embodiment of this application. The main body executing the power supply method can be a power supply circuit connected to an audio power amplifier. The method includes the following steps:

[0064] S201: Generate a first flag signal based on the audio input signal of the audio amplifier, the buck threshold, and the corresponding buck hysteresis threshold. The first flag signal indicates whether bucking is enabled, and the buck threshold is related to the power supply voltage of the audio amplifier.

[0065] In some embodiments, if the voltage value of the audio input signal is less than or equal to the buck threshold, the first flag signal is used to indicate bucking; in this case, the first flag signal can be called the buck flag signal. If the voltage value of the audio input signal is greater than or equal to the buck hysteresis threshold corresponding to the buck threshold, the first flag signal is used to indicate no bucking.

[0066] It is understood that there is a mapping relationship between the supply voltage and the output power of the power output stage circuit. The output power can be obtained by performing gain conversion on the supply voltage, and in this case, the output power is equal to the supply voltage multiplied by a set gain value. This application does not limit the specific value of this gain value; it can be set according to actual needs.

[0067] In some embodiments, the buck threshold and the corresponding buck hysteresis threshold increase with increasing power supply voltage, and the buck threshold and the corresponding buck hysteresis threshold decrease with decreasing power supply voltage.

[0068] In some embodiments, the power supply voltage is within a first voltage range, and the buck threshold and buck hysteresis threshold correspond to the first voltage range. The first voltage range is one of a plurality of preset voltage ranges, each voltage range corresponding to a buck threshold and a buck hysteresis threshold. Furthermore, the preset voltage range with a smaller minimum voltage value corresponds to a smaller buck threshold and a smaller buck hysteresis threshold.

[0069] As an example, the power supply voltage of an audio amplifier is the battery voltage (VBAT). The buck threshold changes synchronously with the VBAT supply voltage; for instance, a high VBAT results in a high buck threshold (denoted as VTH), and a low VBAT results in a low VTH. Similarly, the buck hysteresis threshold (denoted as VTH_HYS) corresponding to the buck threshold is determined in the same way as VTH, thus further saving power consumption. For example, within the VBAT voltage range, the value of VTH can be a fixed value, determined based on the minimum VBAT value within that voltage range.

[0070] S202: Determine whether to indicate a voltage reduction based on the first flag signal.

[0071] When the first indicator signal indicates a step-down, it means that the output power of the required power output stage circuit is relatively small, such as less than 2W.

[0072] S203: If the first flag signal indicates bucking, a buck control signal is generated. According to the buck control signal, the buck mode is activated, and a buck charge pump is used to reduce the power supply voltage of the power output stage circuit in the audio power amplifier from the first power supply voltage to the second power supply voltage. The second power supply voltage is then output to power the power output stage circuit, wherein the second power supply voltage is lower than the power supply voltage of the power supply.

[0073] In some embodiments, the second supply voltage is half of the first supply voltage, in which case the charge pump is a 1 / 2 charge pump. Furthermore, the first supply voltage can be a power supply voltage or a voltage lower than the power supply voltage; the following embodiments will use a power supply voltage as an example.

[0074] In some embodiments, the difference between the second supply voltage and half the supply voltage is less than or equal to a preset difference, such as a small value, like 0. For example, the second supply voltage can be half the supply voltage, in which case the preset difference is 0.

[0075] In some embodiments, the first supply voltage is greater than or equal to the power supply voltage, such as equal to the power supply voltage. In this case, the power supply circuit can switch the power supply mode of the power output stage circuit from a pass-through mode to a buck mode, thereby reducing the supply voltage of the power output stage circuit from the first supply voltage to the second supply voltage. Thus, by reducing the supply voltage of the power output stage circuit, the power consumption of the power output stage circuit can be reduced, thereby reducing the overall power consumption of the device.

[0076] In some embodiments, referring to FIG3, the power supply method provided in this application further includes the following step S204, which is the following step S204 after S202 shown in FIG2:

[0077] S204: If the first flag signal indicates no voltage reduction, a pass-through control signal is generated. Based on the pass-through control signal, the pass-through mode is enabled, and the output power supply voltage supplies power to the power output stage circuit.

[0078] In some embodiments, when the voltage value of the audio input signal is greater than or equal to the buck hysteresis threshold corresponding to the buck threshold, the first flag signal indicates no bucking and a pass-through control signal can be generated to enable the pass-through mode, that is, to switch the power supply mode of the power output stage circuit from buck mode to pass-through mode, so as to control the power supply voltage of the power output stage circuit to be the power supply voltage. At this time, the output power of the power output stage circuit is relatively large, such as greater than 2W.

[0079] In some embodiments, when the power supply mode switches from buck mode to through mode, through mode is activated after a preset counting time, and buck mode is maintained for the preset counting time, thus ensuring a smooth switching of the power supply voltage.

[0080] Furthermore, the power supply circuit provided in the embodiments of this application will be described.

[0081] Referring to Figure 4, a power supply circuit 10 is provided in an embodiment of this application. The power supply circuit 10 connects a power supply and an audio amplifier. Specifically, the power supply circuit 10 includes: a voltage detection circuit 11, a control circuit 12, and an adaptive buck circuit 13. The voltage detection circuit 11 is connected to the power supply (VBAT) of the power supply circuit 10 and is used to generate a first flag signal based on the audio input signal of the audio amplifier, a buck threshold, and a corresponding buck hysteresis threshold. The control circuit 12 is connected to the voltage detection circuit 11 and is used to determine whether to indicate bucking based on the first flag signal. If the first flag signal indicates bucking, a buck control signal is generated. The adaptive buck circuit 13 is connected to the control circuit 12 and is used to respond to the buck control signal by using a buck charge pump to reduce the supply voltage of the power output stage circuit in the audio amplifier from a first supply voltage to a second supply voltage, and output the second supply voltage to power the power output stage circuit, wherein the second supply voltage is lower than the power supply voltage.

[0082] Furthermore, as shown in Figure 4, the power output stage circuit of the audio amplifier can be connected to the adaptive buck circuit 13 and a speaker, so that the adaptive buck circuit 13 outputs a supply voltage, such as the second supply voltage described above, to the power output stage circuit, and controls the audio amplifier to drive the speaker to play the audio input signal based on the second supply voltage. Additionally, the audio amplifier can be connected to a power supply VABT and a signal input device (not shown in Figure 4) for inputting audio input signals (IN+ and IN-).

[0083] In some embodiments, the power supply in an IoT device can be one or more batteries, for example, two batteries have a power supply voltage of 8.5V, and three batteries have a power supply voltage of 12.5V.

[0084] Referring to FIG5, a schematic diagram of a driving scenario for an audio device 100 is shown. The scenario includes the audio device 100, which includes a power supply circuit 10 and an audio amplifier 20.

[0085] The audio amplifier 20 is used to amplify and process the audio input signal in order to drive the speaker to produce sound.

[0086] As shown in Figure 5, the audio amplifier 20 is used to drive a speaker to produce sound through an audio input signal. The audio amplifier 20 includes: a preamplifier, an integrator, a triangle wave generator, and two comparator power output stage circuits.

[0087] In some embodiments, the audio amplifier 20 may be a Class D amplifier or a Class AB amplifier.

[0088] In some embodiments, the preamplifier inputs the differential signals VOP0 and VON0 of the audio input signal to the positive input terminal (IN+) and the negative input terminal (IN-) respectively in a differential manner, performs preliminary amplification and preprocessing on the audio input signal such as volume control and tone adjustment, and outputs the differential signal VOP1 (positive output voltage) and the differential signal VON1 (negative output voltage).

[0089] The integrator is used to input differential signals VOP1 and VON1, performs noise shaping and other processing through integration, and outputs differential signals VOP2 and VON2.

[0090] A triangular wave generator is used to generate triangular wave signals.

[0091] The audio amplifier 20 contains two pulse width modulation (PWM) comparators, used to compare the amplified audio signal with a triangular wave signal to generate a PWM signal. The duty cycle of the PWM signal is proportional to the amplitude of the audio signal. For example, the audio amplifier 20 can preset a comparison threshold, such as a preset duty cycle. The audio amplifier 20 determines the amplitude of the audio input signal and its comparison threshold by comparing the duty cycle of the PWM signals of differential signals VOP2 and VON2 with the preset duty cycle. It can be understood that when the amplitude of the audio input signal is greater than the comparison threshold, the audio amplifier needs to provide a larger output power. When the amplitude of the audio input signal is less than or equal to the comparison threshold, the audio amplifier needs to provide a smaller output power.

[0092] The power output stage circuit receives the PWM signal from the PWM comparator and converts the PWM signal into a high-power audio output signal to drive the speaker by rapidly turning the power transistor switch (i.e., the switch) in the power output stage circuit on and off.

[0093] In some embodiments, to meet the requirements of low-capacity batteries in the electronic devices containing the audio devices or low power consumption of the overall system, the modules in Figure 5 typically employ a low bias current design. Furthermore, to reduce power consumption in the power output stage circuitry, the frequency of the triangular wave generator or the modulation frequency of the power amplifier loop, such as the preamplifier and integrator, are designed to be at a lower frequency.

[0094] As shown in Figure 5, the power supply circuit 10 provides power supply voltage to the power output stage circuit. Furthermore, the voltage detection module 11 in the power supply circuit 10 includes a voltage generation module 111 and a signal detection module 112.

[0095] One end of the voltage generation circuit 111 is connected to the power supply, and the other end of the voltage generation circuit 111 is connected to the signal detection module 112. Specifically, the voltage generation circuit 111 is used to generate a buck threshold VTH and a corresponding buck hysteresis threshold VTH_HYS based on the power supply voltage VBAT, and output the buck threshold VTH and the corresponding buck hysteresis threshold VTH_HYS to the signal detection module 112.

[0096] The first input terminal of the signal detection module 112 is used to receive a first differential signal, such as the differential signal VOP1 output by the preamplifier in the audio power amplifier 20. The second input terminal of the signal detection module 112 receives a second differential signal, such as the differential signal VON1 output by the preamplifier in the audio power amplifier 20, so that the output terminal of the signal detection module 112 outputs a first flag signal EN_STD.

[0097] In some embodiments, the first flag signal EN_STD is a buck flag signal indicating buck conversion, and EN_STD is equal to a first value such as 1; the first flag signal EN_STD is a pass-through flag signal indicating no buck conversion, and EN_STD is equal to a second value such as 0. It is understood that the values ​​of the first and second values ​​can be designed according to the actual circuit requirements, and this application does not impose specific limitations. For example, the first and second values ​​can also be 0 and 1 respectively.

[0098] Furthermore, control circuit 12 generates a voltage regulation control signal MD_CTRL in response to the first flag signal EN_STD output by signal detection circuit 112. Adaptive buck circuit 13 receives the voltage regulation control signal MD_CTRL and adjusts the output supply voltage PVDD in response to it, such as reducing the supply voltage PVDD from a first supply voltage to a second supply voltage. For example, the first supply voltage can be the power supply voltage VBAT, and the second supply voltage can be half of the power supply voltage VBAT.

[0099] Referring to Figure 6, a schematic diagram of the structure related to the voltage generation circuit 111 and the signal detection circuit 112 is shown. As shown in Figure 6, the signal detection circuit 112 includes a first comparator COMP1, a second comparator COMP2, and a logic circuit. The first input terminal of the first comparator COMP1 receives a first differential signal of the audio input signal, such as a differential signal VOP1. The second input terminal of the first comparator COMP1 receives a buck threshold or a buck hysteresis threshold. The output terminal of the first comparator COMP1 outputs a first comparison value. The first input terminal of the second comparator COMP2 receives a second differential signal of the audio input signal, such as a differential signal VON1. The second input terminal of the second comparator COMP2 receives a buck threshold or a buck hysteresis threshold. The output terminal of the second comparator COMP2 outputs a second comparison value. The first input terminal of the logic circuit receives the first comparison value output by the first comparator COMP1. The second input terminal of the logic circuit receives the second comparison value output by the second comparator COMP2. The output terminal of the logic circuit outputs a first flag signal EN_STD.

[0100] It can be understood that the first comparator COMP1 is used to generate a first comparison value based on the first differential signal of the audio input signal, such as the differential signal VOP1, and the buck threshold VTH or the corresponding buck hysteresis threshold VTH_HYS; the second comparator COMP2 is used to generate a second comparison value based on the second differential signal of the audio input signal, such as the differential signal VON1, and the buck threshold VTH or the corresponding buck hysteresis threshold VTH_HYS. It can also be understood that the voltage generation circuit is used to generate the buck threshold and the corresponding buck hysteresis threshold based on the power supply voltage; the logic circuit is used to compare the first comparison value with the second comparison value to generate a first flag signal EN_STD.

[0101] In some embodiments, if the differential signal VOP1 / differential signal VON1 is less than the buck threshold VTH, the comparator output is 0, and the first comparison value output by the first comparator COMP1 and the second comparison value output by the second comparator COMP2 are both 0. Furthermore, when the differential signal VOP1 / differential signal VON1 is less than the buck threshold VTH, the logic circuit controls the output of a first identification signal as a buck flag signal EN_STD. The buck flag signal EN_STD indicates that the audio input signal is less than the buck threshold VTH, which allows the adaptive buck circuit 13 to reduce the output supply voltage PVDD.

[0102] In some embodiments, the first terminal of the first comparator COMP1 is connected to the first terminal of the audio amplifier 20, and the first terminal of the second comparator COMP2 is connected to the second terminal of the audio amplifier 20.

[0103] As an example, as shown in Figures 5 and 6, the first and second terminals of the audio amplifier 20 are the two output terminals of the first-stage amplifier (i.e., preamplifier) ​​of the audio amplifier 20. At this time, the first differential signal and the second differential signal input to the signal detection circuit 112 are the differential signal VOP1 and differential signal VON1 output by the preamplifier, respectively.

[0104] As another example, the first and second terminals of the audio amplifier 20 are the two input terminals of the first stage amplifier (i.e., the preamplifier) ​​of the audio amplifier 20. At this time, the first differential signal and the second differential signal input to the signal detection circuit 112 are the differential signal VOP0 and the differential signal VON0 input to the preamplifier, respectively.

[0105] As another example, the first and second terminals of the audio amplifier 20 are the two output terminals of the second-stage integrator of the audio amplifier 20, respectively.

[0106] It can be understood that the first differential signal and the second differential signal are the detection results of the signal detection circuit 112 on the signal value of the audio signal path in the audio power amplifier 20. The sampling position of the signal detection is not limited to the output of the first stage preamplifier, but can also be the input terminal of the preamplifier, the input terminal of the second stage integrator, or the input terminal of the second stage integrator.

[0107] In some embodiments, the step-down threshold VTH set in this application can be a fixed value, and the specific value can be determined according to actual needs, without being specifically limited here. For example, within the power supply range of the power supply voltage VBAT, the value of the step-down threshold VTH is a fixed value, which can be determined based on the minimum VBAT value.

[0108] In other embodiments, the buck threshold VTH set in this application can change synchronously with the power supply voltage VBAT. For example, when the power supply voltage VBAT increases, the buck threshold VTH increases; when the power supply voltage VBAT decreases, the buck threshold VTH decreases, further saving power consumption.

[0109] Based on Figure 6 and in conjunction with Figure 7, the rules for setting the buck threshold VTH are explained. In some embodiments, VTH = VTH = Y(VBAT); VTH_HYS = Y(VBAT) - b. At this time, the voltage generation circuit 111 generates a buck threshold VTH related to the power supply voltage VBAT and a corresponding buck hysteresis threshold VTH_HYS. When the signal detection circuit 112 detects that the differential signal is less than the buck threshold VTH, the logic circuit outputs a corresponding buck control signal, and the corresponding buck power threshold Po is related to the power supply voltage VBAT. As shown in Figure 7, points a and b represent the buck threshold VTH corresponding to different power supply voltages VBAT (e.g., the power supply range of VBAT for a single battery, such as 3V to 5.5V, and the power supply range of VBAT for multiple batteries, such as 6V to 11V).

[0110] In some embodiments, referring to FIG8A, a schematic diagram of a voltage generation circuit 111 is shown. This voltage generation circuit 111 is a voltage divider circuit. As shown in FIG8A, the voltage generation circuit 111 includes a first resistor R1 and a second resistor R2. The first terminal of the first resistor R1 receives the power supply voltage VBAT (i.e., VDD shown in FIG8A). The second terminal of the first resistor R1 is connected to the first terminal of the second resistor R2. The first terminal of the second resistor R2 outputs a step-down threshold VTH (i.e., Vth) or a step-down hysteresis threshold VTH_HYS. The second terminal of the second resistor R2 is grounded. The resistance value of the first resistor R1 is (1-k)*R, the resistance value of the second resistor R2 is k*R, and the step-down threshold VTH is k times the power supply voltage VBAT. In this case, R1 and R2 are voltage divider resistors. The values ​​of k and R are not fixed and can be determined according to actual needs; this application does not specifically limit them. In this case, the voltage generation circuit 111 is used to perform voltage divider processing on the power supply voltage VBAT to obtain the step-down threshold VTH or the step-down hysteresis threshold VTH_HYS.

[0111] In some embodiments, referring to FIG8B, a schematic diagram of a voltage generating circuit 111 is shown, which includes a voltage divider circuit 01 and a buffer circuit 02. As shown in FIG8B, the voltage divider circuit 01 includes a first resistor R1 and a second resistor R2. The buffer circuit 02 includes a third resistor R3, an operational amplifier circuit AMP1, a first transistor MN1, a second transistor MP1, a third transistor MP2, a fourth resistor R4, and a fifth resistor R5.

[0112] One end of the first resistor R1 is connected to the power supply to receive the input power voltage VBAT (i.e., VDD as shown in Figure 8B), and the other end of the first resistor R1 is connected to one end of the second resistor R2 and one input terminal of the operational amplifier circuit AMP1.

[0113] The other end of the second resistor R2 is grounded. The other input terminal of the operational amplifier circuit AMP1 is connected to one end of the third resistor R3 and the source of the first transistor MN1. The output terminal of the operational amplifier circuit AMP1 is connected to the gate of the first transistor MN1. The drain of the first transistor MN1 is connected to the gate and source of the second transistor MP1 and the gate of the third transistor MP2. The drain of the second transistor MP1 is connected to the power supply to input the power supply voltage VBAT. The gate of the second transistor MP1 is connected to the gate of the third transistor MP2. The drain of the third transistor MP2 inputs the power supply voltage VBAT. The source of the third transistor MP2 is connected to one end of the fourth resistor R4. The other end of the fourth resistor R4 is connected to one end of the fifth resistor R5. The other end of the third resistor R3 is grounded (GND), and the other end of the fifth resistor R5 is grounded. At this time, the voltage generation circuit 111 is used to perform voltage division and regulation on the power supply voltage VBAT to obtain the buck threshold VTH or the buck hysteresis threshold VTH_HYS.

[0114] It is understandable that the step-down threshold VTH, which changes synchronously with the power supply, can be expressed as k times VBAT. This can be easily achieved using the voltage divider circuit shown in Figure 8A, or the step-down threshold VTH of k times VBAT can be obtained using a more robust anti-interference method shown in Figure 8B.

[0115] Therefore, when the power supply voltage VBAT is relatively high, the output power of the chip where the audio device 100 is located will also be relatively high, and the adaptive buck threshold VTH will also be relatively high. When the power supply voltage VBAT is relatively low, the output power of the chip will also be relatively low, and the adaptive buck threshold VTH will also be relatively low, thus achieving maximum efficiency and greatly optimizing the power consumption of the power output stage circuit at low and medium power.

[0116] Referring to FIG9, the relevant structure of the adaptive buck circuit provided in this application will be described. As shown in FIG9, the adaptive buck circuit 13 includes: a charge pump power transistor circuit 131 and a flying capacitor CF, an output voltage detection circuit 132, and an undervoltage protection circuit 133, wherein the charge pump power transistor circuit 131 and the flying capacitor CF are connected in parallel.

[0117] The first input terminal of the charge pump power transistor circuit 131 receives the power supply voltage VBAT, and the second input terminal of the charge pump power transistor circuit 131 receives the voltage regulation control signal Vcon (i.e., MD_CTRL) output by the control circuit 12. This voltage regulation control signal Vcon is used to control the switching state of the power transistor switch in the charge pump power transistor circuit 131. The output terminal of the charge pump power transistor switching circuit 131 outputs the supply voltage PVDD. The input terminal of the output voltage detection circuit 132 receives the supply voltage PVDD, and the output terminal of the output voltage detection circuit 132 outputs the corresponding detection voltage Vuvp. The first input terminal of the undervoltage protection circuit 133 receives the detection voltage Vuvp, the second input terminal of the undervoltage protection circuit 133 receives the reference voltage Vref, and the output terminal of the undervoltage protection circuit 133 outputs a clamping signal UVP. The clamping signal UVP is used to clamp the supply voltage output by the charge pump power transistor circuit 131. For example, the detection voltage Vuvp is a ratio of the supply voltage PVDD, meaning that the supply voltage PVDD and the detection voltage Vuvp have a preset ratio. This preset ratio can be determined according to actual needs and is not specifically limited here.

[0118] Furthermore, the first input terminal of the control circuit 12 receives the first flag signal EN_STD output by the signal detection circuit 112, the second input terminal of the control circuit 12 receives the clock signal OSC, the third input terminal of the control circuit 12 receives the clamping signal UVP output by the undervoltage protection circuit 133, and the fourth input terminal of the control circuit 12 receives the voltage regulation control signal Vcon (i.e., MD_CTRL, such as a buck control signal) output by the signal detection module.

[0119] It can be understood that one input terminal of the charge pump power circuit 131 is connected to the power supply, the other input terminal of the charge pump power circuit 131 is connected to the output terminal of the control circuit 12, the output terminal of the charge pump power circuit 131 is connected to one end of the output voltage detection circuit 132, the other end of the output voltage detection circuit 132 is connected to one end of the undervoltage protection circuit 133, and the other end of the undervoltage protection circuit 133 is connected to the control circuit. Furthermore, the charge pump power transistor circuit 131 is used to regulate the power supply voltage VBAT according to the voltage regulation control signal to output the power supply voltage PVDD. The voltage regulation control signal is used to control the switching state of the power transistor switch in the charge pump power transistor circuit 131 to control the charging and / or discharging of the flying capacitor CF. The output voltage detection module 132 is used to detect the power supply voltage output by the charge pump power transistor circuit 131 to obtain the detection voltage Vuvp. The undervoltage protection circuit 133 is used to compare the detection voltage Vuvp and the reference voltage Vref to obtain the clamping signal UVP. The clamping signal UVP is used to clamp the power supply voltage PVDD output by the charge pump power transistor circuit 131. Control circuit 12 is used to generate voltage regulation control signal Vcon based on clamp signal UVP and first flag signal EN_STD.

[0120] Referring to Figure 10A or Figure 10B, a schematic diagram of the charge pump power transistor circuit 131 is shown. Specifically, the charge pump power transistor circuit 131 includes a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4. One end of the first switch S1 is connected to the power supply and the upper stage board of the input capacitor CIN, and the other end of the first switch S1 is connected to one end of the fourth switch S4 and the upper stage board CP of the flying capacitor CF. One end of the second switch S2 is connected to the lower stage board CN of the flying capacitor CF and the other end of the third switch S3, and the other end of the second switch S2 is connected to the other end of the fourth switch S4, the upper stage board of the output capacitor COUT, and the power output stage circuit. One end of the third switch S3 is connected to the lower stage board of the input capacitor CIN and grounded. The other end of the fourth switch S4 is connected to the upper stage board CP of the flying capacitor CF, and the lower stage board of the output capacitor COUT is grounded. The flying capacitor CF can be a flying capacitor.

[0121] Among them, the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 are all power transistors, i.e., power switching transistors.

[0122] In some embodiments, the voltage regulation control signal Vcon is a step-down control signal, and the clamping signal UVP is used to clamp the supply voltage output by the charge pump power transistor circuit 131 to a voltage between 1 / 2 times the supply voltage VBAT and the supply voltage VBAT.

[0123] As shown in Figure 10A, when the power transistor in the charge pump power transistor circuit 131 is in the charging phase, the charge pump power transistor circuit 131 responds to the buck control signal, controls the first switch S1 and the second switch S2 to turn on, and controls the third switch S3 and the fourth switch S4 to turn off, so as to control the charging of the flying capacitor CF, so that the voltage on the flying capacitor CF is 1 / 2 times the power supply voltage VBAT.

[0124] As shown in Figure 10B, when the power transistor in the charge pump power transistor circuit 131 is in the discharge phase, the first switch S1 and the second switch S2 are turned off, and the third switch S3 and the fourth switch S4 are turned on to control the flying capacitor CF to discharge, so that the power supply voltage PVDD output by the charge pump power transistor circuit 131 is the second power supply voltage, and the second power supply voltage is 1 / 2 times the power supply voltage VBAT.

[0125] In some embodiments, the second supply voltage is equal to half the supply voltage VBAT minus the product of the target current and the target impedance, wherein the target current is the current flowing through the charge pump power transistor circuit 131, and the target impedance is the sum of the impedances of the fourth switch S4 and the third switch S3. For example, as shown in FIG10B, the target current is the discharge current Iout flowing through the third switch S3 and the fourth switch S4.

[0126] In other embodiments, as shown in FIG10A, the target current is the charging current Iout flowing through the first switch S1 and the second switch S2. In this case, the target impedance can be the sum of the impedance of the first switch S1 and the impedance of the second switch S2.

[0127] In some embodiments, the output voltage (i.e., the supply voltage PVDD) and equivalent internal impedance of the charge pump power transistor circuit 131 are derived. Considering that the on-resistance of each power transistor is equal to Rdson, and the capacitive reactance is ignored, then the supply voltage PVDD = 1 / 2 * VBAT – Iout * 2 * Rdson.

[0128] The equivalent internal impedance of the charge pump power transistor circuit 131 is: Rcp0.5x = 2*Rdson. It can be understood that with a relatively small equivalent internal impedance Rcp0.5x, the efficiency of a 1 / 2 step-down charge pump can reach over 98%.

[0129] In other embodiments, the aforementioned voltage regulation control signal is a pass-through control signal, and the clamping signal is used to clamp the supply voltage output by the charge pump power transistor circuit 131 to the power supply voltage VBAT. Then, in response to the pass-through control signal, the charge pump power transistor circuit 131 controls the first switch S1 and the fourth switch S4 to be turned on, and the second switch S2 and the third switch S3 to be turned off, controlling the supply voltage PVDD output by the charge pump power transistor circuit 131 to be the power supply voltage VBAT. Similarly, the actual supply voltage output by the charge pump power transistor circuit 131 is PVDD = VBAT – Iout * 2 * Rdson.

[0130] Therefore, this application can reduce the supply voltage of the power output stage circuit by half by using a 1 / 2 charge pump. At the same time, the step-down threshold changes synchronously with the VBAT battery voltage (such as single or multiple batteries), further optimizing and reducing power consumption at small and medium output power, thereby maximizing the overall efficiency of the chip.

[0131] In some embodiments, this application may provide a low-power power output stage circuit to optimize the power consumption of the audio amplifier at low to medium output power, thereby further improving the overall efficiency of the chip in which the audio amplifier is located.

[0132] In some embodiments, as shown in Figures 11 and 12, the power output stage circuit includes a first H-bridge power transistor circuit H1 and a second H-bridge power transistor circuit H2, and a switching circuit SW. When the power output stage circuit detects that the amplitude of the audio input signal is greater than a comparison threshold, it controls the switching circuit SW to turn on, controlling the first H-bridge power transistor circuit H1 to input an audio input signal (such as differential signals VOP and VON), and controlling the supply voltage PVDD of the first H-bridge power transistor circuit to be a first supply voltage HV Supply. When the power output stage circuit detects that the amplitude of the audio input signal is less than or equal to the comparison threshold, it controls the switching circuit SW to turn off, controlling the second H-bridge power transistor circuit H2 to input an audio input signal (such as differential signals VOPL and VONL), and controlling the supply voltage PVDD of the second H-bridge power transistor circuit H2 to be a second supply voltage LV Supply. At this time, the first H-bridge power transistor circuit H1 and the second H-bridge power transistor circuit H2 are connected in parallel.

[0133] In some embodiments, as shown in Figures 11 and 12, the switching circuit SW includes switch SW0 and switch SW1. When the switching circuit SW is turned on, i.e., both switch SW0 and switch SW1 are turned on, it enters a pass-through mode, and the differential signals VOP and VON of the audio input signal are connected to the first H-bridge power transistor circuit H1. Furthermore, when the switching circuit SW is turned off, i.e., both switch SW0 and switch SW1 are turned off, it enters a buck mode, and the differential signals VOPL and VONL of the audio input signal are connected to the second H-bridge power transistor circuit H2. It can be understood that in this embodiment, the differential signals VOPL and VONL refer to the differential signals of the smaller amplitude audio input signal, and the differential signals VOP and VON refer to the differential signals of the larger amplitude audio input signal.

[0134] In some embodiments, as shown in FIG11, both the first H-bridge power transistor circuit H1 and the second H-bridge power transistor circuit H2 include four transistors. For example, the first H-bridge power transistor circuit H1 includes transistors MP0 and MP1, and transistors MN0 and MN1. Specifically, the drain of transistor MP0 receives the first supply voltage HV Supply, the gate receives the drive signal HV_DVP0, and the source is connected to one end of switch SW0, and this source is connected to one end of a speaker. The drain of transistor MP1 receives the first supply voltage HV Supply, the gate receives the drive signal HV_DVP1, and the source receives the differential signal VON, such as the differential signal VON2 output by the comparator, and this source is connected to one end of the speaker. Similarly, the drain of transistor MN0 is connected to the source of transistor MP0, the gate receives the drive signal HV_DVN0, the source is connected to one end of switch SW1, and this source is grounded. The drain of transistor MP1 is the source of transistor MP1, the gate receives the drive signal HV_DVN1, and the source is grounded.

[0135] In some embodiments, as shown in FIG11, the second H-bridge power transistor circuit H2 includes transistors MLP0 and MLP0, and transistors MLN0 and MLN0. The drain of transistor MN0 receives the second supply voltage LV Supply, the gate receives the drive signal HV_DVN0, and the source is connected to one end of switch SW0, and this source is connected to one end of a speaker. The drain of transistor MN1 receives the second supply voltage LV Supply, the gate receives the drive signal HV_DVN1, and the source receives the differential signal VON, such as the differential signal VON2 output by the comparator, and this source is connected to one end of the speaker. Similarly, the drain of transistor MN0 is connected to the source of transistor MN0, the gate receives the drive signal HV_DVN0, the source is connected to one end of switch SW1, and this source is grounded. The drain of transistor MN1 is the source of transistor MN1, the gate receives the drive signal HV_DVN1, and the source is grounded.

[0136] In some embodiments, as shown in FIG12, the first H-bridge power transistor circuit H1 includes four transistors, and the second H-bridge power transistor circuit H2 includes two transistors.

[0137] In some embodiments, as shown in Figure 13, the power output stage includes a third H-bridge power transistor circuit. The power output stage circuit detects that the amplitude of the audio input signal is less than or equal to a comparison threshold, controls the third H-bridge power transistor circuit to input the audio input signal, and controls the supply voltage of the third H-bridge power transistor circuit to the second supply voltage PVDD. The third H-bridge power transistor circuit includes four transistors and is similar to the second H-bridge power transistor circuit H2 shown in Figure 11, and will not be described in detail here. In this case, the power output stage circuit is directly powered by the output voltage of the adaptive 1 / 2 times charge pump, achieving power consumption optimization at low and medium power levels and improving the overall efficiency of the power amplifier.

[0138] This application utilizes an adaptive 1 / 2x charge pump to significantly optimize power consumption in audio amplifiers when input signals are present, especially small to medium-sized signals, thereby improving amplifier efficiency. Furthermore, by combining input power synchronization technology, different threshold voltages (such as buck thresholds) are adaptively selected based on different power supplies, further reducing power consumption, optimizing amplifier efficiency, and extending the standby and operating time of audio amplifiers or wearable devices under low-capacity battery conditions.

[0139] In some embodiments, this application provides a chip including the audio device 100 described above.

[0140] In some embodiments, this application provides an electronic device including the above-described chip.

[0141] In one possible implementation, embodiments of this application provide a chip including circuitry for performing the power supply method described above.

[0142] In one possible implementation, embodiments of this application provide an electronic device including a chip and a speaker, the chip being used for the speaker to emit sound.

[0143] According to an embodiment of this application, FIG14 illustrates a block diagram of a system-on-chip (SoC) 1500 (i.e., a chip). In FIG14, similar components have the same reference numerals. Additionally, dashed boxes represent optional features of more advanced SoCs. In FIG14, SoC 1500 includes: an interconnect unit 1550 coupled to an application processor 1510; a system proxy unit 1570; a bus controller unit 1580; an integrated memory controller unit 1540; a group or one or more coprocessors 1520, which may include integrated graphics logic, an image processor, an audio processor, and a video processor; a static random access memory (SRAM) unit 1530; and a direct memory access (DMA) unit 1560. In one embodiment, coprocessor 1520 includes a dedicated processor, such as, for example, a network or communication processor, a compression engine, a GPGPU, a high-throughput MIC processor, or an embedded processor, etc.

[0144] The various embodiments of the mechanisms disclosed in this application can be implemented in hardware, software, firmware, or a combination of these implementation methods. Embodiments of this application can be implemented as computer programs or program code executable on a programmable system, the programmable system including at least one processor, a storage system (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device.

[0145] Program code can be applied to input instructions to execute the functions described in this application and generate output information. The output information can be applied to one or more output devices in a known manner. For the purposes of this application, the processing system includes any system having a processor such as, for example, a digital signal processor (DSP), a microcontroller, an application-specific integrated circuit (ASIC), or a microprocessor.

[0146] The program code can be implemented using a high-level procedural language or an object-oriented programming language to communicate with the processing system. Assembly language or machine language can also be used when needed. In fact, the mechanisms described in this application are not limited to any particular programming language. In either case, the language can be a compiled language or an interpreted language.

[0147] In some cases, the disclosed embodiments may be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried or stored thereon on one or more temporary or non-temporary machine-readable (e.g., computer-readable) storage media, which may be read and executed by one or more processors. For example, the instructions may be distributed via a network or through other computer-readable media. Therefore, machine-readable media may include any mechanism for storing or transmitting information in a machine-readable (e.g., computer-readable) form, including but not limited to floppy disks, optical disks, CD-ROMs, magneto-optical disks, read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic cards or optical cards, flash memory, or tangible machine-readable storage for transmitting information (e.g., carrier waves, infrared signals, digital signals, etc.) using the Internet in the form of electrical, optical, acoustic, or other forms of propagated signals. Therefore, machine-readable media includes any type of machine-readable medium suitable for storing or transmitting electronic instructions or information in a machine-readable (e.g., computer-readable) form.

[0148] In the accompanying drawings, some structural or methodological features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be necessary. In some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. Furthermore, the inclusion of structural or methodological features in a particular figure does not imply that such features are required in all embodiments, and in some embodiments, these features may be omitted or may be combined with other features.

[0149] It should be noted that all units / modules mentioned in the device embodiments of this application are logical units / modules. Physically, a logical unit / module can be a physical unit / module, a part of a physical unit / module, or a combination of multiple physical units / modules. The physical implementation of these logical units / modules themselves is not the most important factor; the combination of functions implemented by these logical units / modules is the key to solving the technical problems proposed in this application. Furthermore, to highlight the innovative aspects of this application, the above-described device embodiments of this application have not introduced units / modules that are not closely related to solving the technical problems proposed in this application. This does not mean that the above-described device embodiments do not contain other units / modules.

[0150] It should be noted that in the examples and description of this patent, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0151] Although this application has been illustrated and described with reference to certain preferred embodiments thereof, those skilled in the art should understand that various changes in form and detail may be made thereto without departing from the spirit and scope of this application.

Claims

1. A power supply method, characterized in that, The method includes: A first flag signal is generated based on the audio input signal, the buck threshold, and the corresponding buck hysteresis threshold; Based on the first flag signal, determine whether to indicate voltage reduction; if the first flag signal indicates voltage reduction, then generate a voltage reduction control signal. According to the buck control signal, the buck mode is activated, and a buck charge pump is used to reduce the power supply voltage of the power output stage circuit in the audio amplifier from the first power supply voltage to the second power supply voltage, and output the second power supply voltage to power the power output stage circuit, wherein the second power supply voltage is lower than the power supply voltage of the power supply.

2. The method according to claim 1, characterized in that, The step-down charge pump is a 1 / 2 charge pump, and the difference between the second supply voltage and 1 / 2 times the power supply voltage is less than or equal to a preset difference.

3. The method according to claim 1, characterized in that, The method further includes: If the first flag signal indicates no voltage reduction, the pass-through mode is activated, and the power supply voltage is output to power the power output stage circuit.

4. The method according to claim 1, characterized in that, If the differential signal of the audio input signal is less than or equal to the buck threshold, the first flag signal is used to indicate bucking. If the differential signal of the audio input signal is greater than or equal to the buck hysteresis threshold corresponding to the buck threshold, then the first flag signal is used to indicate no bucking.

5. The method according to claim 4, characterized in that, The buck threshold and the corresponding buck hysteresis threshold increase as the power supply voltage increases, and the buck threshold and the corresponding buck hysteresis threshold decrease as the power supply voltage decreases.

6. The method according to claim 5, characterized in that, The power supply voltage is within a first voltage range, and the buck threshold and the buck hysteresis threshold correspond to the first voltage range; The first voltage range is one of a plurality of preset voltage ranges. Each voltage range corresponds to a buck threshold and a buck hysteresis threshold. Furthermore, the preset voltage range with a smaller minimum voltage value corresponds to a smaller buck threshold and a smaller buck hysteresis threshold.

7. A power supply circuit, characterized in that, The power supply circuit includes: A voltage detection circuit, connected to the power supply of the power supply circuit, is used to generate a first flag signal based on the audio input signal of the audio amplifier, the buck threshold and the corresponding buck hysteresis threshold. A control circuit, connected to the voltage detection circuit, is used to determine whether to indicate voltage reduction based on the first flag signal; if the first flag signal indicates voltage reduction, a voltage reduction control signal is generated. An adaptive buck circuit, connected to the control circuit, is used to reduce the supply voltage of the power output stage circuit in the audio amplifier from a first supply voltage to a second supply voltage using a buck charge pump according to the buck control signal, and outputs the second supply voltage to power the power output stage circuit, wherein the second supply voltage is lower than the power supply voltage of the power supply.

8. The power supply circuit according to claim 7, characterized in that, The voltage detection circuit includes a voltage generation circuit and a signal detection circuit. The signal detection circuit includes a first comparator, a second comparator, and a logic circuit. One end of the voltage generation circuit is connected to the power supply, and the other end of the voltage generation circuit is connected to the negative input terminal of the first comparator and the negative input terminal of the second comparator. The output terminals of the first comparator and the second comparator are connected to the logic circuit. The voltage generation circuit is used to generate the buck threshold and the corresponding buck hysteresis threshold according to the power supply voltage. The first comparator is configured to generate a first comparison value based on the first differential signal of the audio input signal and the buck threshold or the buck hysteresis threshold; The second comparator is used to generate a second comparison value based on the second differential signal of the audio input signal and the buck threshold or the buck hysteresis threshold; The logic circuit is used to compare the first comparison value with the first comparison value to generate the first flag signal.

9. The power supply circuit according to claim 8, characterized in that, The positive input terminals of the first comparator and the second comparator are respectively connected to the two input terminals of the first stage amplifier of the audio power amplifier. or, The positive input terminals of the first comparator and the second comparator are respectively connected to the two output terminals of the first stage amplifier of the audio power amplifier. or, The positive input terminals of the first comparator and the second comparator are respectively connected to the two input terminals of the second stage amplifier of the audio power amplifier. or, The positive input terminals of the first comparator and the second comparator are respectively connected to the two output terminals of the second stage amplifier of the audio power amplifier.

10. The power supply circuit according to claim 8, characterized in that, The voltage generating circuit includes a first resistor and a second resistor. One end of the first resistor is connected to the power supply, and the other end of the first resistor is connected to the voltage detection circuit and one end of the second resistor. The other end of the second resistor is grounded. The voltage generating circuit is used to divide the power supply voltage to obtain the step-down threshold or the step-down hysteresis threshold. Wherein, the resistance value of the first resistor is (1-k)*R, the resistance value of the second resistor is k*R, and the voltage drop threshold is k times the power supply voltage.

11. The power supply circuit according to claim 8, characterized in that, The voltage generating circuit includes: a first resistor, a second resistor, an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a third resistor, a fourth resistor, and a fifth resistor. One end of the first resistor is connected to the power supply, and the other end of the first resistor is connected to one end of the second resistor and the positive input terminal of the operational amplifier circuit. The negative input terminal of the operational amplifier circuit is connected to one end of the third resistor and the source of the first transistor. The output terminal of the operational amplifier circuit is connected to the gate of the first transistor. The drain of the first transistor is connected to the gate and source of the second transistor and the gate of the third transistor. The drain of the second transistor is connected to the power supply. The gate of the second transistor is connected to the gate of the third transistor. The drain of the third transistor is connected to the power supply. The source of the third transistor is connected to one end of the fourth resistor. The other end of the fourth resistor is connected to one end of the fifth resistor. The other ends of the second resistor, the third resistor, and the fifth resistor are grounded. The voltage generation circuit is used to perform voltage division and voltage regulation on the power supply voltage to obtain the buck threshold or the buck hysteresis threshold.

12. The power supply circuit according to claim 7, characterized in that, The adaptive buck circuit includes: a charge pump power transistor circuit, a flying capacitor, an output voltage detection circuit, and an undervoltage protection circuit. The charge pump power transistor circuit is connected in parallel with the flying capacitor. One input terminal of the charge pump power circuit is connected to the power supply, and the other input terminal of the charge pump power circuit is connected to the output terminal of the control circuit. The output terminal of the charge pump power circuit is connected to one end of the output voltage detection circuit, and the other end of the output voltage detection circuit is connected to one end of the undervoltage protection circuit. The other end of the undervoltage protection circuit is connected to the control circuit. The charge pump power transistor circuit is used to regulate the power supply voltage according to the voltage regulation control signal to output the power supply voltage. The voltage regulation control signal is used to control the switching state of the power transistor switch in the charge pump power transistor circuit to control the charging and / or discharging of the flying capacitor. The output voltage detection module is used to detect the power supply voltage output by the charge pump power transistor circuit to obtain the detection voltage. The undervoltage protection circuit is used to compare the detected voltage and the reference voltage to obtain a clamping signal, and the clamping signal is used to clamp the power supply voltage output by the charge pump power transistor circuit. The control circuit is used to generate the voltage regulation control signal based on the clamping signal and the first flag signal.

13. The power supply circuit according to claim 12, characterized in that, The charge pump power transistor circuit includes a first switch, a second switch, a third switch, and a fourth switch. One end of the first switch is connected to the upper plate of the input capacitor and the power supply, and the other end of the first switch is connected to one end of the fourth switch and the upper plate of the flying capacitor. One end of the second switch is connected to the lower stage board of the flying capacitor and one end of the third switch, and the other end of the second switch is connected to the other end of the fourth switch, the upper stage board of the output capacitor, and the power output stage circuit. The other end of the third switch is connected to the lower plate of the input capacitor and grounded; The other end of the fourth switch is connected to the upper plate of the output capacitor, and the lower plate of the output capacitor is grounded.

14. The power supply circuit according to claim 13, characterized in that, The adaptive buck circuit is a 1 / 2 charge pump, the voltage regulation control signal is the buck control signal, and the clamping signal is used to clamp the supply voltage output by the charge pump power transistor circuit to a voltage between 1 / 2 times the power supply voltage and the power supply voltage. The charge pump power transistor circuit is used to control the first and second switches to turn on and the third and fourth switches to turn off according to the buck control signal, so as to control the charging of the flying capacitor, making the voltage on the flying capacitor 1 / 2 times the power supply voltage, and... The first and second switches are controlled to turn off, and the third and fourth switches are controlled to turn on, so as to control the flying capacitor to discharge, so that the power supply voltage output by the charge pump power tube circuit is the second power supply voltage, and the second power supply voltage is 1 / 2 times the power supply voltage.

15. The power supply circuit according to claim 14, characterized in that, The voltage regulation control signal is a direct-through control signal, and the clamping signal is used to clamp the power supply voltage output by the charge pump power transistor circuit to the power supply voltage. The charge pump power transistor circuit is used to control the first switch and the fourth switch to be turned on, and to control the second switch and the third switch to be turned off, according to the pass-through control signal, so as to control the power supply voltage output by the charge pump power transistor circuit to be the power supply voltage.

16. The power supply circuit according to claim 14, characterized in that, The second supply voltage is equal to 1 / 2 times the power supply voltage minus the product of the target current and the target impedance, wherein the target current is the current flowing through the charge pump power transistor circuit, and the target impedance is the sum of the impedance of the fourth switch and the impedance of the third switch.

17. An audio device, characterized in that, The audio device includes an audio amplifier and a power supply circuit. The audio amplifier includes a power output stage circuit, and the power supply circuit includes: A voltage detection circuit is connected to the power supply of the power supply circuit and generates a first flag signal based on the audio input signal of the audio amplifier, the buck threshold and the corresponding buck hysteresis threshold, wherein the first flag signal is used to indicate whether bucking is required. A control circuit, connected to the voltage detection circuit, is used to generate a buck control signal if the first flag signal indicates a buck reduction. An adaptive buck circuit, connected to the control circuit, is used to respond to the buck control signal, using a buck charge pump to reduce the supply voltage of the power output stage circuit in the audio amplifier from a first supply voltage to a second supply voltage, and output the second supply voltage to power the power output stage circuit, wherein the second supply voltage is lower than the power supply voltage of the power supply circuit.

18. The apparatus according to claim 17, characterized in that, The step-down charge pump is a 1 / 2 charge pump, and the difference between the second supply voltage and 1 / 2 times the power supply voltage is less than or equal to a preset difference.

19. The apparatus according to claim 17 or 18, characterized in that, The power output stage circuit includes a first H-bridge power transistor circuit and a second H-bridge power transistor circuit, and a switching circuit, wherein... The power output stage circuit is used to detect that the amplitude of the audio input signal is greater than the comparison threshold, control the switching circuit to turn on, control the first H-bridge power transistor circuit to input the audio input signal, and control the power supply voltage of the first H-bridge power transistor circuit to be the first power supply voltage. The power output stage circuit is used to detect that the amplitude of the audio input signal is less than or equal to the comparison threshold, control the switching circuit to turn off, control the second H-bridge power transistor circuit to input the audio input signal, and control the power supply voltage of the second H-bridge power transistor circuit to be the second power supply voltage.

20. The apparatus according to claim 19, characterized in that, Both the first H-bridge power transistor circuit and the second H-bridge power transistor circuit include four transistors. or, The first H-bridge power transistor circuit includes four transistors, and the second H-bridge power transistor circuit includes two transistors.

21. The apparatus according to claim 17 or 18, characterized in that, The power output stage includes a third H-bridge power transistor circuit, wherein... The power output stage circuit is used to detect that the amplitude of the audio input signal is less than or equal to a comparison threshold, control the third H-bridge power transistor circuit to input the audio input signal, and control the power supply voltage of the third H-bridge power transistor circuit to be the second power supply voltage.

22. A chip, characterized in that, The chip includes circuitry for implementing the audio device as described in any one of claims 17 to 21.

23. An electronic device, characterized in that, The electronic device includes the chip and speaker as described in claim 22, wherein the chip is used to drive the speaker to produce sound.

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