Laterally monolithically heterogeneously integrated radio frequency chip based on gallium nitride and gallium arsenide, and preparation method therefor

Abstract

Disclosed in the present invention are a laterally monolithically heterogeneously integrated radio frequency chip based on gallium nitride and gallium arsenide, and a preparation method therefor. The chip comprises a backside metal, a substrate, a gallium nitride device epitaxial layer, a gallium nitride device drain electrode, a gallium nitride device gate electrode, a gallium nitride device source electrode, a back via, a gallium arsenide epitaxial transition layer, a gallium arsenide device epitaxial layer, a gallium arsenide device source electrode, a gallium arsenide device gate electrode, and a gallium arsenide device drain electrode, wherein a gallium nitride epitaxial material, a gallium arsenide epitaxial material and radio frequency devices share the backside metal and the substrate; and a trench is formed in a selected region of a heterogeneous-substrate gallium nitride wafer to epitaxially grow a gallium arsenide material, and a gallium arsenide device is processed, so as to realize lateral monolithic heterogeneous integration. The present invention can achieve an extremely small spatial spacing between a gallium nitride radio frequency device and a gallium arsenide radio frequency device, thereby reducing signal loss caused by long-distance transmission at a high frequency and the effect of parasitic parameters, reducing the chip area and the chip volume, and lowering packaging costs.

Description

A gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and its fabrication method Technical Field

[0001] This invention relates to the field of semiconductor devices, and in particular to a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and its fabrication method. Background Technology

[0002] With the advent of the 5G era, communication systems face higher technical requirements, including reduced size, increased density, improved efficiency, lower energy consumption, and lower costs. Beyond continuing to improve performance in areas such as communication speed, capacity, latency, and spatial range, post-5G and 6G communication systems also need to address key challenges encountered in current 5G solutions: high cost and high power consumption. During the evolution from 4G to 5G and post-5G / 6G communication systems, the number of frequency bands that communication systems need to handle is increasing. Furthermore, with the widespread application of massive MIMO and carrier aggregation technologies, communication base stations and terminal equipment need to integrate large-scale arrays composed of multiple RF transceiver modules and antennas, resulting in a sharp increase in system cost and power consumption. The significant decrease in efficiency of high-frequency RF front-end modules and the extension of communication carrier frequencies to the millimeter-wave band further exacerbate the power consumption of base stations and terminal electronic devices. High-density system integration can effectively reduce the high cost and high power consumption of 5G, post-5G, and 6G communication equipment.

[0003] Gallium nitride (GaN), as a third-generation semiconductor, possesses excellent characteristics such as a large bandgap, high electron mobility, and high electron saturation velocity, making it a promising candidate for applications in next-generation radio frequency devices and power electrical devices. GaN-based devices offer advantages in high power and high efficiency at the transmitting end, while GaAs-based devices offer advantages in low noise and high gain at the receiving end. Therefore, achieving high-density micro / nano heterogeneous integration of GaN and GaAs microwave chips would be crucial for solving current communication system problems. However, many challenges remain regarding material compatibility, process compatibility, thermal compatibility, and electromagnetic compatibility.

[0004] Based on this, the present invention proposes a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and its fabrication method, providing technicians with a new direction for thinking. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and its fabrication method.

[0006] To achieve the above objectives, the present invention is implemented according to the following technical solution:

[0007] One objective of this invention is to provide a gallium nitride (GaN) and gallium arsenide (GaAs) side-mounted monolithic heterogeneous radio frequency (RF) chip, comprising a back metal, a substrate, a GaN device epitaxial layer, a GaN device electrode drain, a GaN device electrode gate, a GaN device electrode source, a back via, a GaAs epitaxial transition layer, a GaAs device epitaxial layer, a GaAs device electrode source, a GaAs device electrode gate, and a GaAs device electrode drain; the GaN and GaAs epitaxial materials and the RF device share the back metal and the substrate; the GaAs RF device is horizontally monolithically integrated by selectively growing GaAs material on a GaN wafer on a heterogeneous substrate and then fabricating the GaAs device; the back metal is connected to the GaN and GaAs device electrode sources through the back via; the GaN and GaAs device electrode gates are interconnected by wires, and the GaN and GaAs device electrode drains are interconnected by wires.

[0008] Furthermore, the substrate is made of silicon and has a thickness of 30-500 μm.

[0009] Furthermore, the material of the gallium nitride device epitaxial layer is a compound formed from one or more of gallium nitride, aluminum nitride, and indium nitride; the gallium nitride device epitaxial layer comprises, from bottom to top, a nitride nucleation layer, a nitride transition layer, a nitride buffer layer, a nitride channel layer, and a nitride barrier layer; the material of the nitride nucleation layer is aluminum nitride, and the thickness is 50-300 nm; the material of the nitride transition layer is graded aluminum gallium nitride or aluminum nitride / aluminum gallium nitride superlattice. The thickness of the nitride buffer layer is 500-1000nm; the material of the nitride buffer layer is gallium nitride, and the thickness is 100-1000nm; the material of the nitride channel layer is gallium nitride, indium gallium nitride, or aluminum gallium nitride, and the thickness is 50-500nm; the material of the nitride barrier layer is aluminum gallium nitride or indium aluminum nitride, and the thickness is 5-30nm; a two-dimensional electron gas is formed between the nitride channel layer and the nitride barrier layer, which serves as the conductive channel for the gallium nitride radio frequency device.

[0010] Further, the gallium arsenide epitaxial transition layer is made of germanium or a compound semiconductor formed by silicon and germanium, with a thickness of 50-500 nm; the gallium arsenide device epitaxial layer is made of a compound composed of one or more of gallium arsenide, indium arsenide, aluminum arsenide, and indium phosphide; the gallium arsenide device epitaxial layer comprises, from bottom to top, an arsenide buffer layer, an arsenide channel layer, an arsenide isolation layer, an arsenide barrier layer, and an arsenide cap layer; the arsenide buffer layer is made of gallium arsenide and has a thickness of 50-1000 nm; the arsenide channel layer is made of gallium arsenide or indium gallium arsenide and has a thickness of 50-500 nm. The thickness is 50-300 nm; the arsenide isolation layer is made of one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium phosphide, and indium gallium phosphide, with a thickness of 1-5 nm; the arsenide barrier layer is made of one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium aluminum gallium arsenide, and indium gallium phosphide, with a thickness of 5-30 nm; the arsenide cap layer is made of one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium aluminum gallium arsenide, and indium gallium phosphide, with a thickness of 2-10 nm; a two-dimensional electron gas is formed between the arsenide channel layer and the arsenide isolation layer, serving as the conductive channel of the gallium arsenide device.

[0011] Furthermore, the gate electrode of the gallium nitride device is a multilayer metal material, with the bottom layer being one of Ni, Ti, TiN, and TaN, and the second or higher layers being one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu; the source electrode of the gallium nitride device is a multilayer metal material, with the bottom two layers being Ti and Al, or Ta and Al, or Mo and Al, and the other layers containing one or more of Ti, Al, Ni, Au, Mo, Pt, and W; the drain electrode of the gallium nitride device is a multilayer metal material, with the bottom two layers being Ti and Al, or Ta and Al, or Mo and Al, and the other layers containing Ti, Al, Ni, Au, Mo, Pt, and W, and the other layers containing Mo, Au, TiN, TaN, W, and Cu. The gallium arsenide (GaAs) device electrode gate is a multilayer metal material, with the bottom layer being one of Ti, Ta, Ni, TiN, and TaN, and the second or higher layers being one of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu; the gallium arsenide (GaAs) device electrode drain is a multilayer metal material, with the bottom two layers being Ni and Ge, or Mo and Al, and the other layers being one of Ni and Au; the gallium arsenide (GaAs) device electrode source is a multilayer metal material, with the bottom two layers being Ni and Ge, or Mo and Al, and the other layers being one of Ni and Au.

[0012] Preferably, the back metal is a multilayer metal material, consisting of Ni / Au, Ti / Au, Ni / Cu, or Ti / Cu from bottom to top.

[0013] The second objective of this invention is to provide a method for fabricating a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip, characterized by the following steps:

[0014] S1: Select substrate;

[0015] S2: Epitaxial layer of gallium nitride device on substrate;

[0016] S3: Perform the fabrication process for gallium nitride devices;

[0017] S4: Etching to remove a portion of the gallium nitride device epitaxial layer;

[0018] S5: Within the etched groove obtained in step S4, a gallium arsenide epitaxial transition layer and a gallium arsenide device epitaxial layer are epitaxially grown in one step.

[0019] S6: Fabrication of gallium arsenide devices;

[0020] S7: Perform metal interconnection of the front electrode;

[0021] S8: Etching back through-hole;

[0022] S9: Deposit back metal to obtain gallium nitride and gallium arsenide side-mounted monolithic heterogeneous integrated radio frequency chip.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1) This invention adopts a material structure combining gallium nitride and gallium arsenide, breaking through the limitations of single-material device performance and synergistically improving the power, efficiency and noise performance of millimeter-wave radio frequency front-end;

[0025] 2) The gallium nitride device and gallium arsenide device of the present invention are horizontally heterogeneously integrated face to face, with high integration density, short metal interconnect distance, small footprint, and small spatial spacing.

[0026] 3) The gallium arsenide radio frequency device of the present invention achieves horizontal monolithic heterogeneous integration by selectively growing gallium arsenide material by trenching on a gallium nitride wafer with a heterogeneous substrate and then fabricating gallium arsenide device. The process compatibility between gallium nitride and gallium arsenide epitaxial materials growth and device fabrication is high.

[0027] 4) The growth of gallium nitride and gallium arsenide epitaxial materials and the fabrication of devices in this invention are carried out using existing mature process technologies, which are low in cost and highly feasible. Attached Figure Description

[0028] Figure 1 is a schematic diagram of the structure of a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip provided in an embodiment of the present invention.

[0029] In the figure, the following labels are used: 1-substrate; 2-gallium nitride (GaN) device epitaxial layer; 3-gallium arsenide (GaAs) epitaxial transition layer; 4-gallium arsenide (GaAs) device epitaxial layer; 5-back metal; 6-back via; 81-gallium nitride (GaN) device electrode drain; 82-gallium nitride (GaN) device electrode gate; 83-gallium nitride (GaN) device electrode source; 91-gallium arsenide (GaAs) device electrode source; 92-gallium arsenide (GaAs) device electrode gate; 93-gallium arsenide (GaAs) device electrode drain. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. The specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention.

[0031] As shown in Figure 1, this embodiment exemplarily illustrates a gallium nitride (GaN) and gallium arsenide (GaAs) side-mounted monolithic heterogeneous radio frequency (RF) chip, including a back metal 5, a substrate 1, a gallium nitride (GaN) device epitaxial layer 2, a GaN device electrode drain 81, a GaN device electrode gate 82, a GaN device electrode source 83, a back via 6, a GaAs epitaxial transition layer 3, a GaAs device epitaxial layer 4, a GaAs device electrode source 93, a GaAs device electrode gate 92, and a GaAs device electrode drain 91. Specifically, a through-groove communicating with the upper surface of the GaN device epitaxial layer 2 is formed on one end of the upper surface of the substrate 1. The through-groove contains the GaAs epitaxial transition layer 3 and the GaAs device epitaxial layer 4 from top to bottom. The upper surface is provided with gallium arsenide (GaAs) device electrode source 93, gallium arsenide (GaAs) device electrode gate 92, and gallium arsenide (GaAs) device electrode drain 91. Gallium nitride (GaN) and gallium arsenide (GaAs) epitaxial materials and radio frequency (RF) devices share a back metal 5 and a substrate 1. The GaAs RF device achieves horizontal monolithic heterogeneous integration by selectively growing GaAs material in selected areas on a heterogeneous substrate GaN wafer and then fabricating the GaAs device. The back metal 5 is connected to the gallium nitride (GaN) device electrode source 83 and the gallium arsenide (GaAs) device electrode source 93 through a back via 6. The gallium nitride (GaN) device electrode gate 82 and the gallium arsenide (GaAs) device electrode gate 92 are interconnected by wires, and the gallium nitride (GaN) device electrode drain 81 and the gallium arsenide (GaAs) device electrode drain 91 are interconnected by wires.

[0032] The principle of this embodiment is as follows: Gallium arsenide (GaAs) radio frequency (RF) devices are horizontally monolithically integrated by epitaxially growing GaAs material in selected areas on a GaN wafer with a heterogeneous substrate and then fabricating GaAs devices. The RF chip adopts a microstrip waveguide structure with a back metal ground on the back side. The back metal is connected to the source electrodes of the GaN and GaAs devices on the front side through back vias. The electrodes of the GaN and GaAs devices are interconnected by wires. This allows for extremely small spatial spacing between the GaN and GaAs RF devices, reducing signal loss and parasitic parameter effects during long-distance transmission at high frequencies. It also reduces the chip area and volume, lowers packaging costs, and achieves a high-density, high-performance, and multifunctional GaN and GaAs lateral monolithically integrated RF chip.

[0033] In this embodiment, the substrate 1 is made of silicon and has a thickness of 30-500 μm. Preferably, the thickness of the substrate 1 is 100 μm.

[0034] In this embodiment, the material of the gallium nitride device epitaxial layer 2 is a compound formed from one or more of gallium nitride, aluminum nitride, and indium nitride; the gallium nitride device epitaxial layer 2 comprises, from bottom to top, a nitride nucleation layer, a nitride transition layer, a nitride buffer layer, a nitride channel layer, and a nitride barrier layer; the material of the nitride nucleation layer is aluminum nitride, and the thickness is 50-300 nm; the material of the nitride transition layer is graded aluminum gallium nitride or aluminum nitride / aluminum gallium nitride super-grade aluminum gallium nitride. The lattice has a thickness of 500-1000 nm; the nitride buffer layer is made of gallium nitride with a thickness of 100-1000 nm; the nitride channel layer is made of gallium nitride, indium gallium nitride, or aluminum gallium nitride with a thickness of 50-500 nm; the nitride barrier layer is made of aluminum gallium nitride or indium aluminum nitride with a thickness of 5-30 nm; a two-dimensional electron gas is formed between the nitride channel layer and the nitride barrier layer, serving as the conductive channel for gallium nitride radio frequency devices.

[0035] Preferably, the nitride nucleation layer is made of aluminum nitride with a thickness of 200 nm; the nitride transition layer is made of graded aluminum gallium nitride with a thickness of 750 nm; the nitride buffer layer is made of gallium nitride with a thickness of 800 nm; the nitride channel layer is made of gallium nitride with a thickness of 300 nm; and the nitride barrier layer is made of aluminum gallium nitride with a thickness of 20 nm.

[0036] In this embodiment, the material of the gallium arsenide epitaxial transition layer 3 is germanium or a compound semiconductor formed by silicon and germanium, with a thickness of 50-500 nm; preferably, the material of the gallium arsenide epitaxial transition layer 3 is germanium, with a thickness of 300 nm.

[0037] In this embodiment, the material of the gallium arsenide device epitaxial layer 4 is a compound composed of one or more of gallium arsenide, indium arsenide, aluminum arsenide, and indium phosphide; the gallium arsenide device epitaxial layer 4 includes, from bottom to top, an arsenide buffer layer, an arsenide channel layer, an arsenide isolation layer, an arsenide barrier layer, and an arsenide cap layer. The arsenide buffer layer is made of gallium arsenide and has a thickness of 50-1000 nm; the arsenide channel layer is made of gallium arsenide or indium gallium arsenide and has a thickness of 50-300 nm; the arsenide isolation layer... The material is one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium phosphide, and indium gallium phosphide, with a thickness of 1-5 nm; the material of the arsenide barrier layer is one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium aluminum gallium arsenide, and indium gallium phosphide, with a thickness of 5-30 nm; the material of the arsenide cap layer is one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium aluminum gallium arsenide, and indium gallium phosphide, with a thickness of 2-10 nm; a two-dimensional electron gas is formed between the arsenide channel layer and the arsenide isolation layer, serving as the conductive channel of the gallium arsenide device.

[0038] Preferably, the arsenide buffer layer is made of gallium arsenide and has a thickness of 800 nm; the arsenide channel layer is made of indium gallium arsenide and has a thickness of 300 nm; the arsenide isolation layer is made of indium aluminum arsenide and has a thickness of 3 nm; the arsenide barrier layer is made of indium gallium phosphide and has a thickness of 20 nm; and the arsenide cap layer is made of indium aluminum arsenide and has a thickness of 5 nm.

[0039] In this embodiment, the gallium nitride device electrode gate 82 is a multilayer metal material. The bottom layer is one of Ni, Ti, TiN, and TaN, and the second or higher layers are one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu. Preferably, the materials of the gallium nitride device electrode gate 82 from bottom to top are Ni and Au, with thicknesses of 50 nm and 400 nm, respectively.

[0040] In this embodiment, the gallium nitride device electrode source 83 is a multilayer metal material. The bottom two layers are Ti and Al, or Ta and Al, or Mo and Al from bottom to top. The other layers include one or more of Ti, Al, Ni, Au, Mo, Pt, and W. Preferably, the material of the gallium nitride device electrode source 83 from bottom to top is Ti, Al, Ni, and Au, with thicknesses of 20nm, 120nm, 40nm, and 50nm, respectively.

[0041] In this embodiment, the gallium nitride device electrode drain 81 is a multilayer metal material. The bottom two layers are Ti and Al, or Ta and Al, or Mo and Al from bottom to top. The other layers include one or more of Ti, Al, Ni, Au, Mo, Pt, and W. Preferably, the material of the gallium nitride device electrode drain 81 from bottom to top is Ti, Al, Ni, and Au, with thicknesses of 20 nm, 120 nm, 40 nm, and 50 nm, respectively.

[0042] In this embodiment, the gallium arsenide device electrode gate 92 is a multilayer metal material. The bottom layer is one of Ti, Ta, Ni, TiN, and TaN, and the second or higher layers are one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu. Preferably, the materials of the gallium arsenide device electrode gate 92 from bottom to top are Ti, Pt, and Au, with thicknesses of 50nm, 50nm, and 300nm, respectively.

[0043] In this embodiment, the gallium arsenide device electrode drain 91 is a multilayer metal material, with the bottom two layers being Ni and Ge, or Mo and Al, from bottom to top, and the other layers being one or more of Ni and Au; preferably, the material of the gallium arsenide device electrode drain 91 from bottom to top is Ni, Ge, Au, Ni, Au; and the thickness is 5nm, 20nm, 100nm, 25nm, 100nm.

[0044] In this embodiment, the source electrode 93 of the gallium arsenide device is a multilayer metal material, with the bottom two layers being Ni and Ge, or Mo and Al, from bottom to top, and the other layers being one or more of Ni and Au; preferably, the material of the source electrode 93 of the gallium arsenide device from bottom to top is Ni, Ge, Au, Ni, Au, with a thickness of 5nm, 20nm, 100nm, 25nm, 100nm.

[0045] In this embodiment, the back metal 5 is a multilayer metal material, which is Ni / Au, Ti / Au, Ni / Cu, or Ti / Cu from bottom to top; preferably, the material of the back metal 5 is Ti / Au from bottom to top, with a thickness of 100nm and 5μm.

[0046] Referring to Figure 2, a typical fabrication process for the above-mentioned gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chips is as follows:

[0047] S1: Select substrate 1;

[0048] Specifically, the surface grease and contaminants are removed with acetone, an organic compound, then the silicon substrate is cleaned with flowing deionized water and dried with high-purity nitrogen. The thickness of the silicon substrate is 100 μm.

[0049] S2: Epitaxial layer 2 of gallium nitride device is epitaxially grown on substrate 1;

[0050] Specifically, gallium nitride (HEMT) epitaxial layers are grown on silicon substrates using MOCVD (Metal-organic Chemical Vapor Deposition) equipment and technology under high temperature conditions (800-1100℃).

[0051] S3: Perform the fabrication process for gallium nitride devices;

[0052] Specifically, the process begins with photolithography and etching of the surface to achieve isolation between devices. Then, photoresist is used as a mask to deposit the source and drain metals, and the gate metal is deposited in the same way.

[0053] S4: Etching to remove gallium nitride epitaxial layer in a portion of the area;

[0054] Specifically, the sample is exposed to ultraviolet light using a specific photomask to obtain the specified structure. Then, it is etched using an inductively coupled plasma (ICP) device. After etching, the sample is placed in acetone to remove the photoresist and organic contaminants on the surface. Then, it is placed in an acidic solvent to remove the surface oxide layer and inorganic contaminants, and finally dried in a nitrogen atmosphere.

[0055] S5: Within the etched groove obtained in step S4, a gallium arsenide epitaxial transition layer 3 and a gallium arsenide device epitaxial layer 4 are epitaxially grown in one step.

[0056] Specifically, gallium arsenide epitaxial transition layers and gallium arsenide device epitaxial layers are epitaxially grown on silicon substrates using MOCVD (Metal-organic Chemical Vapor Deposition) equipment and technology under high temperature conditions (800-1100℃).

[0057] S6: Fabrication of gallium arsenide devices;

[0058] Specifically, the process begins with photolithography and etching of the surface to achieve isolation between devices. Then, photoresist is used as a mask to deposit the source and drain metals, and the gate metal is deposited in the same way.

[0059] S7: Perform metal interconnection of the front electrode;

[0060] Specifically, air bridge interconnects or via interconnects are used to connect the metal wiring. Air bridge interconnects create a "bridge" between the metal wirings to prevent direct contact and short circuits. Via interconnects involve creating a small hole in the passivation layer, allowing the metal wiring to pass through and connect.

[0061] S8: Etch back through-hole 6;

[0062] Specifically, ultraviolet exposure is performed using a specific photomask to obtain the specified structure, and then etching is performed using an inductively coupled plasma (ICP) device to form through-holes.

[0063] S9: Deposited back metal 5;

[0064] Metal is grown on a wafer using electron beam evaporation equipment and technology. After growth is complete, the wafer is soaked in acetone and peeled off, thus forming the back metal.

[0065] This completes the fabrication of gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chips.

[0066] The technical solutions of the present invention are not limited to the specific embodiments described above. Any technical modifications made in accordance with the technical solutions of the present invention fall within the protection scope of the present invention.

Claims

1. A gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip, characterized in that, The system includes a back metal (5), a substrate (1), a gallium nitride (GaN) device epitaxial layer (2), a GaN device electrode drain (81), a GaN device electrode gate (82), a GaN device electrode source (83), a back via (6), a gallium arsenide (GaAs) epitaxial transition layer (3), a GaAs device epitaxial layer (4), a GaAs device electrode source (93), a GaAs device electrode gate (92), and a GaAs device electrode drain (91). The GaN and GaAs epitaxial materials and the radio frequency device share the back metal (5) and the substrate (1). Gallium arsenide (GaAs) radio frequency devices achieve horizontal monolithic heterogeneous integration by selectively growing gallium arsenide (GaAs) material in selected areas on a GaAs wafer and then fabricating GaAs devices. The back metal (5) is connected to the source electrode (83) of the GaAs device and the source electrode (93) of the GaAs device through a back via (6). The gate electrode (82) of the GaAs device and the gate electrode (92) of the GaAs device are interconnected by wires, and the drain electrode (81) of the GaAs device and the drain electrode (91) of the GaAs device are interconnected by wires.

2. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The substrate (1) is made of silicon and has a thickness of 30-500 μm.

3. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The material of the gallium nitride device epitaxial layer (2) is a compound formed from one or more of gallium nitride, aluminum nitride, and indium nitride; the gallium nitride device epitaxial layer (2) comprises, from bottom to top, a nitride nucleation layer, a nitride transition layer, a nitride buffer layer, a nitride channel layer, and a nitride barrier layer; the material of the nitride nucleation layer is aluminum nitride, and the thickness is 50-300 nm; the material of the nitride transition layer is graded aluminum gallium nitride or aluminum nitride / aluminum gallium nitride supercrystal. The nitride buffer layer is made of gallium nitride and has a thickness of 500-1000 nm; the nitride channel layer is made of gallium nitride, indium gallium nitride, or aluminum gallium nitride and has a thickness of 50-500 nm; the nitride barrier layer is made of aluminum gallium nitride or indium aluminum nitride and has a thickness of 5-30 nm; a two-dimensional electron gas is formed between the nitride channel layer and the nitride barrier layer, serving as the conductive channel for the gallium nitride radio frequency device.

4. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The gallium arsenide epitaxial transition layer (3) is made of germanium or a compound semiconductor formed by silicon and germanium, with a thickness of 50-500 nm; the gallium arsenide device epitaxial layer (4) is made of a compound composed of one or more of gallium arsenide, indium arsenide, aluminum arsenide, and indium phosphide; the gallium arsenide device epitaxial layer (4) includes, from bottom to top, an arsenide buffer layer, an arsenide channel layer, an arsenide isolation layer, an arsenide barrier layer, and an arsenide cap layer; the arsenide buffer layer is made of gallium arsenide, with a thickness of 50-1000 nm; the arsenide channel layer is made of gallium arsenide or indium gallium arsenide. The thickness of the arsenide isolation layer is 50-300 nm; the material of the arsenide isolation layer is one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium phosphide, and indium gallium phosphide, and the thickness is 1-5 nm; the material of the arsenide barrier layer is one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium aluminum gallium arsenide, and indium gallium phosphide, and the thickness is 5-30 nm; the material of the arsenide cap layer is one of aluminum gallium arsenide, indium aluminum arsenide, indium aluminum gallium arsenide, indium aluminum gallium arsenide, and indium gallium phosphide, and the thickness is 2-10 nm; a two-dimensional electron gas is formed between the arsenide channel layer and the arsenide isolation layer, serving as the conductive channel of the gallium arsenide device.

5. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The gallium nitride device electrode gate (82) is a multilayer metal material, with the bottom layer being one of Ni, Ti, TiN, and TaN, and the second or higher layers being one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu; the gallium nitride device electrode source (83) is a multilayer metal material, with the bottom two layers being Ti and Al, or Ta and Al, or Mo and Al, and the other layers being one or more of Ti, Al, Ni, Au, Mo, Pt, and W; the gallium nitride device electrode drain (81) is a multilayer metal material, with the bottom two layers being Ti and Al, or Ta and Al, or Mo and Al, and the other layers being one or more of Ti, Al, Ni, Au, Mo, Pt, and W. The gallium arsenide device electrode gate (92) is a multilayer metal material, the bottom layer is one of Ti, Ta, Ni, TiN, TaN, and the second or higher layers are one of Al, Au, Ti, Ta, Pt, TiN, TaN, W, Cu, or more; the gallium arsenide device electrode drain (91) is a multilayer metal material, the bottom two layers from bottom to top are Ni and Ge, or Mo and Al, and the other layers are one of Ni and Au, or more; the gallium arsenide device electrode source (93) is a multilayer metal material, the bottom two layers from bottom to top are Ni and Ge, or Mo and Al, and the other layers are one of Ni and Au, or more.

6. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The back metal (5) is a multilayer metal material, consisting of Ni / Au, Ti / Au, Ni / Cu, or Ti / Cu from bottom to top.

7. A method for fabricating a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip as described in any one of claims 1-6, characterized in that... Includes the following steps: S1: Select substrate (1); S2: An epitaxial layer (2) of gallium nitride device is epitaxially grown on the substrate (1); S3: Perform the fabrication of gallium nitride devices; S4: Etching to remove a portion of the gallium nitride device epitaxial layer (2); S5: In the etched groove obtained in step S4, a gallium arsenide epitaxial transition layer (3) and a gallium arsenide device epitaxial layer (4) are epitaxially grown in one step; S6: Fabrication of gallium arsenide devices; S7: Perform metal interconnection of the front electrode; S8: Etch back through hole (6); S9: Deposit back metal (5) to obtain gallium nitride and gallium arsenide side-mounted monolithic heterogeneous radio frequency chip.

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