Logic enable switch and teach pendant
By designing a logic enable switch and combining a switch module and a logic operation module, the high cost of existing safety switches was solved, achieving the effect of reducing the cost of safety switch functionality.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- CHENGDU CRP ROBOT TECH CO LTD
- Filing Date
- 2024-12-31
- Publication Date
- 2026-06-04
AI Technical Summary
Existing safety switches are expensive, which limits their application in industrial automation and machinery operation.
Design a logic enable switch, including a switch module and a logic operation module, which outputs different switch signals based on different switch states and performs logic operations to output enable or stop signals, thereby reducing the cost of safety switches.
By combining the switch module and the logic operation module, the function of the safety switch is realized, the cost of the safety switch is reduced, and the flexibility and reliability of operation are improved.
Smart Images
Figure CN2024144668_04062026_PF_FP_ABST
Abstract
Description
Logic enable switches and teach pendants
[0001] Cross-references to related applications
[0002] This disclosure claims priority to Chinese Patent Application No. 202411741936.X, filed on November 29, 2024, entitled "Logic Enable Switch and Teach Pendant", the entire contents of which are incorporated herein by reference. Technical Field
[0003] This disclosure relates to the field of safety switches, and more specifically, to a logic enable switch and a teach pendant. Background Technology
[0004] Safety switches are crucial in modern industrial automation and machinery operation. As key components protecting operators and equipment, they operate within protective circuits and can quickly cut off power in emergencies to prevent accidents. However, despite their significant safety advantages, safety switches are relatively expensive. Summary of the Invention
[0005] One of the purposes of this disclosure is to provide a logic enable switch and teach pendant to address the problem of high cost of existing safety switches.
[0006] In a first aspect, this disclosure provides a logic enable switch, which includes a switch module and a logic operation module; the switch module is electrically connected to the logic operation module.
[0007] The switching module is configured to output different switching signals according to different switching states; the switching states include a first state, a second state, and a third state.
[0008] The logic operation module is configured to perform logic operations based on the switching signal output by the switching module, and output an enable signal or a stop signal based on the logic operation result; wherein, when the switching module switches from the first state to the second state, the logic operation module outputs the enable signal; when the switching module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs the stop signal.
[0009] In an optional implementation, the switching module includes a first switch and a second switch; both the first switch and the second switch are electrically connected to the logic operation module.
[0010] When the first switch is closed and the second switch is open, the switch state is the first state;
[0011] When both the first switch and the second switch are closed, the switch state is the second state;
[0012] When the first switch is open and the second switch is closed, the switch state is the third state.
[0013] In an optional implementation, the logic operation module includes a first operation unit and a second operation unit;
[0014] Both the first arithmetic unit and the second arithmetic unit are electrically connected to the switch module, and the first arithmetic unit is electrically connected to the second arithmetic unit.
[0015] The first arithmetic unit is configured to perform a first logical operation based on the switch signal output by the switch module, and output an operation result signal based on the result of the first logical operation;
[0016] The second arithmetic unit is configured to perform a second logical operation based on the switch signal output by the switch module and the operation result signal output by the first arithmetic unit, and output an enable signal or a stop signal based on the result of the second logical operation.
[0017] In an optional implementation, the first arithmetic unit includes a first NAND gate and a second NAND gate, and the second arithmetic unit includes an AND gate;
[0018] The first input terminal of the first NAND gate is electrically connected to the first output pin of the switch module; the second input terminal of the first NAND gate is electrically connected to the output terminal of the second NAND gate; and the output terminal of the first NAND gate is electrically connected to the first input terminal of the second NAND gate. The power supply pin of the switch module is electrically connected to the power supply module.
[0019] The second input terminal of the second NAND gate is electrically connected to the second output pin of the switch module, and the output terminal of the second NAND gate is electrically connected to the first input terminal of the AND gate.
[0020] The second input terminal of the AND gate is electrically connected to the first output pin of the switch module, and the third input terminal of the AND gate is electrically connected to the second output pin of the switch module.
[0021] The switching signal output by the switching module includes a first switching signal output through the first output pin and a second switching signal output through the second output pin. When the switching state of the switching module is the first state, the first switching signal is a high-level signal and the second switching signal is a low-level signal; when the switching state of the switching module is the second state, both the first switching signal and the second switching signal are high-level signals; when the switching state of the switching module is the third state, the first switching signal is a low-level signal and the second switching signal is a high-level signal.
[0022] In an optional embodiment, the first arithmetic unit further includes a first resistor, a second resistor, a first capacitor, and a second capacitor, and the second arithmetic unit further includes a third resistor, a fourth resistor, and a third capacitor;
[0023] One end of the first resistor is electrically connected to the output terminal of the first NAND gate, and the other end of the first resistor is electrically connected to the power module; one end of the first capacitor is electrically connected to the output terminal of the first NAND gate, and the other end of the first capacitor is grounded.
[0024] One end of the second resistor is electrically connected to the output terminal of the second NAND gate, and the other end of the second resistor is electrically connected to the power module; one end of the second capacitor is electrically connected to the output terminal of the second NAND gate, and the other end of the second capacitor is grounded.
[0025] One end of the third resistor is electrically connected to the output of the AND gate, and the other end of the third resistor is electrically connected to the power module; the fourth resistor is electrically connected to the output of the AND gate; one end of the third capacitor is electrically connected to the output of the AND gate, and the other end of the third capacitor is grounded.
[0026] In an optional implementation, the logic enable switch further includes a switch debouncing module, which is electrically connected to both the switch module and the logic operation module.
[0027] The switch debouncing module is configured to perform debouncing processing on the switch signal output by the switch module.
[0028] In an optional implementation, the switch debouncing module includes a fourth capacitor and a fifth capacitor;
[0029] One end of the fourth capacitor is grounded, and the other end of the fourth capacitor is electrically connected to the first output pin of the switching module.
[0030] One end of the fifth capacitor is grounded, and the other end of the fifth capacitor is electrically connected to the second output pin of the switching module.
[0031] In an optional implementation, the switch debounce module further includes a fifth resistor, a sixth resistor, a sixth capacitor, and a seventh capacitor;
[0032] One end of the fifth resistor is electrically connected to the first output pin of the switching module, and the other end of the fifth resistor is electrically connected to the logic operation module; one end of the sixth capacitor is electrically connected between the fifth resistor and the logic operation module, and the other end of the sixth capacitor is grounded.
[0033] One end of the sixth resistor is electrically connected to the second output pin of the switching module, and the other end of the sixth resistor is electrically connected to the logic operation module; one end of the seventh capacitor is electrically connected between the sixth resistor and the logic operation module, and the other end of the seventh capacitor is grounded.
[0034] In an optional implementation, the switch debounce module further includes a seventh resistor and an eighth resistor;
[0035] One end of the seventh resistor is electrically connected between the first output pin of the switching module and the logic operation module, and the other end of the seventh resistor is grounded.
[0036] One end of the eighth resistor is electrically connected between the second output pin of the switching module and the logic operation module, and the other end of the eighth resistor is grounded.
[0037] Secondly, this disclosure provides a teach pendant, which includes a logic enable switch and a power module as described in any of the foregoing embodiments.
[0038] The logic enable switch and teach pendant provided in this disclosure include a switch module and a logic operation module. The switch module and the logic operation module are electrically connected. The switch module is configured to output different switch signals according to different switch states. The switch states include a first state, a second state, and a third state. The logic operation module is configured to perform logic operations based on the switch signals output by the switch module and output an enable signal or a stop signal based on the logic operation result. Specifically, when the switch module switches from the first state to the second state, the logic operation module outputs an enable signal; when the switch module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs a stop signal. The combination of the switch module and the logic operation module realizes the function of a safety switch, thereby reducing the cost of the safety switch. Attached Figure Description
[0039] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of this disclosure and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0040] Figure 1 shows a schematic diagram of a logic enable switch provided in an embodiment of this disclosure;
[0041] Figure 2 shows a schematic diagram of a switching module provided in an embodiment of the present disclosure;
[0042] Figure 3 shows a schematic diagram of a logic operation module provided in an embodiment of this disclosure;
[0043] Figure 4 shows another schematic diagram of the logic operation module provided in the embodiments of this disclosure;
[0044] Figure 5 shows a state diagram of the logic operation module provided in an embodiment of this disclosure;
[0045] Figure 6 shows another schematic diagram of the logic enable switch provided in an embodiment of this disclosure.
[0046] Icons: 10 - Logic enable switch; 100 - Switch module; 110 - First switch; 120 - Second switch; 200 - Logic operation module; 210 - First arithmetic unit; 220 - Second arithmetic unit; U1 - First NAND gate; U2 - Second NAND gate; U3 - AND gate; R1 - First resistor; R2 - Second resistor; R3 - Third resistor; R4 - Fourth resistor; R5 - Fifth resistor; R6 - Sixth resistor; R7 - Seventh resistor; R8 - Eighth resistor; 300 - Switch debouncing module; C1 - First capacitor; C2 - Second capacitor; C3 - Third capacitor; C4 - Fourth capacitor; C5 - Fifth capacitor; C6 - Sixth capacitor; C7 - Seventh capacitor; A1 - First output pin; A2 - Second output pin. Detailed Implementation
[0047] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some possible implementations of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0048] Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely to illustrate selected embodiments of the disclosure. All other implementations based on the embodiments of this disclosure, obtained by those skilled in the art without inventive effort, are within the scope of protection of this disclosure.
[0049] It should be noted that relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.
[0050] Please refer to Figure 1, which shows a schematic diagram of a logic enable switch provided in an embodiment of this disclosure. The logic enable switch 10 includes a switch module 100 and a logic operation module 200, and the switch module 100 and the logic operation module 200 are electrically connected.
[0051] The switch module 100 is configured to output different switch signals according to different switch states. The switch states include a first state, a second state, and a third state.
[0052] In some implementations, the switch module 100 is in a first state when no external force is applied to the logic enable switch 10; in a second state when a slight external force is applied to the logic enable switch 10; and in a third state when a larger external force is applied to the logic enable switch 10.
[0053] The logic operation module 200 is configured to perform logic operations based on the switching signals output by the switching module 100, and output an enable signal or a stop signal based on the logic operation result.
[0054] When the switch module 100 switches from the first state to the second state, the logic operation module 200 outputs an enable signal; when the switch module 100 switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module 200 outputs a stop signal.
[0055] Optionally, this logic enable switch is only valid when the switch module 100 switches from the first state to the second state.
[0056] In some implementations, if the result of the logic operation is high, the logic operation module 200 outputs an enable signal to start the device connected to the logic enable switch 10; if the result of the logic operation is low, the logic operation module 200 outputs a stop signal to stop the device connected to the logic enable switch 10.
[0057] The logic enable switch provided in this embodiment includes a switch module and a logic operation module. The switch module and the logic operation module are electrically connected. The switch module is configured to output different switch signals according to different switch states. The switch states include a first state, a second state, and a third state. The logic operation module is configured to perform logic operations based on the switch signals output by the switch module and output an enable signal or a stop signal based on the logic operation result. Specifically, when the switch module switches from the first state to the second state, the logic operation module outputs an enable signal; when the switch module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs a stop signal. The combination of the switch module and the logic operation module achieves the function of a safety switch, thereby reducing the cost of the safety switch.
[0058] In some embodiments, as shown in FIG2, the switch module 100 includes a first switch 110 and a second switch 120, both of which are electrically connected to the logic operation module 200.
[0059] When the first switch 110 is closed and the second switch 120 is open, the switch state is the first state, as shown in Figure 2(a).
[0060] When both the first switch 110 and the second switch 120 are closed, the switch state is the second state, as shown in Figure 2(b).
[0061] When the first switch 110 is open and the second switch 120 is closed, the switch state is the third state, as shown in Figure 2(c).
[0062] As shown in Figure 3, the logic operation module 200 includes a first operation unit 210 and a second operation unit 220. Both the first operation unit 210 and the second operation unit 220 are electrically connected to the switch module 100, and the first operation unit 210 and the second operation unit 220 are electrically connected.
[0063] The first arithmetic unit 210 is configured to perform a first logical operation based on the switch signal output by the switch module 100, and output the operation result signal based on the result of the first logical operation.
[0064] The second arithmetic unit 220 is configured to perform a second logic operation based on the switch signal output by the switch module 100 and the operation result signal output by the first arithmetic unit 210, and output an enable signal or a stop signal based on the result of the second logic operation.
[0065] In some embodiments, as shown in FIG4, the first arithmetic unit 210 includes a first NAND gate U1 and a second NAND gate U2, and the second arithmetic unit 220 includes an AND gate U3. The first input terminal of the first NAND gate U1 is electrically connected to the first output pin A1 of the switch module 100, the second input terminal of the first NAND gate U1 is electrically connected to the output terminal of the second NAND gate U2, and the output terminal of the first NAND gate U1 is electrically connected to the first input terminal of the second NAND gate U2; the power supply pin of the switch module 100 is electrically connected to the power supply module.
[0066] The second input terminal of the second NAND gate U2 is electrically connected to the second output pin A2 of the switch module 100, and the output terminal of the second NAND gate U2 is electrically connected to the first input terminal of the AND gate U3.
[0067] The second input terminal of AND gate U3 is electrically connected to the first output pin A1 of switch module 100, and the third input terminal of AND gate U3 is electrically connected to the second output pin A2 of switch module 100.
[0068] It should be noted that the first switch 110, the second switch 120, the first NAND gate U1, the second NAND gate U2, and the AND gate U3 have more supply channels than existing safety switches. Therefore, they will not limit the flexibility of procurement or the stability of the supply chain. In particular, when facing market demand fluctuations or supply interruptions, they will not cause production delays or increased costs due to a single supply channel.
[0069] The switching signals output by the switching module 100 include a first switching signal output through the first output pin A1 and a second switching signal output through the second output pin A2. When the switching state of the switching module 100 is the first state, the first switching signal is a high-level signal and the second switching signal is a low-level signal; when the switching state of the switching module 100 is the second state, both the first and second switching signals are high-level signals; when the switching state of the switching module 100 is the third state, the first switching signal is a low-level signal and the second switching signal is a high-level signal.
[0070] Optionally, when the switching state of the switch module 100 is in the first state, as shown in Figure 2(a), the first switch 110 is in the closed state and the second switch 120 is in the open state. The VCC output by the power module is output to the logic operation module through the first output pin A1 of the switch module 100, that is, the first switch signal is a high-level signal and the second switch signal is a low-level signal. When the switching state of the switch module 100 is in the second state, as shown in Figure 2(b), both the first switch 110 and the second switch 120 are in the closed state. The VCC output by the power module is output to the logic operation module through the first output pin A1 and the second output pin A2 of the switch module 100, that is, both the first switch signal and the second switch signal are high-level signals. When the switching state of the switch module 100 is in the third state, as shown in Figure 2(c), the first switch 110 is in the open state and the second switch 120 is in the closed state. The VCC output by the power module is output to the logic operation module through the second output pin A2 of the switch module 100, that is, the first switch signal is a low-level signal and the second switch signal is a high-level signal.
[0071] The truth table of the logic operation module 200 is shown in Table 1. The first stroke is the switch module 100 switching from the first state to the second state; the second stroke is the switch module 100 switching from the second state to the third state; the third stroke is the switch module 100 switching from the third state to the second state; and the fourth stroke is the switch module 100 switching from the second state to the first state. Wherein, K1 represents the first switch signal, K2 represents the second switch signal, and G... N-1 G is represented as the output signal of the second NAND gate U2 in the previous operation. N Y represents the current output result signal of the second NAND gate U2, and Y represents the enable / stop signal output by the AND gate U3.
[0072] Table 1
[0073] Based on Table 1, the logical operation expressions for calculating the current output of the second NAND gate U2 and the logical operation expressions for calculating the output of the AND gate U3 can be obtained as follows: Y = K2 * K1 * G N
[0074] The first switch signal K1, the second switch signal K2, and the current output signal G of the second NAND gate U2. N The state diagram is shown in Figure 5. It can be seen that the logic enable switch 10 can be a valid output when the switch module 100 is in the first stroke (from the first state to the second state), and an invalid output in other strokes.
[0075] To improve the stability of the signals output by the first NAND gate U1, the second NAND gate U2, and the AND gate U3, as shown in Figure 6, the first arithmetic unit 210 further includes a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2, and the second arithmetic unit 220 further includes a third resistor R3, a fourth resistor R4, and a third capacitor C3.
[0076] One end of the first resistor R1 is electrically connected to the output terminal of the first NAND gate U1, and the other end of the first resistor R1 is electrically connected to the power supply module; one end of the first capacitor C1 is electrically connected to the output terminal of the first NAND gate U1, and the other end of the first capacitor C1 is grounded.
[0077] One end of the second resistor R2 is electrically connected to the output terminal of the second NAND gate U2, and the other end of the second resistor R2 is electrically connected to the power supply module; one end of the second capacitor C2 is electrically connected to the output terminal of the second NAND gate U2, and the other end of the second capacitor C2 is grounded.
[0078] One end of the third resistor R3 is electrically connected to the output of AND gate U3, and the other end of the third resistor R3 is electrically connected to the power module; the fourth resistor R4 is electrically connected to the output of AND gate U3; one end of the third capacitor C3 is electrically connected to the output of AND gate U3, and the other end of the third capacitor C3 is grounded.
[0079] The first resistor R1, the second resistor R2, and the third resistor R3 are all pull-up resistors. The first resistor R1 ensures that the output terminal of the first NAND gate U1 is not floating, so as to stabilize the signal output by the first NAND gate U1; the second resistor R2 ensures that the output terminal of the second NAND gate U2 is not floating, so as to stabilize the signal output by the second NAND gate U2; and the third resistor R3 ensures that the output terminal of the AND gate U3 is not floating, so as to stabilize the signal output by the AND gate U3.
[0080] The first capacitor C1, the second capacitor C2, and the third capacitor C3 are all output bypass capacitors. The first capacitor C1 can filter out the interference of other signals on the output signal of the first NAND gate U1; the second capacitor C2 can filter out the interference of other signals on the output signal of the second NAND gate U2; and the third capacitor C3 can filter out the interference of other signals on the output signal of the AND gate U3.
[0081] To improve the accuracy and reliability of the logic enable switch, as shown in Figure 5, the logic enable switch 10 also includes a switch debouncing module 300, which is electrically connected to the switch module 100 and the logic operation module 200.
[0082] The switch debouncing module 300 is configured to debouncing the switch signal output by the switch module 100.
[0083] It should be noted that there will be jitter at the moment of state switching of the switch module 100, which will cause the switch output of the switch module 100 to the logic operation module 200 to be inaccurate, resulting in logical operation errors in the logic operation module 200, and thus causing the output signal of the logic operation module 200 to be incorrect. Therefore, a switch debouncing module 300 is added to debouncing the switch signal output by the switch module 100, eliminating the jitter that exists at the moment of state switching of the switch module 100, thereby improving the accuracy and reliability of the logic enable switch 10.
[0084] In some embodiments, as shown in FIG5, the switch debouncing module 300 includes a fourth capacitor C4 and a fifth capacitor C5. One end of the fourth capacitor C4 is grounded, and the other end of the fourth capacitor C4 is electrically connected to the first output pin A1 of the switch module 100. One end of the fifth capacitor C5 is grounded, and the other end of the fifth capacitor C5 is electrically connected to the second output pin A2 of the switch module 100.
[0085] Both the fourth capacitor C4 and the fifth capacitor C5 are bypass capacitors. The fourth capacitor C4 can eliminate the jitter signal when the first output terminal of the switching module 100 outputs the first switching signal; the fifth capacitor C5 can eliminate the jitter signal when the second output terminal of the switching module 100 outputs the second switching signal.
[0086] It should be noted that capacitors can store charge. When the switching module 100 switches states quickly, the current in the circuit changes suddenly, causing voltage fluctuations. Capacitors can absorb these rapidly changing energies and reduce voltage fluctuations.
[0087] To filter out interference and protect the logic operation module 200, as shown in Figure 5, the switch debouncing module 300 also includes a fifth resistor R5, a sixth resistor R6, a sixth capacitor C6, and a seventh capacitor C7.
[0088] One end of the fifth resistor R5 is electrically connected to the first output pin A1 of the switch module 100, and the other end of the fifth resistor R5 is electrically connected to the logic operation module 200. One end of the sixth capacitor C6 is electrically connected between the fifth resistor R5 and the logic operation module 200, and the other end of the sixth capacitor C6 is grounded. One end of the sixth resistor R6 is electrically connected to the second output pin A2 of the switch module 100, and the other end of the sixth resistor R6 is electrically connected to the logic operation module 200. One end of the seventh capacitor C7 is electrically connected between the sixth resistor R6 and the logic operation module 200, and the other end of the seventh capacitor C7 is grounded.
[0089] Both the fifth resistor R5 and the sixth resistor R6 are current-limiting filter resistors. When the first switch 110 in the switch module 100 is closed, the fifth resistor R5 can limit the current input to the first NAND gate U1 and the AND gate U3, thus protecting the first NAND gate U1 and the AND gate U3. Furthermore, the fifth resistor R5 and the sixth capacitor C6 can form an RC filter, making the first switch signal output from the first output pin A1 of the switch module 100 more stable. When the second switch 120 in the switch module 100 is closed, the sixth resistor R6 can limit the current input to the second NAND gate U2 and the AND gate U3, thus protecting the second NAND gate U2 and the AND gate U3. Furthermore, the sixth resistor R6 and the seventh capacitor C7 can form an RC filter, making the second switch signal output from the second output pin A2 of the switch module 100 more stable.
[0090] To make the switching signals input to the logic operation module 200 more stable, as shown in Figure 5, the switch debouncing module 300 also includes a seventh resistor R7 and an eighth resistor R8.
[0091] One end of the seventh resistor R7 is electrically connected between the first output pin A1 of the switch module 100 and the logic operation module 200, and the other end of the seventh resistor R7 is grounded. One end of the eighth resistor R8 is electrically connected between the second output pin A2 of the switch module 100 and the logic operation module 200, and the other end of the eighth resistor R8 is grounded.
[0092] The seventh resistor R7 and the eighth resistor R8 are both pull-down resistors for the switching signals. The seventh resistor R7 ensures that the input terminals of the first NAND gate U1 and AND gate U3 are not in a floating state, making the first switching signals input to the first NAND gate U1 and AND gate U3 more stable. The eighth resistor R8 ensures that the input terminals of the second NAND gate U2 and AND gate U3 are not in a floating state, making the second switching signals input to the second NAND gate U2 and AND gate U3 more stable.
[0093] It should be noted that VCC in Figure 5 refers to the power supplied by the power module.
[0094] This disclosure also provides a teach pendant, which includes the logic enable switch and power module described above.
[0095] It should be noted that a teach pendant is a handheld device used for robot control. The teach pendant can be configured for manual robot operation, programming, parameter configuration, and monitoring. The logic enable switch included in the teach pendant ensures operational safety. When the operator lightly presses the logic enable switch, the robot's servo drive unit is activated, allowing the robot to move. If the operator does not press or firmly presses the logic enable switch, the robot's servo drive unit is deactivated, and the robot stops moving. This prevents injury or robot damage caused by operator incapacitation or excessive stress leading to misoperation.
[0096] In the various implementations provided in this disclosure, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the possible architecture, functions, and operations of apparatus, methods, and computer program products according to various implementations of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions configured to perform a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, or they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.
[0097] If the functionality is implemented as a software module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0098] The above are merely optional embodiments of this disclosure and are not intended to limit this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure. Industrial applicability
[0099] The logic enable switch and teach pendant provided in this disclosure include a switch module and a logic operation module. The switch module and the logic operation module are electrically connected. The switch module is configured to output different switch signals according to different switch states. The switch states include a first state, a second state, and a third state. The logic operation module is configured to perform logic operations based on the switch signals output by the switch module and output an enable signal or a stop signal based on the logic operation result. Specifically, when the switch module switches from the first state to the second state, the logic operation module outputs an enable signal; when the switch module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs a stop signal. The combination of the switch module and the logic operation module realizes the function of a safety switch, thereby reducing the cost of the safety switch.
Claims
1. A logic-enabled switch, characterized by, The logic enable switch includes a switch module and a logic operation module; the switch module is electrically connected to the logic operation module. The switching module is configured to output different switching signals according to different switching states; the switching states include a first state, a second state, and a third state. The logic operation module is configured to perform logic operations based on the switching signal output by the switching module, and output an enable signal or a stop signal based on the logic operation result; wherein, when the switching module switches from the first state to the second state, the logic operation module outputs the enable signal; when the switching module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs the stop signal.
2. The logic enable switch according to claim 1, characterized in that, The switching module includes a first switch and a second switch; both the first switch and the second switch are electrically connected to the logic operation module. When the first switch is closed and the second switch is open, the switch state is the first state; When both the first switch and the second switch are closed, the switch state is the second state; When the first switch is open and the second switch is closed, the switch state is the third state.
3. The logic enable switch according to claim 1, characterized in that, The logic operation module includes a first operation unit and a second operation unit; Both the first arithmetic unit and the second arithmetic unit are electrically connected to the switch module, and the first arithmetic unit is electrically connected to the second arithmetic unit. The first arithmetic unit is configured to perform a first logical operation based on the switch signal output by the switch module, and output an operation result signal based on the result of the first logical operation; The second arithmetic unit is configured to perform a second logical operation based on the switch signal output by the switch module and the operation result signal output by the first arithmetic unit, and output an enable signal or a stop signal based on the result of the second logical operation.
4. The logic enable switch according to claim 3, characterized in that, The first arithmetic unit includes a first NAND gate and a second NAND gate, and the second arithmetic unit includes an AND gate; The first input terminal of the first NAND gate is electrically connected to the first output pin of the switch module; the second input terminal of the first NAND gate is electrically connected to the output terminal of the second NAND gate; and the output terminal of the first NAND gate is electrically connected to the first input terminal of the second NAND gate. The power supply pin of the switch module is electrically connected to the power supply module. The second input terminal of the second NAND gate is electrically connected to the second output pin of the switch module, and the output terminal of the second NAND gate is electrically connected to the first input terminal of the AND gate. The second input terminal of the AND gate is electrically connected to the first output pin of the switch module, and the third input terminal of the AND gate is electrically connected to the second output pin of the switch module. The switching signal output by the switching module includes a first switching signal output through the first output pin and a second switching signal output through the second output pin. When the switching state of the switching module is the first state, the first switching signal is a high-level signal and the second switching signal is a low-level signal; when the switching state of the switching module is the second state, both the first switching signal and the second switching signal are high-level signals; when the switching state of the switching module is the third state, the first switching signal is a low-level signal and the second switching signal is a high-level signal.
5. The logic enable switch according to claim 4, characterized in that, The first arithmetic unit further includes a first resistor, a second resistor, a first capacitor, and a second capacitor; the second arithmetic unit further includes a third resistor, a fourth resistor, and a third capacitor. One end of the first resistor is electrically connected to the output terminal of the first NAND gate, and the other end of the first resistor is electrically connected to the power module; one end of the first capacitor is electrically connected to the output terminal of the first NAND gate, and the other end of the first capacitor is grounded. One end of the second resistor is electrically connected to the output terminal of the second NAND gate, and the other end of the second resistor is electrically connected to the power module; one end of the second capacitor is electrically connected to the output terminal of the second NAND gate, and the other end of the second capacitor is grounded. One end of the third resistor is electrically connected to the output of the AND gate, and the other end of the third resistor is electrically connected to the power module; the fourth resistor is electrically connected to the output of the AND gate; one end of the third capacitor is electrically connected to the output of the AND gate, and the other end of the third capacitor is grounded.
6. The logic enable switch according to claim 1, characterized in that, The logic enable switch also includes a switch debouncing module, which is electrically connected to the switch module and the logic operation module respectively. The switch debouncing module is configured to perform debouncing processing on the switch signal output by the switch module.
7. The logic enable switch according to claim 6, characterized in that, The switch debounce module includes a fourth capacitor and a fifth capacitor; One end of the fourth capacitor is grounded, and the other end of the fourth capacitor is electrically connected to the first output pin of the switching module. One end of the fifth capacitor is grounded, and the other end of the fifth capacitor is electrically connected to the second output pin of the switching module.
8. The logic enable switch according to claim 7, characterized in that, The switch debounce module also includes a fifth resistor, a sixth resistor, a sixth capacitor, and a seventh capacitor; One end of the fifth resistor is electrically connected to the first output pin of the switching module, and the other end of the fifth resistor is electrically connected to the logic operation module; one end of the sixth capacitor is electrically connected between the fifth resistor and the logic operation module, and the other end of the sixth capacitor is grounded. One end of the sixth resistor is electrically connected to the second output pin of the switching module, and the other end of the sixth resistor is electrically connected to the logic operation module; one end of the seventh capacitor is electrically connected between the sixth resistor and the logic operation module, and the other end of the seventh capacitor is grounded.
9. The logic enable switch according to claim 7, characterized in that, The switch debounce module also includes a seventh resistor and an eighth resistor; One end of the seventh resistor is electrically connected between the first output pin of the switching module and the logic operation module, and the other end of the seventh resistor is grounded. One end of the eighth resistor is electrically connected between the second output pin of the switching module and the logic operation module, and the other end of the eighth resistor is grounded.
10. A teach pendant, characterized in that, The teach pendant includes a logic enable switch as described in any one of claims 1-9 and a power module.