Display module, display device, and driving method

Abstract

The present disclosure provides a display module, a display device, and a driving method. The display module comprises: a touch and display driver circuit, comprising a touch driver circuit and a display driver circuit, wherein the touch driver circuit is electrically connected to a first power signal terminal and a second power signal terminal; and a switching circuit, electrically connected to the display driver circuit, the first power signal terminal, and the second power signal terminal, and configured to connect or disconnect the first power signal terminal and the second power signal terminal to or from the display driver circuit in response to a signal of an enable signal terminal. By means of coordination of the touch driver circuit, the display driver circuit, and the switching circuit, power consumption can be reduced, and energy waste can be avoided.

Description

Display module, display device and driving method

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411730095.2, filed on November 28, 2024, entitled "Display Module, Display Device and Driving Method", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of display technology, and in particular to display modules, display devices, and driving methods. Background Technology

[0004] With the continuous development of display technology, touch display devices have been widely used. Typically, the touch and display functions in a touch display device are controlled independently by two separate chips. To improve the integration of touch display devices, Touch and Display Driver Integration (TDDI) chips have emerged. A TDDI chip is a new type of chip that integrates a separate Display Driver Integrated Circuit (DDIC) and Touch Panel Integrated Circuit (TPIC) into a single chip. Currently, TDDI chips in related technologies generate significant power consumption in practical applications, resulting in energy loss. Summary of the Invention

[0005] The display module provided in this embodiment includes:

[0006] A touch display driving circuit includes: a touch driving circuit and a display driving circuit; the touch driving circuit is electrically connected to a first power signal terminal and a second power signal terminal;

[0007] A switching circuit, electrically connected to the display driving circuit, the first power signal terminal, and the second power signal terminal, is configured to, in response to a signal from the enable signal terminal, turn the first power signal terminal and the second power signal terminal on or off from the display driving circuit.

[0008] In some possible implementations, the switching circuit includes: a first sub-switching circuit and a second sub-switching circuit;

[0009] The first sub-switch circuit is electrically connected to the first power signal terminal and the display driving circuit, and is configured to provide the signal of the first power signal terminal to the display driving circuit in response to the signal of the enable signal terminal.

[0010] The second sub-switch circuit is electrically connected to the second power signal terminal and the display driver circuit, and is configured to provide the signal of the second power signal terminal to the display driver circuit in response to the signal of the enable signal terminal.

[0011] In some possible implementations, the first switching circuit includes: a first switching transistor;

[0012] The gate of the first switching transistor is electrically connected to the enable signal terminal, the first terminal of the first switching transistor is electrically connected to the first power signal terminal, and the second terminal of the first switching transistor is electrically connected to the display driving circuit.

[0013] In some possible implementations, the second switching circuit includes: a second switching transistor;

[0014] The gate of the second switching transistor is electrically connected to the enable signal terminal, the first terminal of the second switching transistor is electrically connected to the second power signal terminal, and the second terminal of the second switching transistor is electrically connected to the display driving circuit.

[0015] In some possible implementations, the touch display driving circuit includes a clock generating circuit electrically connected to the touch driving circuit and the display driving circuit, configured to output a clock signal to the touch driving circuit and the display driving circuit.

[0016] In some possible implementations, the clock generation circuit includes: a first clock generation circuit and a second clock generation circuit; the clock signal includes: a first clock signal and a second clock signal;

[0017] The first clock generating circuit is electrically connected to the touch driving circuit and is configured to output the first clock signal to the touch driving circuit;

[0018] The second clock generating circuit is electrically connected to the display driving circuit and is configured to output the second clock signal to the display driving circuit.

[0019] In some possible implementations, the first clock generating circuit and / or the second clock generating circuit include an oscillator.

[0020] In some possible implementations, the first clock signal and the first clock signal have different phases.

[0021] In some possible implementations, the phase difference between the phase of the first clock signal and the phase of the second clock signal is constant.

[0022] In some possible implementations, it further includes: a power management circuit, which is electrically connected to the first power signal terminal and the second power signal terminal and is configured to provide signals to the first power signal terminal and the second power signal terminal;

[0023] It also includes: a first circuit board, the first circuit board including multiple signal lines, and the power management circuit being electrically connected to the touch display driver circuit through the signal lines.

[0024] In some possible implementations, the power management circuit includes: a first power supply circuit and a second power supply circuit;

[0025] The first power supply circuit is electrically connected to the first power signal terminal and is configured to provide a signal to the first power signal terminal.

[0026] The second power supply circuit is electrically connected to the second power supply signal terminal and is configured to provide a signal to the second power supply signal terminal.

[0027] In some possible implementations, the switching circuit is disposed in the touch display driving circuit.

[0028] In some possible implementations, the switching circuit is located within the power management circuit.

[0029] The display device provided in this disclosure includes the display module described above.

[0030] The driving method for a display module provided in this embodiment includes: the display module having a screen-off mode and a screen-on mode;

[0031] In response to the screen-off mode, the touch display driving circuit causes the switching circuit to respond to the signal at the enable signal terminal and disconnect the first power signal terminal and the second power signal terminal from the display driving circuit.

[0032] The touch display driving circuit responds to the screen-on mode by causing the switching circuit to respond to the enable signal terminal and connect the first power signal terminal and the second power signal terminal to the display driving circuit. Attached Figure Description

[0033] Figure 1 is a schematic diagram of the touch display driving circuit structure of the related technology;

[0034] Figure 2 is a schematic diagram of some structures of the display module provided in the embodiments of this disclosure;

[0035] Figure 3 is a schematic diagram of some other structures of the display module provided in the embodiments of this disclosure;

[0036] Figure 4 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0037] Figure 5 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0038] Figure 6 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0039] Figure 7 is a schematic diagram of the first clock signal and the second clock signal provided in an embodiment of this disclosure;

[0040] Figure 8 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0041] Figure 9 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0042] Figure 10 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0043] Figure 11 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0044] Figure 12 is a schematic diagram of the signals loaded on the display panel provided in an embodiment of this disclosure;

[0045] Figure 13 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0046] Figure 14 is a schematic diagram of some of the structures of the display module provided in the embodiments of this disclosure;

[0047] Figure 15 is a flowchart of the driving method for the display module circuit provided in an embodiment of this disclosure;

[0048] Figure 16 is a timing diagram of some signals provided in the embodiments of this disclosure;

[0049] Figure 17 shows some other signal timing diagrams provided in the embodiments of this disclosure. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Furthermore, the embodiments and features in the embodiments of this disclosure can be combined with each other without conflict. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0051] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0052] It should be noted that the dimensions and shapes of the figures in the accompanying drawings do not reflect actual proportions and are intended only to illustrate the content of this disclosure. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

[0053] Using integrated touch and display driver chips in display devices can reduce the number of components, thereby reducing costs. It can also further reduce the size of the circuit board in the display device, thereby reducing the space occupied by the circuit board and improving space utilization.

[0054] In related technologies, as shown in Figure 1, the display driver circuit 102 in the touch display driver circuit 10 generally requires four power supplies. The display driver circuit 102 is electrically connected to the first power signal terminal AVDD, the second power signal terminal VDDI, the third power signal terminal VCI, and the fourth power signal terminal DVDD, respectively. Meanwhile, the touch driver circuit 101 in the touch display driver circuit 10 is electrically connected to the first power signal terminal AVDD and the second power signal terminal VDDI, respectively. That is, the touch driver circuit 101 and the display driver circuit 102 share the first power signal terminal AVDD and the second power signal terminal VDDI. Furthermore, both the touch driver circuit 101 and the display driver circuit 102 are electrically connected to the clock generation circuit 103, meaning that the touch driver circuit 101 and the display driver circuit 102 share the clock generation circuit 103.

[0055] For example, when the display panel in the display device needs to be in a screen-off mode, the touch driving circuit will detect at a lower frequency. Since the touch driving circuit and the display driving circuit share the first power signal terminal, the second power signal terminal, and the clock generation circuit, the display driving circuit cannot be in a completely off state. That is, the display driving circuit will generate power consumption, resulting in a lot of energy loss.

[0056] Based on the above problems, the display module provided in this disclosure, as shown in FIG2, includes: a touch display driving circuit 10, wherein the touch display driving circuit 10 specifically includes: a touch driving circuit 101 and a display driving circuit 102; the touch driving circuit 101 is configured to drive the touch function of the display module; the display driving circuit 102 is configured to drive the display function of the display module.

[0057] The touch drive circuit 101 is electrically connected to the first power signal terminal AVDD and the second power signal terminal VDDI;

[0058] The switching circuit 20 is electrically connected to the display driving circuit 102, the first power signal terminal AVDD, and the second power signal terminal VDDI. It is configured to turn the first power signal terminal AVDD and the second power signal terminal VDDI on or off from the display driving circuit 102 in response to the signal of the enable signal terminal EN.

[0059] It should be noted that, as shown in Figure 2, the enable signal terminal EN is electrically connected to the touch display driver circuit 10. The touch display driver circuit 10 provides the signal to the enable signal terminal EN, thereby realizing the linkage between the touch display driver circuit and the switching circuit. For example, when only the touch driver circuit in the touch display driver circuit needs to work, the touch display driver circuit provides a shutdown signal to the enable signal terminal. In response to the shutdown signal of the enable signal terminal, the switching circuit controls the first power signal terminal and the second power signal terminal to disconnect from the display driver circuit, that is, no power is supplied to the display driver circuit, so the display driver circuit stops working, while the touch driver circuit is normally powered and works normally. When both the touch driver circuit and the display driver circuit in the touch display driver circuit need to work together, the touch display driver circuit provides a conduction signal to the enable signal terminal. In response to the conduction signal of the enable signal terminal, the switching circuit controls the first power signal terminal and the second power signal terminal to conduct with the display driver circuit, that is, the display driver circuit and the touch driver circuit work normally.

[0060] In this embodiment, through the cooperation of the touch driving circuit, the display driving circuit, and the switching circuit, the touch driving circuit can be electrically connected to the first power signal terminal and the second power signal terminal when the display module is in the screen-off mode, and can work normally. At the same time, the switching circuit controls the display driving circuit to disconnect from the first power signal terminal and the second power signal terminal, so as to avoid the first power signal terminal or the second power signal terminal supplying power to the display driving circuit because the display driving circuit cannot completely stop working, thus saving power consumption and avoiding energy waste.

[0061] In some embodiments of this disclosure, as shown in FIG3, the switching circuit 20 includes: a first sub-switching circuit 201 and a second sub-switching circuit 202; wherein, the first sub-switching circuit 201 is electrically connected to the first power signal terminal AVDD and the display driving circuit 102, and is configured to provide the signal of the first power signal terminal AVDD to the display driving circuit 102 in response to the signal of the enable signal terminal EN; the second sub-switching circuit 202 is electrically connected to the second power signal terminal VDDI and the display driving circuit 102, and is configured to provide the signal of the second power signal terminal VDDI to the display driving circuit 102 in response to the signal of the enable signal terminal EN.

[0062] In some embodiments of this disclosure, as shown in FIG4, the first switching circuit 201 includes: a first switching transistor T1; wherein, the gate of the first switching transistor T1 is electrically connected to the enable signal terminal EN, the first terminal of the first switching transistor T1 is electrically connected to the first power signal terminal AVDD, and the second terminal of the first switching transistor T1 is electrically connected to the display driving circuit 102.

[0063] For example, the first switching transistor T1 can be turned on under the control of the effective level of the enable signal transmitted on the enable signal terminal EN, and can be turned off under the control of the ineffective level of the enable signal. For example, the first switching transistor T1 can be set as an N-type transistor, in which case the effective level of the enable signal is high and the ineffective level of the enable signal is low. Alternatively, the first switching transistor T1 can be set as a P-type transistor, in which case the effective level of the enable signal is low and the ineffective level of the enable signal is high.

[0064] In some embodiments of this disclosure, as shown in FIG4, the second switching circuit 202 includes: a second switching transistor T2; wherein, the gate of the second switching transistor T2 is electrically connected to the enable signal terminal EN, the first terminal of the second switching transistor T2 is electrically connected to the second power supply signal terminal VDDI, and the second terminal of the second switching transistor T2 is electrically connected to the display driving circuit 102.

[0065] For example, the second switching transistor T2 can be turned on under the control of the effective level of the enable signal transmitted on the enable signal terminal EN, and can be turned off under the control of the ineffective level of the enable signal. For instance, the second switching transistor T2 can be set as an N-type transistor, in which case the effective level of the enable signal is high and the ineffective level of the enable signal is low. Alternatively, the second switching transistor T2 can be set as a P-type transistor, in which case the effective level of the enable signal is low and the ineffective level of the enable signal is high.

[0066] In some embodiments of this disclosure, as shown in FIG5, the touch display driving circuit 10 includes a clock generating circuit 103, which is electrically connected to the touch driving circuit 101 and the display driving circuit 102, and is configured to output a clock signal to the touch driving circuit 101 and the display driving circuit 102.

[0067] In some embodiments of this disclosure, as shown in FIG6, the clock generation circuit 103 includes: a first clock generation circuit 1031 and a second clock generation circuit 1032; the clock signal includes: a first clock signal and a second clock signal; wherein, the first clock generation circuit 1031 is electrically connected to the touch driving circuit 101 and is configured to output the first clock signal to the touch driving circuit 101; the second clock generation circuit 1032 is electrically connected to the display driving circuit 102 and is configured to output the second clock signal to the display driving circuit 102.

[0068] According to the embodiments disclosed herein, the first clock generation circuit and the second clock generation circuit can be adjusted respectively according to the clock signal requirements of the touch driving circuit and the display driving circuit, thereby further saving power consumption and avoiding energy loss.

[0069] In some embodiments of this disclosure, the first clock generating circuit and / or the second clock generating circuit include an oscillator.

[0070] For example, oscillators can generate stable clock signals. Oscillators include crystal oscillators, RC oscillators, LC oscillators, tuning fork oscillators, and integrated circuit oscillators. Among these, crystal oscillators are commonly used in electronic devices to generate stable clock signals. A crystal oscillator contains a crystal, and applying a voltage to this crystal generates high-frequency oscillations. Crystal oscillators are a highly accurate clock source and are often used in applications requiring high-precision clocks. RC oscillators use an oscillation circuit composed of resistors and capacitors to generate frequency signals. RC oscillators are relatively simple and economical, but their accuracy is lower than that of crystal oscillators. LC oscillators use inductors and capacitors to generate oscillation signals.

[0071] For example, the first clock generation circuit and the second clock generation circuit may further include: a counter, a frequency divider, and a phase-locked loop (PLL), wherein the counter and the frequency divider are used to further process the clock signal generated by the frequency-divided oscillator to obtain a clock signal with a more accurate clock frequency. A PLL is a circuit capable of generating a stable clock signal. It synchronizes the input signal with the clock signal output by a local oscillator through feedback control, thereby providing a clock signal with controllable frequency and phase.

[0072] In some embodiments of this disclosure, the first clock signal and the second clock signal are in different phases.

[0073] This embodiment of the present disclosure avoids mutual interference between the first clock signal generated by the first clock generation circuit and the second clock signal generated by the second clock generation circuit by making their phases different, thereby eliminating possible signal interference and affecting signal transmission.

[0074] In some embodiments of this disclosure, the phase difference between the phase of the first clock signal and the phase of the second clock signal is constant.

[0075] For example, as shown in Figure 7, the phase difference between the first clock signal Clock1 generated by the first clock generation circuit and the second clock signal Clock2 generated by the second clock generation circuit is constant, and the phase difference is φ. That is, by comparing the phase of the first clock signal and the second clock signal at a preset time, the phase difference between the first clock signal and the second clock signal is ensured to be constant. If the phase difference between the first clock signal and the second clock signal is large, the first clock generation circuit and the second clock generation circuit need to be adjusted to control the first clock signal and the second clock signal from interfering with each other.

[0076] In some embodiments of this disclosure, as shown in FIG8, a power management circuit 200 is further included. The power management circuit 200 is electrically connected to a first power signal terminal AVDD and a second power signal terminal VDDI, and is configured to provide signals to the first power signal terminal AVDD and the second power signal terminal VDDI.

[0077] In some embodiments of this disclosure, as shown in FIG9, it further includes: a display panel 100 for displaying images; a first circuit board 300, the first circuit board 300 including multiple signal lines 310, and a power management circuit 200 electrically connected to the touch display driving circuit 10 through the signal lines 310.

[0078] For example, signal line 310 may include: an Inter-Integrated Circuit (IIC) bus. 2 C) An integrated circuit bus typically includes two signal lines: a bidirectional data line SDA and a clock line SCL.

[0079] For example, as shown in FIG9, the display panel 100 includes a display area and a non-display area, wherein the touch display driving circuit 10 is disposed in the non-display area of ​​the display panel 100; the first circuit board 300 may be a flexible printed circuit (FPC).

[0080] The display area of ​​the display panel 100 includes multiple pixel units arranged in an array. For example, each pixel unit includes multiple sub-pixels. For instance, a pixel unit may include red, green, and blue sub-pixels, allowing for color mixing of red, green, and blue to achieve color display. Alternatively, a pixel unit may include red, green, blue, and white sub-pixels, also allowing for color mixing of red, green, blue, and white to achieve color display. Of course, in practical applications, the emission color of the sub-pixels in a pixel unit can be designed and determined according to the actual application environment, and is not limited here.

[0081] In this embodiment of the disclosure, as shown in FIG10, each sub-pixel includes a pixel circuit 110 and a light-emitting device L. The pixel circuit 110 is used to drive the light-emitting device to emit light, thereby enabling the display panel to display an image. The pixel circuit 110 may include: a driving transistor M0, a data transistor M1, and a capacitor C; the gate of the driving transistor M0 is electrically connected to the first electrode of the data transistor M1, the first electrode of the driving transistor M0 is electrically connected to the first power supply voltage signal terminal ELVDD, and the first electrode of the driving transistor M0 is electrically connected to the anode of the light-emitting device L; the gate of the data transistor M1 is electrically connected to the gate scan signal terminal GA, and the second electrode of the data transistor M1 is electrically connected to the user data signal terminal DA; the first electrode of the capacitor C is electrically connected to the first electrode of the driving transistor M0, and the second electrode of the capacitor C is electrically connected to the gate of the driving transistor M0; the cathode of the light-emitting device L is electrically connected to the second power supply voltage signal terminal ELVSS.

[0082] The first power supply voltage signal terminal ELVDD and the second power supply voltage signal terminal ELVSS are electrically connected to the power management circuit 200, which is used to load signals to the first power supply voltage signal terminal ELVDD and the second power supply voltage signal terminal ELVSS.

[0083] For example, the light-emitting device L may include at least one of a micro light-emitting diode (Micro LED), an organic light-emitting diode (OLED), and a quantum dot light-emitting diode (QLED). For example, the light-emitting device L may include an anode, a light-emitting layer, and a cathode stacked together. Further, the light-emitting layer may include film layers such as a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. In practical applications, the specific structure of the light-emitting device can be designed and determined according to the actual application environment, and is not limited here.

[0084] In some embodiments of this disclosure, as shown in FIG11, the power management circuit 200 includes: a first power circuit 210 and a second power circuit 220; wherein, the first power circuit 210 is electrically connected to a first power signal terminal AVDD and is configured to provide a signal to the first power signal terminal AVDD; the second power circuit 220 is electrically connected to a second power signal terminal VDDI and is configured to provide a signal to the second power signal terminal VDDI.

[0085] It should be noted that the display panel has multiple film layers. The touch driving circuit applies a signal to the first film layer of the display panel, while the second power supply voltage signal applies a signal to the second film layer of the display panel. The first and second film layers are arranged adjacent to each other. Therefore, when the display panel displays different images, the load is different, which causes the signal applied by the second power supply voltage signal to the second film layer to fluctuate, which may affect the signal applied by the touch driving circuit to the first film layer.

[0086] For example, as shown in Figure 12, the touch driving circuit applies a touch-tx signal to the first film layer of the display panel, and the second power supply voltage signal applies an elvss signal to the second film layer of the display panel. In this embodiment, by adjusting the first clock generation circuit, the touch driving circuit, and the power management circuit, the peak value of the elvss signal is located at the low level of the touch-tx signal. This setting avoids interference between the signals on the first film layer and the signals on the second film layer, thereby preventing mutual influence between the signals, ensuring the display effect, and improving the display quality.

[0087] In some embodiments of this disclosure, as shown in FIG13, the switch circuit 20 is disposed in the touch display driving circuit 10.

[0088] For example, when the switching circuit is set in the touch display driving circuit, the first power supply circuit and the second power supply circuit are respectively set in different areas of the power management circuit.

[0089] In some embodiments of this disclosure, as shown in FIG14, the switching circuit 20 is disposed in the power management circuit 200.

[0090] For example, when the switching circuit 20 is disposed in the power management circuit 200, the first power supply circuit and the second power supply circuit are disposed in the same area of ​​the power management circuit.

[0091] This disclosure also provides a driving method for a display module, which has a screen-off mode and a screen-on mode.

[0092] As shown in Figure 15, the specific steps include the following:

[0093] S100, the touch display driving circuit responds to the screen-off mode, and the switching circuit responds to the signal at the enable signal terminal to disconnect the first power signal terminal and the second power signal terminal from the display driving circuit.

[0094] S200, the touch display driver circuit responds to the screen-on mode, causing the switching circuit to respond to the signal at the enable signal terminal, and connecting the first power signal terminal and the second power signal terminal to the display driver circuit.

[0095] The following description uses the display module shown in Figure 14 as an example, and refers to the signal timing diagram shown in Figure 16, to describe the working process of the display module provided in the embodiments of this disclosure.

[0096] As shown in Figure 16, vddi represents the signal of the second power supply signal terminal VDDI, nRESET represents the signal loaded onto the touch display driver circuit, MIPI represents the signal loaded onto the touch display driver circuit, en represents the signal of the enable signal terminal EN, I2C represents the signal transmitted on the signal line, avdd represents the signal of the first power supply signal terminal AVDD, elvdd represents the signal of the first power supply voltage signal terminal ELVDD, and elvss represents the signal of the second power supply voltage signal terminal ELVSS.

[0097] When the display module needs to switch to screen-off mode, during the first time period H, the touch display driver circuit 10 responds to the screen-off mode. The touch display driver circuit 10 sequentially transmits the first command signal EL_OFF, the second command signal VDDI_OFF, and the third command signal AVDD_OFF to the power management circuit 200 via signal lines. When the first command signal EL_OFF is output, it causes the power management circuit 200 to stop providing signals to the first power supply voltage signal terminal ELVDD and the second power supply voltage signal terminal ELVSS. When the second command signal VDDI_OFF is output, it causes the power management circuit 200 to... When the power supply to the second power signal terminal VDDI is stopped, the signal vddi of the second power signal terminal VDDI is at a low level. When the third command signal AVDD_OFF is output, the third command signal AVDD_OFF causes the power management circuit 200 to stop supplying signals to the first power signal terminal AVDD, and the signal avdd of the first power signal terminal AVDD is at a low level. After the first command signal EL_OFF, the second command signal VDDI_OFF, and the third command signal AVDD_OFF are output, the touch display driver circuit 10 controls the enable signal terminal EN to have its signal en at a low level, and the first switching transistor T1 and the second switching transistor T2 in the switching circuit 20 are at a low level. When the signal en is turned off at a low level, the first power signal terminal AVDD and the second power signal terminal VDDI are disconnected from the display driver circuit 102; the display panel no longer displays images and is in a screen-off state. However, the display panel still needs to implement touch functionality in the screen-off state, so the touch display driver circuit 10 transmits the third command signal AVDD_EN and the fourth command signal VDDI_EN to the power management circuit 200 sequentially through the signal line. When the third command signal AVDD_EN is output, it causes the power management circuit 200 to provide a signal to the first power signal terminal AVDD, so the signal avdd of the first power signal terminal AVDD is at a high level. When the fourth command signal VDDI_EN is output, the power management circuit 200 provides a signal to the second power signal terminal VDDI, and the signal vddi of the second power signal terminal VDDI is at a high level. The touch driving circuit 101 works normally, enabling the display panel to realize the touch function. At this time, the signal en of the enable signal terminal EN is at a low level, and the first switching transistor T1 and the second switching transistor T2 in the switching circuit 20 are turned off under the control of the low level of the signal en. The first power signal terminal AVDD and the second power signal terminal VDDI are disconnected from the display driving circuit, so the display driving circuit 102 will not generate power consumption and cause energy loss.

[0098] The following description uses the display module shown in Figure 14 as an example, and refers to the signal timing diagram shown in Figure 17, to describe the working process of the display module provided in the embodiments of this disclosure.

[0099] As shown in Figure 17, vddi represents the signal of the second power signal terminal VDDI, nRESET represents the signal loaded onto the touch display driver circuit, MIPI represents the signal loaded onto the touch display driver circuit, vci represents the signal of the third power signal terminal VCI, I2C represents the signal transmitted on the signal line, en represents the signal of the enable signal terminal EN, dvdd represents the signal of the fourth power signal terminal DVDD, avdd represents the signal of the first power signal terminal AVDD, elvdd represents the signal of the first power voltage signal terminal ELVDD, and elvss represents the signal of the second power voltage signal terminal ELVSS.

[0100] When the display module needs to be in screen-on mode, the touch display driver circuit 10 responds to the screen-on mode. The touch display driver circuit 10 controls the enable signal terminal EN to be at a high level. Then, the first switching transistor T1 and the second switching transistor T2 in the switching circuit 20 are turned on under the control of the high level of the signal EN. Then, the first power signal terminal AVDD and the second power signal terminal VDDI are connected to the display driver circuit 102. The touch display driver circuit 10 transmits the third instruction signal AVDD_EN and the fifth instruction signal EL_EN to the power management circuit 200 in sequence through the signal line. When the third instruction signal AVDD_EN is output, the third instruction signal AVDD_EN causes the power management circuit 200 to provide a signal to the first power signal terminal AVDD, so the signal avdd of the first power signal terminal AVDD is at a high level. When the fifth instruction signal EL_EN is output, the fifth instruction signal EL_EN causes the power management circuit 200 to provide a signal to the first power voltage signal terminal ELVDD and the second power voltage signal terminal ELVSS, so the display panel displays the image and is in the screen-on state.

[0101] Based on the same inventive concept, this disclosure also provides a display device, including the display module described above. The principle by which this display device solves the problem is similar to that of the aforementioned display module; therefore, the implementation of this display device can refer to the implementation of the aforementioned display module, and the repetitions will not be repeated here.

[0102] In specific implementations, in the embodiments of this disclosure, the display device can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. Other essential components of the display device are those that should be understood by those skilled in the art, and will not be described in detail here, nor should they be construed as limiting this disclosure.

[0103] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0104] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of the embodiments of this disclosure. Therefore, if these modifications and variations to the embodiments of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include these modifications and variations.

Claims

1. A display module, wherein, include: A touch display driving circuit includes: a touch driving circuit and a display driving circuit; the touch driving circuit is electrically connected to a first power signal terminal and a second power signal terminal; A switching circuit, electrically connected to the display driving circuit, the first power signal terminal, and the second power signal terminal, is configured to, in response to a signal from the enable signal terminal, turn the first power signal terminal and the second power signal terminal on or off from the display driving circuit.

2. The display module as described in claim 1, wherein, The switching circuit includes: a first sub-switching circuit and a second sub-switching circuit; The first sub-switch circuit is electrically connected to the first power signal terminal and the display driving circuit, and is configured to provide the signal of the first power signal terminal to the display driving circuit in response to the signal of the enable signal terminal. The second sub-switch circuit is electrically connected to the second power signal terminal and the display driver circuit, and is configured to provide the signal of the second power signal terminal to the display driver circuit in response to the signal of the enable signal terminal.

3. The display module as described in claim 2, wherein, The first switching circuit includes: a first switching transistor; The gate of the first switching transistor is electrically connected to the enable signal terminal, the first terminal of the first switching transistor is electrically connected to the first power signal terminal, and the second terminal of the first switching transistor is electrically connected to the display driving circuit.

4. The display module as described in claim 2, wherein, The second switching circuit includes: a second switching transistor; The gate of the second switching transistor is electrically connected to the enable signal terminal, the first terminal of the second switching transistor is electrically connected to the second power signal terminal, and the second terminal of the second switching transistor is electrically connected to the display driving circuit.

5. The display module as described in claim 1, wherein, The touch display driving circuit includes a clock generating circuit, which is electrically connected to the touch driving circuit and the display driving circuit, and is configured to output a clock signal to the touch driving circuit and the display driving circuit.

6. The display module as described in claim 5, wherein, The clock generation circuit includes: a first clock generation circuit and a second clock generation circuit; the clock signal includes: a first clock signal and a second clock signal; The first clock generating circuit is electrically connected to the touch driving circuit and is configured to output the first clock signal to the touch driving circuit; The second clock generating circuit is electrically connected to the display driving circuit and is configured to output the second clock signal to the display driving circuit.

7. The display module as described in claim 6, wherein, The first clock generating circuit and / or the second clock generating circuit include an oscillator.

8. The display module as described in claim 6, wherein, The first clock signal and the first clock signal have different phases.

9. The display module as described in claim 8, wherein, The phase difference between the phase of the first clock signal and the phase of the second clock signal is constant.

10. The display module according to any one of claims 1-9, wherein, Also includes: A power management circuit, which is electrically connected to the first power signal terminal and the second power signal terminal, and is configured to provide signals to the first power signal terminal and the second power signal terminal; It also includes: a first circuit board, the first circuit board including multiple signal lines, and the power management circuit being electrically connected to the touch display driver circuit through the signal lines.

11. The display module as claimed in claim 10, wherein, The power management circuit includes: a first power supply circuit and a second power supply circuit; The first power supply circuit is electrically connected to the first power signal terminal and is configured to provide a signal to the first power signal terminal. The second power supply circuit is electrically connected to the second power supply signal terminal and is configured to provide a signal to the second power supply signal terminal.

12. The display module as claimed in claim 10, wherein, The switching circuit is located in the touch display driving circuit.

13. The display module as described in claim 10, wherein, The switching circuit is located within the power management circuit.

14. A display device, wherein, Includes the display module as described in any one of claims 1-13.

15. A driving method for a display module as described in any one of claims 1-13, wherein, include: The display module has an off-screen mode and an on-screen mode; In response to the screen-off mode, the touch display driving circuit causes the switching circuit to respond to the signal at the enable signal terminal and disconnect the first power signal terminal and the second power signal terminal from the display driving circuit. The touch display driving circuit responds to the screen-on mode by causing the switching circuit to respond to the enable signal terminal and connect the first power signal terminal and the second power signal terminal to the display driving circuit.

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