Substrate for silicon quantum computer, silicon quantum computer, and method of manufacturing substrate for silicon quantum computer

The silicon quantum computer substrate addresses the challenge of nuclear spin interference and signal distortion by using a silicon layer sandwiched between SiGe layers and a BOX layer to enhance high-frequency characteristics, enabling reliable quantum information reading and computation.

WO2026115989A1PCT designated stage Publication Date: 2026-06-04SHIN ETSU HANDOTAI CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
SHIN ETSU HANDOTAI CO LTD
Filing Date
2025-10-29
Publication Date
2026-06-04

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Abstract

The present invention is a substrate for a silicon quantum computer, said substrate being characterized by including: a silicon substrate; a first SiGe layer on the silicon substrate; a BOX layer on the first SiGe layer; a 28Si layer on the BOX layer; and a second SiGe layer on the 28Si layer. This provides a substrate for a silicon quantum computer, the substrate having superior high-frequency characteristics, a silicon quantum computer, and a method of manufacturing a substrate for a silicon quantum computer.
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Description

Silicon quantum computer substrate, silicon quantum computer, and method for manufacturing a silicon quantum computer substrate

[0001] This invention relates to a substrate for a silicon quantum computer, a silicon quantum computer, and a method for manufacturing a silicon quantum computer substrate.

[0002] Quantum computers, which utilize quantum effects such as superposition and entanglement, are attracting attention as computers that can solve calculations that conventional computers cannot solve in a realistic amount of time. The elements used in these quantum computers are also mounted on semiconductor substrates such as silicon substrates.

[0003] There are several methods for creating elements used in quantum computers, but the main ones include those that utilize the Josephson effect using superconductors, and those that convert quantum effects into electrical signals using electron spin (ESR).

[0004] In devices that utilize electron spin using a silicon substrate, quantum effects are read out by irradiating electron spins placed in a magnetic field with microwaves, sweeping the frequency, and causing resonance.

[0005] As structures for this purpose, quantum computers using SOI substrates (Non-Patent Document 1) and SiGe substrates (Non-Patent Document 2) have been proposed.

[0006] Non-patent document 1 explains the principle using SOI, which is described as the basis of quantum computers. The BOX layer (also called the embedded oxide layer or simply the oxide layer), which is an insulating film that makes up the SOI, and the elements formed on the SOI layer above it, confine electrons.

[0007] On the other hand, the SiGe substrate described in Non-Patent Document 2 utilizes the difference in band gaps between Si and SiGe to confine electrons.

[0008] The effect of Ge concentration in SiGe varies among researchers and models, but it is summarized in Non-Patent Document 3. According to this document, as the Ge concentration increases and the lattice mismatch ratio increases, the critical film thickness decreases.

[0009] Takahiro Mori, "Realization of High-Temperature Operation of Silicon Qubits with a View to Quantum Computers," Applied Physics, Vol. 89, No. 5, 274 (2020); Seigo Tarucha, "Quantum Information Device Using Quantum Dots," Applied Physics, Vol. 87, No. 52, 88 (2020); Katsuaki Sato, "Fundamentals and Challenges of Heteroepitaxy," 1st Workshop Meeting of the 3C-SiC Technology Research Group for IoT in Harsh Environments, July 5, 2019.

[0010] When using electron spin, if unwanted spin components are present in the vicinity, the electron spin energy will split due to the Zeeman effect, making it impossible to read the correct quantum information and thus preventing the use of quantum effects in calculations. For this reason, nuclear spin is used. 29 We reduced the amount of silicon as much as possible. 28 It is necessary to form a silicon-rich silicon layer.

[0011] For this purpose, isotope enrichment was performed. 28 SiH 4 Using gas 28 A silicon substrate with a Si epitaxial layer is used. Furthermore, to create a single-electron layer (calculations become difficult due to the spin interactions between electrons when multiple electrons are present), electron containment (single-electron transistor) is necessary.

[0012] In other words, isolating electrons as much as possible to create what is known as a quantum well is one of the key aspects of creating a high-performance silicon quantum computer.

[0013] Furthermore, when considering future high-integration, and taking into account monolithic structures (integration of quantum elements and high-frequency elements that read the state of electrons), a substrate with good high-frequency characteristics will be required, especially a silicon quantum computer substrate with low harmonics and low signal distortion.

[0014] The present invention has been made to solve the above problems, and provides a substrate for a silicon quantum computer having better high-frequency characteristics, a silicon quantum computer, and a method for manufacturing a substrate for a silicon quantum computer.

[0015] In order to solve the above problems, the present invention includes a silicon substrate, a first SiGe layer on the silicon substrate, a BOX layer on the first SiGe layer, and on the BOX layer 28 a Si layer, and 28 a second SiGe layer on the Si layer. A substrate for a silicon quantum computer is provided, which is characterized by having these layers.

[0016] For such a substrate for a silicon quantum computer, first 28 the Si layer does not contain Si having a nuclear spin, suppressing the splitting of electron spin energy due to the influence of unnecessary nuclear spin components in the periphery, and enabling correct quantum information to be read, so that the quantum effect can surely be used for calculation. Also, 29 since the Si layer is on the BOX layer which is an insulating layer, an SOI structure is formed, and the first SiGe layer directly under the BOX layer which is an oxide film layer of the SOI structure confines electrons, and the high-frequency characteristics are improved by the effect of strain by the first SiGe layer. Further 28 the Si layer is configured to be sandwiched between the first SiGe layer below and the second SiGe layer above, and by utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. Thus, a substrate for a silicon quantum computer with good high-frequency characteristics can be obtained. 28

[0017] Also, it is preferable that the silicon substrate has a resistivity of 1000 Ω·cm or more.

[0018] For such a high-resistance silicon substrate, in a quantum computer, microwaves are usually used to read the spin state of electrons etc. that exhibit quantized behavior, but even if microwaves are used, it is possible to make it difficult for signals to be distorted in the transmission line. As a result, it becomes a substrate for a silicon quantum computer capable of stably extracting the signal obtained by spin resonance without distortion.​

[0019] Furthermore, the first SiGe layer preferably has a Ge concentration of 30% or less. More preferably, it can be 20% or less.

[0020] With such a low Ge concentration in the first SiGe layer, the critical thickness at which dislocations do not form tends to decrease as the Ge concentration increases. However, it is possible to prevent the critical thickness from becoming too thin, and obtain a first SiGe layer of sufficient thickness for use as a substrate for silicon quantum computers.

[0021] Furthermore, the BOX layer is the 28 It is preferable that the Si layer is formed by oxidation.

[0022] Such 28 If the BOX layer is formed by oxidizing the Si layer, it can reliably serve as an insulating layer and form an SOI structure.

[0023] Furthermore, in order to solve the above problems, the present invention provides a silicon quantum computer characterized by being equipped with the above-described silicon quantum computer substrate.

[0024] Such a silicon quantum computer would use a silicon quantum computer substrate with good high-frequency characteristics, resulting in a high-performance silicon quantum computer.

[0025] Furthermore, in order to solve the above problems, the present invention provides a first substrate having a first SiGe layer on a first silicon substrate, and a second silicon substrate 28 Si layer and the above 28 A first substrate having a BOX layer on a Si layer and a second substrate are prepared, the first SiGe layer of the first substrate and the BOX layer of the second substrate are bonded together, the second silicon substrate is peeled off, and the exposed part by peeling off the second silicon substrate 28 The present invention provides a method for manufacturing a silicon quantum computer substrate, characterized by stacking a second SiGe layer on a Si layer.

[0026] In such a method for manufacturing a silicon quantum computer substrate, a first SiGe layer is placed on a first silicon substrate, a BOX layer is placed on the first SiGe layer, and on the BOX layer 28 Si layer and the above 28 A silicon quantum computer substrate having a second SiGe layer on a Si layer can be manufactured.

[0027] The silicon quantum computer substrates manufactured in this way are first 28 The Si layer has nuclear spin 29 Because there is no Si, the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area is suppressed, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The Si layer, situated on the insulating BOX layer, forms an SOI structure. The first SiGe layer directly beneath the BOX layer, which is the oxide film layer of the SOI structure, traps electrons, and the strain effect of the first SiGe layer improves high-frequency characteristics. 28 The Si layer is sandwiched between a first SiGe layer below and a second SiGe layer above. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This allows for the fabrication of silicon quantum computer substrates with excellent high-frequency characteristics.

[0028] Furthermore, it is preferable that the first silicon substrate has a resistivity of 1000 Ω·cm or more.

[0029] With such a high-resistance first silicon substrate, microwaves are normally used to read out the spin states of electrons and other elements that exhibit quantized behavior in quantum computers. However, even when microwaves are used, signal distortion in the transmission path can be minimized. This makes it possible to manufacture silicon quantum computer substrates that can stably extract signals obtained by spin resonance without distortion.

[0030] Furthermore, it is preferable that the first SiGe layer has a Ge concentration of 30% or less.

[0031] With such a low Ge concentration in the first SiGe layer, although the critical thickness at which dislocations do not form tends to decrease as the Ge concentration increases, it is possible to prevent the critical thickness from becoming too thin and to manufacture a silicon quantum computer substrate with a first SiGe layer of sufficient thickness.

[0032] Furthermore, it is preferable to perform CMP processing on the first SiGe layer before bonding to achieve a surface roughness Sa of 1 nm or less.

[0033] By setting the surface roughness Sa of the first SiGe layer to 1 nm or less, the first SiGe layer is sufficiently planar and can be reliably bonded to the BOX layer of the second substrate.

[0034] Furthermore, the BOX layer is the 28 It is preferable to form the Si layer by oxidation.

[0035] In this way 28 By oxidizing the Si layer to form a BOX layer, it can reliably become an insulating layer and form an SOI structure.

[0036] Furthermore, before bonding the first SiGe layer of the first substrate and the BOX layer of the second substrate, the second substrate has a position deeper than the BOX layer 28 It is preferable to pre-inject hydrogen into the Si layer to form a hydrogen-implanted layer.

[0037] By pre-injecting hydrogen in this way to form a hydrogen-injected layer, the second silicon substrate can be easily peeled off after bonding, using this hydrogen-injected layer as a starting point.

[0038] Furthermore, it is preferable to remove the second silicon substrate by heat treatment, thereby removing it from the hydrogen-implanted layer.

[0039] By performing heat treatment with the hydrogen-injected layer formed in this manner, the bonds of the silicon crystals in the hydrogen-injected layer are broken (Smart Cut®), making it possible to reliably peel off the second silicon substrate.

[0040] As described above, if the silicon quantum computer substrate of the present invention is used, first 28The Si layer has nuclear spin 29 Because there is no Si, the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area is suppressed, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The Si layer, situated on the insulating BOX layer, forms an SOI structure. The first SiGe layer directly beneath the BOX layer, which is the oxide film layer of the SOI structure, traps electrons, and the strain effect of the first SiGe layer improves high-frequency characteristics. 28 The Si layer is sandwiched between a first SiGe layer below and a second SiGe layer above. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This makes it possible to obtain a silicon quantum computer substrate with good high-frequency characteristics.

[0041] Furthermore, since the silicon quantum computer of the present invention uses a silicon quantum computer substrate with good high-frequency characteristics, it becomes a high-performance silicon quantum computer.

[0042] Furthermore, the present invention provides a method for manufacturing a silicon quantum computer substrate, comprising a first silicon substrate, a first SiGe layer, a BOX layer on the first SiGe layer, and a BOX layer on the BOX layer. 28 Si layer and the above 28 A silicon quantum computer substrate having a second SiGe layer on a Si layer can be manufactured.

[0043] The silicon quantum computer substrates manufactured in this way are first 28 The Si layer has nuclear spin 29 Because there is no Si, the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area is suppressed, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The Si layer, situated on the insulating BOX layer, forms an SOI structure. The first SiGe layer directly beneath the BOX layer, which is the oxide film layer of the SOI structure, traps electrons, and the strain effect of the first SiGe layer improves high-frequency characteristics. 28The Si layer is sandwiched between a first SiGe layer below and a second SiGe layer above. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This allows for the fabrication of silicon quantum computer substrates with excellent high-frequency characteristics.

[0044] Furthermore, the silicon quantum computer substrate with excellent high-frequency characteristics obtained in this invention can be used as a substrate unaffected by nuclear spin, allowing for the construction of high-frequency circuits for reading quantum information.

[0045] Furthermore, the silicon quantum computer substrate with excellent high-frequency characteristics obtained by this invention is also expected to enable high performance in monolithic structures. It will be possible to fully utilize the isotope effect suitable for quantum computers and easily form single-electron transistors.

[0046] This is a schematic diagram illustrating an example of the structure of a silicon quantum computer substrate according to the present invention. This is a schematic diagram illustrating the flow of the manufacturing method of a silicon quantum computer substrate according to the present invention. This is a schematic diagram illustrating a comparative example.

[0047] The present invention will be described in detail below, but the present invention is not limited to these descriptions.

[0048] As described above, there was a need for silicon quantum computer substrates, silicon quantum computers, and methods for manufacturing silicon quantum computer substrates with better high-frequency characteristics.

[0049] Therefore, after further investigation into the above problem, the present inventors have found a first SiGe layer on a silicon substrate, a BOX layer on the first SiGe layer, and a BOX layer 28 Si layer, 28 A silicon quantum computer substrate having a second SiGe layer on top of a Si layer eliminates the influence of unwanted nuclear spins, allowing for accurate reading of quantum information. 28 We discovered that electrons can be encapsulated in the Si layer, improving high-frequency characteristics, and thus completed the present invention.

[0050] That is, the present invention comprises a silicon substrate, a first SiGe layer on the silicon substrate, a BOX layer on the first SiGe layer, and on the BOX layer 28 Si layer and the above 28 This is a silicon quantum computer substrate characterized by having a second SiGe layer on a Si layer.

[0051] Furthermore, the present invention is a silicon quantum computer characterized by being equipped with the above-described silicon quantum computer substrate.

[0052] Furthermore, the present invention relates to a first substrate having a first SiGe layer on a first silicon substrate, and a second silicon substrate 28 Si layer and the above 28 A first substrate having a BOX layer on a Si layer and a second substrate are prepared, the first SiGe layer of the first substrate and the BOX layer of the second substrate are bonded together, the second silicon substrate is peeled off, and the exposed part by peeling off the second silicon substrate 28 This is a method for manufacturing a silicon quantum computer substrate, characterized by stacking a second SiGe layer on a Si layer.

[0053] Embodiments of the present invention will be described below with reference to the drawings.

[0054] (Substrate for silicon quantum computer) Figure 1 is a schematic diagram illustrating an example of the structure of a substrate for a silicon quantum computer according to the present invention.

[0055] The silicon quantum computer substrate 10 comprises a silicon substrate 1, a first SiGe layer 2 on the silicon substrate 1, a BOX layer 3 (also called an embedded oxide layer or simply an oxide layer) on the first SiGe layer 2, and on the BOX layer 3 28 Si layer 4, 28 It has a second SiGe layer 5 on top of a Si layer 4.

[0056] If we have a silicon quantum computer substrate 10 like this, first 28 Si layer 4 has nuclear spin 29Because there is no Si, the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area is suppressed, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The Si layer 4 is located on the insulating BOX layer 3, forming an SOI structure. The first SiGe layer 2, located directly beneath the BOX layer 3 which is an oxide film layer of the SOI structure, traps electrons, and the strain effect of the first SiGe layer 2 improves high-frequency characteristics. 28 The Si layer 4 is sandwiched between the lower first SiGe layer 2 and the upper second SiGe layer 5. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This makes it possible to obtain a silicon quantum computer substrate 10 with good high-frequency characteristics.

[0057] Furthermore, the silicon substrate 1 is not particularly limited, but it is preferable that it has a resistivity of 1000 Ω·cm or more.

[0058] With such a high-resistance silicon substrate 1, even though microwaves are normally used to read out the spin states of electrons and other elements that exhibit quantized behavior in quantum computers, it is possible to minimize signal distortion in the transmission path even when microwaves are used. This results in a silicon quantum computer substrate 10 that can stably extract signals obtained by spin resonance without distortion.

[0059] While there is no particular upper limit to the resistivity, it is preferable that it be, for example, 100,000 Ω·cm or less.

[0060] Furthermore, the first SiGe layer 2 is not particularly limited, but it is preferable that the Ge concentration be 30% or less. More preferably, it can be 20% or less.

[0061] With such a low Ge concentration in the first SiGe layer 2, the critical thickness at which dislocations do not form tends to decrease as the Ge concentration increases, but it is possible to prevent the critical thickness from becoming too thin, and obtain a first SiGe layer 2 of sufficient thickness for use as a silicon quantum computer substrate 10.

[0062] While there is no particular limit to the Ge concentration, it is preferably 5% or higher, and more preferably 10% or higher.

[0063] Furthermore, BOX layer 3 is not particularly limited, 28 It is preferable that the Si layer 4 is formed by oxidation.

[0064] Such 28 If the BOX layer 3 is formed by oxidizing the Si layer 4, it can reliably become an insulating layer and form an SOI structure.

[0065] Furthermore, a silicon quantum computer can be constructed using the silicon quantum computer substrate 10 described above.

[0066] Such a silicon quantum computer uses a silicon quantum computer substrate 10 with good high-frequency characteristics, resulting in a high-performance silicon quantum computer.

[0067] Furthermore, in this specification, 28 Si is the percentage of silicon that makes up the total silicon 28 This means that the composition has a silicon content of 99.9% or more. 28 Si monosilane gas ( 28 SiH 4 Monosilane (also written as SiOH) is a type of silane. 4 ) The proportion of gas in the total silicon 28 This refers to monosilane gas with a composition containing 99.9% or more Si. Stable isotopes of silicon include: 28 Si, 29 Si, 30 There are three types of silicon, and their natural abundances are 92.23%, 4.67%, and 3.1%. For example, by centrifuging a silicon-containing gas (silane gas) consisting of natural Si isotope compositions, 28 It can produce Si source gas.

[0068] (Method for manufacturing a silicon quantum computer substrate) Figure 2 is a schematic diagram illustrating the flow of the method for manufacturing a silicon quantum computer substrate 40 according to the present invention.

[0069] A first substrate 20 having a first SiGe layer 12a on a first silicon substrate 11, and a second silicon substrate 21 28 Si layer 24, 28 A second substrate 30 having a BOX layer 23 on a Si layer 24 is prepared.

[0070] Next, the first SiGe layer 12a of the first substrate 20 and the BOX layer 23 of the second substrate 30 are joined together.

[0071] Next, the second silicon substrate 21 is peeled off.

[0072] Finally, the second silicon substrate 21 was peeled off to expose the 28 A silicon quantum computer substrate 40 can be manufactured by stacking a second SiGe layer 35 on the Si layer 24a.

[0073] With such a method for manufacturing a silicon quantum computer substrate 40, a first SiGe layer 12a is placed on the first silicon substrate 11, a BOX layer 23 is placed on the first SiGe layer 12a, and on the BOX layer 23 28 Si layer 24a, 28 A silicon quantum computer substrate 40 can be manufactured having a second SiGe layer 35 on a Si layer 24a.

[0074] The silicon quantum computer substrate 40 manufactured in this way is first 28 The Si layer 24a has nuclear spin 29 Because there is no Si, the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area is suppressed, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The Si layer 24a is located on the insulating BOX layer 23, forming an SOI structure. The first SiGe layer 12a directly beneath the BOX layer 23, which is an oxide film layer of the SOI structure, traps electrons, and the strain effect of the first SiGe layer 12a improves high-frequency characteristics. 28The Si layer 24a is sandwiched between the lower first SiGe layer 12a and the upper second SiGe layer 35. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. Thus, a silicon quantum computer substrate 40 with good high-frequency characteristics can be manufactured.

[0075] Furthermore, the first silicon substrate 11 is not particularly limited, but it is preferable that it has a resistivity of 1000 Ω·cm or more.

[0076] With such a high-resistance first silicon substrate 11, although microwaves are normally used to read out the spin states of electrons and other elements that exhibit quantized behavior in quantum computers, even when microwaves are used, it is possible to minimize signal distortion in the transmission path. This makes it possible to manufacture a silicon quantum computer substrate 40 that can stably extract signals obtained by spin resonance without distortion.

[0077] While there is no particular limit to the upper limit of resistivity, it is preferable to set it to, for example, 100,000 Ω·cm or less.

[0078] Furthermore, the first SiGe layer 12a is not particularly limited, but it is preferable to have a Ge concentration of 30% or less. More preferably, it can be 20% or less.

[0079] If the first SiGe layer 12a has such a low Ge concentration, the critical film thickness at which dislocations do not form tends to decrease as the Ge concentration increases, but it is possible to prevent the critical film thickness from becoming too thin, and to manufacture a silicon quantum computer substrate 40 that has a first SiGe layer 12a of sufficient thickness.

[0080] The lower limit of the Ge concentration is not particularly limited, but it is preferably 5% or higher, and more preferably 10% or higher.

[0081] Furthermore, the first SiGe layer 12a is not particularly limited, but it is preferable to perform CMP processing before bonding to reduce the surface roughness Sa to 1 nm or less.

[0082] By setting the surface roughness Sa of the first SiGe layer 12a to 1 nm or less, the first SiGe layer 12a is sufficiently planar and can be reliably bonded to the BOX layer 23 of the second substrate 30.

[0083] While there is no specific lower limit for the surface roughness Sa, the lower the value, the better, so it is set to 0.

[0084] Herein, we will describe an example of a method for manufacturing the first substrate 20. As shown in the upper part of Figure 2, first, a first SiGe layer 12 is epitaxially grown on the first silicon substrate 11, and then the first SiGe layer 12 is subjected to CMP processing to obtain a first SiGe layer 12a with a surface roughness Sa of 1 nm or less, thereby manufacturing the first substrate 20.

[0085] The first SiGe layer 12a of the first substrate 20 is to function as a stressor, so coherent growth, i.e., growth at a critical thickness where no dislocations are generated, is preferred. On the other hand, since this first substrate 20 needs to be bonded to the next second substrate 30, it is preferable to flatten the surface to Sa = 1 nm or less. Furthermore, in order to make the critical thickness as thick as possible while considering the material removal by CMP, the Ge concentration is preferably 30% or less, preferably 20% or less.

[0086] The effect of Ge concentration in SiGe is summarized in Non-Patent Document 3. According to this document, as the Ge concentration increases and the lattice mismatch rate increases, the critical film thickness decreases. Considering CMP processing, a thickness of about 100 nm is required, and the Ge concentration should be 30% (lattice mismatch rate: 0.0014%) or less, preferably around 20% (lattice mismatch rate: 0.001%). Conversely, if the Ge concentration is low, the band curvature due to strain decreases, and as a result the effect of SiGe decreases. Therefore, it can be said that a Ge concentration of around 20% in SiGe is more preferable.

[0087] Next, the BOX layer 23 of the second substrate 30 is not particularly limited, 28 It is preferable to form the Si layer 24 by oxidation.

[0088] In this way 28By oxidizing the Si layer 24 to form a BOX layer 23, it can reliably become an insulating layer and form an SOI structure.

[0089] Furthermore, although not particularly limited, before bonding the first SiGe layer 12a of the first substrate 20 and the BOX layer 23 of the second substrate 30, the second substrate 30 is positioned deeper than the BOX layer 23. 28 It is preferable to pre-inject hydrogen into the Si layer 24 to form a hydrogen-injected layer 26.

[0090] By pre-injecting hydrogen in this manner to form a hydrogen-injected layer 26, the second silicon substrate 21 can be easily peeled off after bonding, starting from this hydrogen-injected layer 26.

[0091] Here, we will explain an example of how to manufacture the second substrate 30. As shown in the middle of Figure 2, first the second silicon substrate 21 28 The Si layer 24 is epitaxially grown, and then 28 The Si layer 24 is oxidized to form the BOX layer 23, and further, at a position deeper than the BOX layer 23 28 The second substrate 30 can be manufactured by injecting hydrogen into the Si layer 24 to form a hydrogen-implanted layer 26.

[0092] Then, the first SiGe layer 12a of the first substrate 20 prepared as described above is joined to the BOX layer 23 of the second substrate 30.

[0093] The process after joining will be explained by referring to the lower part of Figure 2.

[0094] The peeling of the second silicon substrate 21 is not particularly limited, but it is preferable to peel it off at the hydrogen-implanted layer 26 by heat treatment.

[0095] By performing heat treatment with the hydrogen-injected layer 26 formed in this manner, the bonds of the silicon crystals in the hydrogen-injected layer 26 can be severed (Smart Cut®), and the second silicon substrate 21 can be reliably peeled off.

[0096] And finally, the second silicon substrate 21 was peeled off to expose 28A silicon quantum computer substrate 40 can be manufactured by epitaxially growing a second SiGe layer 35 on the surface of the Si layer 24a.

[0097] In addition to the method of removing the second silicon substrate 21 by pre-implanting hydrogen into the second substrate 30 and performing SmartCut (registered trademark) as described above, it may also be removed by thinning it using methods such as grinding and polishing.

[0098] The present invention will be specifically described below using examples, but the present invention is not limited thereto.

[0099] (Example) As the first substrate, a boron-doped silicon substrate with a diameter of 300 mm (resistance: 1000 Ω·cm) was prepared and subjected to SiH in a reduced-pressure CVD apparatus. 2 Cl 2 Gas at 500 sccm, GeH 4 A gas was supplied at 1500 sccm, 10 Torr, and 610°C to grow a 90 nm SiGe layer (Ge = 20%). Next, this substrate was subjected to CMP with silica-based abrasive grains, and 20 nm was removed to obtain a substrate with a 70 nm SiGe layer, resulting in a substrate with Sa = 1 nm.

[0100] Next, as a second substrate, another substrate is used. 28 SiH 4 Silicon epitaxial growth was performed using (99.94% isotope) as the raw material. A 30 nm film was deposited under reduced pressure conditions of 850°C and 100 Torr. This substrate was oxidized to form a 20 nm thermal oxide film layer as the BOX layer at 900°C by dry oxidation, after which hydrogen was added at 10 keV at a rate of 1 e16 a / cm². 2 It was injected and prepared as the second substrate.

[0101] Then, the surface of the BOX layer of the second substrate and the surface of the SiGe layer of the first substrate were bonded together.

[0102] Next, the bonded substrates were annealed at 450°C for 60 minutes to remove them from the hydrogen-injected layer. 28 A second SiGe layer (Ge = 30%) was formed on the Si layer.

[0103] An element with a CPW (line length: 2200 μm) formed by an aluminum electrode was fabricated on this substrate. Then, the second harmonic characteristic (2HD characteristic) (frequency: 1 GHz, input power: 15 dBm) was measured. As a result, a value of 2HD of -100 dBm was obtained.

[0104] (Comparative Example) As the first substrate, a boron-doped, 300-mm-diameter silicon substrate (resistance: 1000 Ω·cm) was prepared. This is different from the example in that it does not have a SiGe layer.

[0105] Next, as the second substrate, a boron-doped, 300-mm-diameter silicon substrate (resistance: 1000 Ω·cm) was prepared, 28 SiH 4 (isotope 99.94%) was used as a raw material to perform silicon epitaxial growth. The temperature was 850 °C, and the film was formed to a thickness of 30 nm under reduced pressure conditions of 100 Torr. This substrate was subjected to oxidation treatment to form a thermal oxide film layer as a BOX layer with a thickness of 20 nm at 900 °C by dry oxidation. Then, hydrogen was implanted at 10 keV at 1E16 a / cm 2 The implanted substrate was prepared as the second substrate.

[0106] Then, the surface of the BOX layer of the second substrate was bonded to the surface of the first substrate.

[0107] Next, the bonded substrate was annealed at 450 °C for 60 min to peel off the hydrogen implantation layer. Further, 28 a SiGe layer (Ge = 30%) was formed on the Si top layer.

[0108] Fig. 3 is a schematic diagram of the substrate 50 of the comparative example. The substrate 50 has a BOX layer 53 on a silicon substrate 51, and 28 a Si layer 54 on the BOX layer 53, and 28 a SiGe layer 55 on the Si layer 54. The comparative example in Fig. 3 has a configuration without a SiGe layer directly under the BOX layer 53 as compared with the example in Fig. 1.

[0109] An element with a CPW (line length: 2200 μm) formed by an aluminum electrode was fabricated on the substrate 50 of the comparative example. Then, the second harmonic characteristic (2HD characteristic) (frequency: 1 GHz, input power: 15 dBm) was measured. As a result, a value of 2HD of -80 dBm was obtained.

[0110] In the embodiment (a structure having a SiGe layer directly under the BOX layer), the 2HD characteristics are better than those in the comparative example (a structure having no SiGe layer directly under the BOX layer) (improvement by 20 dB). Therefore, the distortion of the high-frequency signal during quantum signal readout is small, and it has been confirmed that it is excellent as a substrate for a quantum computer.

[0111] As described above, according to the embodiment of the present invention, a substrate for a silicon quantum computer with better high-frequency characteristics can be obtained.

[0112] This specification includes the following aspects. [1]: A silicon substrate, a first SiGe layer on the silicon substrate, a BOX layer on the first SiGe layer, and a 28 Si layer on the BOX layer, and a 28 second SiGe layer on the Si layer, and a substrate for a silicon quantum computer, characterized by having these. [2]: The substrate for a silicon quantum computer according to [1] above, wherein the silicon substrate has a resistivity of 1000 Ω·cm or more. [3]: The substrate for a silicon quantum computer according to [1] or [2] above, wherein the first SiGe layer has a Ge concentration of 30% or less. [4]: The substrate for a silicon quantum computer according to any one of [1] to [3] above, wherein the BOX layer is formed by oxidizing the 28 Si layer. [5]: A silicon quantum computer, characterized by including the substrate for a silicon quantum computer according to any one of [1] to [4] above. [6]: A first substrate having a first SiGe layer on a first silicon substrate, a 28 Si layer on a second silicon substrate, and a second substrate having a BOX layer on the 28 Si layer are respectively prepared, the first SiGe layer of the first substrate and the BOX layer of the second substrate are bonded, the second silicon substrate is peeled off, and the 28A method for manufacturing a silicon quantum computer substrate, characterized by laminating a second SiGe layer on a Si layer. [7]: The method for manufacturing a silicon quantum computer substrate according to [6], characterized in that the first silicon substrate has a resistivity of 1000 Ω·cm or more. [8]: The method for manufacturing a silicon quantum computer substrate according to [6] or [7], characterized in that the first SiGe layer has a Ge concentration of 30% or less. [9]: The method for manufacturing a silicon quantum computer substrate according to any one of [6] to [8], characterized in that the first SiGe layer has a surface roughness Sa of 1 nm or less by performing CMP processing before bonding.

[10] : The BOX layer is 28 A method for manufacturing a silicon quantum computer substrate according to any one of [6] to [9] above, characterized in that the Si layer is formed by oxidation.

[11] : Before joining the first SiGe layer of the first substrate and the BOX layer of the second substrate, the second substrate has a position deeper than the BOX layer 28 A method for manufacturing a silicon quantum computer substrate according to any one of [6] to

[10] above, characterized in that hydrogen is injected into the Si layer in advance to form a hydrogen-injected layer.

[12] : A method for manufacturing a silicon quantum computer substrate according to

[11] above, characterized in that the second silicon substrate is peeled off at the hydrogen-injected layer by heat treatment.

[0113] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention.

Claims

1. A silicon substrate, a first SiGe layer on the silicon substrate, a BOX layer on the first SiGe layer, and on the BOX layer 28 Si layer and the aforementioned 28 A silicon quantum computer substrate characterized by having a second SiGe layer on a Si layer.

2. The silicon substrate for a silicon quantum computer according to claim 1, characterized in that the silicon substrate has a resistivity of 1000 Ω·cm or more.

3. The silicon quantum computer substrate according to claim 1, characterized in that the first SiGe layer has a Ge concentration of 30% or less.

4. The BOX layer is the 28 The silicon quantum computer substrate according to claim 1, characterized in that it is formed by oxidizing a Si layer.

5. A silicon quantum computer characterized by comprising a silicon quantum computer substrate as described in claims 1 to 4.

6. A first substrate having a first SiGe layer on a first silicon substrate, and a second silicon substrate 28 Si layer and the above 28 A second substrate having a BOX layer on a Si layer is prepared, the first SiGe layer of the first substrate and the BOX layer of the second substrate are bonded together, the second silicon substrate is peeled off, and the exposed part of the second silicon substrate is 28 A method for manufacturing a silicon quantum computer substrate, characterized by stacking a second SiGe layer on a Si layer.

7. The method for manufacturing a silicon quantum computer substrate according to claim 6, characterized in that the first silicon substrate has a resistivity of 1000 Ω·cm or more.

8. The method for manufacturing a silicon quantum computer substrate according to claim 6, characterized in that the first SiGe layer has a Ge concentration of 30% or less.

9. The method for manufacturing a silicon quantum computer substrate according to claim 6, characterized in that the first SiGe layer has a surface roughness Sa of 1 nm or less by performing CMP processing before bonding.

10. The BOX layer is the 28 A method for manufacturing a silicon quantum computer substrate according to claim 6, characterized in that the Si layer is formed by oxidation.

11. Before bonding the first SiGe layer of the first substrate and the BOX layer of the second substrate, the second substrate has a position deeper than the BOX layer. 28 A method for manufacturing a silicon quantum computer substrate according to claims 6 to 10, characterized in that hydrogen is pre-injected into the Si layer to form a hydrogen-injected layer.

12. The method for manufacturing a silicon quantum computer substrate according to claim 11, characterized in that the second silicon substrate is peeled off at the hydrogen-injected layer by heat treatment.