Clock synchronization system, clock synchronization method, and device, medium and program product

Abstract

Disclosed in the embodiments of the present disclosure are a clock synchronization system, a clock synchronization method, and a device, a medium and a program product. A specific embodiment of the clock synchronization system comprises: a first system, which is configured to send a clock synchronization request to a second system; and the second system, which is configured to record a timestamp as a second system timestamp in response to receiving the clock synchronization request sent by the first system, and send a response handshake packet to the first system, wherein the first system is in communication connection with the second system, the first system is further configured to record a timestamp as a first system timestamp in response to receiving the response handshake packet sent by the second system, the second system is further configured to send the second system timestamp to the first system, and the first system is further configured to perform clock synchronization processing between the first system and the second system on the basis of the first system timestamp and the second system timestamp. The embodiment improves the accuracy of cross-system time synchronization.

Description

Clock synchronization systems, clock synchronization methods, equipment, media and program products

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411883989.5, filed on December 19, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of this disclosure relate to the field of computer technology, and more specifically to clock synchronization systems, clock synchronization methods, devices, media, and program products. Background Technology

[0004] Two communicating systems operating independently will form two independent clock systems. Because these two clock systems operate independently, a time lag will occur between them. Currently, the common method for synchronizing the clocks of the two systems is to exchange message information containing local clock timestamps between the two systems via the USB protocol, and then use an algorithm to estimate the USB transmission time to calculate the time lag between the two systems.

[0005] However, when using the above method for clock synchronization, the following technical problems often exist: in the scheme that relies on the transmission time of each message exchange to calculate the time deviation, the USB transmission time across systems cannot be accurately measured, resulting in poor accuracy of the determined time deviation between the two systems, and thus poor accuracy of time synchronization between the two systems.

[0006] The information disclosed in this background section is only intended to enhance the understanding of the background of the inventive concept, and therefore may contain information that does not form prior art known to those skilled in the art. Summary of the Invention

[0007] The summary portion of this disclosure is intended to provide a brief overview of the concepts, which will be described in detail in the detailed description portion. This summary portion is not intended to identify key or essential features of the claimed technical solutions, nor is it intended to limit the scope of the claimed technical solutions.

[0008] Some embodiments of this disclosure provide clock synchronization systems, clock synchronization methods, electronic devices, computer-readable media, and computer program products to address one or more of the technical problems mentioned in the background section above.

[0009] In a first aspect, some embodiments of this disclosure provide a clock synchronization system, comprising: a first system configured to send a clock synchronization request to a second system; a second system configured to, in response to receiving the clock synchronization request sent by the first system, record a timestamp as a second system timestamp and send a response handshake packet to the first system, wherein the first system and the second system are communicatively connected; the first system is further configured to, in response to receiving the response handshake packet sent by the second system, record a timestamp as a first system timestamp; the second system is further configured to send the second system timestamp to the first system; and the first system is further configured to perform clock synchronization processing on the first system and the second system based on the first system timestamp and the second system timestamp.

[0010] Optionally, the first system is further configured to perform clock synchronization processing on the first system and the second system according to the timestamp of the first system and the timestamp of the second system through the following steps: generating a clock offset according to the timestamp of the first system and the timestamp of the second system; sending the clock offset to the second system, so that the second system performs clock synchronization according to the clock offset.

[0011] Optionally, the second system is further configured to adjust the clock of the second system according to the clock offset.

[0012] Optionally, the first system is further configured to generate a clock offset by the following steps based on the first system timestamp and the second system timestamp: the difference between the second system timestamp and the first system timestamp is determined as the clock offset.

[0013] Optionally, the clock synchronization system includes multiple second systems, and the first system is further configured to perform the following steps for each of the multiple second systems: determining the second system as the current second system; generating a clock offset of the current second system corresponding to the first system based on the timestamp of the first system and the timestamp of the second system corresponding to the current second system; and sending the generated clock offset to the current second system, so that the current second system performs clock synchronization based on the received clock offset.

[0014] Optionally, each of the plurality of second systems is configured to: in response to receiving a clock offset corresponding to the first system sent by any other second system, determine the clock offset corresponding to the first system sent by any other second system as a first clock offset; determine the clock offset of the second system corresponding to the first system as a second clock offset; and generate a clock offset of the second system corresponding to any other second system based on the first clock offset and the second clock offset.

[0015] Optionally, the clock synchronization system includes a head-mounted display device and a host device that is communicatively connected to the head-mounted display device; the first system includes either the head-mounted display device or the host device; and the second system includes either the host device or the head-mounted display device.

[0016] Secondly, some embodiments of this disclosure provide a clock synchronization method applied to a first system included in a clock synchronization system, comprising: sending a clock synchronization request to a second system included in the clock synchronization system; in response to receiving a response handshake packet sent by the second system, recording a timestamp as a first system timestamp; and in response to receiving a second system timestamp corresponding to the clock synchronization request sent by the second system, performing clock synchronization processing on the first system and the second system based on the first system timestamp and the second system timestamp.

[0017] Thirdly, some embodiments of this disclosure provide a clock synchronization method applied to a second system included in a clock synchronization system, comprising: in response to receiving a clock synchronization request sent by a first system included in the clock synchronization system, recording a timestamp as a second system timestamp, and sending a response handshake packet to the first system; sending the second system timestamp to the first system, such that the first system performs clock synchronization processing based on the second system timestamp and the first system timestamp corresponding to the response handshake packet.

[0018] Fourthly, some embodiments of this disclosure provide an electronic device, including: one or more processors; and a storage device having one or more programs stored thereon, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the method described in any implementation of the first aspect above.

[0019] Fifthly, some embodiments of this disclosure provide a computer-readable medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the method described in any of the implementations of the first aspect.

[0020] Sixthly, some embodiments of this disclosure provide a computer program product, including a computer program that, when executed by a processor, implements the method described in any of the implementations of the first aspect above.

[0021] The various embodiments of this disclosure have the following beneficial effects: the clock synchronization system of some embodiments of this disclosure improves the accuracy of cross-system time synchronization. Specifically, the reason for the poor accuracy of time synchronization between two systems is that in the scheme that relies on the transmission time of each message exchange to calculate the time deviation, the USB transmission time between the two systems cannot be accurately measured, resulting in poor accuracy of the determined time deviation between the two systems, thus causing poor accuracy of time synchronization between the two systems. Based on this, some embodiments of the clock synchronization system disclosed herein include a first system configured to send a clock synchronization request to a second system; the second system configured to, in response to receiving the clock synchronization request sent by the first system, record a timestamp as a second system timestamp and send a response handshake packet to the first system, wherein the first system and the second system are communicatively connected; the first system is further configured to, in response to receiving the response handshake packet sent by the second system, record a timestamp as a first system timestamp; the second system is further configured to send the second system timestamp to the first system; and the first system is further configured to perform clock synchronization processing on the first system and the second system based on the first system timestamp and the second system timestamp. Because a response handshake packet is used as a clock synchronization trigger signal between the two systems during cross-system transmission, the problem of poor accuracy in determining the time deviation between the two systems due to the inability to measure the transmission time between systems in the USB message-based synchronization scheme can be avoided, improving the accuracy of the determined time deviation between the two systems and thus improving the accuracy of cross-system time synchronization. Attached Figure Description

[0022] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and elements are not necessarily drawn to scale.

[0023] Figure 1 is a timing flowchart of a clock synchronization system according to some embodiments of the present disclosure;

[0024] Figure 2 is a flowchart of some embodiments of a clock synchronization method applied to a first system according to the present disclosure;

[0025] Figure 3 is a flowchart of some embodiments of a clock synchronization method applied to a second system according to the present disclosure;

[0026] Figure 4 is a schematic diagram of the structure of an electronic device suitable for implementing some embodiments of the present disclosure. Detailed Implementation

[0027] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0028] It should also be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings. Unless otherwise specified, the embodiments and features described in this disclosure can be combined with each other.

[0029] It should be noted that the concepts of "first" and "second" mentioned in this disclosure are used only to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependencies.

[0030] It should be noted that the terms "a" and "a plurality of" used in this disclosure are illustrative rather than restrictive, and those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0031] The names of messages or information exchanged between multiple devices in the embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.

[0032] This disclosure will now be described in detail with reference to the accompanying drawings and embodiments.

[0033] Figure 1 is a timing flowchart of a clock synchronization system according to some embodiments of the present disclosure. The timing flowchart 100 includes the following steps:

[0034] Step 101: The first system sends a clock synchronization request to the second system.

[0035] In some embodiments, the clock synchronization system may include a first system and a second system. The first system and the second system may be two systems with independently operating clocks. The first system and the second system are communicatively connected. The first system and the second system may be the same type of computing device or different types of computing devices. For example, the first system and the second system may be a mobile phone and a computer, respectively. Here, the types of the first system and the second system are not limited. In practice, the first system may send a clock synchronization request to the second system via USB transmission. The clock synchronization request may be a request used to trigger clock synchronization. Specifically, the first system may periodically send clock synchronization requests to the second system at a preset time interval. For example, the preset time interval may be 100 milliseconds.

[0036] Step 102: In response to receiving the clock synchronization request sent by the first system, the second system records the timestamp as the second system timestamp and sends a response handshake packet to the first system.

[0037] The second system timestamp can represent the time when the second system receives the aforementioned clock synchronization request. The aforementioned response handshake packet can be data from the receiver acknowledging or responding to the sender's data. For example, the aforementioned response handshake packet can be an ACK handshake packet. An ACK handshake packet can indicate successful reception. In practice, the second system can synchronously send a response handshake packet to the aforementioned first system when recording its timestamp as the second system timestamp.

[0038] Step 103: The first system responds to the response handshake packet sent by the second system by recording the timestamp as the first system timestamp.

[0039] The first system timestamp can characterize the time when the first system receives the above response handshake packet.

[0040] Step 104: The second system sends its timestamp to the first system.

[0041] In some embodiments, the second system can send the second system timestamp to the first system. In practice, the second system can send the second system timestamp to the first system via USB transmission.

[0042] Step 105: The first system performs clock synchronization processing on the first system and the second system based on the first system timestamp and the second system timestamp.

[0043] In some embodiments, the first system performs clock synchronization processing on the first system and the second system based on the first system timestamp and the second system timestamp. In practice, firstly, the first system can use its local clock as a reference clock. Then, the difference between the second system timestamp and the first system timestamp can be determined as the clock offset. Next, the clock offset can be sent to the second system, allowing the second system to add the clock offset to its own clock to synchronize with the first system's clock.

[0044] It should be noted that since the transmission time of the response handshake packet is extremely short, the second system timestamp and the first system timestamp can be considered to be recorded at the same physical moment. Therefore, the difference between the first and second timestamps can be considered to be infinitely close to the actual clock offset of the first and second systems. In other words, it is accurate to determine the difference between the second system timestamp and the first system timestamp as the clock offset.

[0045] The transmission time of the response handshake packet is extremely small because the response handshake packet returned by the second system to the first system is a high-priority short message that can directly preempt USB bus transmission without participating in bus queuing. Even if there is data transmission load on the USB bus, it can still complete the transmission first. Therefore, the transmission time of the response handshake packet from the second system to the first system is almost unaffected by bus load, and is only a microsecond or microsecond-level delay. Its magnitude is far lower than the clock offset between the two systems. In engineering practice, the impact of this transmission time on clock synchronization is negligible and will not affect the accuracy and reliability of clock synchronization.

[0046] Optionally, the aforementioned clock synchronization system may include multiple second systems. The aforementioned first system may be further configured to:

[0047] For each of the multiple second systems mentioned above, perform the following steps:

[0048] The first step is to identify the aforementioned second system as the current second system.

[0049] The second step involves generating the clock offset between the current second system and the first system based on the timestamps of the first and second systems corresponding to the current second system. The recording method for the timestamps of the first and second systems corresponding to the current second system is described in the embodiments corresponding to Figure 1, and will not be repeated here. The first system can simultaneously send clock synchronization requests to multiple second systems. In practice, the first system can determine the clock offset as the difference between the timestamp of the current second system and the timestamp of the corresponding first system.

[0050] The third step is to send the generated clock offset to the current second system, enabling the second system to synchronize its clock based on the received clock offset. In practice, the current second system can add the clock offset to its clock signal for synchronization. Thus, each second system can use the first system as its clock reference system for clock synchronization, thereby achieving clock synchronization between multiple systems. It should be noted that any system included in the clock synchronization system can serve as a clock reference system, and the operations performed by the clock reference system can be referenced from those of the first system; these details will not be elaborated further here.

[0051] Optionally, each of the above-mentioned multiple second systems can be configured as follows:

[0052] The first step is to determine the clock offset corresponding to the first system sent by any other second system as the first clock offset in response to receiving the clock offset sent by any other second system.

[0053] The second step is to determine the clock offset of the second system corresponding to the first system as the second clock offset.

[0054] The third step involves generating the clock offset of the second system corresponding to any other second system, based on the first clock offset and the second clock offset. In practice, the difference between the second clock offset and the first clock offset can be used to determine the clock offset of the second system corresponding to any other second system. Therefore, the clock deviation between the second systems can be determined using the clock offset of the second system corresponding to the clock reference system.

[0055] Optionally, the aforementioned clock synchronization system may include a head-mounted display device and a host device communicatively connected to the head-mounted display device. For example, the head-mounted display device may be, but is not limited to, AR glasses, MR glasses, or VR glasses. The host device may be, but is not limited to, a smart terminal, a mobile phone, or a tablet computer. The first system includes either a head-mounted display device or a host device, and the second system includes either a host device or a head-mounted display device. It can be understood that when the first system is a head-mounted display device, the second system can be a host device. When the first system is a host device, the second system can be a head-mounted display device. Therefore, this system is applicable to clock synchronization between a split-type head-mounted display device and a host device.

[0056] Optionally, the aforementioned clock synchronization system may further include a server. The first system and the second system are also configured to send registration information to the server in response to initial network access. This registration information may include, but is not limited to, device ID, device type, and registration request time.

[0057] Optionally, the above server can be configured to perform the following steps:

[0058] The first step is to respond to the received registration information and determine the system to be synchronized based on it. This system can be either the first system or the second system. In practice, the server can determine the system to be synchronized by identifying the device corresponding to the device ID included in the registration information. If the registration information is sent by the first system, then the system to be synchronized is the first system. If the registration information is sent by the second system, then the system to be synchronized is the second system.

[0059] The second step is to send heartbeat signals to each of the identified systems to be synchronized. These heartbeat signals can be messages or data packets, sent by the sender to the receiver to confirm the reception time. The heartbeat signals may include sequence numbers, which can start from 0 and increment sequentially.

[0060] The third step is to determine the sending time of the aforementioned heartbeat signal as the first timestamp.

[0061] The fourth step involves receiving a confirmation message from any system to be synchronized, and determining the time of receiving this confirmation message as the fourth timestamp. The confirmation message indicates that the receiver has acknowledged receiving the heartbeat signal.

[0062] Fifth step: Send the first timestamp and the fourth timestamp mentioned above to any of the systems to be synchronized.

[0063] Optionally, each of the above-mentioned systems to be synchronized can be configured to perform the following steps:

[0064] The first step is to determine the time of receiving the heartbeat signal sent by the server as the second timestamp.

[0065] The second step is to send the confirmation message back to the aforementioned server.

[0066] The third step is to determine the sending time of the aforementioned confirmation message as the third timestamp.

[0067] The fourth step involves receiving the first and fourth timestamps sent by the server, and generating the time deviation between the system to be synchronized and the server based on the first, second, third, and fourth timestamps. In practice, the system to be synchronized can first determine the difference between the second and first timestamps as the first time difference. Then, the difference between the fourth and third timestamps can be determined as the second time difference. Finally, the average of the first and second time differences can be determined as the time deviation between the system to be synchronized and the server.

[0068] The fifth step is to adjust the local clock of the system to be synchronized based on the generated time deviation. In practice, the system to be synchronized can add the generated time deviation to its local clock to adjust its local clock accordingly.

[0069] The aforementioned content regarding the server and the system to be synchronized serves as an inventive point of this disclosure, solving the technical problem that "clock synchronization based on time deviations between systems, even if the times recorded by each system are synchronized, may result in significant differences between the recorded times and the standard time, leading to poor accuracy of the recorded times." Factors contributing to poor accuracy of the recorded times often include: clock synchronization based on time deviations between systems, even if the times recorded by each system are synchronized, may result in significant differences between the recorded times and the standard time, leading to poor accuracy of the recorded times. Solving these factors can improve the accuracy of the times recorded by each system. To achieve this effect, this disclosure introduces a server. When each system first connects to the network, it needs to be calibrated using the server's clock as a reference. The server's clock can serve as the standard time. After calibration using the standard time, the accuracy of the times recorded by each system's clock is improved. Subsequently, clock synchronization is performed using the clocks between the systems, which improves both the accuracy of clock synchronization and the accuracy of the recorded times.

[0070] The various embodiments disclosed above have the following beneficial effects: the clock synchronization system of some embodiments of this disclosure improves the accuracy of cross-system time synchronization. Specifically, the reason for the poor accuracy of time synchronization between two systems is that in the scheme that relies on the transmission time of each message exchange to calculate the time deviation, the USB transmission time across systems cannot be accurately measured, resulting in poor accuracy of the determined time deviation between the two systems, thus causing poor accuracy of time synchronization between the two systems. Based on this, some embodiments of the clock synchronization system disclosed herein include a first system configured to send a clock synchronization request to a second system; the second system configured to, in response to receiving the clock synchronization request sent by the first system, record a timestamp as a second system timestamp and send a response handshake packet to the first system, wherein the first system and the second system are communicatively connected; the first system is further configured to, in response to receiving the response handshake packet sent by the second system, record a timestamp as a first system timestamp; the second system is further configured to send the second system timestamp to the first system; and the first system is further configured to perform clock synchronization processing on the first system and the second system based on the first system timestamp and the second system timestamp. Because a response handshake packet is used as a clock synchronization trigger signal between the two systems during cross-system transmission, the problem of poor accuracy in determining the time deviation between the two systems due to the inability to measure the transmission time between systems in the USB message-based synchronization scheme can be avoided, improving the accuracy of the determined time deviation between the two systems and thus improving the accuracy of cross-system time synchronization.

[0071] Referring further to Figure 2, a flow 200 of some embodiments of a clock synchronization method applied to a first system is illustrated. The flow 200 of the clock synchronization method includes the following steps:

[0072] Step 201: Send a clock synchronization request to the second system included in the clock synchronization system.

[0073] In some embodiments, the specific implementation of step 201 and the resulting technical effects can be referred to step 101 in the embodiments corresponding to Figure 1, and will not be repeated here.

[0074] Step 202: In response to receiving the response handshake packet sent by the second system, record the timestamp as the first system timestamp.

[0075] In some embodiments, the specific implementation of step 202 and the resulting technical effects can be referred to step 103 in the embodiments corresponding to Figure 1, and will not be repeated here.

[0076] Step 203: In response to the second system timestamp of the corresponding clock synchronization request sent by the second system, clock synchronization processing is performed on the first system and the second system according to the first system timestamp and the second system timestamp.

[0077] In some embodiments, the specific implementation of step 203 and the resulting technical effects can be referred to step 105 in the embodiments corresponding to Figure 1, and will not be repeated here.

[0078] The flowchart 200 of some embodiments of the clock synchronization method in Figure 2 illustrates the steps performed by the first system during clock synchronization. Therefore, the schemes described in these embodiments can use the clock of the first system as a clock reference to achieve clock synchronization between the first and second systems.

[0079] Referring further to Figure 3, a flow 300 of some embodiments of a clock synchronization method applied to a second system is illustrated. The flow 300 of this clock synchronization method includes the following steps:

[0080] Step 301: In response to receiving a clock synchronization request from the first system included in the clock synchronization system, record the timestamp as the second system timestamp, and send a response handshake packet to the first system.

[0081] In some embodiments, the specific implementation of step 301 and the resulting technical effects can be referred to step 102 in the embodiments corresponding to Figure 1, and will not be repeated here.

[0082] Step 302: Send the second system timestamp to the first system, so that the first system can perform clock synchronization processing based on the second system timestamp and the first system timestamp of the corresponding response handshake packet.

[0083] In some embodiments, the specific implementation of step 302 and the resulting technical effects can be referred to step 104 in the embodiments corresponding to Figure 1, and will not be repeated here.

[0084] The flowchart 300 of some embodiments of the clock synchronization method in Figure 3 illustrates the steps performed by the second system during clock synchronization. Thus, the schemes described in these embodiments can use the clock of the first system as a clock reference to achieve clock synchronization between the first and second systems.

[0085] Referring now to FIG4, a schematic diagram of the structure of an electronic device 400 suitable for implementing some embodiments of the present disclosure is shown. The electronic devices in some embodiments of the present disclosure may include, but are not limited to, mobile terminals such as head-mounted displays, mobile phones, laptops, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. The electronic device shown in FIG4 is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of the present disclosure.

[0086] As shown in Figure 4, the electronic device 400 may include a processing unit 401 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 402 or a program loaded from a storage device 408 into a random access memory (RAM) 403. The RAM 403 also stores various programs and data required for the operation of the electronic device 400. The processing unit 401, ROM 402, and RAM 403 are interconnected via a bus 404. An input / output (I / O) interface 405 is also connected to the bus 404.

[0087] Typically, the following devices can be connected to I / O interface 405: input devices 406 including, for example, touchscreens, touchpads, keyboards, mice, cameras, microphones, accelerometers, gyroscopes, etc.; output devices 407 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; and communication devices 409. Communication device 409 allows electronic device 400 to communicate wirelessly or wiredly with other devices to exchange data. Although Figure 4 shows electronic device 400 with various devices, it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed alternatively. Each box shown in Figure 4 may represent one device, or multiple devices may be represented as needed.

[0088] In particular, according to some embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, some embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication device 409, or installed from storage device 408, or installed from ROM 402. When the computer program is executed by processing device 401, it performs the functions defined above in the methods of some embodiments of this disclosure.

[0089] It should be noted that, in some embodiments of this disclosure, the computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In some embodiments of this disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In some embodiments of this disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium can be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wires, optical fibers, RF (radio frequency), etc., or any suitable combination thereof.

[0090] In some implementations, clients and servers can communicate using any currently known or future-developed network protocol such as HTTP (Hypertext Transfer Protocol), and can interconnect with digital data communication (e.g., communication networks) of any form or medium. Examples of communication networks include local area networks (“LANs”), wide area networks (“WANs”), the Internet (e.g., the Internet of Things), and end-to-end networks (e.g., ad hoc end-to-end networks), as well as any currently known or future-developed networks.

[0091] The aforementioned computer-readable medium may be included in the aforementioned electronic device; or it may exist independently and not assembled into the electronic device. The aforementioned computer-readable medium carries one or more programs that, when executed by the electronic device, cause the electronic device to: send a clock synchronization request to the second system included in the aforementioned clock synchronization system; record a timestamp as a first system timestamp in response to receiving a response handshake packet sent by the second system; and, in response to receiving a second system timestamp corresponding to the aforementioned clock synchronization request sent by the second system, perform clock synchronization processing on the first system and the second system based on the first system timestamp and the second system timestamp.

[0092] Alternatively, the electronic device may: in response to receiving a clock synchronization request sent by the first system included in the aforementioned clock synchronization system, record a timestamp as a second system timestamp, and send a response handshake packet to the first system; send the second system timestamp to the first system, so that the first system performs clock synchronization processing based on the second system timestamp and the first system timestamp corresponding to the response handshake packet.

[0093] Computer program code for performing operations of some embodiments of this disclosure can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0094] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0095] The functions described above in this document can be performed, at least in part, by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: Field Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), Application Standard Products (ASSPs), System-on-Chip (SoCs), Complex Programmable Logic Devices (CPLDs), and so on.

[0096] Some embodiments of this disclosure also provide a computer program product, including a computer program that, when executed by a processor, implements any of the clock synchronization methods described above.

[0097] The above description is merely a selection of preferred embodiments of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in the embodiments of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described inventive concept. For example, technical solutions formed by substituting the above-described features with (but not limited to) technical features with similar functions disclosed in the embodiments of this disclosure.

Claims

1. A clock synchronization system, comprising: The first system is configured to send a clock synchronization request to the second system; The second system is configured to, in response to receiving a clock synchronization request sent by the first system, record a timestamp as the second system timestamp and send a response handshake packet to the first system, wherein the first system and the second system are communicatively connected. The first system is also configured to record a timestamp as the first system timestamp in response to receiving a response handshake packet sent by the second system; The second system is also configured to send a timestamp from the second system to the first system; The first system is also configured to perform clock synchronization processing on the first system and the second system based on the timestamp of the first system and the timestamp of the second system.

2. The clock synchronization system according to claim 1, wherein, The first system is further configured to perform clock synchronization processing on the first system and the second system based on the timestamps of the first system and the second system through the following steps: Generate a clock offset based on the first system timestamp and the second system timestamp; The clock offset is sent to the second system, so that the second system performs clock synchronization based on the clock offset.

3. The clock synchronization system according to claim 2, wherein, The second system is also configured to adjust its clock according to the clock offset.

4. The clock synchronization system according to claim 2, wherein, The first system is further configured to generate a clock offset based on the first system timestamp and the second system timestamp through the following steps: The difference between the second system timestamp and the first system timestamp is determined as the clock offset.

5. The clock synchronization system according to claim 1, wherein, The clock synchronization system includes multiple second systems, and the first system is further configured to: For each of the plurality of second systems, perform the following steps: The second system is designated as the current second system; Based on the timestamp of the first system and the timestamp of the second system corresponding to the current second system, generate the clock offset of the current second system corresponding to the first system; The generated clock offset is sent to the current second system, so that the current second system can synchronize its clock according to the received clock offset.

6. The clock synchronization system according to claim 5, wherein, Each of the plurality of second systems is configured to: In response to receiving a clock offset corresponding to the first system sent by any other second system, the clock offset corresponding to the first system sent by any other second system is determined as the first clock offset; The clock offset of the second system corresponding to the first system is determined as the second clock offset; Based on the first clock offset and the second clock offset, the clock offset of the second system corresponding to any other second system is generated.

7. The clock synchronization system according to claim 1, wherein, The clock synchronization system includes a head-mounted display device and a host device communicatively connected to the head-mounted display device. The first system includes either the head-mounted display device or the host device, and the second system includes either the host device or the head-mounted display device.

8. A clock synchronization method, applied to a first system included in the clock synchronization system according to any one of claims 1-7, comprising: Send a clock synchronization request to the second system included in the clock synchronization system; In response to receiving the response handshake packet sent by the second system, the timestamp is recorded as the first system timestamp; In response to receiving a second system timestamp corresponding to the clock synchronization request sent by the second system, clock synchronization processing is performed on the first system and the second system based on the first system timestamp and the second system timestamp.

9. A clock synchronization method, applied to a second system included in the clock synchronization system according to any one of claims 1-7, comprising: In response to receiving a clock synchronization request from a first system included in the clock synchronization system, a timestamp is recorded as a second system timestamp, and a response handshake packet is sent to the first system; The second system timestamp is sent to the first system, so that the first system performs clock synchronization processing based on the second system timestamp and the first system timestamp corresponding to the response handshake packet.

10. An electronic device, comprising: One or more processors; Storage device, on which one or more programs are stored, When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described in claim 8 or 9.

11. A computer-readable medium having a computer program stored thereon, wherein, When the computer program is executed by a processor, it implements the method as described in claim 8 or 9.

12. A computer program product comprising a computer program that, when executed by a processor, implements the method according to claim 8 or 9.

Images