Ultrasonic fingerprint detection device and display panel

Abstract

The present disclosure relates to the technical field of display, and provides an ultrasonic fingerprint detection device and a display panel. The ultrasonic fingerprint detection device comprises a plurality of fingerprint detection units arranged in an array along a first direction and a second direction. Each fingerprint detection unit comprises a fingerprint detection circuit. The fingerprint detection circuit comprises a driving transistor and a first transistor. A first electrode of the driving transistor is connected to a first signal line, and a second electrode of the driving transistor is connected to a first electrode of the first transistor. The ultrasonic fingerprint detection device further comprises a base substrate, a first conductive portion, and a first gate connection line. The first conductive portion comprises a first extension section and a second extension section extending in the first direction. At least a portion of the first extension section is used to form a gate of the driving transistor. The size of an orthographic projection of the first extension section on the base substrate in the second direction is greater than the size of an orthographic projection of the second extension section on the base substrate in the second direction. The first gate connection line is connected to a gate of the first transistor. An orthographic projection of the first gate connection line on the base substrate extends along the second direction and at least partially overlaps with the orthographic projection of the second extension section on the base substrate. The ultrasonic fingerprint detection device has high detection accuracy.

Description

Ultrasonic fingerprint detection device, display panel Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to an ultrasonic fingerprint detection device and a display panel. Background Technology

[0002] Compared to photoelectric fingerprint sensors, ultrasonic fingerprint detectors are widely used in display panels because their performance is not affected by light-shielding structures within the display panel. However, ultrasonic fingerprint detectors generally have lower recognition accuracy compared to other technologies.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] According to one aspect of this disclosure, an ultrasonic fingerprint detection device is provided, wherein the ultrasonic fingerprint detection device includes a plurality of fingerprint detection units arrayed along a first direction and a second direction, the second direction intersecting the first direction, each fingerprint detection unit including a fingerprint detection circuit, the fingerprint detection circuit including a driving transistor and a first transistor, the first terminal of the driving transistor being connected to a first signal line, the second terminal of the driving transistor being connected to the first terminal of the first transistor, the second terminal of the first transistor being connected to a read signal line, and the ultrasonic fingerprint detection device further includes:

[0005] Substrate;

[0006] A first conductive portion, wherein the orthographic projection of the first conductive portion on the substrate extends along the first direction, the first conductive portion includes a first extension segment and a second extension segment, the first extension segment being at least partially used to form the gate of the driving transistor, and the size of the orthographic projection of the first extension segment on the substrate in the second direction is greater than the size of the orthographic projection of the second extension segment on the substrate in the second direction.

[0007] A first gate connection line is connected to the gate of the first transistor. The first gate connection line and the first conductive portion are located in different conductive layers. The orthographic projection of the first gate connection line on the substrate extends along the second direction. The orthographic projection of the first gate connection line on the substrate and the orthographic projection of the second extension on the substrate at least partially overlap.

[0008] In an exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor and a fourth transistor. The first electrode of the second transistor is connected to the gate of the driving transistor, the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor, the first electrode of the fourth transistor is connected to a bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor.

[0009] The ultrasonic fingerprint detection device also includes:

[0010] An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction.

[0011] The first main active portion includes a second active portion and a fourth active portion connected in the same layer. The orthographic projections of the second active portion and the fourth active portion on the substrate are distributed at intervals along the second direction. The second active portion is used to form the channel region of the second transistor, and the fourth active portion is used to form the channel region of the fourth transistor.

[0012] The second main active portion includes a first active portion and a third active portion connected in the same layer. The orthographic projections of the first active portion and the third active portion on the substrate are distributed at intervals along the second direction. The first active portion is used to form the channel region of the first transistor, and the third active portion is used to form the channel region of the driving transistor.

[0013] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor, wherein the first electrode of the second transistor is connected to the gate of the driving transistor, and the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor;

[0014] The ultrasonic fingerprint detection device also includes:

[0015] An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. At least a portion of the structure of the first main active portion is used to form the channel region of the second transistor, and at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor.

[0016] A first conductive layer is located on the side of the active layer away from the substrate. The first conductive layer includes a first conductive portion and a first gate segment. A second extension of the first conductive portion is connected to a first electrode of the second transistor. The orthographic projection of the first gate segment on the substrate extends along the first direction. At least a portion of the structure of the first gate segment is used to form the gate of the first transistor.

[0017] The second conductive layer is located on the side of the first conductive layer away from the substrate. The second conductive layer includes the first gate connection line, and the first gate connection line is connected to multiple first gate line segments distributed in the second direction through vias.

[0018] In the same fingerprint detection circuit, the orthographic projection of the first gate connection line on the substrate is located between the orthographic projection of the first main active part on the substrate and the orthographic projection of the second main active part on the substrate.

[0019] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor, wherein the first electrode of the second transistor is connected to the gate of the driving transistor, and the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor;

[0020] The ultrasonic fingerprint detection device also includes:

[0021] An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. At least a portion of the structure of the first main active portion is used to form the channel region of the second transistor, and at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor.

[0022] A first conductive layer is located on the side of the active layer opposite to the substrate. The first conductive layer includes a second reset signal segment. The orthographic projection of the second reset signal segment on the substrate extends along the first direction. At least a portion of the structure of the second reset signal segment is used to form the gate of the second transistor.

[0023] The second conductive layer is located on the side of the first conductive layer away from the substrate. The second conductive layer includes a second reset connection line. The orthographic projection of the second reset connection line on the substrate extends along the second direction. The second reset connection line connects multiple second reset signal line segments distributed in the second direction through vias.

[0024] In the same fingerprint detection circuit, the orthographic projection of the second reset connection line on the substrate is located on the side where the orthographic projection of the first main active part on the substrate is far from the orthographic projection of the second main active part on the substrate.

[0025] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a fourth transistor, the first electrode of the fourth transistor being connected to a bias signal line, and the second electrode of the fourth transistor being connected to the first electrode of the ultrasonic sensor;

[0026] The ultrasonic fingerprint detection device also includes:

[0027] An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. At least a portion of the structure of the first main active portion is used to form the channel region of the fourth transistor, and at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor.

[0028] A first conductive layer is located on the side of the active layer opposite to the substrate. The first conductive layer includes a first reset signal segment. The orthographic projection of the first reset signal segment on the substrate extends along the first direction. At least a portion of the structure of the first reset signal segment is used to form the gate of the fourth transistor.

[0029] The second conductive layer is located on the side of the first conductive layer away from the substrate. The second conductive layer includes a first reset connection line. The orthographic projection of the first reset connection line on the substrate extends along the second direction. The first reset connection line is connected to multiple first reset signal line segments distributed in the second direction through vias.

[0030] In the same fingerprint detection circuit, the orthographic projection of the first reset connection line on the substrate is located on the side where the orthographic projection of the first main active part on the substrate is far from the orthographic projection of the second main active part on the substrate.

[0031] In an exemplary embodiment of this disclosure, a plurality of fingerprint detection units form a plurality of fingerprint detection unit groups, and the fingerprint detection unit group includes at least two adjacent fingerprint detection units in the first direction, wherein the orthographic projections of the two adjacent fingerprint detection units on the substrate are at least partially mirror-symmetrical with respect to an axis of symmetry extending along the second direction.

[0032] The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor and a fourth transistor. The first electrode of the second transistor is connected to the gate of the driving transistor, and the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor. The first electrode of the fourth transistor is connected to a bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor.

[0033] The ultrasonic fingerprint detection device further includes: a first reset connection line and a second reset connection line, wherein the orthographic projections of the first reset connection line and the second reset connection line on the substrate both extend along the second direction, the first reset connection line is connected to the gate of the fourth transistor, and the second reset connection line is connected to the gate of the second transistor.

[0034] In the same fingerprint detection unit group, two fingerprint detection units that are adjacent and at least partially mirror-symmetrically arranged in the first direction share the same second reset connection line, and the orthogonal projection of the second reset connection line on the substrate is located between the orthogonal projections of two adjacent first reset connection lines on the substrate.

[0035] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes:

[0036] A second reset signal segment, wherein at least a portion of the structure of the second reset signal segment is used to form the gate of the second transistor;

[0037] In the same fingerprint detection unit group, the second reset signal segments of two fingerprint detection units that are adjacent and at least partially mirror-symmetrically arranged in the first direction are connected, and the two connected second reset signal segments are connected to the second reset connection line through a via.

[0038] In an exemplary embodiment of this disclosure, a plurality of fingerprint detection units form a plurality of fingerprint detection unit groups, and the fingerprint detection unit group includes at least two adjacent fingerprint detection units in the first direction, wherein the orthographic projections of the two adjacent fingerprint detection units on the substrate are at least partially mirror-symmetrical with respect to an axis of symmetry extending along the second direction.

[0039] The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor and a fourth transistor. The first electrode of the second transistor is connected to the gate of the driving transistor, and the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor. The first electrode of the fourth transistor is connected to a bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor.

[0040] The ultrasonic fingerprint detection device further includes: a first reset connection line and a second reset connection line, wherein the orthographic projections of the first reset connection line and the second reset connection line on the substrate both extend along the second direction, the first reset connection line is connected to the gate of the fourth transistor, and the second reset connection line is connected to the gate of the second transistor.

[0041] In the same fingerprint detection unit group, two fingerprint detection units that are adjacent and at least partially mirror-symmetrically arranged in the first direction share the same first reset connection line, and the orthogonal projection of the first reset connection line on the substrate is located between the orthogonal projections of two adjacent second reset connection lines on the substrate.

[0042] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes:

[0043] A first reset signal segment, wherein at least a portion of the first reset signal segment is configured to form the gate of the fourth transistor;

[0044] In the same fingerprint detection unit group, the first reset signal segments of two fingerprint detection units that are adjacent and at least partially mirror-symmetrical in the first direction are connected, and the two connected first reset signal segments are connected to the first reset connection line through a via.

[0045] In one exemplary embodiment of this disclosure, a plurality of fingerprint detection units form a plurality of fingerprint detection unit groups, and the fingerprint detection unit group includes at least two fingerprint detection units adjacent in the second direction. The orthographic projections of the two fingerprint detection units adjacent in the second direction on the substrate are at least partially mirror-symmetrical with respect to the axis of symmetry extending along the first direction.

[0046] In the same fingerprint detection unit group, two adjacent fingerprint detection units in the second direction share the same first signal line, and the orthographic projection of the first signal line on the substrate extends along the first direction.

[0047] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor, wherein the first electrode of the second transistor is connected to the gate of the driving transistor, and the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor;

[0048] The aspect ratio of the channel region of the second transistor is smaller than that of the channel region of the first transistor.

[0049] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a fourth transistor, the first electrode of the fourth transistor being connected to a bias signal line, and the second electrode of the fourth transistor being connected to the first electrode of the ultrasonic sensor;

[0050] The aspect ratio of the channel region of the fourth transistor is greater than that of the channel region of the first transistor.

[0051] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a first capacitor and a fourth transistor. The first electrode of the first capacitor is connected to the first electrode of the driving transistor, the second electrode of the first capacitor is connected to a bias signal line, the first electrode of the fourth transistor is connected to the bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor.

[0052] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes:

[0053] The bias signal line, the orthogonal projection of the bias signal line on the substrate extends along the first direction;

[0054] The first bias connection line is located on a different conductive layer from the bias signal line. The orthographic projection of the first bias connection line on the substrate extends along the second direction. The first bias connection line is connected to the bias signal line that intersects with it through a via.

[0055] The second bias connection segment is located on a different conductive layer from the bias signal line. The orthographic projection of the second bias connection segment on the substrate extends along the second direction. The second bias connection segment is connected to the bias signal line that intersects with it through a via.

[0056] Wherein, the second bias connection line segment connects to the first electrode of the fourth transistor, the orthographic projection of the first bias connection line on the substrate and the orthographic projection of the first conductive portion on the substrate at least partially overlap, at least a portion of the structure of the first conductive portion is used to form the first electrode of the first capacitor, and a portion of the structure of the first bias connection line is used to form the second electrode of the first capacitor.

[0057] In one exemplary embodiment of this disclosure, the fingerprint detection circuit further includes a second transistor, the first electrode of which is connected to the gate of the driving transistor, and the second electrode of which is connected to the first electrode of the ultrasonic sensor;

[0058] The ultrasonic fingerprint detection device also includes:

[0059] An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. At least a portion of the structure of the first main active portion is used to form the channel region of the second transistor, and at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor.

[0060] In the same fingerprint detection circuit, the orthographic projection of the first bias connection line on the substrate is located on the side of the orthographic projection of the second main active part on the substrate that is away from the orthographic projection of the first main active part on the substrate, and the orthographic projection of the first gate connection line on the substrate is located between the orthographic projection of the first bias connection line on the substrate and the orthographic projection of the second bias connection line segment on the substrate.

[0061] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes:

[0062] The second main active portion, at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor;

[0063] Wherein, the overlapping area of ​​the orthographic projection of the first bias connection line on the substrate and the orthographic projection of the first conductive part on the substrate is A1, and the overlapping area of ​​the orthographic projection of the second main active part on the substrate and the orthographic projection of the first conductive part on the substrate is A2, and A1 / A2 is 0.5-2.

[0064] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a fourth transistor, the first electrode of the fourth transistor being connected to a bias signal line, and the second electrode of the fourth transistor being connected to the first electrode of the ultrasonic sensor;

[0065] The orthographic projection of the bias signal line on the substrate and the orthographic projection of the first signal line on the substrate extend along the first direction;

[0066] Wherein, the size of the orthogonal projection of the bias signal line on the substrate in the second direction is greater than the size of the orthogonal projection of the first signal line on the substrate in the second direction;

[0067] Alternatively, the size of the orthogonal projection of the bias signal line onto the substrate in the second direction is smaller than the size of the orthogonal projection of the first signal line onto the substrate in the second direction.

[0068] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a fourth transistor, the first electrode of the fourth transistor being connected to a bias signal line, and the second electrode of the fourth transistor being connected to the first electrode of the ultrasonic sensor;

[0069] The orthographic projection of the bias signal line on the substrate and the orthographic projection of the first signal line on the substrate extend along the first direction;

[0070] The ratio of the size of the orthogonal projection of the first signal line on the substrate in the second direction to the size of the orthogonal projection of the bias signal line on the substrate in the second direction is 1.5-4.

[0071] In an exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device includes a plurality of fingerprint detection units arrayed along a first direction and a second direction, the second direction intersecting the first direction, and each fingerprint detection unit includes a fingerprint detection circuit and an ultrasonic sensor, the fingerprint detection circuit including a driving transistor, a first capacitor, and a fourth transistor;

[0072] The first electrode of the first capacitor is connected to the first electrode of the driving transistor, the second electrode of the first capacitor is connected to the bias signal line, the first electrode of the fourth transistor is connected to the bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor.

[0073] The ultrasonic fingerprint detection device also includes:

[0074] Substrate;

[0075] A first conductive portion, at least a portion of the structure of which is used to form the gate of the driving transistor;

[0076] A bias signal line, wherein the orthogonal projection of the bias signal line on the substrate extends along the first direction;

[0077] The first bias connection line is located on a different conductive layer from the bias signal line. The orthographic projection of the first bias connection line on the substrate extends along the second direction. The first bias connection line is connected to the bias signal line that intersects with it through a via.

[0078] The second bias connection segment is located on a different conductive layer from the bias signal line. The orthographic projection of the second bias connection segment on the substrate extends along the second direction. The second bias connection segment is connected to the bias signal line that intersects with it through a via.

[0079] Wherein, the second bias connection line segment connects to the first electrode of the fourth transistor, the orthographic projection of the first bias connection line on the substrate and the orthographic projection of the first conductive portion on the substrate at least partially overlap, at least a portion of the structure of the first conductive portion is used to form the first electrode of the first capacitor, and a portion of the structure of the first bias connection line is used to form the second electrode of the first capacitor.

[0080] In one exemplary embodiment of this disclosure, the ultrasonic fingerprint detection device further includes:

[0081] A first conductive layer is located on one side of the substrate, and the first conductive layer includes a first conductive portion and a bias signal line;

[0082] The second conductive layer is located on the side of the first conductive layer away from the substrate, and the second conductive layer includes the first bias connection line and the second bias connection line segment.

[0083] According to one aspect of this disclosure, a display panel is provided, wherein the display panel includes the ultrasonic fingerprint detection device described above.

[0084] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0085] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0086] Figure 1 is a schematic diagram of an exemplary embodiment of the fingerprint detection unit of this disclosure;

[0087] Figure 2 is a timing diagram of each node in a driving method of the fingerprint detection circuit shown in Figure 1;

[0088] Figure 3 is a structural layout of an exemplary embodiment of the ultrasonic fingerprint detection device of this disclosure;

[0089] Figure 4 is a structural layout of the active layer in the ultrasonic fingerprint detection device shown in Figure 3.

[0090] Figure 5 is a structural layout of the first conductive layer in the ultrasonic fingerprint detection device shown in Figure 3.

[0091] Figure 6 is a structural layout of the second conductive layer in the ultrasonic fingerprint detection device shown in Figure 3.

[0092] Figure 7 is a structural layout of the third conductive layer in the ultrasonic fingerprint detection device shown in Figure 3.

[0093] Figure 8 is a structural layout of the electrode layer in the ultrasonic fingerprint detection device shown in Figure 3;

[0094] Figure 9 is a structural layout of the active layer and the first conductive layer in the ultrasonic fingerprint detection device shown in Figure 3.

[0095] Figure 10 is a structural layout of the active layer, the first conductive layer, and the second conductive layer in the ultrasonic fingerprint detection device shown in Figure 3.

[0096] Figure 11 is a structural layout of the active layer, first conductive layer, second conductive layer and third conductive layer in the ultrasonic fingerprint detection device shown in Figure 3.

[0097] Figure 12 is a cross-sectional view of the ultrasonic fingerprint detection device shown in Figure 3 along the dashed line AA;

[0098] Figure 13 is a structural layout of another exemplary embodiment of the ultrasonic fingerprint detection device of this disclosure;

[0099] Figure 14 is a structural layout of another exemplary embodiment of the ultrasonic fingerprint detection device of this disclosure;

[0100] Figure 15 is a structural layout of another exemplary embodiment of the ultrasonic fingerprint detection device of this disclosure. Detailed Implementation

[0101] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore their detailed description will be omitted.

[0102] The terms “a,” “one,” and “” are used to indicate the existence of one or more elements / components / etc.; the terms “include” and “have” are used to indicate an open-ended meaning of inclusion and to mean that there may be other elements / components / etc. in addition to the listed elements / components / etc.

[0103] Figure 1 shows a schematic diagram of an exemplary embodiment of the fingerprint detection unit of this disclosure. The fingerprint detection unit includes a fingerprint detection circuit and an ultrasonic sensor (Sens). The fingerprint detection circuit includes a driving transistor T3, a first transistor T1, a second transistor T2, a fourth transistor T4, and a first capacitor C1. The first terminal of the driving transistor T3 is connected to a first signal line AP; the first terminal of the first transistor T1 is connected to a read signal line Read, its second terminal is connected to the second terminal of the driving transistor T3, and its gate is connected to a first gate connection line G1; the first terminal of the second transistor T2 is connected to the gate of the driving transistor T3, its second terminal is connected to the first electrode of the ultrasonic sensor (Sens), and its gate is connected to a second reset connection line S2, where the second electrode of the ultrasonic sensor (Sens) can receive an excitation signal TX; the first terminal of the fourth transistor T4 is connected to a bias signal line Bias, its second terminal is connected to the first electrode of the ultrasonic sensor (Sens), and its gate is connected to the first reset connection line S1; the first electrode of the first capacitor C1 is connected to the gate of the driving transistor T3, and its second electrode is connected to the bias signal line Bias. The driving transistor T3, the first transistor T1, the second transistor T2, and the fourth transistor T4 can be N-type transistors.

[0104] Figure 2 shows the timing diagram of each node in a driving method of the fingerprint detection unit shown in Figure 1. AP is the timing diagram of the signals on the first signal line, S1 is the timing diagram of the signals on the first reset connection line, S2 is the timing diagram of the signals on the second reset connection line, G1 is the timing diagram of the signals on the first gate connection line, Bias is the timing diagram of the signals on the bias signal line, and TX is the timing diagram of the excitation signal.

[0105] The driving method of the fingerprint detection unit may include: a reset phase t1, an information acquisition phase t2, and an information reading phase t3.

[0106] During the reset phase t1, the first reset connection line S1 and the second reset connection line S2 output a high level, the first transistor T1 and the second transistor T2 are turned on, and the bias signal line Bias inputs a reset signal to the second terminal of the second transistor T2 and the gate of the driving transistor.

[0107] During the information acquisition phase t2, the first reset connection line S1 outputs a low-level signal, while the second reset connection line S2 and the first gate connection line G1 output high-level signals. The first transistor T1 and the second transistor T2 are turned on, and the fourth transistor T4 is turned off. The second electrode of the ultrasonic sensor Sens receives the excitation signal TX to emit an ultrasonic signal. Subsequently, the ultrasonic sensor Sens can receive the ultrasonic signal reflected from the finger to generate an induced voltage at the first electrode of the ultrasonic sensor Sens. The induced voltage can be transmitted through the second transistor T2 to the gate of the driving transistor T3 and stored in the first capacitor C1.

[0108] During the information reading stage t3, the first signal line AP and the first gate connection line G1 output high-level signals, driving transistor T3 to input drive current to the read signal line Read through the first signal line AP under the action of induced voltage.

[0109] Specifically, the ultrasonic signal reflected in the fingerprint valley generates a smaller induced voltage on the first electrode of the ultrasonic sensor (Sens), resulting in a smaller current read by the read signal line (Read). Conversely, the ultrasonic signal reflected in the fingerprint ridge generates a larger induced voltage on the first electrode of the ultrasonic sensor (Sens), resulting in a larger current read by the read signal line (Read). Therefore, the fingerprint detection unit can determine whether the location corresponding to the ultrasonic sensor (Sens) is a fingerprint ridge or a fingerprint valley based on the magnitude of the current on the read signal line (Read). Multiple arrayed fingerprint detection units can then analyze the fingerprint image.

[0110] In this exemplary embodiment, the bias signal line Bias can output a DC signal. It should be understood that in other exemplary embodiments, the bias signal line Bias can also output an AC signal. For example, the bias signal line Bias can input a high-level pulse signal during the information reading phase t3 to pull up the gate voltage of the driving transistor T3 through the first capacitor C1. This setting can amplify the current of the read signal line Read during the information reading phase t3, thereby improving the sensitivity of the fingerprint detection unit. Outside of the information reading phase t3, the bias signal line Bias can output a lower-level DC signal. It should be understood that when the driving transistor T3 is a P-type transistor, the bias signal line Bias can input a low-level pulse signal during the information reading phase t3, and output a higher-level DC signal outside of the information reading phase t3.

[0111] This exemplary embodiment also provides an ultrasonic fingerprint detection device, which may include a substrate, an active layer, a first conductive layer, a second conductive layer, a third conductive layer, and an electrode layer stacked sequentially, and an insulating layer may be disposed between the above layers.

[0112] As shown in Figures 3-11, Figure 3 is a structural layout of an exemplary embodiment of the ultrasonic fingerprint detection device of this disclosure, Figure 4 is a structural layout of the active layer in the ultrasonic fingerprint detection device shown in Figure 3, Figure 5 is a structural layout of the first conductive layer in the ultrasonic fingerprint detection device shown in Figure 3, Figure 6 is a structural layout of the second conductive layer in the ultrasonic fingerprint detection device shown in Figure 3, Figure 7 is a structural layout of the third conductive layer in the ultrasonic fingerprint detection device shown in Figure 3, Figure 8 is a structural layout of the electrode layer in the ultrasonic fingerprint detection device shown in Figure 3, Figure 9 is a structural layout of the active layer and the first conductive layer in the ultrasonic fingerprint detection device shown in Figure 3, Figure 10 is a structural layout of the active layer, the first conductive layer, and the second conductive layer in the ultrasonic fingerprint detection device shown in Figure 3, and Figure 11 is a structural layout of the active layer, the first conductive layer, the second conductive layer, and the third conductive layer in the ultrasonic fingerprint detection device shown in Figure 3.

[0113] As shown in Figure 3, the ultrasonic fingerprint detection device may include multiple fingerprint detection units P as shown in Figure 1. These multiple fingerprint detection units P can be arrayed along a first direction X and a second direction Y. The multiple fingerprint detection units P can form multiple arrayed fingerprint detection unit groups Pz. Each fingerprint detection unit group may include four fingerprint detection units P arranged in a 2x2 array. Within the same fingerprint detection unit group, the orthographic projections of two adjacent fingerprint detection units P on the substrate in the first direction can be at least partially mirror-symmetrical with respect to an axis of symmetry extending along the second direction Y. Similarly, the orthographic projections of two adjacent fingerprint detection units P on the substrate in the second direction can be at least partially mirror-symmetrical with respect to an axis of symmetry extending along the first direction X.

[0114] As shown in Figures 3, 4, and 9, the active layer may include a first main active portion 051 and a second main active portion 052. The orthographic projections of the first main active portion 051 and the second main active portion 052 onto the substrate may extend along the second direction Y and be spaced apart along the first direction X. The first main active portion 051 may include a second active portion 52, a fourth active portion 54, a seventh active portion 57, an eighth active portion 58, and a ninth active portion 59. The second active portion 52 may be used to form the channel region of the second transistor T2, the fourth active portion 54 may be used to form the channel region of the fourth transistor T4, the seventh active portion 57 is connected to the end of the fourth active portion 54 away from the second active portion 52, the eighth active portion 58 is connected to the end of the second active portion 52 away from the fourth active portion 54, and the ninth active portion 59 is connected between the second active portion 52 and the fourth active portion 54. The second main active section 052 may include a first active section 51, a third active section 53, a fifth active section 55, and a sixth active section 56. The first active section 51 can be used to form the channel region of the first transistor T1, the third active section 53 can be used to form the channel region of the driving transistor T3, the fifth active section 55 is connected to the end of the first active section 51 away from the third active section 53, and the sixth active section 56 is connected to the end of the third active section 53 away from the first active section 51. The active layer can be formed of indium gallium zinc oxide, and correspondingly, the first transistor T1, the second transistor T2, the driving transistor T3, and the fourth transistor T4 can be N-type metal oxide thin-film transistors.

[0115] As shown in Figures 3, 4, and 9, the aspect ratio of the channel region of the second transistor T2 is smaller than that of the channel region of the first transistor T1, while the aspect ratio of the channel region of the fourth transistor T4 is larger than that of the channel region of the first transistor T1. The second transistor T2 has a smaller turn-off leakage current. This design reduces the leakage current through the second transistor T2 to the gate of the driving transistor T3 during the information reading phase t3, thereby improving the detection accuracy of the ultrasonic fingerprint detection device. Simultaneously, the fourth transistor T4 has a higher on-state current. This design improves the reset speed and effectiveness of the fingerprint detection circuit during the reset phase.

[0116] As shown in Figures 3, 5, and 9, the first conductive layer may include: a bias signal line Bias, a read signal line Read, a first signal line AP, a first gate segment 1G1, a first reset signal segment 1S1, a second reset signal segment 1S2, and a first conductive portion 11. The orthogonal projections of the bias signal line Bias, the read signal line Read, the first signal line AP, the first gate segment 1G1, the first reset signal segment 1S1, the second reset signal segment 1S2, and the first conductive portion 11 onto the substrate can all extend along a first direction. The orthographic projection of the first gate segment 1G1 on the substrate covers the orthographic projection of the first active portion 51 on the substrate, and at least a portion of the structure of the first gate segment 1G1 is used to form the gate of the first transistor T1; the orthographic projection of the first reset signal segment 1S1 on the substrate covers the orthographic projection of the fourth active portion 54 on the substrate, and at least a portion of the structure of the first reset signal segment 1S1 is used to form the gate of the fourth transistor; the orthographic projection of the second reset signal segment 1S2 on the substrate covers the orthographic projection of the second active portion 52 on the substrate, and at least a portion of the structure of the second reset signal segment 1S2 is used to form the gate of the second transistor; the orthographic projection of the first conductive portion 11 on the substrate covers the orthographic projection of the third active portion 53 on the substrate, and at least a portion of the structure of the first conductive portion 11 is used to form the gate of the driving transistor T3. This display panel can utilize the first conductive layer as a mask to perform conductor processing on the active layer, that is, the area of ​​the active layer covered by the first conductive layer can form the channel region of the transistor, and the area of ​​the active layer not covered by the first conductive layer forms a conductive structure.

[0117] As shown in Figures 3, 5, and 9, in the same fingerprint detection unit group Pz, the second reset signal segment 1S2 in two adjacent fingerprint detection units in the first direction X is connected.

[0118] As shown in Figures 3, 5, and 9, in the same fingerprint detection unit group, two adjacent fingerprint detection units in the second direction Y share the same first signal line AP, and the orthographic projection of the first signal line AP on the substrate extends along the first direction.

[0119] As shown in Figures 3, 6, and 10, the second conductive layer may include a first reset connection line S1, a second reset connection line S2, a first gate connection line G1, a first bias connection line 2Bias1, and a second bias connection line segment 2Bias2. The orthogonal projections of the first reset connection line S1, the second reset connection line S2, the first gate connection line G1, the first bias connection line 2Bias1, and the second bias connection line segment 2Bias2 onto the substrate all extend along the second direction Y.

[0120] As shown in Figures 3, 6, and 10, the first reset connection line S1 can be connected to the first reset signal line segment 1S1 via a via, and the first reset connection line S1 can be connected to multiple first reset signal line segments 1S1 distributed in the second direction Y. The second reset connection line S2 can be connected to the second reset signal line segment 1S2 via a via, and the second reset connection line S2 can be connected to multiple second reset signal line segments 1S2 distributed in the second direction Y. The first gate connection line G1 can be connected to the first gate line segment 1G1 via a via, and the first gate connection line G1 can be connected to multiple first gate line segments 1G1 distributed in the second direction Y. The first bias connection line 2Bias1 can be connected to the bias signal line Bias intersecting with it via a via. The orthographic projection of the first bias connection line 2Bias1 on the substrate can at least partially overlap with the orthographic projection of the first conductive part 11 on the substrate. A portion of the structure of the first conductive part 11 can be used to form the first electrode of the first capacitor, and at least a portion of the structure of the first bias connection line 2Bias1 is used to form the second electrode of the first capacitor. The first capacitor C1 and the driving transistor T3 are spaced apart in the first direction X, that is, the orthographic projection of the first bias connection line 2Bias1 on the substrate and the orthographic projection of the third active part 53 on the substrate are spaced apart in the first direction X. The second bias connection line segment 2Bias2 can be connected to the bias signal line Bias that intersects with it through a via. The second bias connection line segment 2Bias2 can be connected to the seventh active part 57 through a via to connect the first electrode of the fourth transistor T4 and the bias signal line Bias.

[0121] As shown in Figures 3, 5, 6, 9, and 10, the first conductive portion 11 includes a first extension 111 and a second extension 112. The first extension 111 is at least partially used to form the gate of the driving transistor T3. The orthographic projection of the first extension 111 onto the substrate in the second direction Y is larger than the orthographic projection of the second extension 112 onto the substrate in the second direction. The orthographic projections of the first gate connection line G1 and the second extension 112 onto the substrate at least partially overlap. This arrangement can reduce the overlap area between the first gate connection line G1 and the first conductive portion 11, thereby reducing the coupling effect of the first gate connection line G1 on the gate of the driving transistor.

[0122] As shown in Figures 3, 6, and 10, in the same fingerprint detection circuit, the orthographic projection of the first gate connection line G1 on the substrate is located between the orthographic projections of the first main active part 051 and the second main active part 052 on the substrate. The orthographic projection of the second reset connection line S2 on the substrate is located on the side of the first main active part 051 away from the orthographic projection of the second main active part 052 on the substrate. The orthographic projection of the first reset connection line S1 on the substrate is located on the side of the first main active part 051 away from the orthographic projection of the second main active part 052 on the substrate.

[0123] As shown in Figures 3, 6, and 10, in the same fingerprint detection circuit, the orthographic projection of the first bias connection line 2Bias1 on the substrate is located on the side of the orthographic projection of the second main active part 052 on the substrate that is far away from the orthographic projection of the first main active part 051 on the substrate, and the orthographic projection of the first gate connection line G1 on the substrate is located between the orthographic projection of the first bias connection line 2Bias1 on the substrate and the orthographic projection of the second bias connection line segment 2Bias2 on the substrate.

[0124] As shown in Figures 3, 6, and 10, the second conductive layer may further include a first bridging portion 21, a second bridging portion 22, a third bridging portion 23, and a fourth bridging portion 24. The first bridging portion 21 can connect to the sixth active portion 56 and the first signal line AP via vias, thereby connecting the first signal line AP and the first electrode of the driving transistor T3. Specifically, two first bridging portions 21 in adjacent fingerprint detection units in the same fingerprint detection unit group along the second direction Y can be interconnected, allowing the interconnected first bridging portions 21 to connect to the first signal line AP via fewer vias. The second bridging portion 22 can connect to the ninth active portion 59 via vias. The third bridging portion 23 can connect to the eighth active portion 58 and the first conductive portion 11 via vias, thereby connecting the first electrode of the second transistor T2 and the gate of the driving transistor T3. The fourth bridging portion 24 can connect to the read signal line Read and the fifth active portion 55 via vias, thereby connecting the first electrode of the first transistor T1 and the read signal line Read.

[0125] As shown in Figures 3, 6, and 10, two adjacent fingerprint detection units in the same fingerprint detection unit group on the first direction X can share the same second reset connection line S2, and in the same fingerprint detection unit group, the orthogonal projection of the second reset connection line S2 on the substrate can be located between two adjacent first reset connection lines S1.

[0126] As shown in Figures 3, 7, and 11, the third conductive layer may include a fifth bridging portion 35, which can be connected to the second bridging portion 22 via a via.

[0127] As shown in Figures 3 and 8, the electrode layer may include multiple electrode portions 41, which may be arranged in an array along the first direction X and the second direction Y. The electrode portions 41 may form the first electrode of the ultrasonic sensor, and the electrode portions 41 may be connected to the fifth bridging portion 35 through vias to connect to the second electrode of the second transistor T2.

[0128] In this exemplary embodiment, the ultrasonic fingerprint detection device may further include a piezoelectric material layer located on the side of the electrode layer facing away from the substrate, and a common electrode layer located on the side of the piezoelectric material layer facing away from the substrate. The electrode layer, piezoelectric material layer, and common electrode layer may form an ultrasonic sensor, and the common electrode layer may form a common second electrode for multiple ultrasonic sensors.

[0129] Figure 12 shows a cross-sectional view of the ultrasonic fingerprint detection device shown in Figure 3 along the dashed line AA. The display panel may further include a first insulating layer 101, a second insulating layer 102, a third insulating layer 103, and a planarization layer 104. The substrate 100, active layer, first insulating layer 101, first conductive layer, second insulating layer 102, second conductive layer, third insulating layer 103, third conductive layer, planarization layer 104, and electrode layer are sequentially stacked. The first insulating layer 101, second insulating layer 102, and third insulating layer 103 can be a single-layer structure or a multi-layer structure, and the material of the first insulating layer 101, second insulating layer 102, and third insulating layer 103 can be at least one of silicon nitride, silicon oxide, and silicon oxynitride; the material of the planarization layer 104 can be an organic material, such as polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), silicon-glass bonded structure (SOG), etc. The materials of the first conductive layer, the second conductive layer, and the third conductive layer can be one of molybdenum, aluminum, copper, titanium, niobium, or an alloy thereof, or a molybdenum / titanium alloy or a stacked conductive layer.

[0130] Figure 13 shows a structural layout of another exemplary embodiment of the ultrasonic fingerprint detection device of this disclosure. Compared to the ultrasonic fingerprint detection device shown in Figure 3, in the ultrasonic fingerprint detection device shown in Figure 13, two adjacent fingerprint detection units in the same fingerprint detection unit group along the first direction X can share the same first reset connection line S1, and in the same fingerprint detection unit group, the orthogonal projection of the first reset connection line S1 on the substrate can be located between two adjacent second reset connection lines S2. This arrangement can reduce the parasitic capacitance of the second reset connection line S2, thereby improving the response speed of the second transistor T2, so as to achieve rapid acquisition of fingerprint signals in the information acquisition stage t2.

[0131] As shown in Figure 13, correspondingly, in the same fingerprint detection unit group, the first reset signal segments 1S1 in two adjacent fingerprint detection units in the first direction X can be connected to each other, and the first reset connection line S1 can connect the two interconnected first reset signal segments 1S1 with fewer vias.

[0132] Figure 14 shows a structural layout of another exemplary embodiment of the ultrasonic fingerprint detection device of this disclosure. Compared to the ultrasonic fingerprint detection device shown in Figure 13, the ultrasonic fingerprint detection device shown in Figure 14 can set the linewidth of the first signal line AP to be wider. Correspondingly, in order to ensure the number of fingerprint detection units per unit area, the ultrasonic fingerprint detection device shown in Figure 14 can set the linewidth of the bias signal line Bias to be narrower. Since the bias signal line Bias itself and the first bias connection line 2Bias1 form a grid structure, the resistance of the bias signal line Bias is low, and the voltage of the bias signal line Bias at various positions of the ultrasonic fingerprint detection device is more uniform. This exemplary embodiment sets the linewidth of the first signal line AP to be wider, which can reduce the resistance of the first signal line AP, thereby improving the uniformity of the voltage of the first signal line AP at various positions of the ultrasonic fingerprint detection device. In this exemplary embodiment, the size of the orthogonal projection of the first signal line AP on the substrate in the second direction Y is greater than the size of the orthogonal projection of the bias signal line Bias on the substrate in the second direction Y. The ratio of the size of the orthogonal projection of the first signal line AP on the substrate in the second direction Y to the size of the orthogonal projection of the bias signal line Bias on the substrate in the second direction Y can be 1.5-4. For example, the ratio can be equal to 1.5, 2, 2.5, 3, 3.5, 4, etc.

[0133] It should be noted that the setting of the line width of the first signal line AP in the ultrasonic fingerprint detection device shown in Figure 14 can also be applied to other exemplary embodiments. For example, the setting of the line width of the first signal line AP can be applied to the ultrasonic fingerprint detection device shown in Figure 3.

[0134] Figure 15 shows a structural layout of another exemplary embodiment of the ultrasonic fingerprint detection device of this disclosure. Compared with the ultrasonic fingerprint detection device shown in Figure 13, the ultrasonic fingerprint detection device shown in Figure 15 reduces the area of ​​the first electrode and the second electrode of the first capacitor C1, thereby reducing the capacitance of the first capacitor C1. This arrangement can increase the voltage of the gate of the write driving transistor T3 during the information acquisition phase t2, thereby increasing the current read from the read signal line, and thus improving the sensitivity of the ultrasonic fingerprint detection device. In this exemplary embodiment, the overlapping area of ​​the orthographic projection of the first conductive part 11 on the substrate and the orthographic projection of the first bias connection line 2Bias1 on the substrate is A1, and the overlapping area of ​​the orthographic projection of the first conductive part 11 on the substrate and the orthographic projection of the second main active part 052 on the substrate is A2. A1 / A2 is 0.5-2. For example, A1 / A2 can be equal to 0.5, 0.6, 0.7, 0.8, 0.9, 1, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2, etc.

[0135] It should be noted that the configuration of the first capacitor C1 in the ultrasonic fingerprint detection device shown in Figure 15 can also be applied to other exemplary embodiments. For example, the configuration of the first capacitor C1 can be applied to the ultrasonic fingerprint detection devices shown in Figures 3 and 14.

[0136] As shown in Figure 3-15, this exemplary embodiment also provides an ultrasonic fingerprint detection device. The ultrasonic fingerprint detection device includes a plurality of fingerprint detection units P arrayed along a first direction X and a second direction Y. The second direction Y intersects the first direction X. Each fingerprint detection unit P includes a fingerprint detection circuit and an ultrasonic sensor. The fingerprint detection circuit includes a driving transistor T3, a first capacitor C1, and a fourth transistor T4. The first electrode of the first capacitor C1 is connected to the first terminal of the driving transistor T3, and the second electrode of the first capacitor C1 is connected to a bias signal line. The first terminal of the fourth transistor T4 is connected to the bias signal line Bias, and the second terminal of the fourth transistor T4 is connected to the first electrode of the ultrasonic sensor. The orthogonal projection of the bias signal line Bias onto the substrate extends along the first direction X. The ultrasonic fingerprint detection device further includes a substrate, a first conductive portion 11, a first bias connection line 2Bias1, and a second bias connection line segment 2Bias2. At least a portion of the structure of the first conductive portion 11 is used to form the driving transistor. Gate; the first bias connection line 2Bias1 and the bias signal line Bias are located on different conductive layers. The orthographic projection of the first bias connection line 2Bias1 on the substrate extends along the second direction Y. The first bias connection line 2Bias1 is connected to the bias signal line Bias that intersects with it through a via. The second bias connection line segment 2Bias2 and the bias signal line are located on different conductive layers. The orthographic projection of the second bias connection line segment 2Bias2 on the substrate extends along the second direction Y. The second bias connection line segment 2Bias2 is connected to the bias signal line Bias that intersects with it through a via. The second bias connection line segment 2Bias2 is connected to the first electrode of the fourth transistor T4. The orthographic projection of the first bias connection line 2Bias1 on the substrate and the orthographic projection of the first conductive part 11 on the substrate at least partially overlap. At least a portion of the structure of the first conductive part 11 is used to form the first electrode of the first capacitor C1, and a portion of the structure of the first bias connection line 2Bias1 is used to form the second electrode of the first capacitor.

[0137] This exemplary embodiment utilizes a portion of the structure of the first bias connection line 2Bias1 as the second electrode of the first capacitor C1, which can improve the integration of the fingerprint detection unit.

[0138] In this exemplary embodiment, other structures of the ultrasonic fingerprint detection device may be as shown in any of the embodiments in Figures 3-15.

[0139] It should be noted that, as shown in Figure 2-15, the black squares drawn on the side of the second conductive layer away from the substrate represent vias connecting the second conductive layer to other layers facing the substrate; the black rectangles drawn on the side of the third conductive layer away from the substrate represent vias connecting the third conductive layer to other layers facing the substrate; and the black circles drawn on the side of the electrode layer away from the substrate represent vias connecting the electrode layer to other layers facing the substrate. Vias at different positions can penetrate different insulating layers.

[0140] It should be noted that the scale of the accompanying drawings in this disclosure can be used as a reference in actual processes, but is not limited thereto. For example, the aspect ratio of the channels, the thickness and spacing of each film layer, and the width and spacing of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the quantities shown in the figures. The accompanying drawings described in this disclosure are only schematic diagrams of the structure. In addition, the terms "first," "second," etc., are only used to define different structural names and do not have a specific order meaning. The same structural layer can be formed by the same patterning process. In this exemplary embodiment, the orthographic projection of a certain structure on the substrate extends along a certain direction, which can be understood as the orthographic projection of the structure on the substrate extending in a straight line or bending along that direction.

[0141] This exemplary embodiment also provides a display panel that may include the ultrasonic fingerprint detection device described above. The ultrasonic fingerprint detection device may be externally mounted on an array substrate in the display panel. The array substrate may include a substrate, a pixel driving circuit layer, a light-emitting unit layer, and an encapsulation layer stacked sequentially, and the ultrasonic fingerprint detection device may be disposed on the side of the encapsulation layer facing away from the substrate. Alternatively, the ultrasonic fingerprint detection device may be directly integrated onto the array substrate.

[0142] The display panel can be a COE OLED (Color Filter on Encap Organic Light-Emitting Diode) screen.

[0143] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.

[0144] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.

[0145] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is defined only by the appended claims.

Claims

1. An ultrasonic fingerprint detection device, wherein, The ultrasonic fingerprint detection device includes multiple fingerprint detection units arrayed along a first direction and a second direction, the second direction intersecting the first direction. Each fingerprint detection unit includes a fingerprint detection circuit, which includes a driving transistor and a first transistor. The first terminal of the driving transistor is connected to a first signal line, and the second terminal of the driving transistor is connected to the first terminal of the first transistor. The second terminal of the first transistor is connected to a readout signal line. The ultrasonic fingerprint detection device further includes: Substrate; A first conductive portion, wherein the orthographic projection of the first conductive portion on the substrate extends along the first direction, the first conductive portion includes a first extension segment and a second extension segment, the first extension segment being at least partially used to form the gate of the driving transistor, and the size of the orthographic projection of the first extension segment on the substrate in the second direction is greater than the size of the orthographic projection of the second extension segment on the substrate in the second direction. A first gate connection line is connected to the gate of the first transistor. The first gate connection line and the first conductive portion are located in different conductive layers. The orthographic projection of the first gate connection line on the substrate extends along the second direction. The orthographic projection of the first gate connection line on the substrate and the orthographic projection of the second extension on the substrate at least partially overlap.

2. The ultrasonic fingerprint detection device according to claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor and a fourth transistor. The first electrode of the second transistor is connected to the gate of the driving transistor, and the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor. The first electrode of the fourth transistor is connected to a bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor. The ultrasonic fingerprint detection device also includes: An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. The first main active portion includes a second active portion and a fourth active portion connected in the same layer. The orthographic projections of the second active portion and the fourth active portion on the substrate are distributed at intervals along the second direction. The second active portion is used to form the channel region of the second transistor, and the fourth active portion is used to form the channel region of the fourth transistor. The second main active portion includes a first active portion and a third active portion connected in the same layer. The orthographic projections of the first active portion and the third active portion on the substrate are distributed at intervals along the second direction. The first active portion is used to form the channel region of the first transistor, and the third active portion is used to form the channel region of the driving transistor.

3. The ultrasonic fingerprint detection device according to claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor, the first electrode of the second transistor being connected to the gate of the driving transistor, and the second electrode of the second transistor being connected to the first electrode of the ultrasonic sensor; The ultrasonic fingerprint detection device also includes: An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. At least a portion of the structure of the first main active portion is used to form the channel region of the second transistor, and at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor. A first conductive layer is located on the side of the active layer opposite to the substrate. The first conductive layer includes a first conductive portion and a first gate segment. A second extension of the first conductive portion is connected to a first electrode of the second transistor. The orthographic projection of the first gate segment on the substrate extends along the first direction. At least a portion of the structure of the first gate segment is used to form the gate of the first transistor. The second conductive layer is located on the side of the first conductive layer away from the substrate. The second conductive layer includes the first gate connection line, and the first gate connection line is connected to multiple first gate line segments distributed in the second direction through vias. In the same fingerprint detection circuit, the orthographic projection of the first gate connection line on the substrate is located between the orthographic projection of the first main active part on the substrate and the orthographic projection of the second main active part on the substrate.

4. The ultrasonic fingerprint detection device of claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor, the first electrode of the second transistor being connected to the gate of the driving transistor, and the second electrode of the second transistor being connected to the first electrode of the ultrasonic sensor; The ultrasonic fingerprint detection device also includes: An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. At least a portion of the structure of the first main active portion is used to form the channel region of the second transistor, and at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor. A first conductive layer is located on the side of the active layer opposite to the substrate. The first conductive layer includes a second reset signal segment. The orthographic projection of the second reset signal segment on the substrate extends along the first direction. At least a portion of the structure of the second reset signal segment is used to form the gate of the second transistor. The second conductive layer is located on the side of the first conductive layer away from the substrate. The second conductive layer includes a second reset connection line. The orthographic projection of the second reset connection line on the substrate extends along the second direction. The second reset connection line connects multiple second reset signal line segments distributed in the second direction through vias. In the same fingerprint detection circuit, the orthographic projection of the second reset connection line on the substrate is located on the side where the orthographic projection of the first main active part on the substrate is far from the orthographic projection of the second main active part on the substrate.

5. The ultrasonic fingerprint detection device of claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a fourth transistor, the first electrode of the fourth transistor being connected to a bias signal line, and the second electrode of the fourth transistor being connected to the first electrode of the ultrasonic sensor. The ultrasonic fingerprint detection device also includes: An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. At least a portion of the structure of the first main active portion is used to form the channel region of the fourth transistor, and at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor. A first conductive layer is located on the side of the active layer opposite to the substrate. The first conductive layer includes a first reset signal segment. The orthographic projection of the first reset signal segment on the substrate extends along the first direction. At least a portion of the structure of the first reset signal segment is used to form the gate of the fourth transistor. The second conductive layer is located on the side of the first conductive layer away from the substrate. The second conductive layer includes a first reset connection line. The orthographic projection of the first reset connection line on the substrate extends along the second direction. The first reset connection line is connected to multiple first reset signal line segments distributed in the second direction through vias. In the same fingerprint detection circuit, the orthographic projection of the first reset connection line on the substrate is located on the side where the orthographic projection of the first main active part on the substrate is far from the orthographic projection of the second main active part on the substrate.

6. The ultrasonic fingerprint detection device of claim 1, wherein, The multiple fingerprint detection units form multiple fingerprint detection unit groups, and the fingerprint detection unit group includes at least two adjacent fingerprint detection units in the first direction. The orthographic projections of the two adjacent fingerprint detection units on the substrate are at least partially mirror-symmetrical with respect to the axis of symmetry extending along the second direction. The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor and a fourth transistor. The first electrode of the second transistor is connected to the gate of the driving transistor, and the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor. The first electrode of the fourth transistor is connected to a bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor. The ultrasonic fingerprint detection device further includes: a first reset connection line and a second reset connection line, wherein the orthographic projections of the first reset connection line and the second reset connection line on the substrate both extend along the second direction, the first reset connection line is connected to the gate of the fourth transistor, and the second reset connection line is connected to the gate of the second transistor. In the same fingerprint detection unit group, two fingerprint detection units that are adjacent and at least partially mirror-symmetrically arranged in the first direction share the same second reset connection line, and the orthogonal projection of the second reset connection line on the substrate is located between the orthogonal projections of two adjacent first reset connection lines on the substrate.

7. The ultrasonic fingerprint detection device according to claim 6, wherein, The ultrasonic fingerprint detection device also includes: A second reset signal segment, wherein at least a portion of the structure of the second reset signal segment is used to form the gate of the second transistor; In the same fingerprint detection unit group, the second reset signal segments of two fingerprint detection units that are adjacent and at least partially mirror-symmetrically arranged in the first direction are connected, and the two connected second reset signal segments are connected to the second reset connection line through a via.

8. The ultrasonic fingerprint detection device of claim 1, wherein, The multiple fingerprint detection units form multiple fingerprint detection unit groups, and the fingerprint detection unit group includes at least two adjacent fingerprint detection units in the first direction. The orthographic projections of the two adjacent fingerprint detection units on the substrate are at least partially mirror-symmetrical with respect to the axis of symmetry extending along the second direction. The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor and a fourth transistor. The first electrode of the second transistor is connected to the gate of the driving transistor, and the second electrode of the second transistor is connected to the first electrode of the ultrasonic sensor. The first electrode of the fourth transistor is connected to a bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor. The ultrasonic fingerprint detection device further includes: a first reset connection line and a second reset connection line, wherein the orthographic projections of the first reset connection line and the second reset connection line on the substrate both extend along the second direction, the first reset connection line is connected to the gate of the fourth transistor, and the second reset connection line is connected to the gate of the second transistor. In the same fingerprint detection unit group, two fingerprint detection units that are adjacent and at least partially mirror-symmetrically arranged in the first direction share the same first reset connection line, and the orthogonal projection of the first reset connection line on the substrate is located between the orthogonal projections of two adjacent second reset connection lines on the substrate.

9. The ultrasonic fingerprint detection device according to claim 8, wherein, The ultrasonic fingerprint detection device also includes: A first reset signal segment, wherein at least a portion of the first reset signal segment is configured to form the gate of the fourth transistor; In the same fingerprint detection unit group, the first reset signal segments of two fingerprint detection units that are adjacent and at least partially mirror-symmetrical in the first direction are connected, and the two connected first reset signal segments are connected to the first reset connection line through a via.

10. The ultrasonic fingerprint detection device of claim 1, wherein, The plurality of fingerprint detection units form a plurality of fingerprint detection unit groups, the fingerprint detection unit group including at least two adjacent fingerprint detection units in the second direction, and the orthographic projections of the two adjacent fingerprint detection units in the second direction on the substrate are at least partially mirror-symmetrical with respect to the axis of symmetry extending along the first direction; In the same fingerprint detection unit group, two adjacent fingerprint detection units in the second direction share the same first signal line, and the orthographic projection of the first signal line on the substrate extends along the first direction.

11. The ultrasonic fingerprint detection device of claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a second transistor, the first electrode of the second transistor being connected to the gate of the driving transistor, and the second electrode of the second transistor being connected to the first electrode of the ultrasonic sensor; The aspect ratio of the channel region of the second transistor is smaller than that of the channel region of the first transistor.

12. The ultrasonic fingerprint detection device of claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a fourth transistor, the first electrode of the fourth transistor being connected to a bias signal line, and the second electrode of the fourth transistor being connected to the first electrode of the ultrasonic sensor. The aspect ratio of the channel region of the fourth transistor is greater than that of the channel region of the first transistor.

13. The ultrasonic fingerprint detection device of claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a first capacitor and a fourth transistor. The first electrode of the first capacitor is connected to the first electrode of the driving transistor, the second electrode of the first capacitor is connected to a bias signal line, the first electrode of the fourth transistor is connected to a bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor.

14. The ultrasonic fingerprint detection device according to claim 13, wherein, The ultrasonic fingerprint detection device also includes: The bias signal line, the orthogonal projection of the bias signal line on the substrate extends along the first direction; The first bias connection line is located on a different conductive layer from the bias signal line. The orthographic projection of the first bias connection line on the substrate extends along the second direction. The first bias connection line is connected to the bias signal line that intersects with it through a via. The second bias connection segment is located on a different conductive layer from the bias signal line. The orthographic projection of the second bias connection segment on the substrate extends along the second direction. The second bias connection segment is connected to the bias signal line that intersects with it through a via. Wherein, the second bias connection line segment connects to the first electrode of the fourth transistor, the orthographic projection of the first bias connection line on the substrate and the orthographic projection of the first conductive portion on the substrate at least partially overlap, at least a portion of the structure of the first conductive portion is used to form the first electrode of the first capacitor, and a portion of the structure of the first bias connection line is used to form the second electrode of the first capacitor.

15. The ultrasonic fingerprint detection device according to claim 14, wherein, The fingerprint detection circuit further includes a second transistor, the first terminal of which is connected to the gate of the driving transistor, and the second terminal of which is connected to the first electrode of the ultrasonic sensor. The ultrasonic fingerprint detection device also includes: An active layer is located on one side of the substrate. The active layer includes a first main active portion and a second main active portion. The orthographic projections of the first main active portion and the second main active portion on the substrate extend along the second direction and are spaced apart along the first direction. At least a portion of the structure of the first main active portion is used to form the channel region of the second transistor, and at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor. In the same fingerprint detection circuit, the orthographic projection of the first bias connection line on the substrate is located on the side of the orthographic projection of the second main active part on the substrate that is away from the orthographic projection of the first main active part on the substrate, and the orthographic projection of the first gate connection line on the substrate is located between the orthographic projection of the first bias connection line on the substrate and the orthographic projection of the second bias connection line segment on the substrate.

16. The ultrasonic fingerprint detection device of claim 14, wherein, The ultrasonic fingerprint detection device also includes: The second main active portion, at least a portion of the structure of the second main active portion is used to form the channel region of the driving transistor; Wherein, the overlapping area of ​​the orthographic projection of the first bias connection line on the substrate and the orthographic projection of the first conductive part on the substrate is A1, and the overlapping area of ​​the orthographic projection of the second main active part on the substrate and the orthographic projection of the first conductive part on the substrate is A2, and A1 / A2 is 0.5-2.

17. The ultrasonic fingerprint detection device of claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a fourth transistor, the first electrode of the fourth transistor being connected to a bias signal line, and the second electrode of the fourth transistor being connected to the first electrode of the ultrasonic sensor. The orthographic projection of the bias signal line on the substrate and the orthographic projection of the first signal line on the substrate extend along the first direction; Wherein, the size of the orthogonal projection of the bias signal line on the substrate in the second direction is greater than the size of the orthogonal projection of the first signal line on the substrate in the second direction; Alternatively, the size of the orthogonal projection of the bias signal line onto the substrate in the second direction is smaller than the size of the orthogonal projection of the first signal line onto the substrate in the second direction.

18. The ultrasonic fingerprint detection device of claim 1, wherein, The ultrasonic fingerprint detection device further includes an ultrasonic sensor, and the fingerprint detection circuit further includes a fourth transistor, the first electrode of the fourth transistor being connected to a bias signal line, and the second electrode of the fourth transistor being connected to the first electrode of the ultrasonic sensor. The orthographic projection of the bias signal line on the substrate and the orthographic projection of the first signal line on the substrate extend along the first direction; The ratio of the size of the orthogonal projection of the first signal line on the substrate in the second direction to the size of the orthogonal projection of the bias signal line on the substrate in the second direction is 1.5-4.

19. An ultrasonic fingerprint sensing device, wherein, The ultrasonic fingerprint detection device includes multiple fingerprint detection units arranged in an array along a first direction and a second direction, the second direction intersecting the first direction. Each fingerprint detection unit includes a fingerprint detection circuit and an ultrasonic sensor. The fingerprint detection circuit includes a driving transistor, a first capacitor, and a fourth transistor. The first electrode of the first capacitor is connected to the first electrode of the driving transistor, the second electrode of the first capacitor is connected to the bias signal line, the first electrode of the fourth transistor is connected to the bias signal line, and the second electrode of the fourth transistor is connected to the first electrode of the ultrasonic sensor. The ultrasonic fingerprint detection device also includes: Substrate; A first conductive portion, at least a portion of the structure of which is used to form the gate of the driving transistor; The bias signal line, the orthogonal projection of the bias signal line on the substrate extends along the first direction; The first bias connection line is located on a different conductive layer from the bias signal line. The orthographic projection of the first bias connection line on the substrate extends along the second direction. The first bias connection line is connected to the bias signal line that intersects with it through a via. The second bias connection segment is located on a different conductive layer from the bias signal line. The orthographic projection of the second bias connection segment on the substrate extends along the second direction. The second bias connection segment is connected to the bias signal line that intersects with it through a via. Wherein, the second bias connection line segment connects to the first electrode of the fourth transistor, the orthographic projection of the first bias connection line on the substrate and the orthographic projection of the first conductive portion on the substrate at least partially overlap, at least a portion of the structure of the first conductive portion is used to form the first electrode of the first capacitor, and a portion of the structure of the first bias connection line is used to form the second electrode of the first capacitor.

20. A display panel, wherein, The display panel includes the ultrasonic fingerprint detection device according to any one of claims 1-19.

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