Integrated passive device and radio frequency apparatus
By designing an outermost insulating layer in an integrated passive device to wrap around the inner insulating layer and contact the substrate, the delamination problem under extreme environments is solved, improving the reliability and stability of the device and ensuring the performance of the communication system.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2024-12-25
- Publication Date
- 2026-07-02
AI Technical Summary
Integrated passive devices are prone to delamination between adjacent insulating and metal layers under extreme conditions such as high temperature and high humidity, leading to device failure and affecting the performance of communication systems.
By designing the outermost insulating layer in the integrated passive device to wrap around the edge of the inner insulating layer and make direct contact with the substrate, the adhesion between the film layers is enhanced, moisture intrusion is prevented, and delamination is avoided.
It effectively prevents delamination between adjacent layers, improves the reliability and stability of the device in extreme environments, and ensures the signal transmission quality of the communication system.
Smart Images
Figure CN2024142282_02072026_PF_FP_ABST
Abstract
Description
Integrating passive components and radio frequency devices Technical Field
[0001] Embodiments of this disclosure relate to an integrated passive device and a radio frequency device. Background Technology
[0002] Integrated passive device technology is a technique that uses semiconductor processes to create circuits with passive components such as capacitors, inductors, and resistors by fabricating multiple layers of insulating and metal circuitry on the surface of substrates made of materials such as silicon, glass, quartz, ceramics, or organic materials. This technology can be used to fabricate devices such as filters, duplexers, couplers, baluns, and packaging substrates. Devices made using this technology can be used in fields such as radio frequency and packaging. Summary of the Invention
[0003] At least one embodiment of this disclosure provides an integrated passive device and a radio frequency device. The integrated passive device includes: a substrate; a first insulating layer, a first conductive layer, and a second insulating layer sequentially stacked on the substrate; wherein the orthographic projection of the first conductive layer on the substrate is located within the orthographic projection of the first insulating layer on the substrate and the orthographic projection of the second insulating layer on the substrate, the second insulating layer wraps around the edge of the first insulating layer, and the edge of the second insulating layer is in contact with the substrate. In the embodiments of this disclosure, by making the second insulating layer wrap around the edge of the first insulating layer and making the second insulating layer in direct contact with the substrate, the adhesion between the various film layers is enhanced, and external moisture is difficult to penetrate into the interior of the integrated passive device, thereby avoiding the phenomenon of delamination between adjacent layers in the integrated passive device.
[0004] At least one embodiment of this disclosure provides an integrated passive device, which includes: a substrate; a first insulating layer, a first conductive layer and a second insulating layer sequentially stacked on the substrate; wherein the orthographic projection of the first conductive layer on the substrate is located within the orthographic projection of the first insulating layer on the substrate and the orthographic projection of the second insulating layer on the substrate, the second insulating layer wraps around the edge of the first insulating layer, and the edge of the second insulating layer is in contact with the substrate.
[0005] For example, at least one embodiment of the present disclosure provides an integrated passive device that further includes a second conductive layer and a third insulating layer, wherein the second conductive layer and the third insulating layer are stacked between the first conductive layer and the second insulating layer, and the orthographic projection of the second conductive layer on the substrate is located within the orthographic projection of the second insulating layer on the substrate and the orthographic projection of the third insulating layer on the substrate.
[0006] For example, in an integrated passive device provided in at least one embodiment of this disclosure, the second conductive layer is electrically connected to the first conductive layer through a first via structure disposed in the third insulating layer.
[0007] For example, at least one embodiment of the integrated passive device provided in this disclosure further includes a capacitor structure, wherein the capacitor structure is disposed between the first insulating layer and the substrate, and the capacitor structure includes a first electrode plate, a dielectric layer and a second electrode plate stacked together.
[0008] For example, in an integrated passive device provided in at least one embodiment of this disclosure, the orthographic projection of the first electrode plate on the substrate is located within the orthographic projection of the dielectric layer and the second electrode plate on the substrate.
[0009] For example, in an integrated passive device provided in at least one embodiment of this disclosure, the first conductive layer includes a plurality of first sub-conductive structures spaced apart from each other, and the second conductive layer includes a plurality of second sub-conductive structures spaced apart from each other. Each first sub-conductive structure and the second sub-conductive structure adjacent to it in a direction perpendicular to the main surface of the substrate are electrically connected through the first via structure to form a conductive structure.
[0010] For example, in the integrated passive device provided in at least one embodiment of this disclosure, one of the adjacent first sub-conductive structures is electrically connected to the first electrode through a second via structure penetrating the first insulating layer, and the other is electrically connected to the second electrode through a third via structure penetrating at least the first insulating layer.
[0011] For example, in the integrated passive device provided in at least one embodiment of this disclosure, the orthographic projection of the third insulating layer on the substrate is located within the orthographic projections of the first insulating layer on the substrate and the second insulating layer on the substrate, or the orthographic projection of the first insulating layer on the substrate is located within the orthographic projections of the second insulating layer on the substrate and the third insulating layer on the substrate.
[0012] For example, in the integrated passive device provided in at least one embodiment of this disclosure, when the orthographic projection of the first insulating layer on the substrate is located within the orthographic projections of the second insulating layer on the substrate and the third insulating layer on the substrate, the angle between the edge of the first insulating layer and the main surface of the substrate is a first angle, the angle between the edge of the third insulating layer and the main surface of the substrate is a second angle, and the angle between the edge of the second insulating layer and the main surface of the substrate is a third angle, wherein the first angle is smaller than the second angle, and the second angle is smaller than the third angle.
[0013] For example, in the integrated passive device provided in at least one embodiment of this disclosure, the distance between the edge of the second conductive layer and the edge of the third insulating layer is a first distance, and the distance between the edge of the first conductive layer and the edge of the first insulating layer is a second distance, wherein the first distance is greater than the second distance.
[0014] For example, in the integrated passive device provided in at least one embodiment of this disclosure, when the orthographic projection of the third insulating layer on the substrate is located within the orthographic projections of the first insulating layer on the substrate and the second insulating layer on the substrate, the angle between the edge of the first insulating layer and the main surface of the substrate is a first angle, the angle between the edge of the third insulating layer and the surface of the first insulating layer away from the substrate is a fourth angle, and the angle between the edge of the second insulating layer and the main surface of the substrate is a third angle. The difference between the first angle and the fourth angle is less than 20 degrees, and the third angle is greater than the first angle and the fourth angle.
[0015] For example, in the integrated passive device provided in at least one embodiment of this disclosure, the distance between the edge of the second conductive layer and the edge of the third insulating layer is a first distance, and the distance between the edge of the first conductive layer and the edge of the first insulating layer is a second distance, wherein the first distance is less than the second distance.
[0016] For example, in the integrated passive device provided in at least one embodiment of this disclosure, the included angle between the dielectric layer and the main surface of the substrate is a fifth angle, and the fifth angle is an acute angle.
[0017] For example, in the integrated passive device provided in at least one embodiment of this disclosure, the sum of the thicknesses of the first electrode and the second electrode is 1 to 2.5 times the thickness of the dielectric layer.
[0018] For example, at least one embodiment of the integrated passive device provided in this disclosure further includes a protrusion structure disposed on the side of the second insulating layer away from the substrate, wherein the protrusion structure is electrically connected to the second conductive layer.
[0019] At least one embodiment of this disclosure also provides a radio frequency device that includes the integrated passive device in any of the above embodiments. Attached Figure Description
[0020] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure, and are not intended to limit this disclosure.
[0021] Figure 1 is a schematic cross-sectional view of the middle region of an integrated passive device;
[0022] Figure 2 is a schematic cross-sectional view of the integrated passive device shown in Figure 1 at the edge position;
[0023] Figure 3 is a schematic cross-sectional view of an integrated passive device provided in at least one embodiment of this disclosure;
[0024] Figure 4 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of the present disclosure;
[0025] Figure 5 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of this disclosure;
[0026] Figure 6 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of the present disclosure;
[0027] Figure 7 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of the present disclosure;
[0028] Figure 8 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of the present disclosure;
[0029] Figure 9 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of this disclosure;
[0030] Figure 10 is a schematic diagram of the planar structure of the first electrode plate, the second electrode plate, and the dielectric layer in Figure 9;
[0031] Figure 11 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of the present disclosure;
[0032] Figure 12 is a schematic diagram of the planar structure of the first electrode plate, the second electrode plate, and the dielectric layer in Figure 11; and
[0033] Figure 13 is a block diagram of a radio frequency device provided in at least one embodiment of the present disclosure. Detailed Implementation
[0034] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.
[0035] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “upper,” “lower,” “left,” and “right” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.
[0036] Unless otherwise defined, the features such as "parallel," "perpendicular," and "identical" used in the embodiments of this invention include strictly defined cases of "parallel," "perpendicular," and "identical," as well as cases involving a certain degree of error, such as "approximately parallel," "approximately perpendicular," and "approximately identical." For example, the aforementioned "approximately" may indicate that the difference between the compared objects is within 10% or 5% of the average value of the compared objects. Unless otherwise specified in the following embodiments of this invention, the quantity of a component or element is implied to mean that the component or element may be one or more, or can be understood as at least one. "At least one" refers to one or more, and "more" refers to at least two. In the embodiments of this invention, "same-layer arrangement" refers to the relationship between multiple film layers formed from the same material after undergoing the same step (e.g., a patterning process). Here, "same-layer" does not always mean that the multiple film layers have the same thickness or that the multiple film layers have the same height in a cross-sectional view.
[0037] In integrated passive devices, the inductor structure is generally formed by multiple wiring layers including overlapping dielectric and metal layers. The capacitor structure can be a stacked structure formed by a first metal layer, a dielectric layer, and a second metal layer. The resistor structure can use tantalum nitride as the resistor layer. Depending on the function of the device, integrated passive devices can contain any number of capacitors, inductors, and resistors.
[0038] Integrated passive devices are used in consumer electronics, automotive electronics, aerospace, and other fields. Therefore, they face complex and extreme conditions during use, such as high temperature, high humidity, thermal shock, and vacuum. External substances like moisture can enter the interior of the integrated passive device along the gaps between adjacent film layers at the edge, corroding metal traces, causing delamination between film layers, and ultimately leading to device failure. Therefore, targeted design is needed to improve the bonding strength between film layers during the design and fabrication of integrated passive devices. The inventors of this disclosure have noted that integrated passive devices consist of multiple insulating layers and multiple metal layers. After exposure to extreme conditions such as high temperature and high humidity, delamination easily occurs between adjacent insulating layers and between metal layers and insulating layers, leading to device failure.
[0039] With the rapid development of 5G communication technology, the market size of mobile terminals is constantly expanding, the utilization rate of radio frequency band resources is continuously improving, and the demand for radio frequency front-ends from applications such as the Internet of Things and autonomous driving is also constantly increasing. The integration of radio frequency front-end modules is an inevitable development direction for future wireless communication technology, which can not only improve efficiency and reduce manufacturing costs, but also provide system integrators with quick solutions. Filters, as a typical integrated passive device, are frequency-selective devices. Their main function is to select a specific desired signal frequency and filter out noise and interference outside the passband. Therefore, filters enable the transmission of signals at the allowed signal frequencies, and their performance directly affects the noise and other signal interference in the entire communication system, thus impacting the overall communication quality. Filter structures are generally composed of capacitors and inductors. Inductors are mainly composed of stacked metal layers and silicon nitride layers placed between adjacent metal layers. Inductors are mainly completed using redistribution layer (RDL) technology. Multilayer redistribution technology involves the issue of insulating film layer overlap; therefore, the problem of easy delamination between insulating layers is particularly critical.
[0040] For example, an integrated passive device consists of at least a capacitor and an inductor structure. For example, Figure 1 is a schematic cross-sectional view of the middle region of an integrated passive device. As shown in Figure 1, the integrated passive device 100 includes a substrate 101 and a first electrode 102, a dielectric layer 103 and a second electrode 104 sequentially disposed on the substrate 101. A first interlayer insulating layer 105, a first metal layer 106, a second interlayer insulating layer 107 and a second metal layer 108 are disposed on the second electrode 104. A third interlayer insulating layer 109 is disposed on the second metal layer 108. A protrusion structure 110 electrically connected to the second metal layer 108 is disposed above the third interlayer insulating layer 109. For example, the first electrode 102, the dielectric layer 103, and the second electrode 104 form a capacitor structure. The first interlayer insulating layer 105, the second interlayer insulating layer 107, and the third interlayer insulating layer 109 are film layers that separate the first metal layer 106 and the second metal layer 108. The first interlayer insulating layer 105, the second interlayer insulating layer 107, and the third interlayer insulating layer 109 are formed of polymer. Depending on the application scenario and design requirements of the integrated passive device, the first interlayer insulating layer 105, the second interlayer insulating layer 107, and the third interlayer insulating layer 109 in the same device can be selected to be formed of different or the same materials. The protrusion structure 110 enables the integrated passive device to be electrically interconnected with the external circuit board / substrate.
[0041] For example, Figure 2 is a schematic cross-sectional view of the integrated passive device shown in Figure 1 at the edge position. As shown in Figure 2, in the first interlayer insulating layer 105, the second interlayer insulating layer 107 and the third interlayer insulating layer 109 at the edge position of the entire integrated passive device, two adjacent layers are in direct contact, and the third interlayer insulating layer 109, the second interlayer insulating layer 107 and the first interlayer insulating layer 105 are successively recessed and are all in direct contact with the dielectric layer 103. After the integrated passive device is subjected to high temperature and high humidity environment, delamination may occur. The dielectric layer 103 can be made of inorganic materials such as polyimide, benzocyclobutene resin, and silicon oxide. When polyimide is chosen for the dielectric layer 103, although the materials for the first interlayer insulating layer 105, the second interlayer insulating layer 107, and the third interlayer insulating layer 109 can all be polyimide, slight variations in the process can lead to differences in the final stable states of the various films formed on the substrate 101. These slight differences in thermal expansion coefficients are amplified in environments with large temperature differences, making the dielectric layer in integrated passive devices prone to delamination. In addition, after the first interlayer insulating layer 105 is prepared, the first metal layer 106 is prepared next. The material of the first metal layer 106 is copper metal. Then the second interlayer insulating layer 107 is prepared. There are multiple process steps between the preparation of the first interlayer insulating layer 105 and the second interlayer insulating layer 107. The surface of the dielectric layer 103 will undergo changes such as deformation. If it is not treated, the bonding force between the first interlayer insulating layer 105, the second interlayer insulating layer 107 and the dielectric layer 103 and their adjacent layers will also be weakened, which will easily lead to delamination. That is, delamination will occur between the third interlayer insulating layer 109 and the dielectric layer 103, as well as delamination between the first interlayer insulating layer 105, the second interlayer insulating layer 107 and the third interlayer insulating layer 109. The inventors of this disclosure have noticed that the outermost interlayer insulating layer can wrap around the edge of the inner interlayer insulating layer, and the outermost interlayer insulating layer can be in direct contact with the substrate. Since the surface of the substrate is stable, the bonding ability between the outermost interlayer insulating layer and the substrate is strong, and external moisture is difficult to penetrate into the interior of the integrated passive device, thereby avoiding the phenomenon of delamination between adjacent layers in the integrated passive device.
[0042] At least one embodiment of this disclosure provides an integrated passive device, which includes: a substrate; a first insulating layer, a first conductive layer and a second insulating layer sequentially stacked on the substrate, wherein the orthographic projection of the first conductive layer on the substrate is located within the orthographic projection of the first insulating layer on the substrate and the orthographic projection of the second insulating layer on the substrate, and the second insulating layer wraps around the edge of the first insulating layer and the edge of the second insulating layer is in contact with the substrate, thereby avoiding the phenomenon of separation between adjacent layer structures.
[0043] For example, Figure 3 is a schematic cross-sectional view of an integrated passive device provided in at least one embodiment of the present disclosure. As shown in Figure 3, the integrated passive device 200 includes: a substrate 201; a first insulating layer 202, a first conductive layer 203, and a second insulating layer 204 sequentially stacked on the substrate 201. The orthographic projection of the first conductive layer 203 on the substrate 201 lies within the orthographic projection of the first insulating layer 202 on the substrate 201 and the orthographic projection of the second insulating layer 204 on the substrate 201. The second insulating layer 204 wraps around the edge of the first insulating layer 202, and the edge of the second insulating layer 204 contacts the substrate 201. That is, in the integrated passive device 200, the first insulating layer 202 located on the outer side is the first insulating layer 202. The second insulating layer 204 wraps around the edge of the first insulating layer 202 located on the inner side. The orthographic projection of the first insulating layer 202 on the substrate 201 is within the orthographic projection of the second insulating layer 204 on the substrate 201, and the second insulating layer 204 and the substrate 201 are in direct contact. Since the surface of the substrate 201 is stable, the bonding ability between the second insulating layer 204 located on the outer side and the substrate 201 is strong. Moreover, the second insulating layer 204 wraps around the edge of the first insulating layer 202, which is equivalent to preventing the first insulating layer 202 from being delaminated. External moisture is difficult to penetrate into the interior of the integrated passive device 200, thereby avoiding the phenomenon of delamination between adjacent layers in the integrated passive device 200.
[0044] For example, the substrate 201 can be a glass-based chip, in which a chip is added to a substrate made of materials such as silicon, silicon carbide (SiC) and gallium nitride (GaN). The substrate 201 is stable and not easily affected by external high temperature and high humidity environments.
[0045] For example, as shown in Figure 3, the surface of the edge of the first insulating layer 202 located on the inner side, which is close to the substrate 201, is also in direct contact with the substrate 201. This can further enhance the adhesion between the first insulating layer 202 and the substrate 201, making it less likely for the first insulating layer 202 and the substrate 201 to delaminate.
[0046] It should be noted that although Figure 3 shows that the leftmost edge of the first insulating layer 202 and the second insulating layer 204 is perpendicular to the main surface of the substrate 201, the embodiments of this disclosure are not limited to this, and the leftmost edge of the first insulating layer 202 and the second insulating layer 204 may not be perpendicular to the main surface of the substrate 201.
[0047] For example, Figure 4 is a cross-sectional structural diagram of another integrated passive device provided in at least one embodiment of the present disclosure. As shown in Figure 4, the first included angle α between the leftmost edge of the first insulating layer 202 and the main surface of the substrate 201 is a first acute angle, and the second included angle c between the leftmost edge of the second insulating layer 204 and the main surface of the substrate 201 is a second acute angle, and the second acute angle is greater than the first acute angle. This can achieve better wrapping of the edge of the first insulating layer 202 by the second insulating layer 204, so as to reduce the risk of delamination between the second insulating layer 204 and the first insulating layer 202.
[0048] For example, Figure 5 is a cross-sectional structural schematic diagram of another integrated passive device provided in at least one embodiment of the present disclosure. As shown in Figure 5, the integrated passive device 200 further includes a second conductive layer 205 and a third insulating layer 206. The second conductive layer 205 and the third insulating layer 206 are stacked between the first conductive layer 203 and the second insulating layer 204, and the orthographic projection of the second conductive layer 205 on the substrate 201 lies within the orthographic projections of the second insulating layer 204 and the third insulating layer 206 on the substrate 201. For example, Figure 5 illustrates an example where the leftmost edges of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 are perpendicular to each other and in direct contact with the main surface of the substrate 201.
[0049] For example, after the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 are formed, it is necessary to physically bombard the surfaces of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 to improve the physical state of the surfaces of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206, enhance the adhesion between the film layer formed on the first insulating layer 202, the second insulating layer 204, or the third insulating layer 206 and them, thereby reducing the risk of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 being peeled off.
[0050] For example, FIG5 also shows a dielectric layer 207 included in the capacitor structure, which is located between the substrate 201 and the first insulating layer 202.
[0051] For example, FIG6 is a cross-sectional structural schematic diagram of another integrated passive device provided in at least one embodiment of the present disclosure. As shown in FIG6, the integrated passive device 200 further includes a second conductive layer 205 and a third insulating layer 206. The second conductive layer 205 and the third insulating layer 206 are stacked between the first conductive layer 203 and the second insulating layer 204, and the orthographic projection of the second conductive layer 205 on the substrate 201 is located within the orthographic projection of the second insulating layer 204 on the substrate 201 and the orthographic projection of the third insulating layer 206 on the substrate 201. The orthographic projection of the first insulating layer 202 on the substrate 201 lies within the orthographic projections of the second insulating layer 204 and the third insulating layer 206 on the substrate 201. The angle between the edge of the first insulating layer 202 and the main surface of the substrate 201 is a first angle α, the angle between the edge of the third insulating layer 206 and the main surface of the substrate 201 is a second angle b, and the angle between the edge of the second insulating layer 204 and the main surface of the substrate 201 is a third angle c. The first angle α is smaller than the second angle b, and the second angle b is smaller than the third angle c. That is, the inclination of the edges of the first insulating layer 202, the third insulating layer 206, and the second insulating layer 204 relative to the main surface of the substrate 201 increases sequentially. This makes it less likely for the first insulating layer 202, the third insulating layer 206, and the second insulating layer 204 to delaminate.
[0052] For example, FIG6 also shows a dielectric layer 207 included in the capacitor structure, which is located between the substrate 201 and the first insulating layer 202.
[0053] For example, the portion of the first insulating layer 202 located on the dielectric layer 207 has a first thickness m, the portion of the third insulating layer 206 located on the first conductive layer 203 has a third thickness n, and the portion of the second insulating layer 204 located on the second conductive layer 205 has a second thickness j. When the first insulating layer 202, the third insulating layer 206, and the second insulating layer 204 are all made of polyimide, the first thickness m of the first insulating layer 202, the second thickness j of the second insulating layer 204, and the third thickness n of the third insulating layer 206 can all be 3 to 10 micrometers. The use of polyimide as the insulating material in the second insulating layer 204 and the third insulating layer 206 can isolate electrical signals above and below the first conductive layer 203 and the second conductive layer 205, ensuring that when the integrated passive device is used in an integrated passive device, the integrated passive device will not generate a large coupling capacitance during operation. Furthermore, during the preparation of each film layer, due to alignment deviations and slight shrinkage of each film layer during the curing of the insulating material, the distance between the edge of the first insulating layer 202 and the edge of the third insulating layer 206 is designated as a first spacing p, which is 3 to 15 micrometers. The distance between the edge of the third insulating layer 206 and the edge of the second insulating layer 204 is designated as a second spacing k, which is also 3 to 15 micrometers. This ensures that the first insulating layer 202, the third insulating layer 206, and the second insulating layer 204 are stacked sequentially.
[0054] For example, the preparation process of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 includes processes such as coating, exposure and development, and curing. After development, the slope angle of each insulating layer is close to 90 degrees. During curing, the organic solvent in the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 evaporates, and the solution volume of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 shrinks. The first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 are well bonded to the substrate electrode 201, but the top of each layer will gradually shrink inward. In this way, the edge slope angle of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 will gradually decrease. For example, the thickness of the first conductive layer 203 and the second conductive layer 205 is 2 to 15 micrometers. The first insulating layer 202, the first conductive layer 203, and the second conductive layer 205 together affect the slope angle of the second insulating layer 204 and the third insulating layer 206. In order to avoid air bubbles appearing at the bottom of the dielectric layer 207 during the stacking process, it is necessary to ensure that the slope angle of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 is less than or equal to 90 degrees. Moreover, in order to ensure that the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 wrap the first conductive layer 203 and the second conductive layer 205, the second distance f between the edge of the first conductive layer 203 and the edge of the first insulating layer 202 is 5 to 15 micrometers, and the first distance g between the edge of the second conductive layer 205 and the edge of the third insulating layer 206 is 5 to 15 micrometers, and the first distance g is greater than the second distance f.
[0055] Since the first insulating layer 202, the third insulating layer 206, and the second insulating layer 204 are stacked sequentially, the slope angle relationship is that the first angle a is less than the second angle b, and the second angle b is less than the third angle c. When the first angle a is less than 75 degrees, the second angle b and the third angle c will not be greater than 90 degrees, which is beneficial to the stacking of the third insulating layer 206 and the second insulating layer 204.
[0056] For example, in the structure shown in Figure 6, the first insulating layer 202 wraps around the dielectric layer 207. The dielectric layer 207 can be retracted below any one of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206. The slope angle between the dielectric layer 207 and the main surface of the substrate 201 is less than or equal to 90 degrees, which ensures that the upper dielectric layer 207 is well covered. When the slope angle between the dielectric layer 207 and the main surface of the substrate 201 is greater than 90 degrees, there is a risk that the bottom gap will be generated after the upper part of the dielectric layer 207 is covered, which may affect the reliability of the integrated passive device.
[0057] For example, Figure 7 is a cross-sectional structural schematic diagram of another integrated passive device provided in at least one embodiment of the present disclosure. As shown in Figure 7, the integrated passive device 200 further includes a second conductive layer 205 and a third insulating layer 206. The second conductive layer 205 and the third insulating layer 206 are stacked between the first conductive layer 203 and the second insulating layer 204. The orthographic projection of the third insulating layer 206 on the substrate 201 is located within the orthographic projection of the first insulating layer 202 on the substrate 201 and the orthographic projection of the second insulating layer 204 on the substrate 201. The angle between the edge of the first insulating layer 202 and the main surface of the substrate 201 is a first angle α. The angle between the edge of the third insulating layer 206 and the surface of the first insulating layer 202 away from the substrate 201 is a fourth angle d. The angle between the edge of the second insulating layer 204 and the main surface of the substrate 201 is a third angle c. The difference between the first angle α and the fourth angle d is less than 20 degrees, and the third angle c is greater than the first angle α and the fourth angle d.
[0058] For example, as shown in Figure 7, when the edges of the first insulating layer 202 and the second insulating layer 204 are both in direct contact with the substrate 201, a certain anchoring effect can be provided for the second insulating layer 204 to prevent delamination of the second insulating layer 204. The second distance f between the edge of the first conductive layer 203 and the edge of the first insulating layer 202 is 5 to 15 micrometers, and the first distance g between the edge of the second conductive layer 205 and the edge of the third insulating layer 206 is 5 to 15 micrometers, and the first distance g is less than the second distance f.
[0059] For example, in the structure shown in Figure 7, the first insulating layer 202 wraps around the dielectric layer 207. The dielectric layer 207 can be retracted below any one of the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206. The slope angle between the dielectric layer 207 and the main surface of the substrate 201 is less than or equal to 90 degrees, which ensures that the upper dielectric layer 207 is well covered. When the slope angle between the dielectric layer 207 and the main surface of the substrate 201 is greater than 90 degrees, there is a risk that the bottom gap will be generated after the upper part of the dielectric layer 207 is covered, which may affect the reliability of the integrated passive device.
[0060] For example, Figures 5, 6, and 7 only show a cross-sectional view of the integrated passive device in the edge region. In this edge region, the third insulating layer 206 wraps the first insulating layer 202, and the second insulating layer 204 wraps both the third insulating layer 206 and the first insulating layer 202. A portion of the first insulating layer 202 is in direct contact with the dielectric layer 207, and a portion of the first insulating layer 202 in the edge region is in direct contact with the substrate 101. The dielectric layer, serving as the capacitor dielectric layer between the first and second electrodes, can be formed using silicon nitride or silicon oxide. Silicon nitride or silicon oxide has relatively stable properties, and its surface state does not change due to environmental factors such as high temperature and high humidity during the process. Furthermore, polyimide has strong adhesion to silicon nitride or silicon oxide, which can prevent the intrusion of external moisture in complex environments, ensuring that the dielectric layer does not delaminate.
[0061] For example, Figure 8 is a cross-sectional structural schematic diagram of another integrated passive device provided in at least one embodiment of the present disclosure. As shown in Figure 8, the integrated passive device 200 further includes a capacitor structure disposed between the first insulating layer 202 and the substrate 201. The capacitor structure includes a first electrode 208, a dielectric layer 207 and a second electrode 209 stacked together.
[0062] For example, the size of the dielectric layer 207 in the integrated passive device can be designed to be similar to the size of the first electrode 209 and the second electrode 208, so that the first insulating layer 202, the second insulating layer 204 and the third insulating layer 206 in the integrated passive device can maintain good adhesion when in direct contact with the substrate 201.
[0063] For example, as shown in FIG8, the orthographic projection of the first electrode 209 on the substrate 201 is located within the orthographic projection of the dielectric layer 207 and the second electrode 208 on the substrate 201, and the orthographic projections of the dielectric layer 207, the first electrode 209 and the second electrode 208 on the substrate 201 are all located within the orthographic projection of the first insulating layer 202 on the substrate 201.
[0064] For example, in the structure shown in Figure 8, the materials of the first electrode 209 and the second electrode 208 can be selected as a multilayer metal stack structure, such as titanium / aluminum / titanium, titanium / copper / titanium, or titanium / tungsten. Alternatively, the materials of the first electrode 209 and the second electrode 208 can also be selected as a metal nitride and metal stack structure, such as tantalum nitride / tantalum, etc., and the embodiments of this disclosure are not limited in this regard. For example, according to the performance requirements of integrated passive devices, the thickness of both the first electrode 209 and the second electrode 208 needs to be less than 1 micrometer and greater than 200 nanometers, and the material of the dielectric layer 207 can be selected as silicon nitride or silicon dioxide, with a thickness of less than 500 nm and greater than 20 nm. This ensures that the dielectric layer 207 is not easily delaminated.
[0065] For example, in one instance, the angle between the dielectric layer 207 and the main surface of the substrate 201 is a fifth angle, which is an acute angle. That is, the angle between the dielectric layer 207 and the main surface of the substrate 201 is less than or equal to 90 degrees, thereby ensuring that the dielectric layer 207 is not prone to delamination.
[0066] For example, as shown in FIG8, the sum of the thicknesses of the first electrode 209 and the second electrode 208 is 1 to 2.5 times the thickness of the dielectric layer 207. For example, the sum of the thicknesses of the first electrode 209 and the second electrode 208 is 1.5 times, 2 times, or 2.5 times the thickness of the dielectric layer 207, and the embodiments of this disclosure are not limited to this.
[0067] For example, Figure 9 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of this disclosure. Figure 9 shows the connection relationship between the first conductive layer 203, the second conductive layer 205, the first electrode 209, and the second electrode 208 located in the non-edge region. In Figure 9, the orthographic projections of the first electrode 209 and the second electrode 208 on the substrate 201 are both located within the orthographic projection of the dielectric layer 207 on the substrate 201.
[0068] For example, as shown in FIG9, the second conductive layer 205 is electrically connected to the first conductive layer 203 through a first via structure 2061 disposed in the third insulating layer 206. For example, the second conductive layer 205 and the first conductive layer 203 can also be integrally formed, and the embodiments of this disclosure are not limited thereto.
[0069] For example, as shown in FIG9, the first conductive layer 203 includes a plurality of first sub-conductive structures 2031 spaced apart from each other, and the second conductive layer 205 includes a plurality of second sub-conductive structures 2051 spaced apart from each other. Each first sub-conductive structure 2031 and the second sub-conductive structure 2051 adjacent thereto in a direction perpendicular to the main surface of the substrate 201 are electrically connected through a first via structure 2061 to form a conductive structure.
[0070] For example, as shown in FIG9, one of the adjacent conductive structures is electrically connected to the first electrode 209 through a second via structure 2021 penetrating the first insulating layer 202, and the other is electrically connected to the second electrode 208 through a third via structure 2022 that at least penetrates the first insulating layer 202. For example, in FIG9, the other of the adjacent conductive structures is electrically connected to the second electrode 208 through a third via structure 2022 that penetrates the first insulating layer 202 and the dielectric layer 207.
[0071] For example, as shown in FIG9, on a plane parallel to the main surface of the substrate 201, the size of the dielectric layer 207 is larger than the size of the second electrode 208, and at least one edge of the second electrode 208 is covered by the dielectric layer 207, which can prevent short circuits from affecting the performance of subsequently formed integrated passive devices (e.g., filters).
[0072] For example, as shown in Figure 9, the first electrode 209 can form an integral structure with the first conductive layer 203, and the first electrode 209 can have the same thickness as the first conductive layer 203. This can improve the stability of the electrical connection between the inductor and capacitor in the integrated passive device.
[0073] For example, as shown in FIG9, the integrated passive device 200 further includes a protrusion structure 210 disposed on the side of the second insulating layer 204 away from the substrate 201, the protrusion structure 210 being electrically connected to the second conductive layer 205. For example, the protrusion structure 210 forms a test or signal connection structure.
[0074] For example, Figure 10 is a schematic diagram of the planar structure of the first electrode plate, the second electrode plate, and the dielectric layer in Figure 9. As shown in Figures 9 and 10, the orthographic projection of the first electrode plate 209 on the substrate 201 is located within the orthographic projection of the second electrode plate 208 on the substrate 201, and the orthographic projection of the second electrode plate 208 on the substrate 201 is located within the orthographic projection of the dielectric layer 207 on the substrate 201.
[0075] For example, Figure 11 is a schematic cross-sectional view of another integrated passive device provided in at least one embodiment of the present disclosure. Figure 11 shows the connection relationship between the first conductive layer 203, the second conductive layer 205, the first electrode 209, and the second electrode 208 located in the non-edge region. In Figure 11, the orthographic projections of the first electrode 209 and the dielectric layer 207 on the substrate 201 are both located within the orthographic projection of the second electrode 208 on the substrate 201.
[0076] For example, as shown in FIG11, the second conductive layer 205 is electrically connected to the first conductive layer 203 through a first via structure 2061 disposed in the third insulating layer 206. For example, the second conductive layer 205 and the first conductive layer 203 may also be integrally formed, and the embodiments of this disclosure are not limited thereto.
[0077] For example, as shown in FIG11, the first conductive layer 203 includes a plurality of first sub-conductive structures 2031 spaced apart from each other, and the second conductive layer 205 includes a plurality of second sub-conductive structures 2051 spaced apart from each other. Each first sub-conductive structure 2031 and the second sub-conductive structure 2051 adjacent thereto in a direction perpendicular to the main surface of the substrate 201 are electrically connected through a first via structure 2061 to form a conductive structure.
[0078] For example, as shown in FIG11, one of the adjacent conductive structures is electrically connected to the first electrode 209 through a second via structure 2021 penetrating the first insulating layer 202, and the other is electrically connected to the second electrode 208 through a third via structure 2022 penetrating at least the first insulating layer 202. For example, in FIG11, the other of the adjacent conductive structures is electrically connected to the second electrode 208 through a third via structure 2022 penetrating the first insulating layer 202.
[0079] For example, as shown in FIG11, the integrated passive device 200 further includes a protrusion structure 210 disposed on the side of the second insulating layer 204 away from the substrate 201, the protrusion structure 210 being electrically connected to the second conductive layer 205. For example, the protrusion structure 210 forms a test or signal connection structure.
[0080] For example, Figure 12 is a schematic diagram of the planar structure of the first electrode plate, the second electrode plate, and the dielectric layer in Figure 11. As shown in Figures 11 and 12, the orthographic projection of the first electrode plate 209 on the substrate 201 is located within the orthographic projection of the dielectric layer 207 on the substrate 201, and the orthographic projection of the dielectric layer 207 on the substrate 201 is located within the orthographic projection of the second electrode plate 208 on the substrate 201.
[0081] For example, the integrated passive device 200 can be a resonator, filter, and mixer.
[0082] At least one embodiment of this disclosure also provides a radio frequency (RF) device. FIG13 is a block diagram of an RF device provided in at least one embodiment of this disclosure. As shown in FIG13, the RF device 400 includes the integrated passive device 200 in any of the above embodiments. The principle of solving the problem by this RF device is similar to that of the aforementioned integrated passive device. Therefore, the implementation of this RF device can refer to the implementation of the aforementioned integrated passive device, and the repeated parts will not be described again here.
[0083] The following points need to be explained:
[0084] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.
[0085] (2) For clarity, the thickness of layers or regions in the drawings used to describe embodiments of the present disclosure is enlarged or reduced, i.e., these drawings are not drawn to actual scale.
[0086] (3) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.
[0087] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure should be determined by the scope of protection of the claims.
Claims
1. An integrated passive device, comprising: Substrate; A first insulating layer, a first conductive layer, and a second insulating layer are sequentially stacked on the substrate; wherein, the orthographic projection of the first conductive layer on the substrate is located within the orthographic projection of the first insulating layer on the substrate and the orthographic projection of the second insulating layer on the substrate, the second insulating layer wraps around the edge of the first insulating layer, and the edge of the second insulating layer is in contact with the substrate.
2. The integrated passive device according to claim 1 further comprises a second conductive layer and a third insulating layer, wherein, The second conductive layer and the third insulating layer are stacked between the first conductive layer and the second insulating layer, and the orthographic projection of the second conductive layer on the substrate is located within the orthographic projection of the second insulating layer on the substrate and the orthographic projection of the third insulating layer on the substrate.
3. The integrated passive device according to claim 2, wherein, The second conductive layer is electrically connected to the first conductive layer through a first via structure disposed in the third insulating layer.
4. The integrated passive device according to claim 3 further includes a capacitor structure, wherein, The capacitor structure is disposed between the first insulating layer and the substrate, and the capacitor structure includes a first electrode plate, a dielectric layer and a second electrode plate stacked together.
5. The integrated passive device according to claim 4, wherein, The orthographic projection of the first electrode plate on the substrate lies within the orthographic projection of the dielectric layer and the second electrode plate on the substrate.
6. The integrated passive device according to claim 4 or 5, wherein, The first conductive layer includes a plurality of first sub-conductive structures spaced apart from each other, and the second conductive layer includes a plurality of second sub-conductive structures spaced apart from each other. Each first sub-conductive structure and its adjacent second sub-conductive structure in a direction perpendicular to the main surface of the substrate are electrically connected through the first via structure to form a conductive structure.
7. The integrated passive device according to claim 6, wherein, One of the adjacent first sub-conductive structures is electrically connected to the first electrode plate through a second via structure penetrating the first insulating layer, and the other is electrically connected to the second electrode plate through a third via structure penetrating at least the first insulating layer.
8. The integrated passive device according to any one of claims 2 to 5, wherein, The orthographic projection of the third insulating layer on the substrate is located within the orthographic projections of the first insulating layer and the second insulating layer on the substrate, or the orthographic projection of the first insulating layer on the substrate is located within the orthographic projections of the second insulating layer and the third insulating layer on the substrate.
9. The integrated passive device according to claim 8, wherein, When the orthographic projection of the first insulating layer on the substrate is located within the orthographic projections of the second insulating layer and the third insulating layer on the substrate, the angle between the edge of the first insulating layer and the main surface of the substrate is a first angle, the angle between the edge of the third insulating layer and the main surface of the substrate is a second angle, and the angle between the edge of the second insulating layer and the main surface of the substrate is a third angle. The first angle is smaller than the second angle, and the second angle is smaller than the third angle.
10. The integrated passive device according to claim 9, wherein, The distance between the edge of the second conductive layer and the edge of the third insulating layer is a first distance, and the distance between the edge of the first conductive layer and the edge of the first insulating layer is a second distance, wherein the first distance is greater than the second distance.
11. The integrated passive device according to claim 8, wherein, When the orthographic projection of the third insulating layer on the substrate is located within the orthographic projections of the first insulating layer and the second insulating layer on the substrate, the angle between the edge of the first insulating layer and the main surface of the substrate is a first angle, the angle between the edge of the third insulating layer and the surface of the first insulating layer away from the substrate is a fourth angle, and the angle between the edge of the second insulating layer and the main surface of the substrate is a third angle. The difference between the first angle and the fourth angle is less than 20 degrees, and the third angle is greater than the first angle and the fourth angle.
12. The integrated passive device according to claim 11, wherein, The distance between the edge of the second conductive layer and the edge of the third insulating layer is a first distance, and the distance between the edge of the first conductive layer and the edge of the first insulating layer is a second distance, wherein the first distance is less than the second distance.
13. The integrated passive device according to any one of claims 4 to 7, wherein, The angle between the dielectric layer and the main surface of the substrate is a fifth angle, which is an acute angle.
14. The integrated passive device according to claim 13, wherein, The sum of the thicknesses of the first electrode and the second electrode is 1 to 2.5 times the thickness of the dielectric layer.
15. The integrated passive device according to any one of claims 1 to 14, further comprising a protrusion structure disposed on the side of the second insulating layer away from the substrate, wherein, The protruding structure is electrically connected to the second conductive layer.
16. A radio frequency device comprising the integrated passive device according to any one of claims 1 to 15.