Filter device and high-frequency front end circuit provided with same

Abstract

This filter device (100) comprises: a laminate (110); an input terminal (TI), an output terminal (TO), and a ground terminal (GND) on a lower surface (112) of the laminate (110); a ground electrode (PG10) connected to the ground terminal (GND); a ground electrode (PG20) connected to the ground electrode (PG10) and located between an upper surface (111) of the laminate and the ground electrode (PG10); resonance circuits (RC1-RC4); and a crossover electrode (P5) connecting the resonance circuits (RC1, RC2). The resonance circuits (RC1, RC2) are connected to the input terminal (TI) and the output terminal (TO), respectively. Each of the resonance circuits (RC1, RC2) includes a one-side-open via (V1, V2) with a capacitor (C1, C2). Each of the resonance circuits (RC3, RC4) includes a capacitor (C3, C4) and a both-sides-open inductor with a capacitor (C34). In a plan view from the lamination direction, the crossover electrode (P5) does not overlap the resonance circuits (RC3, RC4).

Description

Filter device and high-frequency front-end circuit including the same

[0001] The present disclosure relates to a filter device and a high-frequency front-end circuit including the same, and more particularly to a technique for improving spurious characteristics of the filter device.

[0002] Japanese Patent Application Laid-Open No. 2019-103108 (Patent Document 1) discloses a configuration in a filter device in which four resonance circuits are arranged, in which a resonance circuit connected to an input terminal and a resonance circuit connected to an output terminal are connected by wiring.

[0003] Japanese Patent Application Laid-Open No. 2019-103108

[0004] In the filter device disclosed in Patent Document 1, a resonance circuit connected to an input terminal and a resonance circuit connected to an output terminal are directly connected by wiring. As a result, the frequency of either an attenuation pole generated at a frequency higher than the passband or an attenuation pole generated at a frequency lower than the passband can be changed. Therefore, the frequency characteristics of the filter device can be made closer to desired frequency characteristics.

[0005] On the other hand, in the filter device disclosed in Patent Document 1, wiring forming capacitive coupling between a resonance circuit connected to an input terminal and a resonance circuit connected to an output terminal can also be coupled to the other two resonance circuits by parasitic capacitance. As a result, an unintended high-pass filter is formed by the parasitic capacitance, and spurious may occur at a frequency higher than the passband. In order to further reduce spurious of the filter device, it is necessary to eliminate such unintended coupling of resonance circuits as much as possible.

[0006] The present disclosure has been made to solve such problems, and an object thereof is to suppress unintended coupling of resonance circuits and reduce the occurrence of spurious in a filter device having a plurality of resonance circuits.

[0007] A filter device according to one aspect of the present disclosure comprises a laminate, an input terminal, an output terminal, a ground terminal, a first ground electrode, a second ground electrode, a first resonant circuit, a second resonant circuit, a third resonant circuit, a fourth resonant circuit, and a connecting electrode. The laminate has a first surface and a second surface, and a plurality of dielectric layers are laminated therein. The input terminal, output terminal, and ground terminal are located on the second surface of the laminate. A flat-plate-shaped first ground electrode is located inside the laminate and connected to the ground terminal. A flat-plate-shaped second ground electrode is located in the dielectric layer between the first surface and the first ground electrode and connected to the first ground electrode. The first and second resonant circuits are located between the first and second ground electrodes and connected to the input and output terminals, respectively. The third and fourth resonant circuits are located between the first and second ground electrodes. The connecting electrode connects the first and second resonant circuits. Each of the first and second resonant circuits includes a via, one end of which is connected to the second ground electrode and the other end of which is connected to the first ground electrode via a first capacitor. Each of the third and fourth resonant circuits includes an inductor, one end of which is connected to the second ground electrode via a second capacitor and the other end of which is connected to the first ground electrode via a third capacitor. When the laminate is viewed in plan from the stacking direction, the connecting electrodes, the first resonant circuit, and the second resonant circuit do not overlap with the third and fourth resonant circuits.

[0008] The filter device according to this disclosure includes four resonant circuits. When the laminate is viewed in plan from the stacking direction, the connecting electrodes connecting the resonant circuit connected to the input terminal (first resonant circuit) and the resonant circuit connected to the output terminal (second resonant circuit) do not overlap with the other two resonant circuits (third and fourth resonant circuits). This configuration suppresses coupling between the connecting wiring that directly connects the first and second resonant circuits and the other two resonant circuits. Therefore, by directly connecting the first and second resonant circuits while suppressing unintended coupling of the resonant circuits, the generation of spurious emissions from the filter device can be reduced.

[0009] This is a block diagram of a communication device having a high-frequency front-end circuit to which the filter device of the embodiment is applied. This is an equivalent circuit diagram of the filter device of the embodiment. This is an external perspective view of the filter device of the embodiment. This is an exploded perspective view showing an example of the stacked structure of the filter device of the embodiment. This is an equivalent circuit diagram of the filter device of a comparative example. This is a diagram for explaining the filter characteristics in the filter device of the embodiment and the filter device of the comparative example. This is an exploded perspective view showing an example of the stacked structure of the modified filter device.

[0010] The embodiments of this disclosure will be described in detail below with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and their descriptions will not be repeated.

[0011] [Embodiment] (Basic configuration of the communication device) Figure 1 is a block diagram of a communication device 10 having a high-frequency front-end circuit 20 to which the filter device of the embodiment is applied. The communication device 10 is, for example, a mobile terminal or a mobile phone base station.

[0012] Referring to Figure 1, the communication device 10 includes an antenna 12, a high-frequency front-end circuit 20, a mixer 30, a local oscillator 32, a D / A converter (DAC) 40, and an RF circuit 50. The high-frequency front-end circuit 20 also includes bandpass filters 22, 28, an amplifier 24, and an attenuator 26. In Figure 1, the case in which the high-frequency front-end circuit 20 includes a transmitting circuit that transmits a high-frequency signal from the antenna 12 is described, but the high-frequency front-end circuit 20 may also include a receiving circuit that receives a high-frequency signal via the antenna 12.

[0013] The communication device 10 upconverts the transmission signal transmitted from the RF circuit 50 into a high-frequency signal and radiates it from the antenna 12. The modulated digital signal, which is the transmission signal output from the RF circuit 50, is converted into an analog signal by the D / A converter 40. The mixer 30 mixes the transmission signal, which has been converted from a digital signal to an analog signal by the D / A converter 40, with the oscillation signal from the local oscillator 32 and upconverts it into a high-frequency signal. The bandpass filter 28 removes unwanted waves generated by the upconversion and extracts only the transmission signal in the desired frequency band. The attenuator 26 adjusts the strength of the transmission signal. The amplifier 24 power-amplifies the transmission signal that has passed through the attenuator 26 to a predetermined level. The bandpass filter 22 removes unwanted waves generated during the amplification process and allows only the signal components in the frequency band defined by the communication standard to pass through. The transmission signal that has passed through the bandpass filter 22 is radiated from the antenna 12.

[0014] As the bandpass filters 22 and 28 in the communication device 10 described above, a filter device corresponding to this disclosure can be used.

[0015] (Configuration of the filter device) Next, the detailed configuration of the filter device 100 of the embodiment will be described using Figures 2 to 4.

[0016] (1) Equivalent circuit diagram 2 is an equivalent circuit diagram of the filter device 100 of the embodiment. Referring to Figure 2, the filter device 100 comprises an input terminal TI, an output terminal TO, a ground terminal GND, and resonant circuits RC1 to RC4. Each of the resonant circuits RC1 and RC2 is an LC parallel resonant circuit in which an inductor and a capacitor are connected in parallel. Each of the resonant circuits RC3 and RC4 is an LC series resonant circuit in which an inductor and a capacitor are connected in series.

[0017] The resonant circuit RC1 includes an inductor L1 and a capacitor C1. One end of inductor L1 is connected to the input terminal TI via capacitor CIN. The other end of inductor L1 is connected to the ground terminal GND via inductor L5. Capacitor C1 is connected in parallel with inductor L1.

[0018] The resonant circuit RC2 includes an inductor L2 and a capacitor C2. One end of inductor L2 is connected to the output terminal TO via capacitor CO. The other end of inductor L2 is connected to the ground terminal GND via inductor L5. Capacitor C2 is connected in parallel with inductor L2.

[0019] The resonant circuit RC3 includes inductors L3 and L34 and capacitors C3 and C34. Capacitor C3, inductors L3 and L34, and capacitor C34 are connected in series in this order between the connection node N13 of the resonant circuit RC1 and inductor L5 and the ground terminal GND. In other words, the resonant circuit RC3 is an open-ended LC series resonant circuit in which inductors L3 and L34 and capacitors C3 and C34 are connected in series.

[0020] The resonant circuit RC4 includes inductors L4 and L34 and capacitors C4 and C34. Capacitor C4, inductors L4 and L34, and capacitor C34 are connected in series in this order between the connection node N24 of the resonant circuit RC2 and inductor L5 and the ground terminal GND. In other words, the resonant circuit RC4 is an open-ended LC series resonant circuit in which inductors L4 and L34 and capacitors C4 and C34 are connected in series.

[0021] As described above, the inductor L34 and capacitor C34 are shared by the resonant circuits RC3 and RC4. Therefore, the resonant circuits RC3 and RC4 are inductively coupled to each other.

[0022] A capacitor C5 is connected between the connection node NI between capacitor CIN and resonant circuit RC1, and the connection node NO between capacitor CO and resonant circuit RC2. Resonant circuits RC1 and RC2 are capacitively coupled to each other by capacitor C5.

[0023] Thus, the filter device 100 has a configuration in which four resonant circuits are arranged in the signal transmission path between the input terminal TI and the output terminal TO. By adjusting the resonant frequency of each resonant circuit, the filter device 100 functions as a bandpass filter that allows signals in a desired frequency band to pass through. The resonant circuits RC3 and RC4 essentially function as high-pass filters connected to GND, and can reduce spurious signals that may occur at frequencies higher than the passband.

[0024] The number of resonant circuits included in the filter device is just one example, and the features described herein are applicable to filter devices containing four or more resonant circuits. In that case, the fifth and subsequent resonant circuits have the same configuration as resonant circuits RC1 and RC2 and are placed between resonant circuits RC1 and RC2.

[0025] (2) Detailed Structure Next, the structure of the filter device 100 will be described using Figures 3 and 4. Figure 3 is an external perspective view of the filter device 100 of the embodiment, and Figure 4 is an exploded perspective view showing an example of the stacked structure of the filter device 100 of the embodiment.

[0026] Referring to Figures 3 and 4, the filter device 100 comprises a rectangular or substantially rectangular parallelepiped laminate 110 in which a plurality of dielectric layers LY1 to LY9 are stacked in the stacking direction. The dielectric layers LY1 to LY9 are formed of, for example, low-temperature co-fired ceramics (LTCC) or resin. Inside the laminate 110, the inductor and capacitor of the resonant circuit are formed by a plurality of electrodes provided in each dielectric layer and a plurality of vias provided between the dielectric layers. In this specification, "via" refers to a conductor provided in a dielectric layer to connect electrodes provided in different dielectric layers. Vias are formed by, for example, conductive paste, plating, and / or metal pins.

[0027] In the following explanation, the stacking direction of the dielectric layers LY1 to LY9 in the laminate 110 will be referred to as the "Z-axis direction," the direction perpendicular to the Z-axis direction and along one side of the laminate 110 will be referred to as the "X-axis direction," and the direction along the other side of the laminate 110 will be referred to as the "Y-axis direction." Furthermore, in the following, the positive direction of the Z-axis in each figure may be referred to as the upper side, and the negative direction as the lower side.

[0028] A directional mark DM for identifying the direction of the filter device 100 is located on the upper surface 111 (dielectric layer LY1) of the laminate 110. A ground terminal GND is located on the lower surface 112 (dielectric layer LY9) of the laminate 110. An input terminal TI and an output terminal TO are further located on the lower surface 112 (dielectric layer LY9) of the laminate 110. The input terminal TI, output terminal TO, and ground terminal GND have a substantially rectangular shape. The input terminal TI, output terminal TO, and ground terminal GND are used as external terminals for connecting to external equipment.

[0029] The input terminal TI is connected to the input electrode PIN1 located in the dielectric layer LY8 via the input via VIN1. The input electrode PIN1 is a strip-shaped electrode with a roughly G-shape, and the input via VIN1 is connected to its first end. The second end of the input electrode PIN1 is connected to the input electrode PIN2 located in the dielectric layer LY7 via the input via VIN2.

[0030] The input electrode PIN2 is a flat electrode with a substantially rectangular shape, and when the laminate 110 is viewed from the positive Z-axis direction, at least a portion of it overlaps with the flat electrode P11 arranged in the dielectric layer LY6. The flat electrode P11 is a flat electrode with a substantially rectangular shape. The flat electrode P11 and the input electrode PIN2 constitute the capacitor CIN in Figure 2.

[0031] Furthermore, the flat electrode P11 is connected to the ground electrode PG20 located in the dielectric layer LY2 via via V1. Via V1 constitutes the inductor L1 in Figure 2. The ground electrode PG20 is a flat electrode with a substantially rectangular shape, located over almost the entire surface of the dielectric layer LY2. In addition to via V1, via V2 and ground vias VG1, VG2, and VG3 are connected to the ground electrode PG20.

[0032] The ground via VG2 is connected to the ground electrode PG20 and the ground electrode PG10 located in the dielectric layer LY7. The ground electrode PG10 is a flat electrode with a substantially T-shape and is located away from the input electrode PIN2. The ground electrode PG10 is connected by multiple vias to the ground electrode PG5 located in the dielectric layer LY8 and to the ground terminal GND located in the dielectric layer LY9. The ground electrode PG5 is located away from the input electrode PIN1. When the laminate 110 is viewed from the positive Z-axis direction, at least a portion of the ground electrode PG10 overlaps with the flat electrode P11 located in the dielectric layer LY6. The flat electrode P11 and the ground electrode PG10 constitute the capacitor C1 in Figure 2. That is, the via V1, the flat electrode P11 and the ground electrode PG10 constitute the resonant circuit RC1 in Figure 2.

[0033] On the other hand, the output terminal TO is connected to the output electrode PO1 located in the dielectric layer LY8 via the output via VO1. The output electrode PO1 is a strip-shaped electrode with a roughly G-shape and is positioned away from the input electrode PIN1 and the ground electrode PG5. The first end of the output electrode PO1 is connected to the output via VO1. The second end of the output electrode PO1 is connected to the output electrode PO2 located in the dielectric layer LY7 via the output via VO2.

[0034] The output electrode PO2 is a flat electrode with a substantially rectangular shape and is positioned away from the input electrode PIN2. When the laminate 110 is viewed from the positive Z-axis direction, the output electrode PO2 overlaps at least partially with the flat electrode P21 positioned in the dielectric layer LY6. The flat electrode P21 is a flat electrode with a substantially rectangular shape and is positioned away from the flat electrode P11. The flat electrode P21 and the output electrode PO2 constitute the capacitor CO shown in Figure 2.

[0035] Furthermore, the flat electrode P21 is connected to the ground electrode PG20 located in the dielectric layer LY2 via V2. The via V2 constitutes the inductor L2 in Figure 2.

[0036] The ground via VG3 is connected to the ground electrode PG20 and the ground electrode PG10 located in the dielectric layer LY7. The ground electrode PG10 is positioned away from the output electrode PO2. When the laminate 110 is viewed from the positive Z-axis direction, at least a portion of the ground electrode PG10 overlaps with the flat electrode P21 located in the dielectric layer LY6. The flat electrode P21 and the ground electrode PG10 constitute the capacitor C2 in Figure 2. That is, the via V2, the flat electrode P21, and the ground electrode PG10 constitute the resonant circuit RC2 in Figure 2.

[0037] Via V1 of resonant circuit RC1 and via V2 of resonant circuit RC2 are connected by a ground electrode PG20 located in dielectric layer LY2 and a flying electrode P5 located in dielectric layer LY4. The flying electrode P5 is a strip-shaped electrode with a substantially rectangular shape.

[0038] The ground via VG1 is connected to the ground electrode PG20 located in the dielectric layer LY2, the jump electrode P5 located in the dielectric layer LY4, and the ground electrode PG10 located in the dielectric layer LY7. The ground electrode PG5 is located away from the input electrode PIN1 and the output electrode PO1. The inductor L5 in Figure 2 is formed by all or part of the ground via VG1.

[0039] When the laminate 110 is viewed from the positive Z-axis direction in a plan view, the ground electrode PG20 overlaps with the flat electrode P31 placed in the dielectric layer LY3. The flat electrode P31 is a flat electrode with a substantially rectangular shape, and together with the ground electrode PG20, it constitutes the capacitor C3 in Figure 2.

[0040] Furthermore, the flat electrode P31 is connected by via V3 to one end of a strip-shaped flat electrode P341 that extends in the X-axis direction in the dielectric layer LY4. The flat electrode P341 is a strip-shaped electrode with a substantially rectangular shape and is positioned away from the jump electrode P5. The inductor L3 in Figure 2 is formed by via V3 and a portion of the flat electrode P341. Although not shown in Figure 4, the flat electrode P341 placed in the dielectric layer LY4 may be arranged to be stacked across multiple dielectric layers in order to reduce conduction resistance. In this case, the jump electrode P5 placed in the dielectric layer LY4 only needs to be placed in at least one of the multiple dielectric layers.

[0041] The flat electrode P341 is connected to the flat electrode P342 located in the dielectric layer LY6 by via V34. Via V34 constitutes the inductor L34 in Figure 2. The flat electrode P342 is a flat electrode with a substantially rectangular shape and is located spaced apart from the flat electrodes P11 and P21. When the laminate 110 is viewed from the positive Z-axis direction, the flat electrode P342 overlaps with the ground electrode PG10 of the dielectric layer LY7. The flat electrode P342 and the ground electrode PG10 constitute the capacitor C34 in Figure 2. That is, the ground electrode PG20, the flat electrode P31, via V3, a part of the flat electrode P341, via V34, the flat electrode P342, and the ground electrode PG10 constitute the resonant circuit RC3 in Figure 2.

[0042] When the laminate 110 is viewed from the positive Z-axis direction in a plan view, the ground electrode PG20 overlaps with the flat electrode P41 located in the dielectric layer LY3. The flat electrode P41 is a flat electrode with a substantially rectangular shape and is located separately from the flat electrode P31. The flat electrode P41 and the ground electrode PG20 constitute the capacitor C4 in Figure 2.

[0043] Further, the flat electrode P41 is connected to the other end of the flat electrode P341 disposed in the dielectric layer LY4 by the via V4. The inductor L4 in FIG. 2 is formed by a part of the via V4 and the flat electrode P341. That is, the ground electrode PG20, the flat electrode P41, the via V4, a part of the flat electrode P341, the via V34, the flat electrode P342, and the ground electrode PG10 form the resonance circuit RC4 in FIG. 2.

[0044] When the flat electrode P11 of the resonance circuit RC1 and the flat electrode P21 of the resonance circuit RC2 are viewed in plan from the positive direction of the Z axis of the laminate 110, they at least partially overlap with the common electrode P6 disposed in the dielectric layer LY5. The common electrode P6 is a flat electrode having a substantially rectangular shape, and the flat electrode P11, the flat electrode P21, and the common electrode P6 form the capacitor C5 in FIG. 2.

[0045] In the filter device in which the four resonance circuits as described above are arranged, there may be arranged a wiring that directly connects the resonance circuit connected to the input terminal and the resonance circuit connected to the output terminal. In such a configuration, it is possible to change the frequency of either one of the attenuation poles generated at frequencies higher than the passband or the attenuation poles generated at frequencies lower than the passband. Therefore, there is an advantage that the frequency characteristics of the filter device can be made closer to the desired frequency characteristics.

[0046] On the other hand, the wiring forming the capacitive coupling between the resonance circuit connected to the input terminal and the resonance circuit connected to the output terminal can also be coupled to the other two resonance circuits by parasitic capacitance. As a result, an unintended high-pass filter is formed by the parasitic capacitance, and spurious may occur at frequencies higher than the passband. In order to further reduce the spurious of the filter device, it is necessary to eliminate such unintended coupling of the resonance circuits as much as possible.

[0047] Therefore, in the filter device 100 of the embodiment, when the laminate 110 is viewed in a plan view from the positive direction of the Z axis, the flying electrode P5 that connects the resonance circuit RC1 connected to the input terminal and the resonance circuit RC2 connected to the output terminal adopts a configuration that does not overlap with the resonance circuits RC3 and RC4.

[0048] With such a configuration, the coupling between the flying electrode P5 that directly connects the resonance circuit RC1 and the resonance circuit RC2 and the resonance circuits RC3 and RC4 is suppressed. Therefore, it is possible to suppress the unintentional coupling of the resonance circuits while directly connecting the resonance circuit RC1 and the resonance circuit RC2. Further, the resonance circuits RC3 and RC4 substantially function as high-pass filters connected to GND, and can reduce spurious that may occur at frequencies higher than the passband. Thus, in the filter device 100 having a plurality of resonance circuits, the generation of spurious of the filter device 100 can be reduced.

[0049] (3) Filter characteristics Next, using FIGS. 5 and 6, the filter characteristics of the filter device 100 of the embodiment will be described together with a comparative example.

[0050] FIG. 5 is an equivalent circuit diagram of the filter device 100X of the comparative example. Referring to FIG. 5, the filter device 100X includes an input terminal TX, an output terminal TOX, a ground terminal GND, resonance circuits RC1X to RC4X, and a flying wiring L12X. In the filter device 100X, the structures of the resonance circuits RC3 and RC4 in the filter device 100 of the embodiment shown in FIG. 2 are different.

[0051] Each of the resonance circuits RC1X to RC4X is an LC parallel resonance circuit in which an inductor and a capacitor are connected in parallel. The flying wiring L12X connects the resonance circuit RC1X connected to the input terminal TX and the resonance circuit RC2X connected to the output terminal TOX. By providing the flying wiring L12X, it is possible to change either the attenuation pole generated at a frequency higher than the passband or the attenuation pole generated at a frequency lower than the passband. Therefore, the frequency characteristics of the filter device can be made closer to the desired frequency characteristics.

[0052] Capacitor C13X connects resonant circuits RC1X and RC3X. Capacitor C24X connects resonant circuits RC2X and RC4X. Capacitor C12X connects resonant circuits RC1X and RC2X.

[0053] In the filter device 100X, since there are four resonant circuits RC1X to RC4X with similar configurations arranged in a row, the skip wiring L12X may unintentionally couple with the other two resonant circuits RC3X and RC4X. Therefore, if resonant circuits RC1X and RC2X are directly connected by the skip wiring L12X, spurious signals may occur at frequencies higher than the passband.

[0054] Figure 6 is a diagram illustrating the filter characteristics of the filter device 100 of the embodiment and the filter device 100X of the comparative example. In Figure 6, the horizontal axis shows frequency and the vertical axis shows insertion loss. In Figure 6, the solid line SO represents the case of the filter device 100 of the embodiment, and the dashed line SX represents the case of the filter device 100X of the comparative example.

[0055] In the comparative example filter device 100X, each of the resonant circuits RC1X to RC4X is an LC parallel resonant circuit with the same structure, in which an inductor and a capacitor are connected in parallel. A skip wire L12X is provided to connect the resonant circuit RC1X connected to the input terminal and the resonant circuit RC2X connected to the output terminal, but the skip wire L12X may also unintentionally connect the resonant circuits RC3X and RC4X. In addition to the resonant circuits RC1X and RC2X, the resonant circuits RC1X and RC3X are also connected. Furthermore, the resonant circuits RC2X and RC4X are also connected.

[0056] As a result, referring to Figure 6, in the comparative example filter device 100X, a relatively large amount of spurious emissions are generated in the stopband at frequencies higher than the passband PB at 6 to 7 GHz.

[0057] On the other hand, in the filter device 100 of the embodiment, the resonant circuit RC1 connected to the input terminal TI and the resonant circuit RC2 connected to the output terminal TO are LC parallel resonant circuits in which an inductor and a capacitor are connected in parallel. However, the resonant circuits RC3 and RC4 are LC series resonant circuits in which an inductor and a capacitor are connected in series, and have a different configuration from the resonant circuits RC1 and RC2.

[0058] Therefore, in the filter device 100, when the laminate 110 is viewed from the positive direction of the Z axis, the leap electrode P5 connecting the resonant circuit RC1 and the resonant circuit RC2 does not overlap with the resonant circuits RC3 and RC4.

[0059] As a result, although the filter device 100 is also equipped with a jump electrode P5 that couples the resonant circuit RC1 connected to the input terminal and the resonant circuit RC2 connected to the output terminal, it is possible to suppress the unintentional coupling of the jump electrode P5 with the resonant circuits RC3X and RC4X. Furthermore, due to the different structures of the resonant circuits, it is also possible to suppress the coupling between the resonant circuits RC1 and RC2 and the resonant circuits RC3 and RC4.

[0060] As a result, referring to Figure 6, in the filter device 100 of the embodiment, the generation of spurious signals is reduced in the stopband at frequencies higher than the passband PB. In other words, compared to the filter device 100X, the filter device 100 is able to improve the attenuation characteristics of the filter device by reducing the generation of spurious signals in the stopband at frequencies higher than the passband PB.

[0061] In this embodiment, the "upper surface 111 (dielectric layer LY1)" and "lower surface 112 (dielectric layer LY9)" correspond to the "first surface" and "second surface" in this disclosure, respectively. In this embodiment, the "resonant circuits RC1" to "resonant circuits RC4" correspond to the "first resonant circuit" to "fourth resonant circuit" in this disclosure, respectively. In this embodiment, the "ground electrode PG10" and "ground electrode PG20" correspond to the "first ground electrode" and "second ground electrode" in this disclosure, respectively. In this embodiment, the "via V3", "via V4", and "via V34" correspond to the "first via", "second via", and "third via" in this disclosure, respectively. In this embodiment, the "flat electrode P341" corresponds to the "flat electrode" in this disclosure. In the embodiment, "capacitor C3," "capacitor C4," and "capacitor C34" correspond to "second capacitor of third resonant circuit," "second capacitor of fourth resonant circuit," and "third capacitor," respectively, in this disclosure. Furthermore, "flying electrode P5" in the embodiment corresponds to "connecting electrode" in this disclosure.

[0062] (Modified Version) In the modified version, a filter device in which the configuration of the resonant circuits RC3 and RC4 differs from that of the embodiment will be described.

[0063] Figure 7 is an exploded perspective view showing an example of the laminated structure of the modified filter device 100A. Referring to Figure 7, in the filter device 100A, instead of the multiple flat electrode P341 and vias V3 and V4 that are laminated in the dielectric layer LY4 of the filter device 100 shown in Figure 4, flat electrode P341A and vias V3A and V4A are provided. The other configurations in Figure 7 are the same as in Figure 4, and the explanation of redundant elements will not be repeated. The equivalent circuit diagram of the modified filter device 100A is the same as the equivalent circuit diagram of the filter device 100 shown in Figure 2.

[0064] Via V3A connects the flat electrode P31 of the dielectric layer LY3 of the laminate 110A to the flat electrode P341A of the dielectric layer LY5. Via V3A constitutes the inductor L3 in Figure 2.

[0065] Via V4A connects the flat electrode P41 of the dielectric layer LY3 to the flat electrode P341A of the dielectric layer LY5. Via V4A constitutes the inductor L4 in Figure 2.

[0066] In the modified filter device 100A, when the laminate 110 is viewed from the positive Z-axis direction, the leap electrode P5 that directly connects the resonant circuits RC1 and RC2 does not overlap with the resonant circuits RC3 and RC4. This configuration suppresses unintended coupling of the leap electrode P5 with the other two resonant circuits RC3 and RC4. Therefore, even when the leap electrode P5 is positioned, unintended coupling of the resonant circuits can be suppressed, reducing the generation of spurious emissions in the filter device 100A.

[0067] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than by the description of the embodiments above, and all modifications within the meaning and scope of the claims are intended to be included.

[0068] 10 Communication device, 12 Antenna, 20 High-frequency front-end circuit, 22, 28 Bandpass filter, 24 Amplifier, 26 Attenuator, 30 Mixer, 32 Local oscillator, 40 D / A converter, 50 RF circuit, 100, 100A, 100X Filter device, 110, 110A Laminate, C1, C2, C3, C4, C5, C5X, C13X, C24X, C34, CIN, CO Capacitor, DM Directional mark, GND Ground terminal, L1, L2, L3, L4, L5, L34 Inductor, L12X Flyover wiring, LY1, LY2, LY3, LY4, LY5, LY6, LY7, LY8, LY9 Dielectric layer, N12, NI, NO Connection node, P5 Flyover electrode, P6 Common electrodes: P11, P21, P31, P41, P341, P341A, P342 Flat plate electrodes: PG5, PG10, PG20 Ground electrodes: PIN1, PIN2 Input electrodes: PO1, PO2 Output electrodes: RC1X, RC1, RC2X, RC2, RC3X, RC3, RC4X, RC4 Resonant circuit: TI Input terminal: TO Output terminals: V1, V2, V3A, V3, V4A, V4, V34 Vias: VG1, VG2, VG3 Ground vias: VIN1, VIN2 Input vias: VO1, VO2 Output vias.

Claims

1. A laminate having a first surface and a second surface, wherein a plurality of dielectric layers are stacked; an input terminal, an output terminal, and a ground terminal disposed on the second surface of the laminate; a flat plate-shaped first ground electrode disposed inside the laminate and connected to the ground terminal; a flat plate-shaped second ground electrode disposed in the dielectric layer between the first surface and the first ground electrode and connected to the first ground electrode; a first resonant circuit and a second resonant circuit disposed between the first ground electrode and the second ground electrode and connected to the input terminal and the output terminal, respectively; a third resonant circuit and a fourth resonant circuit disposed between the first ground electrode and the second ground electrode; and a connecting electrode connecting the first resonant circuit and the second resonant circuit, wherein each of the first resonant circuit and the second resonant circuit includes a via, one end of which is connected to the second ground electrode and the other end of which is connected to the first ground electrode via a first capacitor. Each of the third and fourth resonant circuits includes an inductor, one end of which is connected to the second ground electrode via a second capacitor, and the other end of which is connected to the first ground electrode via a third capacitor, and when the laminate is viewed in plan from the stacking direction, the connecting electrodes do not overlap with the third and fourth resonant circuits, in a filter device.

2. The filter device according to claim 1, wherein a portion of the inductor of the third resonant circuit is shared with the inductor of the fourth resonant circuit.

3. The filter device according to claim 1 or 2, wherein the third capacitor of the third resonant circuit is shared with the third capacitor of the fourth resonant circuit.

4. The filter device according to claim 3, further comprising: a first via connected to the second capacitor of the third resonant circuit; a second via connected to the second capacitor of the fourth resonant circuit; a flat plate electrode connected to the first via and the second via; and a third via connecting the third capacitor of the third resonant circuit and the fourth resonant circuit to the flat plate electrode, wherein the inductor of the third resonant circuit is formed by the first via, the flat plate electrode and the third via.

5. The filter device according to claim 4, wherein the flat plate electrode is composed of a plurality of stacked electrodes.

6. The filter device according to claim 4, wherein the distance between the first via and the second via is smaller than the distance between the via of the first resonant circuit and the via of the second resonant circuit.

7. The filter device according to any one of claims 1 to 6, wherein the first resonant circuit and the second resonant circuit are LC parallel resonant circuits, and the third resonant circuit and the fourth resonant circuit are LC series resonant circuits.

8. The filter device according to any one of claims 1 to 7, wherein the connecting electrode is connected to the grounding terminal.

9. The filter device according to any one of claims 1 to 8, wherein the first resonant circuit is connected to the input terminal via a fourth capacitor.

10. The filter device according to any one of claims 1 to 9, wherein the second resonant circuit is connected to the output terminal via a fifth capacitor.

11. The filter device according to any one of claims 1 to 10, further comprising a sixth capacitor connected between the first resonant circuit and the second resonant circuit.

12. The filter device according to any one of claims 1 to 11, wherein the path length of the inductor of the third resonant circuit is the same as the path length of the inductor of the fourth resonant circuit.

13. The filter device according to any one of claims 1 to 12, wherein the filter device is a bandpass filter.

14. A high-frequency front-end circuit comprising a filter device according to any one of claims 1 to 13.

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