Rear-contact crystalline silicon solar cell
The rear electrode crystalline silicon solar cell with a TOPCon structure addresses shadow loss and absorption issues by eliminating the front electrode, enhancing efficiency through improved light absorption and reduced recombination.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- KOES
- Filing Date
- 2025-12-16
- Publication Date
- 2026-07-02
AI Technical Summary
Conventional solar cells with front and rear electrodes suffer from shadow loss due to the front electrode, reducing power generation efficiency, and TOPCon structures on the front side cause absorption loss, while heterojunctions face interface defects and recombination issues.
A rear electrode crystalline silicon solar cell with a TOPCon structure that eliminates the front electrode, utilizing a crystalline n-type silicon substrate with passivation layers and anti-reflection films, and polysilicon semiconductors to enhance light absorption and minimize recombination, with electrodes on the rear surface.
The solution eliminates shadow loss, improves photoelectric conversion efficiency by increasing light absorption, and enhances quantum efficiency and open-circuit voltage, while reducing recombination and interface defects.
Smart Images

Figure KR2025021767_02072026_PF_FP_ABST
Abstract
Description
Back electrode crystalline silicon solar cell
[0001] The present invention relates to a rear electrode crystalline silicon solar cell, and more specifically, to a rear electrode crystalline silicon solar cell based on a TOPCon silicon solar cell structure to achieve optimal efficiency, with an electrode installed on the rear surface and a passivation layer formed on the upper and lower surfaces of a silicon substrate.
[0002] Recently, the importance of developing next-generation clean energy has been increasing due to serious environmental pollution problems and the depletion of fossil fuels. Among these, solar cells, which are devices that directly convert solar energy into electrical energy, are expected to be an energy source capable of solving future energy problems due to their low pollution, infinite resources, and semi-permanent lifespan.
[0003] These solar cells are key components of photovoltaic power generation that directly convert sunlight into electricity. They can be described as diodes that are basically composed of a pn junction. Depending on the properties of the p-region and n-region used in the PN junction, they can be classified into homojunctions and heterojunctions. Among these, a heterojunction refers to a case where materials with different crystal structures are combined or different materials are combined.
[0004] In connection with the above, if we look at the process in which sunlight is converted into electricity by a solar cell, sunlight is incident on the pn junction of the solar cell to generate electron-hole pairs, and due to the electric field, electrons move to the n-layer and holes move to the p-layer, thereby generating photovoltaic power between the pn junctions. At this time, if a load or system is connected to both ends of the solar cell, current flows, and power can be produced.
[0005] In addition, silicon solar cells using crystalline silicon substrates were the earliest to be commercialized and are still widely used today. Furthermore, heterojunction silicon solar cells have been developed by forming an amorphous-crystalline PN junction structure by depositing an amorphous silicon layer as an emitter layer on a crystalline silicon substrate. These amorphous-crystalline heterojunction silicon solar cells have attracted significant attention as they can be fabricated at lower temperatures compared to conventional diffuse crystalline silicon solar cells and possess improved efficiency. However, there are issues such as the characteristics being significantly affected by defect density occurring at the interface between the amorphous layer and the crystalline layer, and problems such as recombination occurring at the point where the substrate and the electrode meet.
[0006] To solve these problems, a silicon solar cell of the TOPCon (Tunnel Oxide Passivated Contact) type was developed, in which a PN junction is formed using a crystalline silicon substrate and a polysilicon thin film, with a tunnel oxide passivation layer placed between them. The TOPCon type is a structure in which the tunnel oxide passivation layer separates the electrode and the polysilicon layer, i.e., the semiconductor layer, thereby minimizing recombination at the electrode and allowing electrons and holes to flow using the tunneling effect.
[0007] However, when a TOPCon structure in which a tunnel oxide passivation layer is positioned between a crystalline silicon substrate and a polysilicon thin film is applied to the front side of a silicon solar cell, there is a disadvantage in that power generation characteristics deteriorate due to absorption loss caused by parasitic absorption of the polysilicon layer.
[0008] Meanwhile, conventional solar cells generally have a structure in which a p-type silicon thin film (p-type semiconductor layer) is formed on an n-type silicon substrate, and this p-type silicon thin film is formed by doping with p-type impurities. Accordingly, the lower part of the silicon substrate remains as an n-type semiconductor layer, while the upper part forms a p-type semiconductor layer, thereby constituting a pn junction. Additionally, metal electrodes are formed on the front and back surfaces of the silicon substrate to capture holes and electrons generated by the pn junction.
[0009] However, conventional charge-selective junction solar cells have a problem in that they have a front electrode and a back electrode, and the front electrode causes shadow loss of sunlight, thereby reducing power generation efficiency.
[0010] The present invention is a technology devised to solve the problems associated with the aforementioned prior art. Since conventional solar cells have a front electrode and a rear electrode, the front electrode causes shadow loss of sunlight, which lowers power generation efficiency. Therefore, the main objective of the present invention is to provide a rear electrode crystalline silicon solar cell that not only eliminates shadow loss caused by the front electrode but also enables optimal efficiency based on a TOPCon silicon solar cell structure.
[0011] To achieve the aforementioned intended purpose, the present invention comprises: a crystalline n-type silicon substrate (10) having a first conductivity type; a first passivation layer (20) formed on the upper surface of the silicon substrate (10); a second passivation layer (30) formed on the lower surface of the silicon substrate (10); a first anti-reflection film (40) formed on the upper surface of the first passivation layer (20); a p-type first semiconductor (50) formed on one side of the lower surface of the second passivation layer (30); an n-type semiconductor (60) formed at the center of the lower surface of the second passivation layer (30) and formed on the other side of the p-type first semiconductor (50); a p-type second semiconductor (70) formed on the other side of the lower surface of the second passivation layer (30) and formed on the other side of the n-type semiconductor (60); and the p-type A rear electrode crystalline silicon solar cell is provided, characterized by comprising: a third passivation layer (80) formed to cover the lower portions of a first semiconductor (50), an n-type semiconductor (60), and a p-type second semiconductor (70); a second anti-reflection film (90) formed on the lower surface of the third passivation layer (80); and an electrode (100) formed to contact the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type second semiconductor (70), respectively.
[0012] In addition, the first passivation layer (20), the second passivation layer (30), and the third passivation layer (80) of the present invention are SIOC x It is characterized by being composed including
[0013] In addition, the n-type silicon substrate (10) of the present invention is characterized by comprising an n-type oxide layer (12) formed to be positioned between the first passivation layer (20).
[0014] The rear electrode crystalline silicon solar cell according to the present invention, as described above, can eliminate shadow loss caused by the front electrode by not installing a front electrode, and can achieve the effect of exhibiting optimal efficiency based on the TOPCon silicon solar cell structure.
[0015] In addition, the present invention can achieve the effect of improving photoelectric conversion efficiency by increasing light absorption through the formation of a passivation layer having a large bandgap energy on the light-receiving surface, i.e., the upper surface of the silicon substrate, where sunlight is incident.
[0016] FIG. 1 is a schematic diagram showing the structure of a solar cell according to a preferred embodiment of the present invention.
[0017] *Detailed explanation of the main symbols in the drawing*
[0018] 10 : n-type silicon substrate
[0019] 12 : n-type oxide layer
[0020] 20: First passivation layer
[0021] 30 : Second passivation layer
[0022] 40 : 1st anti-reflective film
[0023] 50 : p-type first semiconductor
[0024] 60 : n-type semiconductor
[0025] 70 : p-type second semiconductor
[0026] 80 : Third passivation layer
[0027] 90 : Second anti-reflective layer
[0028] 100 : Electrode
[0029] The present invention relates to a rear electrode crystalline silicon solar cell, and more specifically, to a rear electrode crystalline silicon solar cell based on a TOPCon silicon solar cell structure to achieve optimal efficiency, with an electrode installed on the rear surface and a passivation layer formed on the upper and lower surfaces of a silicon substrate (10).
[0030] The rear electrode crystalline silicon solar cell of the present invention as described above comprises: a crystalline n-type silicon substrate (10) having a first conductivity type; a first passivation layer (20) formed on the upper surface of the silicon substrate (10); a second passivation layer (30) formed on the lower surface of the silicon substrate (10); a first anti-reflection film (40) formed on the upper surface of the first passivation layer (20); a p-type first semiconductor (50) formed on one side of the lower surface of the second passivation layer (30); an n-type semiconductor (60) formed at the center of the lower surface of the second passivation layer (30) and formed on the other side of the p-type first semiconductor (50); a p-type second semiconductor (70) formed on the other side of the lower surface of the second passivation layer (30) and formed on the other side of the n-type semiconductor (60); and the p-type The apparatus is characterized by comprising: a third passivation layer (80) formed to cover the lower portions of a first semiconductor (50), an n-type semiconductor (60), and a p-type second semiconductor (70); a second anti-reflection film (90) formed on the lower surface of the third passivation layer (80); and an electrode (100) formed to contact each of the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type second semiconductor (70).
[0031] In addition, the first passivation layer (20), the second passivation layer (30), and the third passivation layer (80) of the present invention are SIOC x It is characterized by being composed including
[0032] In addition, the n-type silicon substrate (10) of the present invention is characterized by comprising an n-type oxide layer (12) formed to be positioned between the first passivation layer (20).
[0033] The present invention will be described in more detail below with reference to the drawings.
[0034] Figure 1 is a schematic diagram illustrating a rear electrode crystalline silicon solar cell according to an embodiment of the present invention. Referring to Figure 1, the solar cell of the present invention comprises an n-type silicon substrate (10), a first passivation layer (20) formed on the upper surface of the n-type silicon substrate (10), a first anti-reflection film (40) formed on the upper surface of the first passivation layer (20), a second passivation layer (30) formed on the lower surface of the n-type silicon substrate (10), a p-type first semiconductor (50) formed on one side of the lower surface of the second passivation layer (30), an n-type semiconductor (60) formed in the center of the lower surface of the second passivation layer (30), a p-type second semiconductor (70) formed on the other side of the lower surface of the second passivation layer (30), and the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type It is configured to include a third passivation layer (80) formed to cover the lower part of the second semiconductor (70), a second anti-reflection film (90) formed on the lower surface of the third passivation layer (80), and three electrodes (100) formed to contact the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type second semiconductor (70), respectively.
[0035] The above n-type silicon substrate (10) is a crystalline silicon wafer and can be doped with an n-type, i.e., n-type or p-type, i.e., p-type dopant, but in the present invention, it is doped with an n-type dopant to form the structure of a TOPCon solar cell.
[0036] The above n-type silicon substrate (10) has a structure in which an uneven surface is formed on one side, namely the upper surface, so as to maximize the area for absorbing sunlight, and the uneven structure can reduce optical loss of the solar cell by increasing the amount of light captured by lowering the reflectivity of sunlight incident on the solar cell.
[0037] The first passivation layer (20) is formed on the light-receiving surface of the n-type silicon substrate (10), that is, the upper surface, or on the upper surface of the n-type oxide layer (12) to be described in detail later, to prevent the recombination of photocharges generated by the incidence of sunlight, and to reduce defects that may occur as the first anti-reflection film (40), to be described in detail later, is formed directly on the n-type silicon substrate (10). This first passivation layer (20) is SIOC x It can be formed including.
[0038] To add further explanation, SIOC x Compared to a-Si used as a conventional passivation layer, the bandgap energy is large, so the light absorption coefficient is small. Accordingly, the absorption rate of incident light by the first passivation layer (20) is reduced, so the amount of light incident on the n-type silicon substrate (10) can be increased.
[0039] Meanwhile, a-Si, which was conventionally used as a passivation layer, had the disadvantage that when a large amount of hydrogen (H) was added to improve the band gap energy, a large number of porous structures were generated, causing a deterioration in the film properties of the passivation layer and making it difficult to improve the band gap energy to 1.8 eV or higher.
[0040] In contrast, SiOC according to the present invention x The first passivation layer (20) including the band gap energy can be formed to be 1.8 eV or higher, and accordingly, the absorption rate of light of 800 nm or less by the first passivation layer (20) can be reduced compared to the conventional method.
[0041] However, if the band gap energy of the first passivation layer (20) is formed to be greater than 2.25 eV, the film characteristics of the first passivation layer (20) formed by the added impurities may be degraded, so it is preferable that the band gap energy of the first passivation layer (20) be 1.8 eV to 2.25 eV.
[0042] According to the present invention, the first passivation layer (20) is SiOC x In the case where it is formed including, the short-circuit current (Jsc) is higher than in the conventional case, and the amount of incident light absorbed by the first passivation layer (20) is reduced, and at the same time, the recombination current is effectively suppressed.
[0043] In addition, as the bandgap energy of the first passivation layer (20) is improved, the quantum efficiency (QE) also increases. As described above, since the first passivation layer (20) has improved bandgap energy, the photoelectric conversion efficiency of the solar cell increases with increasing light intensity incident into the solar cell.
[0044] A first anti-reflection film (40), which will be described in detail later, may be positioned on the first passivation layer (20) above to reduce the reflectivity of sunlight incident on the light-receiving surface of the n-type silicon substrate (10). When the reflectivity of sunlight is reduced, the amount of light reaching the PN junction increases, and the short-circuit current (Isc) of the solar cell may increase, and accordingly, the conversion efficiency of the solar cell may be improved.
[0045] In connection with the above, the n-type silicon substrate (10) is configured to include an n-type oxide layer (12) formed before the first passivation layer (20) is formed so as to be positioned between the first passivation layer (20).
[0046] The above n-type oxide layer (12) is formed as a p-type in the existing TOPCon solar cell structure, but in the present invention, a p-type first semiconductor (50) or a p-type second semiconductor (70) that can replace the p-type oxide layer acting as an emitter is formed on the lower surface of the second passivation layer (30), that is, the lower surface of the n-type silicon substrate (10), so that an electrode (100) to be described in detail later can be formed on the rear surface.
[0047] The above n-type oxide layer (12) can perform passivation by selectively tunneling holes, and the interfacial trap charge density at the interface with the p-type silicon substrate can be reduced so that interfacial bonding can occur, and in contrast, it can be formed on the surface of the n-type silicon substrate (10) of the present invention to reduce interfacial defects.
[0048] The first anti-reflection film (40) may have a single film selected from the group consisting of, for example, silicon nitride film, silicon nitride film containing hydrogen, silicon oxide film, silicon oxide nitride film, MgF2, ZnS, TiO2 and CeO2, or a multilayer film structure in which two or more films are combined, and the first anti-reflection film (40) may be formed by vacuum deposition, chemical vapor deposition, spin coating, screen printing or spray coating, but is not limited thereto.
[0049] Additionally, the first anti-reflection film (40) may be formed from In2O3, SnO2, CuO, graphene, ZnO, indium tin oxide (ITO), IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), IrOx, RuOx, and combinations thereof to form a transparent electrode.
[0050] The second passivation layer (30) is formed on the lower surface of the n-type silicon substrate (10) to increase the nucleation sites for the deposition of the p-type first semiconductor (50), n-type semiconductor (60), and p-type second semiconductor (70), which will be described in detail later.
[0051] This second passivation layer (30) is a-SIOC, just like the second passivation layer (30) described above. x It can be formed including.
[0052] The above p-type first semiconductor (50) is p + It is a poly-Si layer and forms a homojunction with an n-type silicon substrate (10), and the band gap at the interface with the n-type silicon substrate (10) is increased, thereby improving the open-circuit voltage (Voc) of the solar cell.
[0053] The above n-type semiconductor (60) is n + It is a poly-Si layer and forms a homojunction with an n-type silicon substrate (10), and electrons of the n-type silicon substrate (10) are transferred.
[0054] The above p-type second semiconductor (70) is p + It is a poly-Si layer and forms a homojunction with an n-type silicon substrate (10), and, similar to the p-type first semiconductor (50), the band gap at the interface with the n-type silicon substrate (10) is increased, thereby improving the open-circuit voltage (Voc) of the solar cell.
[0055] At this time, the p-type first semiconductor (50) and the n-type semiconductor (60) are installed to be in contact, and the n-type semiconductor (60) and the p-type second semiconductor (70) are installed to be in contact. Accordingly, either the p-type first semiconductor (50) or the p-type second semiconductor (70) becomes an emitter, and either the p-type first semiconductor (50) or the p-type second semiconductor (70) that is not an emitter becomes a collector, so that electrons acting as carriers move, thereby preventing electrodes from being installed on the front surface of the n-type silicon substrate (10), thus improving power generation efficiency.
[0056] The third passivation layer (80) is formed to cover the lower portions of the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type second semiconductor (70), so that the bonding force between the electrode (100), which will be described in detail later, and the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type second semiconductor (70) can be stably formed.
[0057] This third passivation layer (80) is a-SIOC, just like the first passivation layer (20) and second passivation layer (30) described above. x It can be formed including.
[0058] The second anti-reflection film (90) described above, like the first anti-reflection film (40) described above, may have a single film selected from the group consisting of silicon nitride film, silicon nitride film containing hydrogen, silicon oxide film, silicon oxide nitride film, MgF2, ZnS, TiO2 and CeO2, or a multilayer film structure in which two or more films are combined, and the second anti-reflection film (90) may be formed by vacuum deposition, chemical vapor deposition, spin coating, screen printing or spray coating, but is not limited thereto.
[0059] Additionally, the second anti-reflection film (90) may be formed from In2O3, SnO2, CuO, graphene, ZnO, indium tin oxide (ITO), IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), IrOx, RuOx, and combinations thereof to form a transparent electrode.
[0060] The above second anti-reflection film (90), together with the previously described first anti-reflection film (40), minimizes the reflection of light introduced into the n-type silicon substrate (10), thereby improving efficiency.
[0061] The above electrode (100) can be formed by a method of forming a metal electrode commonly used in solar cell manufacturing processes, and the electrode (100) can be formed in a bar shape or a grid shape. The electrode (100) can be formed from, for example, but not limited to, gold, silver, copper, aluminum, nickel, or palladium alone or as an alloy.
[0062] The electrode (100) is electrically connected to the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type second semiconductor (70), respectively, so that electrons and holes collected from the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type second semiconductor (70) can be moved to the outside.
[0063] In the present invention, the bonding strength between the p-type first semiconductor (50), the n-type semiconductor (60), the p-type second semiconductor (70), and the electrode (100) can be improved through the formation of the previously described third passivation layer (80), so the transparent electrode layer used in the past is not formed.
[0064] The above description refers to preferred embodiments of the present invention, and the present invention is not limited to the above embodiments. A person skilled in the art to which the present invention pertains may implement the invention with various modifications within the scope of the gist of the invention without departing from the above embodiments.
Claims
1. A crystalline n-type silicon substrate (10) having a first conductivity type; and A first passivation layer (20) formed on the upper surface of the n-type silicon substrate (10); and A second passivation layer (30) formed on the lower surface of the n-type silicon substrate (10); and A first anti-reflection film (40) formed on the upper surface of the first passivation layer (20); and A p-type first semiconductor (50) formed on one side of the lower surface of the second passivation layer (30); and An n-type semiconductor (60) formed at the center of the lower surface of the second passivation layer (30), and formed on the other side of the p-type first semiconductor (50); and A p-type second semiconductor (70) formed on the other side of the lower surface of the second passivation layer (30) and formed on the other side of the n-type semiconductor (60); and A third passivation layer (80) formed to cover the lower portions of the above-mentioned p-type first semiconductor (50), n-type semiconductor (60), and p-type second semiconductor (70); and A second anti-reflection film (90) formed on the lower surface of the third passivation layer (80); and A rear electrode crystalline silicon solar cell characterized by comprising: an electrode (100) formed to contact the p-type first semiconductor (50), the n-type semiconductor (60), and the p-type second semiconductor (70), respectively.
2. In Paragraph 1, The above first passivation layer (20), second passivation layer (30) and third passivation layer (80) are SIOC x A back electrode crystalline silicon solar cell characterized by being composed including 3. In Paragraph 1, The above n-type silicon substrate (10) is A rear electrode crystalline silicon solar cell characterized by comprising: an n-type oxide layer (12) formed to be positioned between the first passivation layer (20).