Systems and methods for directing power to an edge ring from a nonsinusoidal bias supply
By employing a phase-delayed control system with main and TES NSB power supplies, the uniformity of plasma processing is improved, addressing edge defects and enhancing wafer yield in plasma processing systems.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- LAM RES CORP
- Filing Date
- 2025-12-15
- Publication Date
- 2026-07-02
AI Technical Summary
In plasma processing systems, the semiconductor wafer is not processed uniformly due to asymmetrical power distribution caused by chamber capacitances, leading to edge defects such as tilt and ellipticity, which are exacerbated by the coupling between the edge ring and the electrostatic chuck.
Implementing a system with a main and tunable edge sheath (TES) nonsinusoidal bias (NSB) power supply, controlled by a phase delay to align wafer and edge ring voltages, using capacitive dividers and shunt capacitors to mitigate chamber capacitance effects, and actively controlling power distribution through phase shifts.
This approach enhances the control over edge ring voltage, reduces edge defects, and improves wafer yield by ensuring uniform plasma processing across the wafer.
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