Semiconductor devices with field relief dielectric structures
WO2026142914A1PCT designated stage Publication Date: 2026-07-02TEXAS INSTRUMENTS INC
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- TEXAS INSTRUMENTS INC
- Filing Date
- 2025-12-18
- Publication Date
- 2026-07-02
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Figure US2025060222_02072026_PF_FP_ABST
Abstract
Semiconductor devices and fabrication methods thereof are described. For example, a semiconductor device (100) includes a source region (130) and a drain region (118) spaced apart in a semiconductor layer (104), a gate dielectric layer (120) on a top surface of the semiconductor layer (104) and extending from the source region (130) toward the drain region (118), and a field relief dielectric structure over the semiconductor layer (104) and extending from the gate dielectric layer (120) toward the drain region (118). The field relief dielectric structure includes a dielectric layer (124) and a local oxidation of silicon (LOCOS) layer (122) between the dielectric layer (124) and the semiconductor layer (104), the LOCOS layer (122) extending below the top surface of the semiconductor layer (104) by no more than 10 nanometers.
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