Pixel driving circuit and display device

By introducing voltage division processing of storage capacitors and auxiliary capacitors into the pixel driving circuit, the problem of limited display performance in traditional pixel circuits is solved, achieving a wider grayscale range and finer brightness control, thus improving the display quality of the display device.

WO2026145390A1PCT designated stage Publication Date: 2026-07-09QINGDAO GOERPIXELS TECHNOLOGY CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
QINGDAO GOERPIXELS TECHNOLOGY CO LTD
Filing Date
2025-12-29
Publication Date
2026-07-09

AI Technical Summary

Technical Problem

In traditional pixel circuits, analog programming voltage is directly written to the gate of the driver module, which limits the display performance of the display device.

Method used

A pixel driving circuit is employed, including a driving transistor, a sampling transistor, an initialization transistor, a capacitor assembly, a light-emitting control transistor, and a reset transistor. By using voltage division processing of storage capacitor and auxiliary capacitor, the influence of data voltage on driving current is reduced, thereby expanding the grayscale range.

Benefits of technology

It improves the display performance of the display device, expands the grayscale range, and achieves more precise brightness control and improved display quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to the technical field of display, and discloses a pixel driving circuit and a display device. The pixel driving circuit comprises a driving transistor, a sampling transistor, an initialization transistor, a capacitor assembly, a light-emitting control transistor, a reset transistor, and a light-emitting element. The capacitor assembly comprises a storage capacitor and an auxiliary capacitor; a first electrode plate of the storage capacitor and a gate of the driving transistor are separately connected to a first node; a second electrode plate of the storage capacitor, a first electrode plate of the auxiliary capacitor, and a source of the driving transistor are separately connected to a second node; and the sampling transistor is connected between a second electrode plate of the auxiliary capacitor and a data signal line. In this way, in a programming phase, a data voltage on a data signal line is divided by means of a storage capacitor and an auxiliary capacitor, so that the impact of the data voltage on a driving current outputted by a driving transistor in a light-emitting phase is reduced, and the voltage range of the data voltage is expanded, and thus the grayscale range can be effectively expanded, thereby improving the display performance of the display device.
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Description

Pixel driving circuit and display device

[0001] This application claims priority to Chinese Patent Application No. 202411980782.X, filed on December 30, 2024, entitled "Pixel Driving Circuit and Display Device", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of display technology, and in particular to a pixel driving circuit and display device. Background Technology

[0003] With the development of display technology, light-emitting display technologies such as active matrix organic light-emitting diode (AMOLED), silicon-based OLED (microOLED), and quantum dot light-emitting diode (QLED) have been widely used in smartphones, wearable devices, televisions and other fields due to their unique advantages such as high contrast, wide viewing angle, low power consumption and the ability to achieve flexible displays.

[0004] In traditional pixel circuits, analog programming voltage is typically written directly to the controlled terminal of the driver module, thereby driving the light-emitting element to emit light, which limits the display performance of the display device.

[0005] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention

[0006] The main objective of this application is to provide a pixel driving circuit and a display device, which aims to improve the display performance of the display device.

[0007] To achieve the above objectives, this application proposes a pixel driving circuit, including a driving transistor, a sampling transistor, an initialization transistor, a capacitor assembly, a light-emitting control transistor, a reset transistor, and a light-emitting element;

[0008] The capacitor assembly includes a storage capacitor and an auxiliary capacitor; the first plate of the storage capacitor and the gate of the driving transistor are respectively connected to a first node; the second plate of the storage capacitor, the first plate of the auxiliary capacitor, and the source of the driving transistor are respectively connected to a second node.

[0009] The sampling transistor is connected between the second plate of the auxiliary capacitor and the data signal line;

[0010] The initialization transistor is connected between the first node and the initialization voltage terminal;

[0011] The light-emitting control transistor is connected between the second node and the first power supply;

[0012] The first electrode of the light-emitting element is connected to the drain of the driving transistor, and the second electrode of the light-emitting element is connected to the second power supply.

[0013] The reset transistor is connected between the first electrode of the light-emitting element and the reset power supply.

[0014] In one embodiment, the initialization transistor is configured to turn off during the light-emitting phase of each duty cycle to float the first node.

[0015] In one embodiment, the sampling transistor is configured to turn on during the initialization phase and threshold voltage extraction phase of each operating cycle to write the first voltage transmitted by the data signal line into the second plate of the auxiliary capacitor.

[0016] In one embodiment, the sampling transistor is configured to turn on during the programming phase of each duty cycle to write the data voltage transmitted by the data signal line to the second plate of the auxiliary capacitor, and to correlate the voltage of the second node with the difference between the data voltage and the first voltage, and the voltage division factor of the storage capacitor in the capacitor assembly, through the capacitor assembly.

[0017] In one embodiment, the light-emitting control transistor is configured to be turned off during the threshold voltage extraction phase and the programming phase of each duty cycle to float the second node; and,

[0018] During the light-emitting phase of each working cycle, the storage capacitor is used to make the voltage of the first node correlated with the difference between the data voltage and the first voltage.

[0019] In one embodiment, the reset transistor is configured to be turned on during a threshold voltage extraction phase of each operating cycle, such that the threshold voltage of the drive transistor is stored in the storage capacitor at the end of the threshold voltage extraction phase.

[0020] In one embodiment, during the programming phase of each operating cycle, the voltage stored in the storage capacitor is also related to the threshold voltage of the driving transistor.

[0021] In one embodiment, the light-emitting control transistor is configured to turn on during the initialization phase of each operating cycle to write a first power supply voltage to the second node.

[0022] In one embodiment, the initialization transistor is turned on during the initialization phase, the threshold voltage extraction phase, and the programming phase of each operating cycle to write the initialization voltage to the first node.

[0023] In addition, to achieve the above objectives, this application also proposes a display device, including the aforementioned pixel driving circuit, as well as a scanning circuit, a source driving circuit, and a light emission control circuit.

[0024] The scanning circuit is connected to the gate of the initialization transistor, the gate of the sampling transistor, and the gate of the reset transistor via scan lines.

[0025] The source drive circuit is connected to the sampling transistor via the data signal line;

[0026] The light-emitting control circuit is connected to the gate of the light-emitting control transistor via a light-emitting control signal line.

[0027] The pixel driving circuit proposed in this application can perform voltage division processing on the data voltage transmitted by the data signal line through the storage capacitor and auxiliary capacitor during the programming stage of each working cycle. This reduces the impact of the data voltage on the driving current output by the driving transistor during the light emission stage, expands the voltage range of the data voltage, and thus effectively expands the grayscale range, which is beneficial to improving the display performance of the display device. Attached Figure Description

[0028] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0029] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 is a schematic diagram of the circuit structure provided in an embodiment of the pixel driving circuit of this application;

[0031] Figure 2 is a timing diagram of the pixel driving circuit of this application in a specific embodiment;

[0032] Figure 3 is a schematic diagram of the current flow of the pixel driving circuit in this application during the initialization stage;

[0033] Figure 4 is a schematic diagram of the current flow of the pixel driving circuit in the threshold voltage extraction stage of this application;

[0034] Figure 5 is a schematic diagram of the current flow of the pixel driving circuit in the programming stage of this application;

[0035] Figure 6 is a schematic diagram of the current flow of the pixel driving circuit in the light-emitting stage of this application.

[0036] Explanation of reference numerals: M1, driving transistor; M4, sampling transistor; M5, initialization transistor; M2, light-emitting control transistor; M3, reset transistor; D1, light-emitting element; CS, storage capacitor; C1, auxiliary capacitor; DL[m], data signal line; Vini, initialization voltage; VDD, first power supply voltage; VSS, second power supply voltage; VAR, reset power supply voltage; VDIM, first voltage; Vdata, data voltage; SCAN[n] scan line; EM[n] light-emitting control line; T1, initialization stage; T2, threshold voltage extraction stage; T3, programming stage; T4, light-emitting stage.

[0037] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0038] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0039] In all embodiments of this application, the transistors used (e.g., driving transistor M1, light-emitting control transistor M2, reset transistor M3, sampling transistor M4, and initialization transistor M5) can be thin-film transistors, field-effect transistors, silicon-based devices, TFT devices, or other devices with similar characteristics. In the embodiments of this application, to distinguish the two terminals of the transistor other than the gate, one terminal is referred to as the first terminal, and the other as the second terminal. In actual operation, the first terminal can be the drain, and the second terminal can be the source; or, the first terminal can be the source, and the second terminal can be the drain.

[0040] In describing some embodiments, the terms "coupled" and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. However, the term "connected" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0041] With the development of display technology, light-emitting display technologies such as active matrix organic light-emitting diode (AMOLED), silicon-based OLED (microOLED), and quantum dot light-emitting diode (QLED) have been widely used in smartphones, wearable devices, televisions and other fields due to their unique advantages such as high contrast, wide viewing angle, low power consumption and the ability to achieve flexible displays.

[0042] In traditional pixel circuits, the analog programming voltage is usually written directly into the gate of the driving transistor M1, which in turn drives the light-emitting element D1 to emit light, thus limiting the display performance of the display device.

[0043] To address the aforementioned problems, this application proposes a pixel driving circuit. Referring to FIG1, the pixel driving circuit of this application embodiment includes a driving transistor M1, a sampling transistor M4, an initialization transistor M5, a capacitor assembly, a light-emitting control transistor M2, a reset transistor M3, and a light-emitting element D1. The capacitor assembly includes a storage capacitor CS and an auxiliary capacitor C1. The first plate of the storage capacitor CS and the gate of the driving transistor M1 are respectively connected to a first node N1. The second plate of the storage capacitor CS, the first plate of the auxiliary capacitor C1, and the source of the driving transistor M1 are respectively connected to a second node N2. The sampling transistor M4 is connected between the second plate of the auxiliary capacitor C1 and the data signal line DL[m]. The initialization transistor M5 is connected between the first node and the initialization voltage terminal Vini. The light-emitting control transistor M2 is connected between the second node and a first power supply. The first electrode of the light-emitting element D1 is connected to the drain of the driving transistor M1, and the second electrode of the light-emitting element D1 is connected to a second power supply. The reset transistor M3 is connected between the first electrode of the light-emitting element D1 and the reset power supply.

[0044] In this embodiment, the data signal line DL[m] is used for time-division multiplexing of the data voltage Vdata and the first voltage VDIM. The sampling transistor M4 is connected between the second plate of the auxiliary capacitor C1 and the data signal line DL[m]. Specifically, the first terminal of the sampling transistor M4 is connected to the data signal line DL[m], the second terminal of the sampling transistor M4 is connected to the second plate of the auxiliary capacitor C1, and the gate of the sampling transistor M4 is connected to the scan line SCAN[n]. When the sampling transistor M4 receives the scan signal output from the scan line SCAN[n], the sampling transistor M4 will turn on or off according to the specific level of the scan signal. When the sampling transistor M4 is on, it samples the data voltage Vdata or the first voltage VDIM currently transmitted by the data signal line DL[m] to the second plate of the auxiliary capacitor C1.

[0045] In this embodiment, the first plate of the storage capacitor CS and the gate of the driving transistor M1 are connected to the first node N1, respectively; the second plate of the storage capacitor CS, the first plate of the auxiliary capacitor C1, and the source of the driving transistor M1 are connected to the second node N2, so that the storage capacitor CS and the auxiliary capacitor C1 are connected in series to form a capacitor voltage divider circuit, which can divide the data voltage Vdata transmitted by the data signal line DL[m]. Due to the addition of the auxiliary capacitor C1, the influence of the data voltage Vdata on the driving current provided by the driving transistor M1 during the light-emitting stage T4 can be reduced when the data voltage Vdata is written, thus expanding the voltage range of the data voltage Vdata. That is, the brightness of the light-emitting element D1 can be controlled using a wider range of data voltage Vdata, thereby allowing for finer brightness control and effectively expanding the grayscale range, which is beneficial to improving the display performance of the display device. In this embodiment, the capacitance values ​​of the storage capacitor CS and the auxiliary capacitor C1 can be set to be equal, and the capacitance ratio of the storage capacitor to the auxiliary capacitor C1 can also be set to 1:2 or 1:3, etc. The specific capacitance values ​​and capacitance ratio of the storage capacitor and the auxiliary capacitor C1 can be optimized and selected according to the specific circuit design requirements, and are not limited here. When the data voltage Vdata output by the data signal line DL[m] is applied to the second plate of the auxiliary capacitor C1, the voltage of the second node N2 can be precisely controlled due to the voltage division effect of the auxiliary capacitor C1. Since the first plate of the auxiliary capacitor C1 and the source of the driving transistor M1 are both connected to the second node N2, the potential difference between the gate and source of the driving transistor M1 can be adjusted during the non-light-emitting period.

[0046] In this embodiment, the first power supply provides a first power supply voltage VDD, and the second power supply provides a second power supply voltage VSS. Together, they provide the necessary voltage difference for the light-emitting element D1 to emit light. In this embodiment, the light-emitting control transistor M2 is connected between the second node N2 and the first power supply. Specifically, the first terminal of the light-emitting control transistor M2 is connected to the first power supply, the second terminal of the light-emitting control transistor M2 is connected to the source of the driving transistor M1, and the gate of the light-emitting control transistor M2 is connected to the light-emitting control line EM[n]. When the light-emitting control transistor M2 receives the second scan signal light-emitting control signal output from the light-emitting control line EM[n], it will turn on or off according to the specific level of the second scan signal light-emitting control signal.

[0047] In this embodiment, the light-emitting element D1 may include an organic light-emitting diode (OLED), a silicon-based OLED (microOLED), a quantum dot light-emitting diode (QLED), or other types of light-emitting elements D1. It emits light under the influence of the driving current provided by the driving transistor M1, and the corresponding brightness is directly determined by this driving current. In at least one embodiment of this application, the light-emitting element D1 is connected to the second terminal of the driving transistor M1 through its first electrode, and the second electrode of the light-emitting element D1 is connected to a second power supply to form a complete current path. When the driving current increases, the brightness of the light-emitting element D1 increases accordingly; conversely, when the driving current decreases, the brightness decreases.

[0048] In this embodiment, the initialization voltage terminal Vini can output a preset initial voltage value Vini to reset or initialize the internal state of the driving transistor M1. The initialization transistor M5 is connected between the first node N1 and the initialization voltage terminal Vini. Specifically, the first terminal of the initialization transistor M5 is connected to the first node N1, the second terminal of the initialization transistor M5 is connected to the initialization voltage terminal Vini, and the gate of the initialization transistor M5 is connected to the scan line SCAN[n]. When the initialization transistor M5 receives the scan signal output by the scan line SCAN[n], it will turn on or off according to the specific level of the scan signal. When the channel of the initialization transistor M5 is turned on, the initialization voltage Vini is written to the first node N1. At this time, the gate of the driving transistor M1 is forced to the initialization voltage, thereby effectively clearing any residual charge or voltage from the previous light emission cycle, preventing any potential voltage offset or residual current from affecting subsequent operations, and ensuring that each pixel can start from the same starting point each time it is updated, thereby improving the display quality and uniformity of the entire display panel.

[0049] In this embodiment, a reset power supply is used to provide a reset voltage VAR, the difference between which is lower than the threshold voltage of the light-emitting element D1. In this embodiment, a reset transistor M3 is connected between the first electrode of the light-emitting element D1 and the reset power supply. Specifically, the first electrode of the reset transistor M3 is connected to the first electrode of the light-emitting element D1, the second electrode of the reset transistor M3 is connected to the reset power supply, and the gate of the reset transistor M3 is connected to the scan line SCAN[n]. When the reset transistor M3 receives a scan signal output from the scan line SCAN[n], it will turn on or off according to the specific level of the scan signal. When the reset transistor M3 is on, the reset power supply voltage VAR is written into the first electrode of the light-emitting element D1. Because the difference between the reset power supply voltage VAR and the second power supply voltage VSS is lower than the threshold voltage of the light-emitting element D1, it is ensured that the light-emitting element D1 will not emit light accidentally during non-light-emitting phases.

[0050] In this embodiment, the data voltage Vdata is written to the first node N1 after being divided by the capacitor assembly. Since the data voltage Vdata transmitted by the data signal line DL[m] is divided by the storage capacitor CS and the auxiliary capacitor C1, the influence of the data voltage Vdata on the driving current output by the driving transistor M1 in the light-emitting stage T4 is reduced, the voltage range of the data voltage Vdata is expanded, and thus the grayscale range can be effectively expanded, which is beneficial to improving the display performance of the display device.

[0051] In at least one embodiment of this application, a complete operating cycle of the pixel driving circuit includes at least an initialization phase T1, a threshold voltage extraction phase T2, a programming phase T3, and a light emission phase T4 performed sequentially. The operation of the pixel driving circuit shown in Figure 1 will be described in detail below with reference to Figures 2-6.

[0052] Taking the pixel driving circuit shown in Figure 1 as an example where all transistors are P-type transistors, and referring to Figures 2 and 3, when the pixel driving circuit is in the initialization stage T1, the light emission control signal transmitted by the light emission control line EM[n] is at a low level, the scan signal transmitted by the scan line SCAN[n] is at a low level, and the data signal line DL[m] transmits the first voltage VDIM. At this time, the sampling transistor M4, the initialization transistor M5, the light emission control transistor M2, and the reset transistor M3 are all in the on state. Therefore, the first voltage VDIM is written to the second plate of the auxiliary capacitor C1, the initialization voltage Vini is written to the first node N1, the first power supply voltage VDD is written to the second node N2, and the reset power supply voltage VAR is written to the first electrode of the light emission element D1.

[0053] It should be noted that at this time, the first electrode voltage of the light-emitting element D1 is the reset power supply voltage VAR, and the second electrode voltage is the second power supply voltage VSS. The difference between the reset power supply voltage VAR and the second power supply voltage VSS is less than the threshold voltage of the light-emitting element D1, causing it to not emit light during this stage. Furthermore, the absolute value of the difference between the initialization voltage Vini and the first power supply voltage VDD is greater than the absolute value of the threshold voltage Vth of the driving transistor M1. In this embodiment, the driving transistor M1 is a P-type transistor; therefore, the difference between the initialization voltage Vini and the first power supply voltage VDD is less than the threshold voltage Vth of the driving transistor M1. It should be understood that when the driving transistor M1 is an N-type transistor, the difference between the initialization voltage Vini and the first power supply voltage VDD is greater than the threshold voltage Vth of the driving transistor M1.

[0054] Referring to Figures 2 and 4, when the pixel driving circuit is in the threshold voltage extraction stage T2, the light emission control signal transmitted by the light emission control line EM[n] is at a high level, the scan signal transmitted by the scan line SCAN[n] is still at a low level, and the data signal line DL[m] transmits the first voltage VDIM. At this time, the light emission control transistor M2 is in the off state, and the sampling transistor M4, the initialization transistor M5, and the reset transistor M3 are all in the on state. Since the absolute value of the difference between the initialization voltage Vini and the first power supply voltage VDD is greater than the absolute value of the threshold voltage Vth of the driving transistor M1 at the beginning of the threshold voltage extraction stage T2, the driving transistor M1 is in the on state and will discharge the storage capacitor CS until the voltage difference between the first node N1 and the second node N2 is equal to the threshold voltage Vth of the driving transistor M1, at which point the driving transistor M1 becomes the off state. At the end of the threshold voltage extraction stage T2, the voltage of the first node N1 is the initialization voltage Vini, and the voltage of the second node N2 is the difference between the initialization voltage Vini and the threshold voltage Vth of the driving transistor M1. That is, at this time, the voltage of the second node N2 is VN2T2=Vini-Vth. At this time, it can be regarded as storing the threshold voltage Vth of the driving transistor M1 into the storage capacitor CS.

[0055] Referring to Figures 2 and 5, when the pixel driving circuit is in the programming stage T3, the light emission control signal transmitted by the light emission control line EM[n] is at a high level, the scan signal transmitted by the scan line SCAN[n] is still at a low level, and the data signal line DL[m] transmits the data voltage Vdata. At this time, the light emission control transistor M2 is in the off state, and the sampling transistor M4, the initialization transistor M5, and the reset transistor M3 are all in the on state. In this stage, the voltage of the first node N1 is still the initialization voltage Vini. Since the voltage of the other end of the series-connected storage capacitor CS and the auxiliary capacitor C1 (the second plate of the auxiliary capacitor C1) changes from the first voltage VDIM in the threshold voltage extraction stage T2 to the data voltage Vdata, based on the capacitor voltage divider circuit formed by the storage capacitor CS and the auxiliary capacitor C1, the voltage increment of the second node N2 is related to the voltage increment ΔV = Vdata - VDIM of the second plate of the auxiliary capacitor C1 and the voltage division coefficient α = C1 / C1 + CS of the storage capacitor CS. The voltage of the second node is: VN2T3=VN2T2+ΔV*α=Vini-Vth+(Vdata-VDIM)*C1 / C1+CS.

[0056] Therefore, at the end of programming phase T3, the voltage of the first node N1 is Vini, and the voltage of the second node N2, VN2T3, includes the threshold voltage of the driving transistor M1 in threshold voltage extraction phase T2, and is also related to the difference between the data voltage Vdata and the first voltage VDIM, as well as the voltage division coefficient of the storage capacitor CS in the capacitor assembly. At this time, the gate-source voltage difference Vgs of the driving transistor M1 is the voltage difference between the first node N1 and the second node N2.

[0057] Referring to Figures 2 and 6, when the pixel driving circuit is in the light-emitting stage T4, the light-emitting control signal transmitted by the light-emitting control line EM[n] is at a low level, the scan signal transmitted by the scan line SCAN[n] is at a high level, and the data signal line DL[m] transmits the data voltage Vdata. At this time, the light-emitting control transistor M2 is in the on state, and the sampling transistor M4, the initialization transistor M5, and the reset transistor M3 are all in the off state. At this time, the conduction of the light-emitting control transistor M2 results in the voltage of the second node N2 being the first power supply voltage VDD. The sampling transistor M4, the initialization transistor M5, and the reset transistor M3 are in the off state, and the first node N1 is floating. Due to the bootstrap effect of the storage capacitor CS, the gate-source voltage difference Vgs of the driving transistor M1 at this time is the same as the gate-source voltage difference Vgs of the driving transistor M1 at the end of the programming stage T3, which is still the voltage difference between the first node N1 and the second node N2 at the end of the programming stage T3.

[0058] During the light-emitting stage T4, the driving current Idrive, controlled by the gate-source voltage difference Vgs of the driven transistor M1, flows through the light-emitting element D1, and the light-emitting element D1 generates the corresponding brightness according to the value of the driving current Idrive.

[0059] It should be noted that when the driving transistor M1 operates in the saturation region, the formula for the driving current it provides is: Idrive=K / 2*(Vgs-Vth)2

[0060] Where K = μ*Cox*(W / L), μ is the electron mobility of driving transistor M1, Cox is the gate oxide capacitance of driving transistor M1, and W / L is the channel width-to-length ratio of driving transistor M1. It can be seen from the formula that the magnitude of the driving current Idrive is related to the gate-source voltage difference Vgs and the threshold voltage Vth of driving transistor M1.

[0061] Based on the aforementioned pixel driving circuit operation, when the pixel driving circuit is in the light-emitting stage T4, the threshold voltage of the driving transistor M1 in the above formula Vgs-Vth=Vini-Vini+Vth-(Vdata-VDIM)*C1 / C1+CS-Vth is canceled out. Therefore, the driving current Idrive is independent of the threshold voltage of the driving transistor M1 and will not be affected by the threshold voltage drift, thereby ensuring that the light-emitting element D1 can emit light according to the expected brightness and maintain high display consistency and stability even under different operating conditions (such as temperature changes, aging effects, etc.).

[0062] Based on this, the influence of the data voltage Vdata on the driving current Idrive is reduced, which is beneficial for expanding the range of values ​​for the data voltage Vdata and facilitating the unfolding of grayscale in the light-emitting element D1. As one implementation method, when the capacitance ratio of the storage capacitor CS to the auxiliary capacitor C1 is 1:1, the influence of the data voltage Vdata on the driving current Idrive is reduced by four times compared to the traditional 2T1C pixel circuit, which facilitates the unfolding of grayscale in the display.

[0063] This application also provides a display device, including a pixel driving circuit, a scanning circuit, a source driving circuit, and a light-emitting control circuit;

[0064] The scanning circuit is connected to the gate of the initialization transistor M5, the gate of the sampling transistor M4, and the gate of the reset transistor M3 via scan lines.

[0065] The source drive circuit is connected to the sampling transistor M4 via the data signal line DL[m];

[0066] The light-emitting control circuit is connected to the gate of the light-emitting control transistor M2 via the light-emitting control signal line.

[0067] In this embodiment, by precisely controlling the timing of the scanning signal, data signal, and light emission control signal, the scanning circuit, source driving circuit, and light emission control circuit are coordinated to ensure that the pixel driving circuit can operate according to a predetermined timing sequence, thereby achieving precise control of each pixel. Compared with the prior art, the beneficial effects of the display device provided in this application can be referred to the pixel driving circuit provided in the above embodiments, and will not be repeated here.

[0068] Based on this, in the pixel driving circuit of this application, the gates of the initialization transistor M5, the sampling transistor M4, and the reset transistor M3 can all be connected to the same scan line SCAN[n]. This not only reduces the number of control lines required and lowers the circuit complexity, but also allows for the synchronous control of multiple key operation stages through a unified signal source, ensuring the timing accuracy and operational continuity of the pixel driving circuit.

[0069] The above are only some embodiments of this application and do not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A pixel driving circuit, characterized in that, It includes driving transistors, sampling transistors, initialization transistors, capacitor assemblies, light-emitting control transistors, reset transistors, and light-emitting elements; The capacitor assembly includes a storage capacitor and an auxiliary capacitor; the first plate of the storage capacitor and the gate of the driving transistor are respectively connected to a first node; the second plate of the storage capacitor, the first plate of the auxiliary capacitor, and the source of the driving transistor are respectively connected to a second node. The sampling transistor is connected between the second plate of the auxiliary capacitor and the data signal line; The initialization transistor is connected between the first node and the initialization voltage terminal; The light-emitting control transistor is connected between the second node and the first power supply; The first electrode of the light-emitting element is connected to the drain of the driving transistor, and the second electrode of the light-emitting element is connected to the second power supply. The reset transistor is connected between the first electrode of the light-emitting element and the reset power supply.

2. The pixel driving circuit according to claim 1, characterized in that, The initialization transistor is configured to turn off during the light-emitting phase of each operating cycle to float the first node.

3. The pixel driving circuit according to claim 2, characterized in that, The sampling transistor is configured to turn on during the initialization phase and threshold voltage extraction phase of each operating cycle to write the first voltage transmitted by the data signal line into the second plate of the auxiliary capacitor.

4. The pixel driving circuit according to claim 3, characterized in that, The sampling transistor is configured to turn on during the programming phase of each duty cycle to write the data voltage transmitted by the data signal line into the second plate of the auxiliary capacitor, and to correlate the voltage of the second node with the difference between the data voltage and the first voltage, and the voltage division factor of the storage capacitor in the capacitor assembly through the capacitor assembly.

5. The pixel driving circuit according to claim 4, characterized in that, The light-emitting control transistor is configured to be turned off during the threshold voltage extraction phase and the programming phase of each duty cycle to float the second node; and, During the light-emitting phase of each working cycle, the storage capacitor is used to make the voltage of the first node correlated with the difference between the data voltage and the first voltage.

6. The pixel driving circuit according to claim 5, characterized in that, The reset transistor is configured to be turned on during the threshold voltage extraction phase of each operating cycle, so that the threshold voltage of the drive transistor is stored in the storage capacitor at the end of the threshold voltage extraction phase.

7. The pixel driving circuit according to claim 6, characterized in that, During the programming phase of each working cycle, the voltage stored in the storage capacitor is also related to the threshold voltage of the driving transistor.

8. The pixel driving circuit according to claim 7, characterized in that, The light-emitting control transistor is configured to turn on during the initialization phase of each operating cycle to write the first power supply voltage to the second node.

9. The pixel driving circuit according to claim 8, characterized in that, The initialization transistor is turned on during the initialization phase, the threshold voltage extraction phase, and the programming phase of each operating cycle to write the initialization voltage to the first node.

10. A display device, characterized in that, Includes the pixel driving circuit as described in any one of claims 1-9, as well as a scanning circuit, a source driving circuit, and a light emission control circuit; The scanning circuit is connected to the gate of the initialization transistor, the gate of the sampling transistor, and the gate of the reset transistor via scan lines. The source drive circuit is connected to the sampling transistor via the data signal line; The light-emitting control circuit is connected to the gate of the light-emitting control transistor via a light-emitting control signal line.