Data read / write method and apparatus, device, and storage medium
By dividing the target data into multiple sub-data and using RDMA IO messages for transmission, the problem of data volume limit caused by cache capacity limitation in RPC technology is solved, and more efficient data read and write processing is achieved.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- HUAWEI TECH CO LTD
- Filing Date
- 2025-12-26
- Publication Date
- 2026-07-16
AI Technical Summary
Existing RPC technology has a low upper limit on the amount of data processed per read/write operation due to the limited cache capacity of storage nodes.
By dividing the target data into multiple target sub-data and using multiple data transmission messages for transmission, the limitation of storage node cache capacity is avoided, and RDMA IO messages are used for data transmission.
It increases the upper limit of data volume during read and write processing, reduces the cache capacity limit of storage nodes, and improves data transmission efficiency.
Smart Images

Figure CN2025145850_16072026_PF_FP_ABST
Abstract
Description
A data read / write method, apparatus, device, and storage medium
[0001] This application claims priority to Chinese Patent Application No. 2025100419988, filed with the State Intellectual Property Office of China on January 9, 2025, entitled "A Data Reading and Writing Method, Apparatus, Device and Storage Medium", the entire contents of which are incorporated herein by reference. Technical Field
[0002] This application relates to the field of data processing technology, specifically to a data reading and writing method, apparatus, device, and storage medium. Background Technology
[0003] Remote Procedure Call (RPC) is a technology that allows a program to call a procedure located on another node. RPC refers to communication between different host nodes in a network system using procedure calls. During the call, information is transmitted from the calling process to the called process as parameters, and the result of the called process is returned to the calling process. This communication method hides the underlying communication details, making calling a remote procedure as convenient as calling a local function.
[0004] However, when using RPC technology for data reading and writing, the upper limit of the amount of data that can be processed in each read and write operation is relatively low due to the limitation of the cache capacity in the storage node. Summary of the Invention
[0005] This application provides a data reading and writing method, apparatus, device, and storage medium, with the aim of increasing the upper limit of data volume during read and write processing.
[0006] To achieve the above objectives, this application provides the following technical solution:
[0007] A first aspect of this application provides a data read / write method, the method comprising:
[0008] Receive data read / write requests from computing nodes, wherein the data read / write requests are read / write requests for target data;
[0009] In response to the data read / write request, the target data is transmitted through multiple data transmission messages, wherein the total amount of valid data transmitted by the multiple data transmission messages is the same as the amount of target data.
[0010] In the above implementation scheme, after receiving a data read / write request for reading and writing target data, the storage node can transmit the entire target data through multiple data transmission messages. That is, a data transmission message can transmit only a part of the target data. This allows the amount of target data that needs to be read and written to be unrestricted by the storage node's cache capacity, thereby increasing the upper limit of the amount of data during read and write processing.
[0011] In one possible implementation of the first aspect of this application, a data transmission message transmits a target sub-data, which is one of a plurality of target sub-data included in the target data, and the data size of the target sub-data is less than the data size of the target data.
[0012] In the above implementation scheme, the data transmission messages can be used to transmit one target sub-data of the target data. That is, the target data can be divided into multiple target sub-data, and multiple target sub-data can be transmitted by corresponding multiple data transmission messages, thereby realizing the transmission of the entire target data. This allows the amount of target data that needs to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0013] In one possible implementation of the first aspect of this application, the step of transmitting the target data via multiple data transmission messages in response to the data read / write request includes:
[0014] The target sub-data corresponding to the data transmission message is determined based on the data read / write request and the segmentation granularity.
[0015] The target sub-data is transmitted through the data transmission message corresponding to the target sub-data.
[0016] In the above implementation scheme, after receiving a data read / write request, the storage node can divide the target data to be transmitted into multiple target sub-data that can be transmitted through multiple data transmission messages, based on a pre-configured granularity. Each target sub-data can be assigned a corresponding data transmission message, and the entire target data can be transmitted by transmitting the corresponding target sub-data through these messages. This allows the amount of target data requiring read / write processing to be unlimited without being limited by the storage node's cache capacity, thereby increasing the upper limit of the data volume during read / write processing.
[0017] In one possible implementation of the first aspect of this application, first indication information is received from a computing node, the first indication information being used to indicate the segmentation granularity, the segmentation granularity being used to indicate the data volume of the target sub-data.
[0018] In the above implementation scheme, the computing node can pre-configure the granularity of the data segmentation used to indicate the target sub-data through the first indication information. That is, the computing node and the storage node can pre-negotiate the granularity of the data segmentation used to indicate the target sub-data, so that the storage node can divide the target data to be transmitted through the pre-configured granularity, and obtain multiple target sub-data that can be transmitted through multiple data transmission messages, so as to realize the transmission of the entire target data. This allows the data volume of the target data that needs to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the data volume during read and write processing.
[0019] In one possible implementation of the first aspect of this application, the product of the number of data transmission messages and the segmentation granularity is equal to the data volume of the target data.
[0020] In the above implementation scheme, since the storage node can divide the target data to be transmitted by the granularity of the partitioning, it can obtain multiple target sub-data that can be transmitted by multiple data transmission messages. It can also assign a corresponding data transmission message to each target sub-data and transmit the corresponding target sub-data by the data transmission message. Therefore, the product of the number of data transmission messages and the partitioning granularity can be equal to the total amount of target data, so that the entire target data can be transmitted by the data transmission message. This allows the amount of target data that needs to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0021] In one possible implementation of the first aspect of this application, the data transmission message further includes the virtual address of the target sub-data.
[0022] In the above implementation scheme, the storage node can predetermine the virtual address of the target sub-data corresponding to the target data, and can make the data transmission message carry the virtual address of the target sub-data, so that the target sub-data can be transmitted through the data transmission message based on the virtual address of the target sub-data, and then the entire target data can be transmitted through the data transmission message. This allows the amount of target data that needs to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0023] In one possible implementation of the first aspect of this application, the data read / write request includes a starting virtual address, and the virtual address of the target sub-data is determined based on the starting virtual address and the segmentation granularity.
[0024] In the above implementation scheme, the data read / write request sent by the computing node to the storage node can also carry the starting virtual address, so that the storage node can allocate the corresponding virtual address to the target sub-data based on the starting virtual address and the partitioning granularity. This allows the storage node to complete the transmission of the target sub-data through data transmission messages based on the virtual address of the target sub-data, and then transmit the entire target data through data transmission messages. This means that the amount of target data that needs to be read / written is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read / write processing.
[0025] In one possible implementation of the first aspect of this application, the data read / write request includes virtual addresses of a plurality of the target sub-data.
[0026] In the above implementation scheme, the data read / write request sent by the computing node to the storage node can also carry the virtual addresses of multiple target sub-data. This allows the storage node to directly determine the virtual address of each target sub-data based on the data read / write request, so that it can complete the transmission of the target sub-data through data transmission messages based on the virtual address of the target sub-data. In turn, it can transmit the entire target data through data transmission messages, so that the amount of target data that needs to be read / written is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read / write processing.
[0027] In one possible implementation of the first aspect of this application, the memory spaces corresponding to the virtual addresses of different target sub-data are spaced apart by N partitioning granularities.
[0028] In the above implementation scheme, the virtual address allocated to the target sub-data can be a continuous virtual address, and the memory space corresponding to the virtual addresses of different target sub-data can be separated by N partitioning granularities. This ensures that the target sub-data is transmitted through data transmission messages based on the virtual address of the target sub-data, and thus the entire target data can be transmitted through data transmission messages. This allows the amount of target data that needs to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0029] In one possible implementation of the first aspect of this application, determining the target sub-data corresponding to each of the data transmission messages based on the data read / write request and the segmentation granularity includes:
[0030] Multiple target read / write requests are determined based on the data read / write requests and the segmentation granularity. Each target read / write request is used to request a target sub-data. The target read / write request includes the storage address of the target sub-data. Each target read / write request corresponds to a data transmission message.
[0031] In the above implementation scheme, the storage node can divide the data read and write request into multiple target read and write requests according to the pre-configured granularity. That is, the data read and write request for reading and writing target data can be divided into multiple target read and write requests for reading and writing target sub-data based on the granularity. This allows for the separate reading and writing of a portion of the target data, so that a data transmission message can transmit only a portion of the target data. As a result, the amount of target data that needs to be read and written is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0032] In one possible implementation of the first aspect of this application, determining multiple target read / write requests based on the data read / write request and the segmentation granularity includes:
[0033] The data read / write request is divided into multiple target read / write requests based on the hardware acceleration module in the storage node. The hardware acceleration module includes any one of a data processing unit (DPU), a network interface card (NIC), and a field-programmable gate array (FPGA).
[0034] In the above implementation scheme, the storage node can specifically divide the data read and write requests from the computing node into multiple target read and write requests based on any one of the hardware acceleration devices among the data processing unit, network card and field programmable gate array, so as to further reduce the load of the central processing unit and thereby further increase the upper limit of the amount of data during read and write processing.
[0035] In one possible implementation of the first aspect of this application, the data read / write request includes identification information of the target data, and the step of determining multiple target read / write requests based on the data read / write request and the segmentation granularity includes:
[0036] The storage address of the target data is determined based on the identification information of the target data;
[0037] Based on the segmentation granularity and the storage address of the target data, multiple storage addresses of the target sub-data are generated;
[0038] Multiple target read / write requests are generated based on the storage addresses of multiple target sub-data.
[0039] In the above implementation scheme, the storage node can obtain the storage address and data volume of the target data based on the identification information of the target data carried in the data read / write request. It can also divide the target data into multiple target sub-data based on the granularity of the segmentation and the data volume of the target data, and generate multiple storage addresses of the target sub-data based on the storage address of the target data. Finally, it can generate corresponding target read / write requests based on the storage addresses of the multiple target sub-data, so as to enable reading and writing of a portion of the data in the target data separately. This allows a data transmission message to transmit only a portion of the target data, thereby allowing the data volume of the target data that needs to be read / written to be unlimited without being limited by the cache capacity of the storage node, thus increasing the upper limit of the data volume during read / write processing.
[0040] In one possible implementation of the first aspect of this application, the method further includes:
[0041] If it is determined that all the target sub-data included in the target data has been transmitted, a second indication message is sent to the computing node. The second indication message is used to indicate that the data read / write request has been processed.
[0042] In the above implementation scheme, if the storage node has completed the transmission of all target sub-data through data transmission messages, the storage node can send a second indication message to the computing node to inform the computing node that the data read and write requests have been processed.
[0043] In one possible implementation of the first aspect of this application, the data transmission message is a Remote Direct Memory Access Input / Output (RDMA IO) message.
[0044] In the above implementation scheme, after receiving a data read / write request for reading and writing target data, the storage node can transmit the entire target data through multiple RDMA IO messages. That is, only a part of the target data is transmitted through one RDMA IO message, so that the amount of target data that needs to be read and written is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0045] Secondly, this application also provides another data read / write method applied to a computing node, the method comprising:
[0046] Send a data read / write request to the storage node, wherein the data read / write request is a read / write request for the target data;
[0047] The target data is transmitted through multiple data transmission messages, and the total amount of effective data transmitted by the multiple data transmission messages is the same as the amount of target data.
[0048] In the above implementation scheme, the computing node can send a data read / write request to the storage node for reading and writing the target data. After receiving the data read / write request, the storage node can transmit the entire target data through multiple data transmission messages. That is, only a part of the target data is transmitted through a single data transmission message. This allows the amount of target data that needs to be read and written to be unrestricted by the storage node's cache capacity, thereby increasing the upper limit of the amount of data during read and write processing.
[0049] In one possible implementation of the second aspect of this application, a data transmission message transmits a target sub-data, which is one of a plurality of target sub-data included in the target data, and the data size of the target sub-data is less than the data size of the target data.
[0050] In one possible implementation of the second aspect of this application, the method further includes:
[0051] Send a first indication message to the storage node, the first indication message being used to indicate the segmentation granularity, the segmentation granularity being used to indicate the data volume of the target sub-data.
[0052] In one possible implementation of the second aspect of this application, the product of the number of data transmission messages and the segmentation granularity is equal to the data volume of the target data.
[0053] In one possible implementation of the second aspect of this application, the data transmission message further includes the virtual address of the target sub-data.
[0054] In one possible implementation of the second aspect of this application, the data read / write request includes a starting virtual address, and the virtual address of the target sub-data is determined based on the starting virtual address and the segmentation granularity.
[0055] In one possible implementation of the second aspect of this application, the data read / write request includes virtual addresses of a plurality of the target sub-data.
[0056] In one possible implementation of the second aspect of this application, the memory spaces corresponding to the virtual addresses of different target sub-data are spaced apart by N partitioning granularities.
[0057] In one possible implementation of the second aspect of this application, the method further includes:
[0058] A virtual address is assigned to each of the target sub-data based on the segmentation granularity and the starting virtual address.
[0059] In the above implementation scheme, the computing node can determine the pre-configured partitioning granularity and starting virtual address. Then, it can determine the size of the target sub-data based on the partitioning granularity and the identification information of the target data. Based on the starting virtual address and the size of the target sub-data, it can configure a corresponding virtual address for each target sub-data. This allows the target sub-data to be transmitted through data transmission messages based on its virtual address. In turn, the entire target data can be transmitted through data transmission messages. This means that the amount of target data that needs to be read and written is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0060] In one possible implementation of the second aspect of this application, the method further includes:
[0061] The data transmission message is an RDMA IO message.
[0062] Thirdly, embodiments of this application provide a data read / write device, which is applied to a storage node and includes:
[0063] The receiving module is used to receive data read / write requests from computing nodes, wherein the data read / write requests are read / write requests for target data;
[0064] The transmission module is used to respond to the data read / write request by transmitting the target data through multiple data transmission messages, wherein the total amount of valid data transmitted by the multiple data transmission messages is the same as the amount of target data.
[0065] The components of the data read / write device provided in the third aspect of this application can also perform the steps described in the first aspect and various possible implementations, as detailed in the foregoing description of the first aspect and various possible implementations.
[0066] The third aspect and any implementation thereof correspond to the first aspect and any implementation thereof, respectively. The technical effects of the third aspect and any implementation thereof are similar to those of the first aspect and any implementation thereof, and will not be repeated here.
[0067] Fourthly, embodiments of this application provide another data read / write device, which is applied to a computing node and includes:
[0068] The sending module is used to send data read / write requests to the storage node, wherein the data read / write request is a read / write request for the target data;
[0069] The transmission module is used to transmit the target data through multiple data transmission messages, wherein the total amount of valid data transmitted by the multiple data transmission messages is the same as the amount of target data.
[0070] The components of the data read / write device provided in the fourth aspect of this application can also perform the steps described in the second aspect and various possible implementations, as detailed in the foregoing description of the second aspect and various possible implementations.
[0071] The fourth aspect and any implementation thereof correspond to the second aspect and any implementation thereof, respectively. The technical effects of the fourth aspect and any implementation thereof can be found in the technical effects of the second aspect and any implementation thereof, as described above, and will not be repeated here.
[0072] Fifthly, embodiments of this application provide a computer device that may include a memory and a processor, wherein the memory is used to store computer programs or computer instructions, and the processor is used to execute the computer programs or computer instructions stored in the memory, so that the computer device performs the method of the first aspect of the embodiments of this application or any possible implementation of the first aspect, or performs the method of the second aspect of the embodiments of this application or any possible implementation of the second aspect.
[0073] Sixthly, embodiments of this application provide a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform the method described in the first aspect or the method described in the second aspect.
[0074] In a seventh aspect, embodiments of this application provide a computer program product containing instructions that, when run on a computer, cause the computer to perform the method described in the first aspect or the method described in the second aspect.
[0075] Eighthly, this application provides a chip system including a processor for supporting a prompting processing device in implementing the functions involved in the foregoing aspects, such as transmitting or processing data and / or information involved in the foregoing methods. In one possible design, the chip system further includes a memory for storing program instructions and data necessary for the prompting processing device. This chip system may be composed of chips or may include chips and other discrete devices.
[0076] Ninthly, embodiments of this application provide a chip including one or more interface circuits and one or more processors; the interface circuits are used to receive signals from the memory of an electronic device and send signals to the processors, the signals including computer instructions stored in the memory; when the processor executes the computer instructions, it causes the electronic device to perform a task execution method in the first aspect or any possible implementation of the first aspect, or to perform a task execution method in the second aspect or any possible implementation of the second aspect.
[0077] The ninth aspect and any implementation thereof correspond to the first aspect and any implementation thereof, or to the second aspect and any implementation thereof. The technical effects corresponding to the ninth aspect and any implementation thereof can be found in the technical effects corresponding to the first aspect and any implementation thereof, or in the technical effects corresponding to the second aspect and any implementation thereof, and will not be repeated here. Attached Figure Description
[0078] Figure 1 is a schematic diagram of a system architecture provided in an embodiment of this application;
[0079] Figure 2 is a schematic diagram of the structure of a distributed system provided in an embodiment of this application;
[0080] Figure 3 is a flowchart illustrating a data read / write method provided in an embodiment of this application;
[0081] Figure 4 is a schematic diagram of a data read / write request format provided in an embodiment of this application;
[0082] Figure 5 is a schematic diagram of a data transmission message format provided in an embodiment of this application;
[0083] Figure 6 is a schematic diagram of a read / write request response format provided in an embodiment of this application;
[0084] Figure 7 is a flowchart illustrating another data read / write method provided in an embodiment of this application;
[0085] Figure 8 is a schematic diagram of another distributed system provided in an embodiment of this application;
[0086] Figure 9 is a schematic diagram of a data read / write device provided in an embodiment of this application;
[0087] Figure 10 is a schematic diagram of another data read / write device provided in an embodiment of this application;
[0088] Figure 11 is a schematic diagram of the structure of a computer device provided in an embodiment of this application;
[0089] Figure 12 is a schematic diagram of the structure of a chip provided in an embodiment of this application. Detailed Implementation
[0090] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.
[0091] To facilitate understanding of the technical solutions of this application, several technical terms involved in the embodiments of this application will be introduced below.
[0092] 1. Remote Procedure Call (RPC) is a technology that allows a program to call a procedure located on another node. RPC refers to communication between different host nodes in a network system using procedure calls. During the call, information is transmitted from the calling process to the called process as parameters, and the result of the called process is returned to the calling process. This communication method hides the underlying communication details, making calling a remote procedure as convenient as calling a local function. RPC has the following advantages:
[0093] Hiding underlying communication details: RPC does not need to directly handle underlying details such as Socket communication or HTTP communication, allowing developers to focus more on the implementation of business logic.
[0094] Cross-language calls: Modern RPC frameworks typically support cross-language calls in multiple programming languages, enabling services written in different languages to communicate easily.
[0095] Rich data types and type mappings: RPC frameworks typically have rich data types and perfect cross-language type mappings, supporting complex data structures such as self-references, mutual references, and circular references.
[0096] Flexible calling methods: RPC supports multiple calling methods such as synchronous calls, asynchronous calls, dynamic parameters, variable parameters, and reference parameter passing to meet the needs of different scenarios.
[0097] Scalability: RPC frameworks typically have good scalability and can implement various functional extensions such as encryption, compression, caching, and proxy through filters and middleware.
[0098] 2. Remote Direct Memory Access (RDMA): Allows user programs to bypass the operating system kernel and interact directly with the network card for network communication, thus providing high bandwidth and extremely low latency. RDMA uses dedicated network adapter hardware, such as an RDMA engine, to achieve direct memory access to data, reducing data transfer latency and CPU load. RDMA supports various operation types, mainly including:
[0099] Write operation: Allows one node to write data directly to the memory of another node. In this process, the sender registers its data buffer to be sent with the RDMA adapter's memory and sends its metadata to the receiver. The receiver registers its received data buffer with the RDMA adapter and informs the adapter of the address of its receive data buffer. Then, the sender transfers data directly from the send buffer to the receive buffer through the RDMA adapter without operating system intervention.
[0100] Read operation: Allows one node to directly read data from the memory of another node. The receiving end can directly read data from the sending end's memory using RDMA read operations.
[0101] 3. Network Interface Card (NIC): A computer hardware component responsible for connecting a computer to a network. The NIC's primary function is to enable data communication between the computer and the network, including sending and receiving data. When a computer needs to send data, the operating system passes the data to the NIC driver. The driver encapsulates the data into network packets and adds necessary network protocol headers and information. The NIC then sends the packets over the network, where they are transmitted to the target computer via devices such as switches or routers. When the NIC receives a data packet from the network, it checks if the destination address of the packet matches its own physical address. If they match, the NIC decapsulates the packet, extracts the original data, and passes it to the operating system via the driver. The operating system then passes the data to the appropriate application for processing.
[0102] 4. Dynamic Random Access Memory (DRAM): This is a type of volatile memory, meaning that data stored in it is immediately lost when the power is turned off. It is called "dynamic" because the stored data needs to be refreshed periodically to maintain its integrity; this process is automatically performed by the memory controller without user intervention. DRAM has the following key characteristics:
[0103] High-speed access: DRAM access speed is typically measured in nanoseconds (ns), which can meet the needs of modern computer systems for fast data access.
[0104] High capacity: DRAM storage capacity ranges from hundreds of megabytes (MB) to tens or hundreds of gigabytes (GB), and this capacity is scalable. Memory capacity can be easily expanded by increasing the number of memory chips.
[0105] Low cost: DRAM has a relatively simple structure and high integration, enabling it to provide large-capacity and cost-effective data storage solutions.
[0106] Dynamic refresh is required: Since DRAM uses capacitors to store data, and the charge in the capacitors will gradually leak out over time, the capacitors must be refreshed periodically to maintain the accuracy of the data.
[0107] 5. Input / Output Client (IO Client): This refers to a client component or program responsible for data input and output operations. It primarily interacts with the data source or data target, performing data read and write operations. In the data processing flow, the IO Client acts as a bridge, connecting data producers and data consumers.
[0108] 6. Input / Output Server: A server specifically designed for handling input and output operations. An IO server is primarily responsible for handling data input and output operations, including reading and writing data, and managing network connections. It can quickly respond to and process a large number of IO requests, making it an important component in the field of data processing. IO servers typically use multi-threading or multi-processing to handle concurrent IO requests. It creates multiple threads or processes to handle multiple IO requests simultaneously, improving the system's concurrency capabilities. Each thread or process is responsible for handling one IO request and returning the result upon completion.
[0109] 7. Solid State Drive (SSD): This type of drive uses flash memory as its storage medium, storing data electronically within semiconductor chips to achieve fast data read and write speeds. Compared to traditional hard disk drives (HDDs), SSDs have no moving mechanical parts, such as read / write heads or motors, resulting in higher read / write speeds, lower power consumption, stronger shock resistance, and a longer lifespan.
[0110] 8. Data Processing Unit (DPU): A DPU is a dedicated processor built around data, designed to efficiently handle large-scale data workloads within data centers. A DPU is a programmable processor whose core architecture typically includes a processing core, hardware accelerator components, and a high-performance network interface. It is specifically designed to handle data-centric workloads such as data transmission, reduction, protection, compression, analysis, and encryption.
[0111] 9. Central Processing Unit (CPU): This is the core processing component of a computer system, responsible for executing instructions in programs, processing data, and controlling the operation of the computer system. The CPU is the brain of the computer, determining the performance and speed of the computer system.
[0112] 10. NVMe (Non-Volatile Memory Express): This is a non-volatile memory access and transfer protocol used to access non-volatile memory media attached via the PCIe (PCI-Express) bus, such as solid-state drives using flash memory. It defines a set of commands and functions designed to improve the performance and efficiency of storage devices while enabling interoperability across a wide range of enterprise and client systems.
[0113] 11. Field Programmable Gate Array (FPGA): An application-specific integrated circuit based on programmable logic and programmable interconnects. An FPGA consists of a large number of programmable logic cells and programmable interconnect resources. The programmable logic cells are the core of the FPGA, used to implement user-defined logic functions. Programmable interconnect resources are used to implement signal transmission and storage between different modules. By loading user-designed logic information and routing information into the FPGA's memory cells, the circuit can operate according to the design. FPGAs have the following characteristics:
[0114] High programmability: FPGAs allow users to define their logic functions through programming, thus enabling them to flexibly adapt to different application scenarios.
[0115] High-speed data transmission and real-time processing capabilities: FPGA has high-speed data processing capabilities, which can meet the needs of high-speed data transmission and real-time processing.
[0116] Parallel processing capability: FPGAs can process multiple tasks in parallel, improving data processing efficiency.
[0117] Low power consumption: Compared to traditional processors, FPGAs consume less power while achieving the same performance.
[0118] 12. Level 3 Cache: This is a high-speed cache inside the CPU used to store frequently accessed data and instructions. The L3 cache is the last level of cache shared by the CPU cores, located outside the CPU cores, but faster than main memory. Its main function is to further reduce data exchange latency and memory access conflicts between cores, thereby improving overall performance. When the CPU needs to access data, it first checks the L1 and L2 caches. If the data is not found there, it checks the L3 cache. If the data is also not found in the L3 cache, the CPU will then read the data from main memory.
[0119] 13. Virtual Address (VA): This is the address where a program is loaded into memory, and the address used by applications to access memory through the operating system. It allows each process to believe it is using a contiguous space of memory starting from 0, thus simplifying memory management. There is a mapping relationship between virtual addresses and physical addresses. A physical address is the actual location where data is stored in memory. When a program attempts to access a virtual address, the operating system translates it into the corresponding physical address before actual memory access can occur. This translation is typically performed by the memory management unit or similar hardware mechanisms.
[0120] 14. Metadata: Metadata refers to data about data, primarily used to describe, interpret, identify, and evaluate related data. Metadata can be understood as a set of information / data groups used to describe data; all data and information within this set describes or reflects a certain characteristic of the data. Specifically, the role of metadata in the field of data processing includes, but is not limited to, the following:
[0121] Data Description: Metadata provides detailed information about the data, such as its type, name, values, source, structure, quality, and access permissions. This information helps users understand the background and context of the data, enabling them to better understand and use it.
[0122] Data Management: Metadata plays a central role in data warehouses and data lakes, facilitating data integration, storage, access, and management. Through metadata, data warehouses and data lakes can be monitored, optimized, and maintained, ensuring data accuracy and consistency.
[0123] Data retrieval: Metadata provides information about data classification, content, storage location, etc., making it easier for users to query and retrieve data. This helps users quickly find the data they need and improves data processing efficiency.
[0124] Data quality assessment: Metadata describes information such as the source, collection method, credibility, and validity of data, helping to assess data quality and reliability. This is crucial for ensuring the accuracy and reliability of data processing.
[0125] Data association and combination: Metadata can also describe the relationships and dependencies between data, which helps to associate and combine data during the data analysis process, thereby discovering new insights and trends.
[0126] 15. Compute node: In a distributed computing system, a computer or server is used to perform computing tasks.
[0127] 16. Data node: This is the node responsible for storing data. It typically contains the actual data files and index files of the database.
[0128] Please refer to Figure 1. This application embodiment provides a system architecture 300. The execution device 210 is implemented by one or more servers, and optionally, it cooperates with other computing devices, such as data storage, routers, load balancers, etc. The execution device 210 can be deployed on a single physical site or distributed across multiple physical sites.
[0129] Users can interact with execution device 210 by operating their respective user devices (e.g., local device 301 and local device 302). Each local device can represent any computing device, such as a personal computer, computer workstation, smartphone, tablet, smart camera, smart car or other type of cellular phone, media consumption device, wearable device, set-top box, game console, etc.
[0130] Each user's local device can interact with execution device 210 through a communication network using any communication mechanism / standard. The communication network can be a wide area network (WAN), a local area network (LAN), a point-to-point connection, or any combination thereof. Specifically, the communication network can include a wireless network, a wired network, or a combination of both. The wireless network includes, but is not limited to, any one or more combinations of: 5th-Generation (5G) systems, Long Term Evolution (LTE) systems, Global System for Mobile Communication (GSM) or Code Division Multiple Access (CDMA) networks, Wideband Code Division Multiple Access (WCDMA) networks, Wireless Fidelity (WiFi), Bluetooth, Zigbee, Radio Frequency Identification (RFID), Long Range (Lora) wireless communication, and Near Field Communication (NFC). The wired network can include fiber optic communication networks or networks composed of coaxial cables.
[0131] In another implementation, one or more aspects of the execution device 210 may be implemented by each local device. For example, local device 301 may provide local data or feedback calculation results to the execution device 210. This local device may also be referred to as a computing device.
[0132] It should be noted that all the functions of execution device 210 can also be implemented by a local device. For example, local device 301 implements the functions of execution device 210 and provides services to its own users, or provides services to users of local device 302.
[0133] Please refer to Figure 2. This embodiment of the application provides a schematic diagram of a distributed system structure. Currently, when using RPC technology for data read and write processing, taking a read operation as an example, the compute node can first obtain data metadata from the storage node, and then send a data read request to the IO server in the storage node based on the NIC. After receiving the data read request, the IO server in the storage node can initiate a disk read request to the SSD. The SSD can send the target data corresponding to the data read request to the DRAM for caching, and then the DRAM will transfer the target data to the IO Client in the compute node based on the NIC. That is, when using RPC technology for data read processing, two data moves are required: first, the target data is moved from the SSD of the storage node to the cache of the storage node, and then the cache of the storage node moves the target data to the memory of the compute node. Therefore, when the cache capacity in the storage node is small, the storage node will be unable to process data read requests with large amounts of data, which means that the upper limit of the data volume for each read and write operation is low.
[0134] To address the aforementioned issues, after accessing the data's metadata, compute nodes can obtain the corresponding data storage information and segment this information into appropriate RPC read / write requests for processing. This means that by configuring the size of the IO requests, a single large IO request can be divided into multiple smaller IO requests on the compute node, and these smaller IO requests can be sent to storage nodes separately to perform data read / write operations, thereby increasing the maximum amount of data that can be processed in each read / write operation. However, in this approach, because the compute node segments a single large IO request into multiple smaller IO requests, the amount of IO requests that the storage node needs to process increases exponentially. This leads to a significant increase in the path overhead for the CPU in the storage node during IO request processing, potentially causing CPU overload.
[0135] Based on this, this application provides a data read / write method that can be applied to a distributed system composed of computing nodes and storage nodes. The following description uses this distributed system as an example. It should be noted that the aforementioned distributed system is merely exemplary, and the method can also be applied to other types of systems; this application does not limit its application to such applications.
[0136] Figure 3 is a flowchart illustrating a data read / write method provided in an embodiment of this application. The data read / write method provided in this embodiment includes the following steps:
[0137] 301. The compute node sends a data read / write request to the storage node.
[0138] Among them, data read / write requests are read / write requests for the target data.
[0139] In this embodiment, the computing node can pre-determine the target data to be read and written, where the target data can be data such as files. The target data can be data that can be split or divided, that is, data that can be split or divided into multiple target sub-data. After determining the target data, the computing node can perform read and write processing on the target data by sending a data read / write request to the storage node. It is understood that the data read / write request can specifically be a data read request or a data write request. When the data read / write request is a data read request, it can be used to instruct the storage node to read the target data, that is, to instruct the storage node to transfer the target data to the computing node; when the data read / write request is a data write request, it can be used to instruct the storage node to read the target data from the computing node and store the target data. Specifically, the data read / write request can also carry the identification information of the target data. After determining the target data, the computing node can also obtain the identification information of the target data, where the identification information of the target data can be the metadata of the target data. The computing node can obtain the metadata of the target data from its own stored metadata database, and it can also obtain the metadata of the target data from the metadata database of the storage node.
[0140] One possible implementation of this application embodiment further includes:
[0141] A1. The computing node assigns a virtual address to each of the target sub-data according to the segmentation granularity and the starting virtual address.
[0142] In this embodiment, the computing node can predetermine the partitioning granularity, which can be used to indicate the data size of the target sub-data. Specifically, it can be the cardinality standard for dividing the target data into target sub-data. For example, when the target data size is 256KB and the partitioning granularity is 8KB, the target data can be divided into 32 target sub-data with a data size of 8KB. Specifically, the computing node and storage node can pre-configure the partitioning granularity through a private protocol. The specific value of the partitioning granularity can be determined according to the actual situation, and this embodiment does not limit it.
[0143] In this embodiment, to enable read and write processing of target data, the computing node can also allocate corresponding virtual addresses for the target data or target sub-data. The virtual address of the target data or target sub-data refers to the virtual address required for transmitting the target data or target sub-data. Specifically, the computing node can first determine the starting virtual address of the target data, which can be the virtual address of the first target sub-data among multiple target sub-data corresponding to the target data. For example, the starting virtual address can be represented by VA0.
[0144] Specifically, after determining the granularity of the segmentation, the computing node can segment the target data based on the granularity, determining the size of each target sub-data. Furthermore, it can allocate consecutive virtual addresses to each target sub-data based on the granularity and the starting virtual address. These virtual addresses can be consecutive. Understandably, after allocating virtual addresses to each target sub-data, the computing node can send these addresses to the network interface card (NIC), enabling the NIC to transmit data to each target sub-data based on its virtual address, thereby achieving read and write processing of the target data.
[0145] In one possible implementation of this application embodiment, the memory spaces corresponding to the virtual addresses of different target sub-data are spaced apart by N partitioning granularities. In this application embodiment, the virtual addresses allocated to the target sub-data can be consecutive virtual addresses, and the memory spaces corresponding to the virtual addresses of different target sub-data can be spaced apart by N partitioning granularities. This ensures that the transmission of the target sub-data is completed through data transmission messages based on the virtual addresses of the target sub-data, and thus the entire target data can be transmitted through data transmission messages. This allows the amount of target data that needs to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing. Specifically, consecutive virtual addresses can be allocated to each target sub-data based on VAx = VA0 + a*x, where VAx refers to the virtual address of the x-th target sub-data, a is the partitioning granularity, VA0 is the starting virtual address, and N is a positive integer.
[0146] In one possible implementation of this application embodiment, the data read / write request further includes a starting virtual address, and the virtual address of the target sub-data is determined based on the starting virtual address and the segmentation granularity. In this application embodiment, after the computing node allocates a virtual address for each target sub-data corresponding to the target data, it can send the starting virtual address to the storage node through the data read / write request, so that the storage node can determine the virtual address of each target sub-data based on the starting virtual address and the pre-configured segmentation granularity, enabling the storage node to complete the data transmission of each target sub-data based on the virtual address of each target sub-data, thereby realizing the read / write processing of the target data. It should be noted that the data read / write request only carries the starting virtual address, which can further save the resource overhead when performing read / write processing on the target data and improve the utilization rate of transmission resources. Specifically, as shown in Figure 4, the data read / write request can consist of a network header and an RPC header, wherein the RPC header can carry length, read / write identifier IOID, and starting virtual address VA0, etc.
[0147] In one possible implementation of this application's embodiments, the data read / write request further includes the virtual address of each target sub-data. In this embodiment, after the computing node allocates a virtual address for each target sub-data corresponding to the target data, it can send the virtual address of each target sub-data to the storage node through the data read / write request. This allows the storage node to directly determine the virtual address of each target sub-data based on the data read / write request, enabling the storage node to complete the data transmission of each target sub-data based on its virtual address, thereby achieving read / write processing of the target data.
[0148] In one possible implementation of this application embodiment, the method further includes:
[0149] B1. The compute node sends the first instruction information to the storage node.
[0150] The first indication information is used to indicate the segmentation granularity, and the segmentation granularity is used to indicate the data volume of the target sub-data.
[0151] In this embodiment, after the computing node predetermines the granularity of the data segmentation used to indicate the amount of target sub-data, it can pre-configure the granularity of the segmentation using the first indication information. That is, the computing node and the storage node can pre-negotiate the granularity of the data segmentation used to indicate the amount of target sub-data, so that the storage node can divide the target data to be transmitted using the pre-configured granularity to obtain multiple target sub-data that can be transmitted through multiple data transmission messages, thereby realizing the transmission of the entire target data. This allows the amount of target data to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0152] 302. The storage node receives data read / write requests from the compute node.
[0153] Among them, data read / write requests are read / write requests for the target data.
[0154] In this embodiment, the storage node can receive data read / write requests carrying identification information of target data from the computing node. In certain cases, the storage node can be a storage node with a low cache capacity. Specifically, after receiving the data read / write request, the CPU in the storage node can parse the identification information, starting virtual address, and other parameters of the target data from the request. This allows the entire target data to be transmitted through multiple data transmission messages, meaning that only a portion of the target data is transmitted through a single data transmission message. This ensures that the amount of target data requiring read / write processing is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the data volume during read / write processing.
[0155] 303. In response to data read / write requests, the storage node transmits the target data through multiple data transmission messages.
[0156] In this case, the total amount of valid data transmitted in multiple data transmission messages is the same as the amount of data in the target data.
[0157] In this embodiment, after receiving a data read / write request for reading and writing target data, the storage node can allocate multiple data transmission messages for the target data. By having each data transmission message transmit a portion of the target data, the entire target data can be transmitted through multiple data transmission messages. This allows the amount of target data requiring read / write processing to be unlimited without being limited by the storage node's cache capacity, thereby increasing the upper limit of the data volume during read / write processing. It is understood that since each data transmission message transmits a portion of the target data, the total amount of effective data transmitted across multiple data transmission messages can be the same as the amount of target data; that is, the entire target data can be transmitted through multiple data transmission messages.
[0158] Specifically, when the data read / write request is a read request, meaning it instructs the storage node to read the target data and send it to the compute node, the storage node can transmit the target data to the compute node through multiple data transmission messages. When the data read / write request is a write request, meaning it instructs the storage node to store the target data, the storage node can obtain the target data from the compute node through multiple data transmission messages and store the target data in the storage node's solid-state drive, thus completing the read / write processing of the target data.
[0159] In addition, the data transmission message may also carry specific identification information, which can be used to identify the correspondence between the data transmission message and the data read / write request. That is, the specific identification information can be used to indicate that the data transmitted by the data transmission message is a part of the target data corresponding to the data read / write request.
[0160] In one possible implementation of this application embodiment, the data transmission message is a Remote Direct Memory Access Input / Output (RDMA IO) message. In this embodiment, after receiving a data read / write request for reading and writing target data, the storage node can transmit the entire target data through multiple RDMA IO messages. That is, a single RDMA IO message can transmit only a portion of the target data, allowing the amount of target data requiring read / write processing to be unlimited by the storage node's cache capacity, thereby increasing the upper limit of the data volume during read / write processing.
[0161] In one possible implementation of this application embodiment, a data transmission message transmits one target sub-data. The target sub-data is one of multiple target sub-data included in the target data, and the data size of the target sub-data is smaller than the data size of the target data. In this application embodiment, the data transmission messages can be used to transmit one target sub-data of the target data respectively. That is, the target data can be divided into multiple target sub-data, and a data transmission message can be assigned to each target sub-data. Then, the multiple corresponding data transmission messages can be used to transmit the multiple target sub-data of the target data, thereby realizing the transmission of the entire target data. This allows the data size of the target data that needs to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the data size during read and write processing.
[0162] In one possible implementation of this application embodiment, step 303 involves the storage node responding to a data read / write request by transmitting the target data through multiple data transmission messages, including:
[0163] C1. The storage node determines the target sub-data corresponding to the data transmission message based on the data read / write request and the granularity of the segmentation.
[0164] In this embodiment, after receiving a data read / write request, the storage node can determine the target data and its related parameters, such as the data volume and storage address, based on the request. Furthermore, the storage node can divide the target data into multiple target sub-data according to a predetermined granularity to obtain the target sub-data that can be transmitted via data transmission messages. This allows the transmission of the entire target data by transmitting the corresponding target sub-data through data transmission messages, thus ensuring that the data volume of the target data requiring read / write processing is not limited by the storage node's cache capacity, thereby increasing the upper limit of the data volume during read / write processing.
[0165] In one possible implementation of this application embodiment, step C1, where the storage node determines the target sub-data corresponding to the data transmission message based on the data read / write request and the segmentation granularity, includes:
[0166] D1. The storage node determines multiple target read / write requests based on the data read / write requests and the granularity of the partition.
[0167] One target read / write request is used to request a target sub-data. The target read / write request includes the storage address of the target sub-data. One target read / write request corresponds to one data transmission message.
[0168] In this embodiment, after receiving a data read / write request, the storage node can segment the request to obtain multiple target read / write requests for reading target sub-data. Specifically, after receiving the data read / write request, the storage node can determine the size of the target data and its storage address within the storage node based on the target data's identification information. Then, it can divide the target data into multiple target sub-data based on the segmentation granularity and the target data's size, and determine the storage address of each target sub-data within the storage node. Finally, it can generate multiple target read / write requests based on the storage address of each target sub-data, where each target read / write request corresponds to one target sub-data and includes the storage address of one target sub-data; that is, each target read / write request is used to read and write one target sub-data. For example, if the storage node's hardware acceleration device determines the target data size to be 256KB based on the target data's identification information, the target read / write request can be segmented into 32 target read / write requests, where the size of the target sub-data corresponding to each target read / write request can be 8KB. In addition, corresponding data transmission messages can be assigned to target read / write requests, so that after the storage node reads the target sub-data based on the target read / write request, it can transmit the target sub-data based on the data transmission messages.
[0169] In one possible implementation of this application embodiment, step D1, where the storage node determines multiple target read / write requests based on the data read / write request and the partitioning granularity, includes:
[0170] E1. The storage node divides data read and write requests into multiple target read and write requests based on the hardware acceleration module in the storage node. The hardware acceleration module includes any one of the following: Data Processing Unit (DPU), Network Interface Card (NIC), and Field Programmable Gate Array (FPGA).
[0171] In this embodiment, the storage node can specifically divide the data read / write request from the computing node into multiple target read / write requests based on any one of the hardware acceleration devices, such as the data processing unit, network card, and field-programmable gate array, so as to further reduce the load on the central processing unit and thereby further increase the upper limit of the amount of data during read / write processing.
[0172] In one possible implementation of this application embodiment, step D1, where the storage node determines multiple target read / write requests based on the data read / write request and the partitioning granularity, includes:
[0173] F1. The storage node determines the storage address of the target data based on the identification information of the target data.
[0174] In this embodiment, after parsing the target data's identification information from the data read / write request, the storage node can query the target data's storage address within the storage node based on this identification information. It is understood that the storage node may have a pre-configured mapping between the target data's identification information and its storage address, allowing the storage node to directly query the target data's storage address based on its identification information. Specifically, the CPU within the storage node can perform the query for the target data's storage address and send the query result to the hardware acceleration device within the storage node.
[0175] F2. The storage node generates storage addresses for multiple target sub-data based on the granularity of the segmentation and the storage address of the target data.
[0176] In this embodiment, after determining the storage address of the target data, the storage node can further determine the size of the target data based on the storage address. After determining the granularity of the segmentation, the target data can be divided into multiple target sub-data based on the granularity and the size of the target data, and the size of each target sub-data can be equal to the granularity of the segmentation. For example, when the size of the target data is 256KB and the granularity of the segmentation is 8KB, the target data can be divided into 32 target sub-data with a size of 8KB each. Furthermore, since the target sub-data is obtained by segmenting the target data, the storage address of each target sub-data can be determined based on the storage address of the target data, that is, the storage address of the target data can be divided into the storage addresses of multiple target sub-data. Specifically, the storage address of each target sub-data can be generated based on the segmentation granularity and the storage address of the target data using the hardware acceleration device in the storage node.
[0177] F3. The storage node generates multiple target read / write requests based on the storage addresses of multiple target sub-data.
[0178] In this embodiment, after obtaining the storage addresses of multiple target sub-data, the storage node can generate target read / write requests for each target sub-data based on its corresponding storage address. This means that each generated target read / write request can carry the storage address corresponding to the target sub-data. Specifically, the target read / write requests can be generated based on the hardware acceleration device in the storage node. After generating the target read / write requests, the hardware acceleration device can further activate the solid-state drive in the storage node to transmit the corresponding target sub-data via data transmission messages, thus enabling the transmission of the entire target data. This allows the amount of target data requiring read / write processing to be unrestricted by the storage node's cache capacity, thereby increasing the upper limit of the data volume during read / write processing.
[0179] C2. The storage node transmits the target sub-data through the data transmission message corresponding to the target sub-data.
[0180] In this embodiment, after determining the target sub-data, the storage node can allocate a corresponding data transmission message for each target sub-data. This allows the corresponding target sub-data to be transmitted via data transmission messages, thus enabling the transmission of the entire target data. This means the amount of target data requiring read / write processing is not limited by the storage node's cache capacity, thereby increasing the upper limit of the data volume during read / write processing. Specifically, after determining the target sub-data, the storage node can further determine the virtual address of the target sub-data, allowing the storage node to transmit the corresponding target sub-data via data transmission messages based on the virtual address of the target sub-data.
[0181] In one possible implementation of this application embodiment, the data transmission message further includes the virtual address of the target sub-data. In this embodiment, the storage node can pre-determine the virtual address of the target sub-data corresponding to the target data, and can make the data transmission message carry the virtual address of the target sub-data. This allows the transmission of the target sub-data based on its virtual address via the data transmission message, thereby enabling the transmission of the entire target data. This ensures that the amount of target data requiring read / write processing is not limited by the storage node's cache capacity, thus increasing the upper limit of the data volume during read / write processing. As shown in Figure 5, the data transmission message can consist of a network header and the target sub-data, where the network header can carry the virtual address (VAN) and length of the target sub-data, etc.
[0182] Specifically, when the data transmission request carries a starting virtual address, the storage node can allocate a virtual address for each target sub-data based on the segmentation granularity and the starting virtual address. The virtual addresses of each target sub-data are consecutive. In this embodiment, when the data read / write request from the computing node also carries a starting virtual address, the storage node can parse the starting virtual address allocated by the computing node for the target data from the data read / write request. The starting virtual address can be the virtual address of the first target sub-data among multiple target sub-data corresponding to the target data. Furthermore, after determining the segmentation granularity, the storage node can segment the data volume of the target data based on the segmentation granularity, determine the data volume size of each target sub-data, and allocate consecutive virtual addresses for each target sub-data corresponding to the target data based on the segmentation granularity and the starting virtual address. Specifically, consecutive virtual addresses can be allocated for each target sub-data based on VAx = VA0 + a*x, where VAx refers to the virtual address of the x-th target sub-data, a is the segmentation granularity, and VA0 is the starting virtual address.
[0183] When the data transfer request includes the virtual address of each target sub-data, that is, when the data read / write request from the compute node also carries the virtual address allocated by the compute node for each target sub-data, the storage node can directly parse the virtual address of each target sub-data from the data read / write request.
[0184] In one possible implementation of this application embodiment, the method further includes:
[0185] C3. If it is determined that all target sub-data included in the target data has been transmitted, send a second instruction message to the computing node.
[0186] The second indication information is used to indicate that the data read / write request has been processed.
[0187] In this embodiment, if the storage node has counted that all target sub-data has been transmitted via data transmission messages, the storage node can send a second indication message to the computing node to inform it that the data read / write request has been processed. Specifically, the CPU in the storage node can count whether each target sub-data has been processed. After the CPU determines that the target sub-data corresponding to each data transmission message has been transmitted to the computing node, the storage node can send the second indication message to the computing node, thereby completing the processing of the data read / write request for reading and writing the target data. For example, the second indication message can be sent based on the read / write request reply. As shown in Figure 6, the read / write request reply can consist of a network header and an RPC header, wherein the RPC header can carry indication information indicating whether the data read / write request has been processed.
[0188] In one possible implementation of this application embodiment, the method further includes:
[0189] G1, The storage node receives the first instruction information from the compute node.
[0190] The first indication information is used to indicate the segmentation granularity, and the segmentation granularity is used to indicate the data volume of the target sub-data.
[0191] In this embodiment, after the computing node predetermines the granularity of the data segmentation used to indicate the amount of target sub-data, it can pre-configure the granularity of the segmentation using the first indication information. That is, the computing node and the storage node can pre-negotiate the granularity of the data segmentation used to indicate the amount of target sub-data, so that the storage node can divide the target data to be transmitted using the pre-configured granularity to obtain multiple target sub-data that can be transmitted through multiple data transmission messages, thereby realizing the transmission of the entire target data. This allows the amount of target data to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0192] According to the data read / write method provided in the embodiments of this application, the data transmission messages can be used to transmit one target sub-data in the target data. That is, the target data can be divided into multiple target sub-data, and multiple target sub-data can be transmitted by corresponding multiple data transmission messages, thereby realizing the transmission of the entire target data. This allows the amount of target data that needs to be read and written to be unrestricted by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read and write processing.
[0193] Figure 7 is a flowchart illustrating a data read / write method provided in an embodiment of this application. The data read / write method provided in this embodiment includes the following steps:
[0194] 701. The compute node sends a data read / write request to the storage node.
[0195] The data read / write request includes the identification information of the target data, which includes multiple target sub-data.
[0196] In this embodiment, the computing node can pre-determine the target data to be read and written, where the target data can be data such as files, and the target data can be divided into multiple target sub-data. After determining the target data, the computing node can obtain the identification information of the target data, where the identification information of the target data can be the metadata of the target data. Specifically, the computing node can obtain the metadata of the target data from its own stored metadata database, and can also obtain the metadata of the target data from the metadata database of the storage node. After obtaining the identification information of the target data, the computing node can send a data read / write request carrying the identification information of the target data to the storage node to request the storage node to perform read / write processing on the target data. It is understood that the data read / write request can specifically be a data read request or a data write request. When the data read / write request is a data read request, the data read / write request can be used to instruct the storage node to read the target data, that is, to instruct the storage node to transfer the target data to the computing node; when the data read / write request is a data write request, the data read / write request can be used to instruct the storage node to read the target data from the computing node and store the target data.
[0197] One possible implementation of this application embodiment further includes:
[0198] H1. The computation node determines the granularity of the segmentation and the starting virtual address.
[0199] In this embodiment, the computing node can be pre-configured with a partitioning granularity, which can be a criterion for dividing the target data. For example, when the target data size is 256KB and the partitioning granularity is 8KB, the target data can be divided into 32 target sub-data with a size of 8KB each. Specifically, the computing node and storage node can pre-negotiate and configure the partitioning granularity based on a private protocol. The specific value of the partitioning granularity can be determined according to the actual situation, and this embodiment does not limit it.
[0200] In this embodiment, to enable read and write processing of target data, the computing node can also allocate corresponding virtual addresses for the target data or target sub-data. The virtual address of the target data or target sub-data refers to the virtual address required for transmitting the target data or target sub-data. Specifically, the computing node can first determine the starting virtual address of the target data, which can be the virtual address of the first target sub-data among multiple target sub-data corresponding to the target data. For example, the starting virtual address can be represented by VA0.
[0201] H2. The computing nodes allocate virtual addresses to each target sub-data based on the segmentation granularity and the starting virtual address.
[0202] In this context, the virtual addresses of each target sub-data are consecutive virtual addresses.
[0203] In this embodiment, after determining the segmentation granularity, the computing node can segment the target data based on the segmentation granularity, determine the data size of each target sub-data, and allocate consecutive virtual addresses to each target sub-data according to the segmentation granularity and the starting virtual address. Specifically, consecutive virtual addresses can be allocated to each target sub-data based on VAx = VA0 + a*x, where VAx refers to the virtual address of the x-th target sub-data, a is the segmentation granularity, and VA0 is the starting virtual address. It can be understood that after allocating virtual addresses to each target sub-data, the computing node can send the virtual address of each target sub-data to the network interface card (NIC), so that the NIC can complete the data transmission of each target sub-data according to its virtual address, thereby realizing the read and write processing of the target data.
[0204] In one possible implementation of this application embodiment, the data read / write request further includes a starting virtual address. In this embodiment, after the computing node allocates a virtual address for each target sub-data corresponding to the target data, it can send the starting virtual address to the storage node through a data read / write request. This allows the storage node to determine the virtual address of each target sub-data based on the starting virtual address and the pre-configured segmentation granularity, enabling the storage node to complete data transmission for each target sub-data based on its virtual address, thereby achieving read / write processing of the target data. It should be noted that carrying only the starting virtual address in the data read / write request further reduces resource overhead during target data read / write processing and improves the utilization rate of transmission resources.
[0205] In one possible implementation of this application's embodiments, the data read / write request further includes the virtual address of each target sub-data. In this embodiment, after the computing node allocates a virtual address for each target sub-data corresponding to the target data, it can send the virtual address of each target sub-data to the storage node through the data read / write request. This allows the storage node to directly determine the virtual address of each target sub-data based on the data read / write request, enabling the storage node to complete the data transmission of each target sub-data based on its virtual address, thereby achieving read / write processing of the target data.
[0206] 702. The storage node receives data read / write requests from the compute node.
[0207] The data read / write request includes the identification information of the target data, which includes multiple target sub-data.
[0208] In this embodiment, the storage node can receive data read / write requests carrying identification information of target data from the computing node. In certain cases, the storage node may be a storage node with a low cache capacity. Specifically, after receiving the data read / write request, the CPU in the storage node can parse the identification information and other parameters of the target data from the request. This allows the CPU to segment the data read / write request from the computing node into multiple target read / write requests, and to perform read / write processing on the target sub-data corresponding to each target read / write request separately. This ensures that the amount of target data requiring read / write processing is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the data volume during read / write processing.
[0209] 703. Storage nodes use hardware acceleration devices to divide data read / write requests into multiple target read / write requests.
[0210] Each target read / write request corresponds to a target sub-data, and the target read / write request includes the storage address of the target sub-data.
[0211] In this embodiment, after receiving a data read / write request, the storage node can segment the request based on its hardware acceleration device to obtain multiple target read / write requests. Specifically, after receiving the request, the storage node can determine the size of the target data based on its identifier information. Then, it can divide the target data into multiple target sub-data based on the size, and determine the storage address of each sub-data in the storage node and the virtual address for transmission. Finally, it can generate multiple target read / write requests based on the storage address of each sub-data, where each request corresponds to one sub-data and includes its storage address; that is, each request is used to read / write one sub-data. For example, if the storage node's hardware acceleration device determines the target data size to be 256KB based on its identifier information, the request can be segmented into 32 requests, where each sub-data corresponds to an 8KB target read / write request.
[0212] In one possible implementation of this application embodiment, the hardware acceleration device includes any one of a data processing unit, a network interface card (NIC), and a field-programmable gate array (FPGA). Specifically, in this application embodiment, the storage node can segment data read / write requests from the computing node into multiple target read / write requests based on any one of the hardware acceleration devices—the data processing unit, NIC, and FPGA—to further reduce the load on the central processing unit and thereby further increase the upper limit of the data volume during read / write processing.
[0213] In one possible implementation of this application embodiment, step 703, the storage node divides the data read / write request into multiple target read / write requests based on the hardware acceleration device, including:
[0214] J1. The storage node determines the granularity of the partitioning and the virtual address of each target sub-data.
[0215] In this embodiment, the storage node can be pre-configured with a partitioning granularity, which can be the radix standard for dividing the target data. For example, when the target data size is 256KB and the partitioning granularity is 8KB, the target data can be divided into 32 target sub-data with a size of 8KB each. Specifically, the compute node and storage node can pre-configure the partitioning granularity using a private protocol. The specific value of the partitioning granularity can be determined according to the actual situation, and this embodiment does not limit it. In addition, the virtual address required for transmission of the target sub-data corresponding to each target read / write request can be pre-determined so that the storage node can subsequently complete the read / write processing of the target sub-data based on the virtual address of each target sub-data, that is, complete the read / write processing of the target data.
[0216] In one possible implementation of this application embodiment, when the data read / write request further includes a starting virtual address, step J1, where the storage node determines the segmentation granularity and the virtual address of each target sub-data, includes:
[0217] J11. Assign a virtual address to each target sub-data according to the segmentation granularity and the starting virtual address.
[0218] In this context, the virtual addresses of each target sub-data are consecutive virtual addresses.
[0219] In this embodiment, when the data read / write request from the computing node also carries a starting virtual address, the storage node can parse the starting virtual address allocated by the computing node for the target data from the data read / write request. The starting virtual address can be the virtual address of the first target sub-data among multiple target sub-data corresponding to the target data. Furthermore, after determining the segmentation granularity, the storage node can segment the data volume of the target data based on the segmentation granularity, determine the data volume size of each target sub-data, and allocate consecutive virtual addresses to each target sub-data corresponding to the target data according to the segmentation granularity and the starting virtual address. Specifically, consecutive virtual addresses can be allocated to each target sub-data based on VAx = VA0 + a*x, where VAx refers to the virtual address of the x-th target sub-data, and a is the segmentation granularity.
[0220] In one possible implementation of this application embodiment, when the data read / write request also includes the virtual address of each target sub-data, that is, when the data read / write request from the computing node also carries the virtual address allocated by the computing node for each target sub-data, the storage node can directly parse the virtual address of each target sub-data from the data read / write request.
[0221] J2. The storage node determines the storage address of the target data based on the identification information of the target data.
[0222] In this embodiment, after parsing the target data's identification information from the data read / write request, the storage node can query the target data's storage address within the storage node based on the target data's storage address. It is understood that the storage node can be pre-configured with a mapping between the target data's identification information and its storage address, allowing the storage node to directly query the target data's storage address based on its identification information. Specifically, the CPU within the storage node can perform the query for the target data's storage address and send the query result to the hardware acceleration device within the storage node.
[0223] J3. The storage node generates the storage address of each target sub-data based on the partitioning granularity and the storage address of the target data.
[0224] In this embodiment, after determining the storage address of the target data, the storage node can further determine the size of the target data based on the storage address. After determining the granularity of the segmentation, the target data can be divided into multiple target sub-data based on the granularity and the size of the target data, and the size of each target sub-data can be equal to the granularity of the segmentation. For example, when the size of the target data is 256KB and the granularity of the segmentation is 8KB, the target data can be divided into 32 target sub-data with a size of 8KB each. Furthermore, since the target sub-data is obtained by segmenting the target data, the storage address of each target sub-data can be determined based on the storage address of the target data, that is, the storage address of the target data can be divided into the storage addresses of multiple target sub-data. Specifically, the storage address of each target sub-data can be generated based on the segmentation granularity and the storage address of the target data using the hardware acceleration device in the storage node.
[0225] J4. The storage node generates each target read / write request based on the storage address of each target sub-data.
[0226] In this embodiment, after obtaining the storage address and virtual address of each target sub-data, the storage node can generate a target read / write request for each target sub-data based on its corresponding storage address. This means that each generated target read / write request can carry the storage address of the target sub-data. Specifically, the target read / write request can be generated based on the hardware acceleration device in the storage node, and after generating the target read / write request, the hardware acceleration device can further activate the solid-state drive in the storage node.
[0227] 704. The storage node transmits each target sub-data according to the data transmission message corresponding to each target read / write request.
[0228] In this embodiment, after the storage node divides the data read / write request into multiple target read / write requests based on the hardware acceleration device, it can perform read / write processing on the target sub-data corresponding to each target read / write request separately. It is understood that the storage node can simultaneously perform read / write processing on the target sub-data corresponding to multiple target read / write requests through parallel processing. Furthermore, the read / write processing of each target sub-data can be independent, meaning that the read / write processing of each target sub-data is not affected by the read / write processing of other target sub-data. Since the storage node can perform read / write processing on the target sub-data corresponding to the target read / write request separately, the amount of target data requiring read / write processing is not limited by the storage node's cache capacity, thereby increasing the upper limit of the data volume during read / write processing. After determining the target data read / write request, the storage node can allocate corresponding data transmission messages for the target sub-data corresponding to the target data read / write request, so that the target sub-data can be transmitted through the data transmission messages based on the virtual address of the target sub-data.
[0229] Specifically, when the data read / write request is a read request, meaning it instructs the storage node to read the target data and send it to the compute node, the storage node can transmit the target data to the compute node through multiple data transmission messages. When the data read / write request is a write request, meaning it instructs the storage node to store the target data, the storage node can obtain the target data from the compute node through multiple data transmission messages and store the target data in the storage node's solid-state drive, thus completing the read / write processing of the target data.
[0230] In one possible implementation of this application embodiment, if the data read / write request is a data read request, step 704, where the storage node transmits each target sub-data according to the data transmission message corresponding to each target read / write request, includes:
[0231] K1, the storage node reads each target sub-data according to the storage address of each target sub-data.
[0232] In this embodiment, if the data read / write request is specifically a data read request, the storage node can read each target sub-data according to the storage address of the target sub-data in each target read / write request. Specifically, the corresponding target sub-data can be read from the solid-state drive (SSD) in the storage node according to the storage address of each target sub-data, and each target sub-data can be concurrently transferred from the SSD in the storage node to the cache of the storage node, for example, each target sub-data can be concurrently transferred to the CPU's L3 cache. It is understood that after transferring one target sub-data from the SSD in the storage node to the cache of the storage node according to a target read / write request, the SSD can notify the CPU in the storage node that the disk read is complete, until all target sub-data corresponding to each target read / write request has been transferred to the cache of the storage node. For example, the SSD can use an interrupt to notify the CPU that the target sub-data disk read is complete.
[0233] K2, the storage node transmits each target sub-data to the computing node through the corresponding data transmission message based on the virtual address of each target sub-data.
[0234] In this embodiment, after reading each target sub-data, the storage node can transfer the data to the compute node via a corresponding data transfer message based on the virtual address allocated to each target sub-data, thereby enabling the compute node to complete the reading of the target data. Specifically, after the solid-state drive in the storage node transfers each target sub-data to the storage node's cache, the hardware acceleration device in the storage node can retrieve each target sub-data from the storage node's cache and transfer it to the compute node's reserved memory based on the virtual address of each target sub-data. It is understood that when a target sub-data exists in the storage node's cache, the hardware acceleration device in the storage node can directly transfer this target sub-data to the compute node without waiting for each target sub-data to be successfully transferred to the storage node's cache before simultaneously transferring each target sub-data to the compute node.
[0235] K3. If it is determined that all target sub-transmissions have been completed, send the first indication information to the computing node.
[0236] The third indication information is used to indicate that the data read / write request has been processed.
[0237] In this embodiment, if the storage node successfully transmits the target sub-data corresponding to all target read / write requests to the computing node, it can send a third indication message to the computing node to inform it that the data read / write requests corresponding to the target data have been processed. Specifically, the CPU in the storage node can count whether each target read / write request has been processed. After the CPU determines that the target sub-data corresponding to each target read / write request has been transmitted to the computing node, the storage node can send a third indication message to the computing node to complete the processing of the data read / write requests.
[0238] In one possible implementation of this application embodiment, if the data read / write request is a data write request, step 704, where the storage node transmits each target sub-data according to the data transmission message corresponding to each target read / write request, includes:
[0239] L1: The storage node obtains each target sub-data from the computing node through the corresponding data transmission message based on the virtual address of each target sub-data.
[0240] In this embodiment, if the data read / write request is specifically a data write request, the storage node can first obtain each target sub-data from the computing node based on the virtual address allocated to each target sub-data, through the corresponding data transmission message. Specifically, after determining the virtual address of each target sub-data, the storage node can obtain each target sub-data transmitted by the computing node in parallel according to the virtual address of each target sub-data through the corresponding data transmission message, and can pre-store the received target sub-data in the cache of the storage node.
[0241] L2, the storage node stores each target sub-data based on the storage address of each target sub-data.
[0242] In this embodiment, after acquiring each target sub-data, the storage node can store each target sub-data in memory based on its storage address. Specifically, the storage node can write each target sub-data pre-stored in the cache to the solid-state drive (SSD) based on its storage address. It is understood that once a target sub-data exists in the storage node's cache, the storage node can directly write this target sub-data to the SSD without waiting for each target sub-data to be successfully transferred to the storage node's cache before simultaneously writing each target sub-data to the SSD.
[0243] L3. If it is determined that all target sub-data has been stored, send the first instruction information to the computing node.
[0244] The third indication information is used to indicate that the data read / write request has been processed.
[0245] In this embodiment, if the storage node successfully stores the target sub-data corresponding to all target read / write requests, it can send a third indication message to the computing node to inform the computing node that the data read / write requests corresponding to the target data have been processed. Specifically, the CPU in the storage node can count whether each target read / write request has been processed. After the CPU determines that the target sub-data corresponding to each target read / write request has been stored in the solid-state drive, the storage node can send a first indication message to the computing node to complete the processing of the data read / write requests.
[0246] According to the data read / write method provided in the embodiments of this application, since the storage node can divide the data read / write request from the computing node into multiple target read / write requests, and can perform read / write processing on the target sub-data corresponding to the target read / write request respectively, and transmit the target sub-data through data transmission messages, the amount of target data that needs to be read / written is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read / write processing.
[0247] To facilitate a better understanding and implementation of the above-described solutions in the embodiments of this application, specific examples of corresponding application scenarios are provided below.
[0248] Figure 8 is a schematic diagram of a distributed system provided in an embodiment of this application. The distributed system can consist of computing nodes and storage nodes. The computing nodes may include clients, IO clients, and NICs, while the storage nodes may include a DPU, DRAM, CPU, L3 cache, and SSD. The DPU may include an RDMA engine and an NVMe engine. Taking a data read request as an example, another data read / write method provided in this embodiment can be applied to the above-mentioned distributed system, specifically including the following steps:
[0249] S1. The IO Client in the compute node obtains data metadata and determines the data to be processed that needs to be read.
[0250] In this embodiment, when the amount of data to be processed is large, the computing node can divide the data into multiple RPC data read requests and send them in parallel. For example, if the amount of data to be processed is 1GB, it can be divided into 4000 target data of 256KB each, and a data read request can be sent to the storage node for each target data.
[0251] S2. The CPU in the storage node receives the data read request, queries the storage address of the target data in the SSD based on the metadata of the target data in the data read request, and notifies the NVMe engine in the DPU.
[0252] Each data read request corresponds to a target data.
[0253] S3: The DPU in the storage node splits the data read request, initiates multiple target read and write requests, and points the memory address to the L3 cache, and rings the doorbell of the SSD.
[0254] In this embodiment, the storage node can segment data read requests based on the DPU to obtain multiple target read / write requests. For example, when the target data size corresponding to a data read request is 256KB, the data read request can be segmented into 32 target read / write requests corresponding to 8KB target sub-data.
[0255] S4. The SSD in the storage node reads the target sub-data corresponding to the target read / write request and transmits the target sub-data concurrently to the L3 cache.
[0256] S5. The SSD in the storage node uses an interrupt to notify the CPU in the storage node that the disk read is complete. The CPU initiates an RDMA transfer request and rings the doorbell of the network card.
[0257] S6. The DPU in the storage node pulls each target sub-data from the L3 cache and transfers each target sub-data to the reserved memory of the compute node through multiple data transfer messages.
[0258] S7. The CPU in the storage node counts whether the target sub-data corresponding to each target read / write request has been successfully sent. If the target sub-data corresponding to each target read / write request has been successfully sent, it sends a reply to the compute node indicating that the data read request has been processed.
[0259] According to the data read / write method provided in this application, large data read / write requests can be divided into smaller data read / write requests for disk reading and transmission, reducing storage bandwidth read / write scenarios by 50% in terms of cache resource usage. Furthermore, cache reduction can be achieved in either the read or write process. It also reduces the overhead of transmitting virtual memory addresses over the network, maintaining consistency between RPC request message format and common protocols. Finally, it reduces cache waste caused by the accumulation of read / write request queues within the storage node's DPU.
[0260] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.
[0261] To facilitate better implementation of the above-described solutions in the embodiments of this application, related apparatus for implementing the above-described solutions is also provided below.
[0262] Please refer to Figure 9. An embodiment of this application provides a data read / write device, which is applied to a storage node and includes:
[0263] The receiving module 901 is used to receive data read / write requests from computing nodes, wherein the data read / write requests are read / write requests for target data;
[0264] The transmission module 902 is used to transmit the target data through multiple data transmission messages in response to the data read / write request, wherein the total amount of effective data transmitted by the multiple data transmission messages is the same as the amount of target data.
[0265] In one possible implementation of this application embodiment, a data transmission message transmits a target sub-data, which is one of a plurality of target sub-data included in the target data, and the data size of the target sub-data is less than the data size of the target data.
[0266] In one possible implementation of this application embodiment, in response to the data read / write request, the transmission module 902 is specifically used for:
[0267] The target sub-data corresponding to the data transmission message is determined based on the data read / write request and the segmentation granularity.
[0268] The target sub-data is transmitted through the data transmission message corresponding to the target sub-data.
[0269] In one possible implementation of this application embodiment, the apparatus further includes:
[0270] The receiving module 901 is further configured to receive first indication information from the computing node, the first indication information being used to indicate the segmentation granularity, the segmentation granularity being used to indicate the data volume of the target sub-data.
[0271] In one possible implementation of this application embodiment, the product of the number of data transmission messages and the segmentation granularity is equal to the data volume of the target data.
[0272] In one possible implementation of this application embodiment, the data transmission message further includes the virtual address of the target sub-data.
[0273] In one possible implementation of this application embodiment, the data read / write request includes a starting virtual address, and the virtual address of the target sub-data is determined based on the starting virtual address and the segmentation granularity.
[0274] In one possible implementation of this application embodiment, the data read / write request includes virtual addresses of a plurality of the target sub-data.
[0275] In one possible implementation of this application embodiment, the memory spaces corresponding to the virtual addresses of different target sub-data are spaced apart by N partitioning granularities.
[0276] In one possible implementation of this application embodiment, the transmission module 902 is specifically used for:
[0277] Multiple target read / write requests are determined based on the data read / write requests and the segmentation granularity. Each target read / write request is used to request a target sub-data. The target read / write request includes the storage address of the target sub-data. Each target read / write request corresponds to a data transmission message.
[0278] In one possible implementation of this application embodiment, the transmission module 902 is specifically used for:
[0279] The data read / write request is divided into multiple target read / write requests based on the hardware acceleration module in the storage node. The hardware acceleration module includes any one of a data processing unit (DPU), a network interface card (NIC), and a field-programmable gate array (FPGA).
[0280] In one possible implementation of this application embodiment, the data read / write request includes identification information of the target data, and the transmission module 902 is specifically used for:
[0281] The storage address of the target data is determined based on the identification information of the target data;
[0282] Based on the segmentation granularity and the storage address of the target data, multiple storage addresses of the target sub-data are generated;
[0283] Multiple target read / write requests are generated based on the storage addresses of multiple target sub-data.
[0284] In one possible implementation of this application embodiment, the apparatus further includes:
[0285] The transmission module 902 is further configured to send a second indication message to the computing node if it is determined that all the target sub-data included in the target data has been transmitted. The second indication message is used to indicate that the data read / write request has been processed.
[0286] In one possible implementation of this application embodiment, the data transmission message is a Remote Direct Memory Access Input / Output (RDMA IO) message.
[0287] According to the data read / write apparatus provided in the embodiments of this application, since the storage node can transmit the entire target data through multiple data transmission messages after receiving a data read / write request for reading and writing target data, that is, only a part of the target data is transmitted through a data transmission message, the amount of target data that needs to be read / written is not limited by the cache capacity of the storage node, thereby increasing the upper limit of the amount of data during read / write processing.
[0288] Please refer to Figure 10. An embodiment of this application provides a data read / write device, which is applied to a computing node and includes:
[0289] Sending module 1001 is used to send a data read / write request to the storage node, wherein the data read / write request is a read / write request for target data;
[0290] The transmission module 1002 is used to transmit the target data through multiple data transmission messages, wherein the total amount of effective data transmitted by the multiple data transmission messages is the same as the amount of data of the target data.
[0291] In one possible implementation of this application embodiment, a data transmission message transmits a target sub-data, which is one of a plurality of target sub-data included in the target data, and the data size of the target sub-data is less than the data size of the target data.
[0292] In one possible implementation of this application embodiment, the apparatus further includes:
[0293] The sending module 1001 is further configured to send first indication information to the storage node, the first indication information being used to indicate the segmentation granularity, the segmentation granularity being used to indicate the data volume of the target sub-data.
[0294] In one possible implementation of this application embodiment, the product of the number of data transmission messages and the segmentation granularity is equal to the data volume of the target data.
[0295] In one possible implementation of this application embodiment, the data transmission message further includes the virtual address of the target sub-data.
[0296] In one possible implementation of this application embodiment, the data read / write request includes a starting virtual address, and the virtual address of the target sub-data is determined based on the starting virtual address and the segmentation granularity.
[0297] In one possible implementation of this application embodiment, the data read / write request includes virtual addresses of a plurality of the target sub-data.
[0298] In one possible implementation of this application embodiment, the memory spaces corresponding to the virtual addresses of different target sub-data are spaced apart by N partitioning granularities.
[0299] In one possible implementation of this application embodiment, the apparatus further includes:
[0300] The allocation module is used to allocate a virtual address to each of the target sub-data according to the segmentation granularity and the starting virtual address.
[0301] In one possible implementation of this application embodiment, the data transmission message is an RDMA IO message.
[0302] According to the data read / write apparatus provided in the embodiments of this application, the computing node can send a data read / write request to the storage node for reading and writing target data. This allows the storage node to transmit the entire target data through multiple data transmission messages after receiving the data read / write request. In other words, only a portion of the target data can be transmitted through a single data transmission message. This allows the amount of target data that needs to be read / written to be unrestricted by the storage node's cache capacity, thereby increasing the upper limit of the amount of data during read / write processing.
[0303] In this embodiment, the module is an example of a software functional unit, and the data processing device may include code running on a computing instance. The computing instance may be at least one of a physical host (computer device), a virtual machine, a container, or other computer device. Further, the aforementioned computer device may be one or more. For example, the data processing device may include code running on multiple hosts / virtual machines / containers. It should be noted that the multiple hosts / virtual machines / containers used to run the application may be distributed in the same region or in different regions. The multiple hosts / virtual machines / containers used to run the code may be distributed in the same available zone (AZ) or in different AZs, each AZ including one or more geographically proximate data centers. Typically, a region may include multiple AZs.
[0304] Similarly, multiple hosts / virtual machines / containers used to run this code can be distributed within the same Virtual Private Cloud (VPC) or across multiple VPCs. Typically, a VPC is set up within a single region. Communication between two VPCs within the same region, and between VPCs in different regions, requires a communication gateway to be set up within each VPC to enable interconnection between VPCs.
[0305] As an example of a hardware functional unit, a data processing device may include at least one computer device, such as a server. Alternatively, the data processing device may also be a device implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The aforementioned PLD may be implemented using a complex PLD (CPLD), a field-programmable gate array (FPGA), generic array logic (GAL), or any combination thereof.
[0306] The data processing device comprises multiple computer devices that can be distributed within the same region or in different regions. Similarly, the multiple computer devices can be distributed within the same Availability Zone (AZ) or in different AZs. Likewise, the multiple computer devices can be distributed within the same Virtual Private Cloud (VPC) or multiple VPCs. These multiple computer devices can be any combination of computer devices such as servers, ASICs, PLDs, CPLDs, FPGAs, and GALs.
[0307] This application also provides a computer device 130. As shown in FIG11, the computer device 130 includes a bus 132, a processor 134, a memory 136, and a communication interface 138. The processor 134, the memory 136, and the communication interface 138 communicate with each other via the bus 132. The computer device 130 may be a server or a terminal device. It should be understood that this application does not limit the number of processors and memories in the computer device 130.
[0308] Bus 132 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, only one line is used in Figure 11, but this does not imply that there is only one bus or one type of bus. Bus 134 can include pathways for transmitting information between various components of computer device 130 (e.g., memory 136, processor 134, communication interface 138).
[0309] The processor 134 may include any one or more processors such as a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP).
[0310] Memory 136 may include volatile memory, such as random access memory (RAM). Processor 134 may also include non-volatile memory, such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid state drive (SSD).
[0311] The memory 136 stores executable program code, and the processor 134 executes the executable program code to implement the functions of the aforementioned acquisition module and training module, thereby realizing the data processing method applied to the computer device cluster in the above embodiment. That is, the memory 136 stores instructions for executing the data processing method applied to the computer device cluster in the above embodiment.
[0312] The communication interface 138 uses transceiver modules such as, but not limited to, network interface cards and transceivers to enable communication between the computer device 130 and other devices or communication networks.
[0313] This application also provides a computer program product that, when run on a computer, causes the computer to execute the steps performed by the prompting processing device in the method described in the foregoing embodiments.
[0314] The prompting processing device provided in this application embodiment can be a chip, which includes a processing unit and a communication unit. The processing unit can be, for example, a processor, and the communication unit can be, for example, an input / output interface, pins, or circuits. The processing unit can execute computer execution instructions stored in the storage unit to cause the chip within the server to execute the prompting processing method described in the above embodiments. Optionally, the storage unit can be a storage unit within the chip, such as a register or cache. Alternatively, the storage unit can be a storage unit located outside the chip within the wireless access device, such as a read-only memory (ROM) or other types of static storage devices capable of storing static information and instructions, such as random access memory (RAM).
[0315] Specifically, the aforementioned processing unit or processor can be a central processing unit (CPU), a neural-network processing unit (NPU), a graphics processing unit (GPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.
[0316] For example, please refer to Figure 12, which is a schematic diagram of a chip structure provided in an embodiment of this application. The chip can be represented as a neural network processor NPU120. The NPU120 is mounted as a coprocessor on the host CPU, and the host CPU allocates tasks. The core part of the NPU is the arithmetic circuit 120, which is controlled by the controller 1204 to extract matrix data from the memory and perform multiplication operations.
[0317] In some implementations, the arithmetic circuit 1203 internally includes multiple process engines (PEs). In some implementations, the arithmetic circuit 1203 is a two-dimensional pulsating array. The arithmetic circuit 1203 can also be a one-dimensional pulsating array or other electronic circuits capable of performing mathematical operations such as multiplication and addition. In some implementations, the arithmetic circuit 1203 is a general-purpose matrix processor.
[0318] For example, suppose we have an input matrix A, a weight matrix B, and an output matrix C. The arithmetic circuit retrieves the corresponding data of matrix B from the weight memory 1202 and caches it in each PE of the arithmetic circuit. The arithmetic circuit retrieves the data of matrix A from the input memory 1201 and performs matrix operations with matrix B. The partial result or the final result of the obtained matrix is stored in the accumulator 1208.
[0319] Unified memory 1206 is used to store input and output data. Weight data is directly transferred to weight memory 1202 via direct memory access controller (DMAC) 1205. Input data is also transferred to unified memory 1206 via DMAC.
[0320] The bus interface unit (BIU) 1210 is used for interaction between the bus and the DMAC and the instruction fetch buffer (IFB) 1209.
[0321] The bus interface unit 1210 (BIU) is used by the instruction fetch memory 1209 to fetch instructions from external memory, and also by the memory access controller 1205 to fetch the original data of the input matrix A or the weight matrix B from external memory.
[0322] The DMAC is mainly used to move input data from external memory DDR to unified memory 1206, or to weight data to weight memory 1202, or to input data to input memory 1201.
[0323] The vector computation unit 1207 includes multiple arithmetic processing units that, when needed, further process the output of the computation circuit, such as vector multiplication, vector addition, exponential operations, logarithmic operations, size comparisons, etc. It is mainly used for computation in non-convolutional / fully connected layers of neural networks, such as batch normalization, pixel-level summation, and upsampling of feature planes.
[0324] In some implementations, the vector computation unit 1207 can store the processed output vector in the unified memory 1206. For example, the vector computation unit 1207 can apply linear and / or nonlinear functions to the output of the computation circuit 1203, such as performing linear interpolation on the feature planes extracted by the convolutional layer, or, for example, accumulating a vector of values to generate activation values. In some implementations, the vector computation unit 1207 generates normalized values, pixel-level summed values, or both. In some implementations, the processed output vector can be used as an activation input to the computation circuit 1203, for example, for use in subsequent layers of the neural network.
[0325] The instruction fetch buffer 1209 connected to the controller 1204 is used to store the instructions used by the controller 1204;
[0326] Unified memory 1206, input memory 1201, weight memory 1202, and instruction fetch memory 1209 are all on-chip memories. External memory is proprietary to this NPU hardware architecture.
[0327] The operations of each layer in the recurrent neural network can be performed by the operation circuit 1203 or the vector calculation unit 1207.
[0328] The processor mentioned above can be a general-purpose central processing unit, a microprocessor, an ASIC, or one or more integrated circuits used to control the execution of the program for the above-described prompt processing method.
[0329] It should also be noted that the device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. In addition, in the device embodiment drawings provided in this application, the connection relationship between modules indicates that they have a communication connection, which can be implemented as one or more communication buses or signal lines.
[0330] Through the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary general-purpose hardware, or it can be implemented by special-purpose hardware including application-specific integrated circuits, special-purpose CPUs, special-purpose memory, special-purpose components, etc. Generally, any function performed by a computer program can be easily implemented by corresponding hardware, and the specific hardware structure used to implement the same function can also be diverse, such as analog circuits, digital circuits, or special-purpose circuits. However, for this application, software program implementation is more often the preferred implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a readable storage medium, such as a computer floppy disk, USB flash drive, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.
[0331] In the above embodiments, the implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, in the form of a computer program product.
[0332] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state disk (SSD)).
[0333] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in a sequence other than that illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0334] Finally, it should be noted that the above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A data read / write method, characterized in that, Applied to storage nodes, the method includes: Receive data read / write requests from computing nodes, wherein the data read / write requests are read / write requests for target data; In response to the data read / write request, the target data is transmitted through multiple data transmission messages, wherein the total amount of valid data transmitted by the multiple data transmission messages is the same as the amount of target data.
2. The method according to claim 1, characterized in that, A data transmission message transmits a target sub-data, which is one of a plurality of target sub-data included in the target data, and the data size of the target sub-data is less than the data size of the target data.
3. The method according to claim 2, characterized in that, The step of transmitting the target data in response to the data read / write request via multiple data transmission messages includes: The target sub-data corresponding to the data transmission message is determined based on the data read / write request and the segmentation granularity. The target sub-data is transmitted through the data transmission message corresponding to the target sub-data.
4. The method according to claim 2 or 3, characterized in that, The method further includes: Receive first indication information from the computing node, the first indication information being used to indicate the segmentation granularity, the segmentation granularity being used to indicate the data volume of the target sub-data.
5. The method according to any one of claims 1 to 4, characterized in that, The product of the number of data transmission messages and the segmentation granularity is equal to the data volume of the target data.
6. The method according to any one of claims 2 to 5, characterized in that, The data transmission message also includes the virtual address of the target sub-data.
7. The method according to claim 6, characterized in that, The data read / write request includes a starting virtual address, and the virtual address of the target sub-data is determined based on the starting virtual address and the segmentation granularity.
8. The method according to any one of claims 2 to 6, characterized in that, The data read / write request includes the virtual addresses of multiple target sub-data.
9. The method according to any one of claims 6 to 8, characterized in that, The memory spaces corresponding to the virtual addresses of the different target sub-data are spaced apart by N partitioning granularities.
10. The method according to claim 3, characterized in that, The step of determining the target sub-data corresponding to each data transmission message based on the data read / write request and the segmentation granularity includes: Multiple target read / write requests are determined based on the data read / write requests and the segmentation granularity. Each target read / write request is used to request a target sub-data. The target read / write request includes the storage address of the target sub-data. Each target read / write request corresponds to a data transmission message.
11. The method according to claim 10, characterized in that, The step of determining multiple target read / write requests based on the data read / write requests and the segmentation granularity includes: The data read / write request is divided into multiple target read / write requests based on the hardware acceleration module in the storage node. The hardware acceleration module includes any one of a data processing unit (DPU), a network interface card (NIC), and a field-programmable gate array (FPGA).
12. The method according to claim 10, characterized in that, The data read / write request includes the identification information of the target data. Determining multiple target read / write requests based on the data read / write request and the segmentation granularity includes: The storage address of the target data is determined based on the identification information of the target data; Based on the segmentation granularity and the storage address of the target data, multiple storage addresses of the target sub-data are generated; Multiple target read / write requests are generated based on the storage addresses of multiple target sub-data.
13. The method according to any one of claims 3 to 12, characterized in that, The method further includes: If it is determined that all the target sub-data included in the target data has been transmitted, a second indication message is sent to the computing node. The second indication message is used to indicate that the data read / write request has been processed.
14. The method according to any one of claims 1 to 13, characterized in that, The data transmission message is a Remote Direct Memory Access Input / Output (RDMA IO) message.
15. A data read / write method, characterized in that, Applied to a computing node, the method includes: Send a data read / write request to the storage node, wherein the data read / write request is a read / write request for the target data; The target data is transmitted through multiple data transmission messages, and the total amount of effective data transmitted by the multiple data transmission messages is the same as the amount of target data.
16. The method according to claim 15, characterized in that, A data transmission message transmits a target sub-data, which is one of a plurality of target sub-data included in the target data, and the data size of the target sub-data is less than the data size of the target data.
17. The method according to claim 15 or 16, characterized in that, The method further includes: Send a first indication message to the storage node. The first indication message is used to indicate the granularity of the segmentation. The granularity of the segmentation is used to indicate the amount of data in the target sub-data.
18. The method according to any one of claims 15 to 17, characterized in that, The product of the number of data transmission messages and the segmentation granularity is equal to the data volume of the target data.
19. The method according to any one of claims 15 to 18, characterized in that, The data transmission message also includes the virtual address of the target sub-data.
20. The method according to claim 19, characterized in that, The data read / write request includes a starting virtual address, and the virtual address of the target sub-data is determined based on the starting virtual address and the segmentation granularity.
21. The method according to any one of claims 15 to 19, characterized in that, The data read / write request includes the virtual addresses of multiple target sub-data.
22. The method according to any one of claims 19 to 21, characterized in that, The memory spaces corresponding to the virtual addresses of the different target sub-data are spaced apart by N partitioning granularities.
23. The method according to any one of claims 15 to 22, characterized in that, The method further includes: A virtual address is assigned to each of the target sub-data based on the segmentation granularity and the starting virtual address.
24. The method according to any one of claims 15 to 23, characterized in that, The data transmission message is an RDMA IO message.
25. A data read / write device, characterized in that, The device is used in a storage node, and the device includes: The receiving module is used to receive data read / write requests from computing nodes, wherein the data read / write requests are read / write requests for target data; The transmission module is used to respond to the data read / write request by transmitting the target data through multiple data transmission messages, wherein the total amount of valid data transmitted by the multiple data transmission messages is the same as the amount of target data.
26. A data read / write device, characterized in that, The device is applied to a computing node, and the device includes: The sending module is used to send data read / write requests to the storage node, wherein the data read / write request is a read / write request for the target data; The transmission module is used to transmit the target data through multiple data transmission messages, wherein the total amount of valid data transmitted by the multiple data transmission messages is the same as the amount of target data.
27. A computer device, characterized in that, The device includes: Memory is used to store computer programs or computer instructions; A processor for executing a computer program or computer instructions stored in the memory, causing the computer device to perform the method as claimed in any one of claims 1 to 14, or the method as claimed in any one of claims 15 to 24.
28. A computer storage medium for storing a computer program, which, when executed, is used to implement the method of any one of claims 1 to 14, or to implement the method of any one of claims 15 to 24.
29. A computer program product comprising instructions that, when run on a computer, causes the computer to perform the method as claimed in any one of claims 1 to 14, or to perform the method as claimed in any one of claims 15 to 24.
30. A chip, the chip comprising a processor and a data interface, the processor reading instructions stored in a memory through the data interface to execute the method as described in any one of claims 1 to 14, or to execute the method as described in any one of claims 15 to 24.