Integrated circuit

Abstract

An integrated circuit comprising a stacked structure having first and second conductive layers and a dielectric layer arranged therebetween. The first conductive layer comprises an electrical contact pad having a first shape, in a cross section taken through the contact pad and orthogonal to a stacking axis of the stacked structure. The second conductive layer comprises a structure electrically connected to the contact pad by one or more vias across the dielectric layer. The structure has a second shape, in a cross section taken through the structure and orthogonal to the stacking axis, the second shape being a different geometric shape from the first shape.

Description

INTEGRATED CIRCUITTechnical Field

[0001] The present disclosure concerns integrated circuits. More particularly, but not exclusively, the disclosure concerns integrated circuits comprising electrical contact pads, and methods of manufacturing such integrated circuits.

[0002] Integrated circuits are an essential part of many electrical systems. Integrated circuits (IC) may include one or more electrical contact pads (also referred to as ‘electrically conductive pads’, or simply ‘contact pads’) to allow electrical connection between the IC and an external device, such as a test pin or an application circuit. It will be appreciated by the skilled person that the term ‘application circuit’ refers to a circuit which is external to the integrated circuit and is arranged to connect to and operate with the integrated circuit. For example, an application circuit may comprise a printed circuit board (PCB) onto which the integrated circuit is to be mounted. A conductor (e.g. solder, conductive adhesive) may be used to bond an electrical contact pad to an external device, enabling transfer of signals and / or power via the electrical contact pad.

[0003] Electrical contact pads typically take the form of a relatively large square or rectangle (e.g. 150pm x 150pm) in a conductive layer of the IC. In some cases, the electrical contact pad is mounted to, or forms part of, a top layer or surface of the IC. The top layer may be the top layer of a stacked structure, or simply ‘stack’, forming part of the IC. This square or rectangle is then typically replicated in the other conductive layers of the stack, in a vertical column. The other conductive layers may be, for example, tracking I interconnection or device (e.g. source, drain or gate) layers. The stack may also include dielectric layers separating the conductive layers from one another. The conductive layers may be electrically connected to one another by vias across the dielectric layers.

[0004] Integrated circuits, or portions thereof, may comprise relatively small and / or fragile structures. Various techniques may be used to manufacture such structures, including, for example, plasma etching techniques. If such smalland / or fragile structures are formed inaccurately (or fail to be formed at all), this can impact the resulting performance of the integrated circuit.

[0005] The present disclosure seeks to mitigate the above-mentioned problems. Alternatively or additionally, the present disclosure seeks to provide an improved integrated circuit. Alternatively or additionally, the present disclosure seeks to provide an improved method of manufacturing an integrated circuit, and / or an improved electrical contact pad for an integrated circuit.Summary

[0006] The present disclosure provides, according to a first aspect, an integrated circuit comprising:a stacked structure comprising:a first conductive layer;a second conductive layer; anda dielectric layer arranged between the first conductive layer and the second conductive layer,wherein:the first conductive layer comprises an electrical contact pad for interfacing with an external device, the electrical contact pad having a first shape, in a cross section taken through the electrical contact pad and orthogonal to a stacking axis of the stacked structure,the second conductive layer comprises a conductive structure which is electrically connected to the electrical contact pad by one or more vias across the dielectric layer, the conductive structure having a second shape, in a cross section taken through the conductive structure and orthogonal to the stacking axis of the stacked structure, andthe second shape is a different geometric shape from the first shape.

[0007] According to a second aspect of the disclosure there is also provided a method of manufacturing an integrated circuit, the method comprising:forming a stacked structure comprising:a first conductive layer comprising an electrical contact pad for interfacing with an external device, the electrical contact pad having a first shape, in a cross section taken through the electrical contact pad and orthogonal to a stacking axis of the stacked structure;a second conductive layer comprising a conductive structure, the conductive structure having a second shape, in a cross section taken through the conductive structure and orthogonal to the stacking axis of the stacked structure; anda dielectric layer arranged between the first conductive layer and the second conductive layer; andelectrically connecting the conductive structure to the electrical contact pad by one or more vias across the dielectric layer,wherein the second shape is a different geometric shape from the first shape.

[0008] According to a third aspect of the disclosure there is also provided a conductive structure for an integrated circuit, the integrated circuit comprising an electrical contact pad for interfacing with an external device,wherein the conductive structure is operable to be arranged in a stacked structure comprising the electrical contact pad and to be electrically connected to the electrical contact pad by one or more vias, andwherein the conductive structure has a shape, in a cross section taken through the conductive structure and orthogonal to a stacking axis of the stacked structure, that has no more than one line of symmetry.

[0009] According to a fourth aspect of the disclosure there is also provided a C-shaped electrical contact pad for an integrated circuit.

[0010] According to a fifth aspect of the disclosure there is also provided a flexible integrated circuit comprising a C-shaped electrical contact pad.

[0011] It will of course be appreciated that features described in relation to one aspect of the present disclosure may be incorporated into other aspects of the present disclosure. For example, the method of the disclosure may incorporate any of the features described with reference to the apparatus of the disclosure and vice versa.Description of the Drawings

[0012] Embodiments of the present disclosure will now be described by way of example only with reference to the accompanying schematic drawings of which:Figures 1 A to 1 D show schematic views of an integrated circuit;Figures 2A to 2E show schematic views of an integrated circuit according to the present disclosure;Figure 3 shows a schematic view of a conductive structure for an integrated circuit according to the present disclosure;Figures 4A to 4F show schematic views of an integrated circuit according to the present disclosure; andFigure 5 shows a flow chart illustrating the steps of a method according to the present disclosure.Detailed Description

[0013] Figures 1Ato 1D are schematic views of a known integrated circuit 100, provided for context. The integrated circuit 100 comprises a stacked structure comprising a first conductive layer 110, a second conductive layer 120, and a dielectric layer 130 arranged between the first conductive layer 110 and the second conductive layer 120. The stacked structure has a stacking axis 102 (shown in Figure 1 C), namely an axis along which the layers are stacked. The first conductive layer 110 comprises an electrical contact pad 115. The electrical contact pad 115 is for interfacing with an external device (i.e. a device external to the integrated circuit 100), such as an application circuit or a testing device. The electrical contact pad 115, when viewed in plan, may take the form of a square or rectangle. This is illustrated in Figure 1A, which shows a cross section taken through the electrical contact pad 115 and orthogonal to the stacking axis 102. That is, Figure 1A shows a top-down (or plan) cross section of the electrical contact pad 115. The shape of the electrical contact pad 115 may allow for physical contact with an external device, e.g. via a test pin. Figure 1B shows a cross section taken through the second conductive layer 120 and orthogonal to the stacking axis. As shown in Figure 1 B, the second conductive layer 120 comprises a conductive structure 125 having a the same shape and size to the electrical contact pad 115. The conductive structure 125 is electrically connected to the electrical contact pad 115 by a large via 135 across the dielectric layer 130. The second conductive layer 120 may correspond to, for example, a tracking I interconnection or device (e.g. source, gate or drain) layer of the integrated circuit 100. Figure 1C shows a cross section taken through the stack along an axis 104 that is orthogonal to the stacking axis 102.As such, Figure 1C shows a ‘side-on’ cross section through the layers of the stacked structure. Figure 1 D shows a more detailed view of a cross section taken through the layers of the stack along the axis 104. Figure 1 D shows the contact pad layer 115 and an upper tracking metal layer 125, with a dielectric layer 130 supporting each. This structure may be repeated in lower layers beneath the upper tracking metal layer 125.

[0014] The first conductive layer 110 may comprise an outer layer of the integrated circuit 100. For example the first conductive layer 110 may comprise a top layer or a bottom layer. These layers, which may be termed redistribution layers, may be used to mount the integrated circuit 100 to an application circuit, for example. In other cases, the first conductive layer 110 may comprise an intermediate (or ‘inner’) layer of the integrated circuit. It will be appreciated by the skilled person that integrated circuits may generally have a substantially planar structure comprising a number of layers.

[0015] Embodiments of the present disclosure will now be described. The present disclosure is based at least in part on a realisation by the inventors that areas of high local layer pattern density (e.g. within an order of pm to mm) can prevent accurate formation of fragile structures in other areas of that layer during the manufacturing of integrated circuits. Such fragile structures may include, for example, small gaps (such as those smaller than 1 pm, e.g. 0.6 pm) in transistor or resistor structures. This effect may particularly, but not exclusively, be observed when using plasma etching techniques. Nonuniformities in plasma etching may be due to the etchant being consumed at a greater rate in areas of low pattern density in a conductive layer and at a lower rate in other, higher pattern density, areas of that layer. “Pattern density” may refer to the pattern that is to remain after etching. That is, areas of low pattern density have less metal remaining and thus require more metal to be etched (i.e. removed). Areas of high pattern density, on the other hand, have more metal remaining and thus require less metal to be etched. Where there is a disproportionately high variation of pattern density, therefore, this may lead to defects and / or damage in some of the etched features. Accordingly, it is desirable to provide a more homogeneous pattern density in the layers of the integrated circuit.

[0016] Figures 2A to 2E show schematically examples of an integrated circuit 200 according to the present disclosure. Compared to the integrated circuit 100 shown in Figures 1A to 1D, the integrated circuit 200 enables a more reliable and / or accurate manufacture of small components and / or gaps during production of integrated circuits. In particular, but not exclusively, the integrated circuit 200 provides an improved performance by plasma etching processes.

[0017] The integrated circuit 200 comprises a stacked structure comprising a first conductive layer 210, a second conductive layer 220, and a dielectric layer 230 arranged between the first conductive layer 210 and the second conductive layer 220. The stacked structure may comprise further layers in some cases. The stacked structure has a stacking axis 202, namely an axis along which the layers are stacked. This is shown in Figure 2C. The first conductive layer 210 comprises an electrical contact pad 215. The electrical contact pad 215 may be substantially similar to the electrical contact pad 115 described above. It will be understood that the first conductive layer 210 may comprise other structures and / or components in addition to the electrical contact pad 215. For example, the first conductive layer 210 may comprise one or more further electrical contact pads. Alternatively, the first conductive layer 210 may comprise only the electrical contact pad 215. Figure 2A shows a cross section taken through the electrical contact pad 215 and orthogonal to the stacking axis 202. That is, Figure 2A shows a top-down (or plan) cross section of the electrical contact pad 215. The second conductive layer 220 comprises a conductive structure 225 which is electrically connected to the electrical contact pad 215. Figure 2B shows a cross section taken through the conductive structure 225 of the second conductive layer 220 and orthogonal to the stacking axis 202. The conductive structure 225 may be referred to as a ‘contact pad element’ or ‘contact pad structure’, in that it is electrically connected to the contact pad 215. It will be understood that the second conductive layer 220 may comprise other structures and / or components in addition to the conductive structure 225 shown. For example, the second conductive layer 220 may comprise one or more tracking I interconnection features or device structures (e.g. transistor source, gate or drain electrodes, resistor electrodes, capacitor plates). Figure 2C shows a cross section taken through the stack along an axis 204 that is orthogonal to the stacking axis 202. As such, Figure 2C shows a ‘side-on’ cross section throughthe layers of the stacked structure. The conductive structure 225 of the second conductive layer 220 is electrically connected to the electrical contact pad 215 by one or more vias 235. In the example of Figure 2C, the footprint of the conductive structure 225 has the same spatial extent (e.g. width) as that of the electrical contact pad 215. Figures 2D and 2E show alternative examples of the integrated circuit 200, in a ‘side-on’ cross section through the layers of the stacked structure. In the example of Figure 2D, the footprint of the conductive structure 225 has a smaller material area that covers a larger spatial extent (e.g. overall width) than that of the electrical contact pad 215. In the example of Figure 2E, the footprint of the conductive structure 225 has a smaller material area that covers a smaller spatial extent (e.g. overall width) than that of the electrical contact pad 215.

[0018] The electrical contact pad 215 has a first shape, in a cross section taken through the electrical contact pad 215 and orthogonal to a stacking axis 202 of the stacked structure. The conductive structure 225 of the second conductive layer 220 has a second shape, in a cross section taken through the conductive structure 225 and orthogonal to the stacking axis 202. The second shape is different from the first shape. That is, the second shape is a different geometric shape from the first shape. The first and second shapes are different such that one of the first shape and second shape is not an enlargement, rotation and / or reflection of the other of the first shape and second shape. The second shape may not merely be an enlargement or shrinking of the first shape, for example. For example, if the first shape is a square, the second shape is not a square. Similarly, if the first shape is a non-square rectangle, the second shape is not a non-square rectangle. In some cases, the second shape is neither a square nor a rectangle .whereas the first shape is a square or a rectangle. In other words, the difference between the first shape and the second shape is a difference in a shape property other than size.

[0019] An example of such a difference is shown in Figures 2A and 2B, in which the ‘top-down’ cross section of the electrical contact pad 215 has a square shape, whereas the corresponding cross section of the second conductive layer 220 has a ‘C’ shape, with a ‘void’ in the centre. It will be understood that the C shape shown in Figure 2B is merely an example, and that other shapes may be used for the second conductive layer 220. Some such alternatives aredescribed further below. The shape of the conductive structure 225 of the second conductive layer 220 may enable the footprint (or material area) of the conductive structure 225 to be reduced compared to the footprint of the comparative conductive structure 125. The footprint of the conductive structure 225 may correspond to a surface area of the second shape. The comparative conductive structure 125 described above with reference to Figures 1A to 1 D, which has the same ‘top-down’ cross-sectional shape as the electrical contact pad 115, comprises a relatively large, solid structure of conductive material, which therefore is an area of high pattern density. As mentioned above, such structures or areas of high pattern density may consume plasma etchant at a lower rate than other structures or areas, which may lead to damage and / or the prevention of accurate formation of small or fragile structures or gaps, e.g. in transistor or resistor structures. By changing the shape of the conductive structure 225, the distribution of pattern density over the whole of the second layer 220, including any other structures or components, may be tailored and / or made more homogeneous (e.g. to maintain a more constant pattern density across the layer). This improves a plasma etching performance and enables the more accurate formation of fragile or small structures elsewhere in the second conductive layer 220.

[0020] The conductive structure 225 of the second conductive layer 220 may have a different footprint than the electrical contact pad 215. For example, the conductive structure 225 may have a smaller footprint than the electrical contact pad 215. ‘Footprint’ in this context will be understood to refer to an area that is covered, or occupied, by a given structure. The footprint of the electrical contact pad 115 may correspond to a surface area of the first shape, whereas the footprint of the conductive structure 225 may correspond to a surface area of the second shape. A smaller footprint for the conductive structure 225 of the second conductive layer 220 is achieved in the example shown in Figures 2A to 2E by effectively removing a central portion of the conductive structure 125 shown in the comparative example of Figures 1 A to 1 D. Accordingly, while the conductive structure 225 may have the same, or even a larger, spatial extent (e.g. in terms of its maximum width and / or length) as the electrical contact pad 215, it may have a smaller footprint, because it covers or occupies less area. By reducing the footprint of the conductive structure 225, the distribution ofpattern density over the whole of that layer, including any other structures or components, may be tailored and / or made more homogeneous (e.g. to maintain a more constant pattern density across the layer), thereby improving plasma etching performance and enabling the accurate formation of fragile or small structures elsewhere in the second conductive layer 220. The footprint of the conductive structure 225 may be the same as the footprint of the electrical contact pad 215 in some cases.

[0021] The conductive structure 225 of the second conductive layer 220 may in some cases may be referred to as an ‘electrical contact pad’ itself, e.g. where such a pad is for interfacing with external devices and / or with devices or structures internal to the integrated circuit 200, such as the electrical contact pad 215 of the first conductive layer 210. As such, in some cases, the electrical contact pad 215 of the first conductive layer 210 may be referred to as a ‘top pad’, and the conductive structure 225 of the second conductive layer 220 may be referred to as an ‘other pad’ or ‘intermediate pad’. It will be understood, however, that in other examples the conductive structure 225 of the second conductive layer 220 may not comprise or be an electrical contact pad. Moreover, it will be appreciated that the electrical contact pad 215 of the first conductive layer 210 may in some cases not be a ‘top pad’, but may be a contact pad at an intermediate or middle layer of the integrated circuit 200, for example. The conductive structure 225 of the second conductive layer 220 facilitates an electrical connection between the contact pad 215 of the first conductive layer 210 and electrical circuitry within the integrated circuit 200.

[0022] The electrical contact pad 215 may comprise (e.g. be formed of) a first amount of conductive material, and the conductive structure 225 may comprise (e.g. be formed of) a second amount of conductive material, less than the first amount. In some cases, the electrical contact pad 215 and the conductive structure 225 may initially be formed from the same amount of material, but a portion of the conductive structure 225 may then be selectively removed, thus resulting in less conductive material than the electrical contact pad 215. Additionally or alternatively, the electrical contact pad 215 may be thicker than the conductive structure 225. Accordingly, the local pattern density in the second conductive layer 220 may be tuned to benefit a plasma etching step.

[0023] Conductive materials may be selected from one or more of: metals, metal alloys, transparent conductive oxides, metal nitrides, carbon materials, conducting polymers, semiconductor materials, or any other suitable conductive material. Conductive material may comprise metal (for example, one or more of copper, gold, aluminium, or any other metal). Conductive materials may be selected from one or more of: metals such as Au, Ti, Al, Mo, Pt, Pd, Ag, Cu, Ni, Cr, Ta, W or any other suitable metal; metal alloys such as MoNi, MoCr, AlSi or any other suitable metal alloys; transparent conductive oxides such as ITO, IZO, AZO, or any other suitable transparent conductive oxide; metal nitrides such as TiN or any other suitable metal nitride; carbon materials such as carbon black, carbon nanotubes, graphene or any other suitable carbon material; conducting polymers such as polyaniline, poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS) or any other suitable conducting polymer.

[0024] Where the conductive material comprises a semiconductor material, the semiconductor material may be selected from one or more of: compound semiconductors, metal oxides, metal oxynitrides, inorganic semiconductors, organic semiconductors, polymer semiconductors, 2D semiconductor materials, chalcogenides, perovskites, or any other semiconductor material. For example, semiconductor materials may be selected from one or more of: GaAs, GaN, InP, CdSe, InGaAs, InGaAsSb, ZnO, SnO2, NiO, SnO, CU2O, ln2Os, LiZnO, ZnSnO, InSnO (ITO), InZnO (IZO), HflnZnO (HIZO), InGaZnO (IGZO) ZnxOyNz amorphous, microcrystalline or nanocrystalline Si, Copper(ll) phthalocyanine (CuPc), pentacene, Perylenetetracarboxylic dianhydride (PTCDA), methylene blue, Orange G, rubrene; PEDOT:PSS, poly(3-octylthiophene) (POT), poly(3-octylthiophene-2,5-diyl) (P3OT), poly(3-hexylthiophene) (P3HT), polyaniline, polycarbazole, grapheneMoS2, GeSbTeSrTiOs, CHsNHsPbCb, FbNCHNFbPbCb, CsSnb, or any other suitable semiconductor material.

[0025] The second shape may at least partly enclose an area devoid of conductive material. That is, instead of being a solid shape of conductive material (such as that forming the electrical contact pad 215, or the comparative conductive structure 125), the shape of the conductive structure 225 may partly enclose one or more non-conductive areas. This enables a more constantpattern density across the second conductive layer 220 to be maintained, thereby improving plasma etching performance. Further, such shapes may provide a relatively high structural resilience to deformation and / or stress, e.g. when pressure is applied along the stacking axis 202, thereby improving an integrity of the integrated circuit. Alternatively, the second shape may not enclose an area devoid of conductive material.

[0026] The second shape may have a topology genus 0. Topology genus 0 refers to the second shape having zero ‘holes’ or ‘loops’. For example, a ring or ‘O’ shape would have topology genus 1 , a figure eight or ‘B’ shape would have topology genus 2, etc. In the example shown in Figure 2B, the second shape has a topology genus 0. A shape having loops (e.g. having a topology genus greater than 0) may result in damage during manufacture. This is because processing steps using electrical or magnetic fields, such as plasma etching, may cause induction in a complete loop of conductive material, causing heating and thus potential damage. Accordingly, using a shape having a topology genus 0 reduces the likelihood of damage during manufacture. Alternatively, the second shape may have a topology genus greater than 0.

[0027] The second shape may have no more than one line of symmetry. That is, the second shape may have zero lines of symmetry, or one line of symmetry. This is in contrast with the first shape (of the top-down cross section of the electrical contact pad 215), which has more than one line of symmetry. In the specific example shown in Figure 2B, it can be seen that the second shape has one line of symmetry. Alternatively, in some cases, the second shape may have more than one line of symmetry.

[0028] The second shape may comprise an open shape. An open shape is a shape that comprises one or more open ends. An open shape may have different starting and ending points, which do not meet. This can be seen, for example, in Figure 2B, which shows that the second shape is open (or ‘open-ended’). This is in contrast with the shape of the electrical contact pad 215 shown in Figure 2A, namely a square or rectangle, or with a ring or O shape, which are not open shapes. Using an open shape reduces a likelihood of damage during manufacture (e.g. due to induction) whilst enabling a reduction in footprint compared to the electrical contact pad 215. Alternatively, the second shape may comprise a closed shape. A closed shape is a shape that does notcomprise any open ends. The second shape may be a continuous shape, e.g. a single connected structure without any gaps. This allows electricity to be conducted across the shape and improves power delivery. Alternatively, the second shape may contain one or more gaps or discontinuities.

[0029] The second shape may be homoeomorphic with a C shape. A homeomorphism is a continuous and one-to-one mapping between two geometric figures or shapes. A shape may be homoeomorphic with a C shape if it can result from a continuous deformation of a C shape (such as the C shape shown in Figure 2B). Examples of such shapes include an L, V, W, U, J, S, etc. In some cases, the second shape may be a C shape. Alternatively, the second shape may be a shape other than a C shape, and in some cases the second shape may not be homoeomorphic with a C shape.

[0030] A characteristic of the second shape may be determined based on a location of the one or more vias 235 in the stacked structure. The characteristic may be, for example, a footprint of the second shape, a spatial extent of the second shape, a surface area of the second shape, a number of sides or comers of the second shape, a configuration of the second shape, one or more internal angles of the second shape, etc. As such, the second shape may be adapted to suit the location of the one or more vias 235. Alternatively, the location of the one or more vias 235 may be determined based on a characteristic of the second shape. That is, the vias 235 may be placed such that they connect the conductive structure 225 to the electrical contact pad 215, and the positions of the vias 235 may be adapted to suit different shapes for the conductive structure 225. In either case, however, the vias 235 are arranged to electrically connect the contact pad 215 with the conductive structure 225, across the dielectric layer 230, despite the conductive structure 225 having a different cross-sectional shape (in plan view) than the contact pad 215. This may be seen, for example, in the cross section through the axis 204, shown in Figure 2C (namely the ‘side-on’ cross section), in which the cross section of the conductive structure 225 is smaller (i.e. has a smaller area) than the cross section of the contact pad 215. The vias 235 electrically connect the conductive structure 225 to the contact pad 215, passing across the intermediate dielectric layer 230. The vias 235 may be arranged near the edges of the contact pad 215 (rather than in a central region of the contact pad 215) to facilitateconnection with the conductive structure 225, which in this example does not have a central region perse. Alternatively, the shape of the conductive structure 225 may be configured to lack a central region (that is, to enclose a central area devoid of conductive material) at least in part because the vias 235 are to be located near the edges of the contact pad 215. It will be understood that the vias 235 may be arranged at other locations (e.g. in a central region of the contact pad 215) in other examples.

[0031] As mentioned above, the footprint of the conductive structure 225 and the footprint of the electrical contact pad 215 (e.g. as shown in Figures 2A and 2B) may have a same maximum width. This is also shown in Figure 2C. The maximum width refers to how far a given footprint extends in a given direction. Referring to the example shown in Figures 2A and 2B, the given direction may be along the axis 204. As such, the footprints of the contact pad 215 and of the conductive structure 225 may have a same extent along the axis 204, and thus a same maximum width. The footprint of the conductive structure 225 having the same maximum width as the footprint of the contact pad 215 may allow for an increased stability and / or structural integrity, and / or may facilitate the positioning of vias connecting the conductive layers, compared to a case in which the footprints do not have the same maximum width. The maximum width may be taken in a different direction and / or along a different axis in other examples. Accordingly, while the footprint of the conductive structure 225 may be smaller than the footprint of the electrical contact pad 215 (e.g. because of the ‘removal’ of a central portion, resulting in different shapes), the two footprints may have the same maximum width. The two footprints may have the same maximum length in addition to or alternatively to having the same maximum width. Length and width may be orthogonal dimensions in this context. As such, width may refer to a spatial range along the axis 204 whereas length may refer to a spatial range along an axis (not shown) orthogonal to both the axis 204 and the stacking axis 202. In some cases, the footprint of the conductive structure 225 may have the same maximum width and the same maximum length as the footprint of the contact pad 215. Alternatively, the footprint of the conductive structure 225 and the footprint of the electrical contact pad 215 may have different maximum widths and / or different maximum lengths. For example, the footprint of the conductive structure 225 may have agreater maximum width and / or a greater maximum length than the footprint of the electrical contact pad 215. This is shown in Figure 2D. Alternatively, the footprint of the conductive structure 225 may have a smaller maximum width and / or a smaller maximum length than the footprint of the electrical contact pad 215. This is shown in Figure 2E.

[0032] The footprint of the conductive structure 225 and the footprint of the electrical contact pad 215 may have a same spatial extent. Spatial extent refers to the physical range over which a shape extends. The spatial extent may refer, for example, to a maximum width and maximum length of the respective footprints. Accordingly, while the footprint of the conductive structure 225may be different, e.g. smaller, than the footprint of the electrical contact pad 215 (e.g. because of the ‘removal’ of a central portion, resulting in different shapes), the two footprints may have the same spatial extent. As such, although the conductive structure 225 has a different ‘top-down’ cross-sectional shape than the electrical contact pad 215, the two may have similar spatial extents. The footprint of the conductive structure 225 having the same spatial extent as the footprint of the contact pad 215 may allow for an increased stability and / or structural integrity, and / or may facilitate the positioning of vias connecting the conductive layers, compared to a case in which the footprints do not have the same spatial extent. In some cases, the conductive structure 225is designed so as to cover substantially the same spatial extent as the electrical contact pad 215 using as little material as possible. This may enable a more constant pattern density across the second conductive layer 220 to be maintained, thereby improving plasma etching performance. Alternatively, the footprint of the conductive structure 225and the footprint of the electrical contact pad 215 may have different spatial extents. For example, the footprint of the electrical contact pad 215 may have a larger spatial extent than the footprint of the conductive structure 225. Alternatively, the footprint of the conductive structure 225 may have a larger spatial extent than the footprint of the electrical contact pad 215.

[0033] The footprint of the conductive structure 225 may be entirely contained within the footprint of the electrical contact pad 215. For example, the footprint of the conductive structure 225 may not extend beyond the footprint of the electrical contact pad 215. This can be seen in the example shown in Figures2A-2C and 2E. This may provide an improved spatial efficiency and / or structural integrity compared to a case in which the footprint of the conductive structure 225 extends beyond the footprint of the contact pad 215. Alternatively, the footprint of the conductive structure 225 may not be entirely contained within the footprint of the electrical contact pad 215. For example, the footprint of the conductive structure 225 may extend beyond the footprint of the electrical contact pad 215. This can be seen in the example shown in Figure 2D.

[0034] The integrated circuit 200 may comprise one or more further structures at least partially enclosed by the conductive structure 225. As such, the one or more further structures may be within an extent of the footprint of the conductive structure 225. The one or more further structures may be arranged in an area devoid of conductive material, e.g. in a central ‘void’ of the footprint. The one or more further structures may comprise electrical components, e.g. circuit components. For example, the one or more further structures may comprise a transistor, a capacitor, or a resistor. This may improve a spatial efficiency of the integrated circuit 200 compared to a case in which such componentry is instead located externally to the conductive structure 225 and / or externally to the second conductive layer 220 altogether, and it may also allow the local pattern density in that layer to be tuned to benefit a plasma etching step. Additionally or alternatively, the one or more further structures may comprise nonfunctioning components. Such components may be referred to as ‘dummy’ structures. This allows the local pattern density of the second conductive layer to be further tailored, e.g. to meet desired parameters. For example, this may improve a homogeneity of pattern density across that layer, which may provide an increased tolerance for plasma etching processing. Accordingly, some of the spatial extent of the conductive structure 225 may be occupied by structures other than the conductive structure 225 itself. This is in contrast with the electrical contact pad 215 (and the comparative conductive structure 125), which, given its solid shape, occupies the entirety of its spatial extent.

[0035] The stacked structure may comprise a third conductive layer (not shown), separated from the second conductive layer 220 by a second dielectric layer (not shown). The third conductive layer may comprise a further conductive structure which is electrically connected to the conductive structure 225 of the second conductive layer 220 by one or more vias (not shown) across thesecond dielectric layer. The footprint of the further conductive structure may be different than the footprint of the conductive structure 225. Accordingly, pattern density may be made tailored and / or made more uniform for further layers of the integrated circuit, in addition to the second conductive layer. For example, the footprint of the further conductive structure may be larger, or smaller, than the footprint of the conductive structure 225. Alternatively, the footprint of the further conductive structure may be substantially the same as the footprint of the conductive structure 225. The further conductive structure may have the same shape, in a cross section taken through the further conductive structure and orthogonal to the stacking axis 205, as the second shape. Alternatively, the top-down cross sections of the further conductive structure and the conductive structure 225 may have different shapes. The stacked structure may comprise additional conductive layers, in some cases. Alternatively, the stacked structure may not comprise a third conductive layer.

[0036] The stacked structure may comprise a cascade of conductive layers extending away from the electrical contact pad 215. The cascade includes the second conductive layer 220. Each conductive layer in the cascade may comprise a respective conductive structure. The respective conductive structures in each conductive layer may be electrically connected to one another, so as to form a connection path to the electrical contact pad 215. The respective conductive structures of different conductive layers in the cascade may have different footprints, e.g. in terms of size and / or position. The respective conductive structures of different conductive layers in the cascade may have different spatial extents, e.g. cascading towards the interior of the contact pad 215 or cascading away from the contact pad 215. For example, footprints of respective conductive structures in the cascade may decrease (i.e. get smaller) as a distance from the electrical contact pad 215 increases. In some cases, where the electrical contact pad 215 is on a top layer of the stacked structure, the conductive structures in the other conductive layers may form an inverse pyramid shape. Alternatively, the conductive structures in the other conductive layers may form ‘steps’ down from the top layer of the stacked structure. Accordingly, pattern density may be made more uniform for each of multiple layers of the integrated circuit. Dielectric layers may be interleaved with the conductive layers in the cascade, e.g. forming an alternating pattern, withvias connecting the conductive layers across the dielectric layers. Different conductive structures in the cascade may be similarly shaped or may have different shapes. An example of a cascade structure is described further below with reference to Figures 4A to 4F. Alternatively, the stacked structure may not comprise such a cascade of conductive layers.

[0037] The integrated circuit 200 may be formed from thin films on an insulating substrate. The integrated circuit 200 may comprise a flexible integrated circuit. Flexible integrated circuits are generally much thinner and more flexible than conventional integrated circuits, enabling them to be used in a wider range of applications. In accordance with the present disclosure a “flexible integrated circuit” (flexible IC or FlexIC®) is a type of integrated circuit, IC, that is designed to be flexible and conformable, allowing it to bend, twist, and conform to nonflat or irregular surfaces. Unlike traditional rigid ICs, which are typically made on silicon wafers and are inflexible, flexible ICs, in accordance with the present disclosure, are fabricated on flexible substrates using appropriate materials and thin-film processes. The flexible IC may comprise a thin film IC. The flexible IC may comprise an IC formed from thin films on an insulating substrate. As such, the integrated circuit 200 may comprise or be comprised on an integrated circuit formed from thin films on an insulating substrate.

[0038] The insulating substrate is typically formed of an appropriate flexible polymer material. Nevertheless, the flexible substrate may be formed from any other materials that provide suitable electrical, chemical, and / or structural properties. The flexible substrate may be formed from a single common material, may be formed from a plurality of different materials, or may be formed from a plurality of different types of the same material (e.g. different polymers). The flexible substrate may, for example, comprise one or more materials selected from the following list of materials: flexible glass, polymer materials, metal oxide materials, resin materials, resist materials, foil materials, paper, insulator coated metals, or any other suitable material.

[0039] Where a polymer based material is used, the substrate may comprise one or more polymers selected from: polyethylene naphthalates, polyethylene terephthalates; polymethyl methacrylates; polycarbonates, polyvinyl alcohols, polyvinyl acetates, polyvinyl pyrrolidones, polyvinyl phenols, polyvinyl chlorides, polystyrenes, polyimides, polyamides (e.g. Nylon); poly(hydroxyethers), polyurethanes, polycarbonates, polysulfones, parylenes, polyarylates, polyether ether ketones (PEEKs); acrylonitrile butadiene styrene (ABS), 1 Methoxy 2 propyl acetates, Benzocyclobutenes (BCB), polylactic acid (PLA), polyhydroxyalkanoates (PHAs), polybutylene succinate (PBS), polybutylene adipate terephthalate (PBAT), cellulose polymers, or any other suitable polymer material.

[0040] Where a metal oxide based material is used, the substrate may comprise one or more metal oxides selected from: AI2O3, SiOxNy, SiC>2, SisN4, or any other suitable metal oxide. Where a resin based material is used, the substrate may comprise one or more resins selected from: a UV-curable resin or any other suitable resin. Where a resist based material is used, the substrate may comprise one or more resists selected from: nanoimprint resists, photoresists such as, for example, Bisphenol A novolac epoxy (Sll-8) or polyhydroxybenzyl silsesquioxane, or any other suitable resist. Where a foil based material is used the substrate may comprise one or more foils selected from: polymeric foils or any other suitable foil. Where an insulator-coated metal is used, the substrate may comprise one or more insulator-coated metals selected from: insulator coated stainless-steel or any other suitable insulator-coated metal.

[0041] Alternatively, the integrated circuit 200 does not comprise a flexible IC or an insulating substrate. For example, the integrated circuit 200 may comprise a silicon-based device.

[0042] The second conductive layer 220 may comprise one or more of: a source layer, a drain layer and a gate layer. The second conductive layer 220 may comprise a resistor electrode or capacitor electrode layer. The second conductive layer 220 may comprise a tracking, wiring or interconnection layer. The second conductive layer 220 may comprise a different layer alternatively. The first conductive layer 210 may comprise a top layer of the integrated circuit 200. The top layer may be configured to face (and be mounted to) an application circuit, for example. The top layer may be a redistribution layer. Alternatively, the first conductive layer 210 may comprise a layer other than the top layer. For example, the first conductive layer 210 may comprise an inner, or intermediate, layer of the integrated circuit 200, or a bottom layer of the integrated circuit 200. For example, the first conductive layer 210 may comprise an intermediate layer that is to be tested, e.g. halfway through production of the integrated circuit 200.The first conductive layer 210 and the second conductive layer 220 may be consecutive conductive layers in the stacked structure. Alternatively, the first conductive layer 210 and the second conductive layer 220 may be non-consecutive conductive layers. That is, one or more other conductive layers may be arranged between the first conductive layer 210 and the second conductive layer 220. In such cases, the electrical connection between the conductive structure 225 of the second conductive layer 220 and the electrical contact pad 215 across the dielectric layer 230 may be indirect, e.g. in terms of passing through other conductive layers and / or other dielectric layers.

[0043] The integrated circuit 200 may be arranged to connect to an application circuit (not shown) via the electrical contact pad 215. The application circuit may comprise a larger circuit of which the integrated circuit 200 is to form part. For example, the application circuit may comprise one or more of an antenna, a printed circuit board, or another integrated circuit, or any other suitable application circuit (for example, a flexible integrated circuit, a flexible circuit or an application-specific integrated circuit). Alternatively, the electrical contact pad 215 may be for connecting to a test pin or other device, instead of or in addition to connecting to an application circuit.

[0044] The integrated circuit 200 may be formed at least in part using a plasma etching process. Plasma etching involves shooting a high-speed stream of plasma at a target, to modify the physical properties of the target. The integrated circuit 200 may be formed using other processes additionally or alternatively.

[0045] Figure 3 shows schematically a cross section of the conductive structure 225 of the second conductive layer 220 taken through the conductive structure 225 and orthogonal to the stacking axis 202, according to the present disclosure. As can be seen, in this example the cross section of the conductive structure 225 has an open shape, with a single line of symmetry, and topology genus 0. In particular, the cross section in this example has a C shape. Vias 235 are shown connected to the conductive structure 225, e.g. extending to a higher layer and / or to a lower layer of the stack, relative to the second conductive layer 220. Sets of smaller vias connected to conductive structure 225 are also shown in Figure 3, positioned laterally between the vias 235. The smaller vias may connect the second conductive layer with another conductive layer in the stack.

[0046] Figures 4A to 4F show schematically an integrated circuit 400 according to the present disclosure. In particular, Figures 4A to 4F show a series of additive cross sections orthogonal to a stacking axis of the integrated circuit 400, such that additional layers are added in each view, from Figure 4A through to Figure 4F.

[0047] Figure 4A shows a conductive device electrode and tracking layer 410 of the integrated circuit 400. Device electrode and tracking features 411 are formed in the same conductive layer of the integrated circuit as the contact pad stack elements 412. Figure 4B adds a first set of vias 420 extending ‘upwards’ through an inter-level dielectric layer. The inter-level dielectric layer is disposed ‘on top of’ the device electrode and tracking layer 410. Figure 4C adds a first metal tracking and interconnection layer 430 disposed ‘on top of’ the inter-level dielectric layer and, through the vias 420, making electrical contact with the contact stack elements 412 of the conductive device electrode and tracking layer. The metal layer 430 (and additionally or alternatively the device electrode and tracking layer 410) is an example of the conductive layers or structures described herein. In this example, the metal layer 430 has an approximately L-shaped cross section. The shape of the cross section of the metal layer 430 may be chosen and / or configured based at least in part on a geometry of an underlying layer, e.g. the device electrode and tracking layer 410 in this case. Figure 4D adds a second set of vias 440 extending ‘upwards’ from the first metal tracking and interconnection layer through a second inter-level dielectric layer. Figure 4E adds a second metal tracking and interconnection layer 450 disposed ‘on top of’ the first inter-level dielectric layer and, through the vias 440, making electrical contact with the contact stack elements of the first metal tracking and interconnection layer 430. Figure 4F adds another set of vias 460 through a third inter-level dielectric layer and a conductive redistribution layer 470. An electrical contact pad may be arranged on this layer, for example. The cross section of the second metal tracking and interconnection layer 450 is approximately L-shaped in this example. The footprint of the second metal tracking and interconnection layer 450 may at least partly overlap with the footprint of the first metal tracking and interconnection layer 430. However, as can be seen in this example, the footprint of the second metal tracking and interconnection layer 450 is different from the footprint of the first metal trackingand interconnection layer 430, and in particular extends beyond the footprint of the first metal tracking and interconnection layer 430. That is, the position of the footprint of the second metal tracking and interconnection layer 450 is different from the position of the footprint of the first metal tracking and interconnection layer 430. It may be that the footprint of the second metal tracking and interconnection layer 450 is larger than the footprint of the first metal tracking and interconnection layer 430, although it will be understood that the footprint of the second metal tracking and interconnection layer 450 may be the same size as, or smaller than, the footprint of the first metal tracking and interconnection layer 430 in other cases. Accordingly, the integrated circuit 400 may comprise a cascade of conductive layers extending away from an electrical contact pad, where footprints of respective conductive layers in the cascade may change in size and / or position as a distance from the electrical contact pad increases. That is, the integrated circuit 400 may comprise a ‘bar’ of cascaded vias and intermediate metal layers which shelve (or ‘cascade’) down from a redistribution layer 470 to a second metal tracking and interconnection layer 450, a first metal tracking and interconnection layer 430 and into the device electrode and tracking layer 410. The cross sections of the first metal tracking and interconnection layer 430 and the second metal tracking and interconnection layer 450 may have different shapes in some examples. For example, the first metal tracking and interconnection layer 430 may have an L-shaped cross section whereas the second metal tracking and interconnection layer 450 may have a C-shaped cross section.

[0048] Whilst the examples discussed herein focus on a single electrical contact pad and corresponding stack of one or more conducting layers or structures connected thereto, it will be understood that an integrated circuit may comprise any number of electrical contact pads. Each of these contact pads may have a corresponding stack of one or more conducting layers or structures connected thereto, which may be shaped and / or arranged in any of the manners described.

[0049] Figure 5 shows a flow chart illustrating the steps of a method 500 of manufacturing an integrated circuit according to the present disclosure. The method 500 provides an improved performance of a plasma etching processand / or other similar fabrication processes, and in particular enables small and / or fragile structures or gaps to be produced more reliably.

[0050] A first step, illustrated by item 501, of method 500 comprises forming a stacked structure comprising a first conductive layer, a second conductive layer, and a dielectric layer arranged between the first conductive layer and the second conductive layer. The first conductive layer comprises an electrical contact pad for interfacing with an external device. The electrical contact pad has a first shape, in a cross section taken through the electrical contact pad and orthogonal to a stacking axis of the stacked structure. The second conductive layer comprises a conductive structure having a second shape, in a cross section taken through the conductive structure and orthogonal to the stacking axis of the stacked structure. The second shape is a different geometric shape from the first shape. One or more of the first conductive layer, electrical contact pad, second conductive layer, conductive structure and dielectric layer may be substantially as described above in respect of the first conductive layer 210, electrical contact pad 215, second conductive layer 220, conductive structure 225 and dielectric layer 230, respectively. The method 500 may be used to manufacture one or more of the integrated circuits 200, 400 described above. The method 500 may be used to manufacture a flexible integrated circuit.

[0051] A second step, illustrated by item 502, of method 500 comprises electrically connecting the conductive structure of the second conducting layer to the electrical contact pad by one or more vias across the dielectric layer. Such a connection may be direct (i.e. with no other conductive layers between the electrical contact pad and the second conductive layer) or indirect (i.e. with one or more other conductive layers between the electrical contact pad and the second conductive layer).

[0052] The method may comprise a plasma etching process. The method may comprise depositing one or more layers of thin-film polymer or metal oxide onto the manufacturing carrier. The method may comprise depositing one or more layers of conductive material (for example, onto one or more of the layers of thin-film polymer). It may be that the method comprises forming one or more electrical contact pads (for example, by patterning metal contact areas onto one or more of the layers of thin film polymer). The method may comprise forming one or more vias (for example, through the one or more layers of thin-filmpolymer or metal oxide). Forming the one or more vias may comprise etching (for example, using a plasma dry etch after photo-resist patterning) and filling (for example, by thin film deposition or electro / electro-less plating techniques) the one or more vias. Alternatively or additionally, one or more of the vias may be formed using mechanical processes.

[0053] Whilst the present disclosure has been described and illustrated with reference to particular embodiments or examples, it will be appreciated by those of ordinary skill in the art that the disclosure lends itself to many different variations not specifically illustrated herein.

[0054] The present disclosure also provides a conductive structure for an integrated circuit, the integrated circuit comprising an electrical contact pad for interfacing with an external device, wherein the conductive structure is operable to be arranged in a stacked structure comprising the electrical contact pad and to be electrically connected to the electrical contact pad by one or more vias, and wherein the conductive structure has a shape, in a cross section taken through the conductive structure and orthogonal to a stacking axis of the stacked structure, that has no more than one line of symmetry. The shape of the conductive structure may enable a reduction in the footprint of the conductive structure, e.g. compared to the footprint of the electrical contact pad. This allows pattern density to be tailored and / or made more uniform across the layer of the integrated circuit that includes the conductive structure, which facilitates a plasma etching process. This in turn allows for more reliable manufacture of small components and / or small gaps in the integrated circuit. Moreover, the cross-sectional shape of the conductive structure, having no more than one line of symmetry, may reduce a likelihood of damage during manufacture (e.g. due to induction) whilst enabling a reduction in footprint. The shape may at least partly enclose an area devoid of conductive material. The shape may have a topology genus 0. The shape may comprise an open shape. The shape may be homoeomorphic with a C shape. The shape may be a C shape.

[0055] The present disclosure further provides a C-shaped electrical contact pad for an integrated circuit. This reduces the footprint (or surface area) of the contact pad, which provides fora more homogenous pattern density in the layer of the integrated circuit that includes the contact pad. This in turn facilitates aplasma etching process and allows for more reliable manufacture of small components and / or gaps in the integrated circuit. The C-shaped electrical contact pad may be electrically connected to a further electrical contact pad for interfacing with external devices. Additionally, the present disclosure provides a flexible integrated circuit comprising a C-shaped electrical contact pad.

[0056] Where in the foregoing description, integers or elements are mentioned which have known, obvious or foreseeable equivalents, then such equivalents are herein incorporated as if individually set forth. Reference should be made to the claims for determining the true scope of the present disclosure, which should be construed so as to encompass any such equivalents. It will also be appreciated by the reader that integers or features of the disclosure that are described as preferable, advantageous, convenient or the like are optional and do not limit the scope of the independent claims. Moreover, it is to be understood that such optional integers or features, whilst of possible benefit in some embodiments of the disclosure, may not be desirable, and may therefore be absent, in other embodiments.

Claims

Claims1. An integrated circuit comprising:a stacked structure comprising:a first conductive layer;a second conductive layer; anda dielectric layer arranged between the first conductive layer and the second conductive layer,wherein:the first conductive layer comprises an electrical contact pad for interfacing with an external device, the electrical contact pad having a first shape, in a cross section taken through the electrical contact pad and orthogonal to a stacking axis of the stacked structure,the second conductive layer comprises a conductive structure which is electrically connected to the electrical contact pad by one or more vias across the dielectric layer, the conductive structure having a second shape, in a cross section taken through the conductive structure and orthogonal to the stacking axis of the stacked structure, andthe second shape is a different geometric shape from the first shape.

2. An integrated circuit according to claim 1 , wherein the electrical contact pad comprises a first amount of conductive material, and the conductive structure comprises a second amount of conductive material, less than the first amount.

3. An integrated circuit according to any preceding claim, wherein a footprint of the conductive structure is different from a footprint of the electrical contact pad.

4. An integrated circuit according to any preceding claim, wherein the second shape at least partly encloses an area devoid of conductive material.

5. An integrated circuit according to any preceding claim, wherein the second shape has a topology genus 0.

6. An integrated circuit according to any preceding claim, wherein the second shape has no more than one line of symmetry.

7. An integrated circuit according to any preceding claim, wherein the second shape comprises an open shape.

8. An integrated circuit according to any preceding claim, wherein the second shape is homoeomorphic with a C shape.

9. An integrated circuit according to any preceding claim, wherein the second shape is a C shape.

10. An integrated circuit according to any preceding claim, wherein a characteristic of the second shape is determined based on a location of the one or more vias in the stacked structure.

11. An integrated circuit according to any preceding claim, wherein a footprint of the conductive structure and a footprint of the electrical contact pad have a same spatial extent.

12. An integrated circuit according to any of claims 1 to 10, wherein a footprint of the conductive structure and a footprint of the electrical contact pad have different spatial extents.

13. An integrated circuit according to any preceding claim, wherein a footprint of the conductive structure is entirely contained within a footprint of the electrical contact pad.

14. An integrated circuit according to any preceding claim, wherein the stacked structure comprises a third conductive layer, separated from the second conductive layer by a second dielectric layer, thethird conductive layer comprising a further conductive structure which is electrically connected to the conductive structure of the second conductive layer by one or more vias across the second dielectric layer, andwherein a footprint of the further conductive structure is different than a footprint of the conductive structure.

15. An integrated circuit according to any preceding claim, wherein the stacked structure comprises a cascade of conductive layers extending away from the electrical contact pad, the cascade including the second conductive layer, each conductive layer in the cascade comprising a respective conductive structure; andwherein the respective conductive structures of different conductive layers in the cascade have different footprints.

16. An integrated circuit according to claim 15, wherein the footprints of the respective conductive structures in the cascade decrease as a distance from the electrical contact pad increases.

17. An integrated circuit according to any preceding claim, wherein the second conductive layer comprises one or more of: a source layer, a drain layer and a gate layer.

18. An integrated circuit according to any preceding claim, wherein the first conductive layer comprises a top layer of the integrated circuit.

19. An integrated circuit according to any preceding claim, wherein the integrated circuit is arranged to connect to an application circuit via the electrical contact pad.

20. An integrated circuit according to any preceding claim, wherein the integrated circuit comprises one or more further structures at least partially enclosed by the conductive structure of the second conductive layer.

21. An integrated circuit according to claim 20, wherein the one or more further structures comprise electrical components.

22. An integrated circuit according to claim 20 or claim 21, wherein the one or more further structures comprise non-functioning components.

23. An integrated circuit according to any preceding claim, wherein the integrated circuit is formed from thin films on an insulating substrate.

24. An integrated circuit according to any preceding claim, wherein the integrated circuit comprises a flexible integrated circuit.

25. An integrated circuit according to any preceding claim, wherein the integrated circuit is formed at least in part using a plasma etching process.

26. A method of manufacturing an integrated circuit, the method comprising:forming a stacked structure comprising:a first conductive layer comprising an electrical contact pad for interfacing with an external device, the electrical contact pad having a first shape, in a cross section taken through the electrical contact pad and orthogonal to a stacking axis of the stacked structure;a second conductive layer comprising a conductive structure, the conductive structure having a second shape, in a cross section taken through the conductive structure and orthogonal to the stacking axis of the stacked structure; anda dielectric layer arranged between the first conductive layer and the second conductive layer; andelectrically connecting the conductive structure to the electrical contact pad by one or more vias across the dielectric layer,wherein the second shape is a different geometric shape from the first shape.

27. A conductive structure for an integrated circuit, the integrated circuit comprising an electrical contact pad for interfacing with an external device,wherein the conductive structure is operable to be arranged in a stacked structure comprising the electrical contact pad and to be electrically connected to the electrical contact pad by one or more vias, andwherein the conductive structure has a shape, in a cross section taken through the conductive structure and orthogonal to a stacking axis of the stacked structure, that has no more than one line of symmetry.

28. A conductive structure according to claim 27, wherein the shape at least partly encloses an area devoid of conductive material.

29. A conductive structure according to claim 27 or claim 28, wherein the shape has a topology genus 0.

30. A conductive structure according to any of claims 27 to 29, wherein the shape comprises an open shape.

31. A conductive structure according to any of claims 27 to 30, wherein the shape is homoeomorphic with a C shape.

32. A conductive structure according to any of claims 27 to 31, wherein the shape is a C shape.

33. A C-shaped electrical contact pad for an integrated circuit.

34. A flexible integrated circuit comprising a C-shaped electrical contact pad.

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