A method and device for generating a simulated S-mode baseband signal

Abstract

The present invention discloses a method and device for simulating the generation of S-mode baseband signals, and relates to the field of air traffic control monitoring technology, so as to solve the problem that the S-mode transponder cannot effectively verify the S-mode signal in factory testing and field testing. The method includes pre-inputting a plurality of simulated ADS-B message data; FPGA receives and parses the simulated ADS-B message data and then performs baseband pulse information encoding to generate a simulated S-mode baseband signal, and the FPGA controls the time delay between baseband channels during baseband encoding; and detects the simulated S-mode baseband signal and the operating status of the device. The present invention can simulate the avionics equipment to send out the S-mode baseband signal, so as to facilitate the S-mode transponder to actually verify the S-mode signal during factory testing or field testing.

Description

Technical Field

[0001] The present invention relates to the technical field of air traffic control monitoring, and in particular to a method and a device for generating a simulated S-mode baseband signal. Background Art

[0002] In the civil aviation system, the S-mode transponder is the main surveillance communication equipment equipped on aircraft. In most ground-to-air surveillance, the S-mode signal is required to monitor the aircraft. Since the S-mode signal is based on aircraft electronic equipment, the S-mode transponder cannot effectively verify the S-mode signal in factory testing and field testing. Therefore, a method and device that can simulate the generation of the S-mode baseband signal on site is needed. Summary of the invention

[0003] In order to solve the problem in the prior art that the S-mode transponder cannot effectively verify the S-mode signal in factory testing and field testing, a method and device for simulating the generation of an S-mode baseband signal are provided.

[0004] The technical solution of the present invention is as follows:

[0005] A method for simulating the generation of an S-mode baseband signal comprises the following steps:

[0006] A. Input simulated ADS-B message data in advance;

[0007] B. FPGA receives and parses the simulated ADS-B message data, then encodes the baseband pulse information to generate a simulated S-mode baseband signal;

[0008] C. Detect the simulated S-mode baseband signal and device operating status;

[0009] D. Output analog S-mode baseband signal. At the same time, the ARM chip collects and uploads the device operation status to the PC host computer.

[0010] Optionally, the step A is specifically:

[0011] (1) The simulated ADS-B message data is input through a PC host computer;

[0012] (2) Pass the simulated ADS-B message data to the FPGA through the USB interface.

[0013] In order to avoid the use of network and other means of communication, it is necessary to configure the computer's IP and other parameters. The use of this device requires a high level of computer knowledge on the part of the operator, and the device cannot be used at the same time when the computer's network port is occupied. USB communication is used here. Currently, computers provide multiple sets of USB communication ports, which can ensure that the device can interact with the computer software at any time when in use, facilitating the connection between the device and the computer.

[0014] Optionally, the step A may also specifically be:

[0015] (1) The simulated ADS-B message data is input from the PC host computer and the GNSS module;

[0016] (2) The simulated ADS-B message data inputted by the PC host computer is transmitted to the FPGA via the USB interface, and the message data inputted from the GNSS module is transmitted to the FPGA via the data line.

[0017] As another input method for ADS-B message encoding, GNSS can obtain parameters such as the latitude, longitude, and altitude of the device's location, which can be used as the actual coordinates of the ADS-B message encoding, making the simulated S-mode baseband signal more realistic.

[0018] Furthermore, the step B is specifically as follows: after receiving the ADS-B message data, the FPGA sends it to multiple baseband channels for parsing and encoding baseband pulse information, generates multiple simulated S-mode baseband signals, and controls the relative time delay between the multiple baseband channels and any one of the baseband channels.

[0019] ADS-B baseband information is composed of multiple independently controllable units and is implemented by internal coding on an FPGA. Each channel can be independently controlled to control the relative time delay between multiple baseband channels and any one of them, so as to generate overlapping signals or reflected signals, so that when the output or reflected S-mode baseband signal encounters an obstacle, it can maintain time synchronization by increasing the delay time.

[0020] Furthermore, the step C is specifically as follows:

[0021] (1) Detecting whether the analog S-mode baseband signal is encoded and generated through the FPGA, if the analog S-mode baseband signal is generated, transmitting part of the analog S-mode baseband signal to the FPGA, and if the analog S-mode baseband signal is not generated, generating error information one.

[0022] (2) The FPGA detects the difference between the generated simulated S-mode baseband signal and the input message data. If there is no difference, the remaining simulated S-mode baseband signal is passed to the output end. If there is a difference, error message 2 is generated.

[0023] (3) The output end detects whether the remaining analog S-mode baseband signal is received. If the remaining analog S-mode baseband signal is received, the device generates normal operation information and can output the analog S-mode baseband signal to the outside. If the remaining analog S-mode baseband signal is not received, error message three is generated.

[0024] Furthermore, the step D is specifically as follows: outputting the analog S-mode baseband signal externally through the SMA port, and at the same time, the ARM chip sends the device operation status information collected by the system to the FPGA and uploads it to the PC host computer through the USB2.0 interface.

[0025] In addition, the present invention also provides a device for simulating the generation of an S-mode baseband signal, comprising:

[0026] The power supply module is used to convert the power supply of the device from AC 220V to the various low-voltage DC power supplies required in the device, and can complete the collection and transmission of status information through the BIT monitoring provided by the power supply system;

[0027] USB interface, as an auxiliary communication interface;

[0028] A baseband coding module, the baseband coding module includes an FPGA, which is used to complete data exchange with the USB interface and ADS-B baseband coding functions;

[0029] An auxiliary control module, the auxiliary control module includes an ARM chip, which is used to monitor the status of the device and assist in completing the control function;

[0030] The power supply module is connected to the FPGA and ARM chip wires respectively, and the USB2.0 interface is connected to the FPGA wire.

[0031] Furthermore, it also includes a GNSS module for receiving and parsing real-time GNSS message information and providing ADS-B message data encoding parameters, and the GNSS module is connected to the FPGA wire.

[0032] Furthermore, it also includes an RS232 interface circuit as an auxiliary communication interface, and the RS232 interface circuit is connected to the ARM chip wire.

[0033] Furthermore, the FPGA includes four baseband channels, and output ends of the four baseband channels are uniformly connected to an SMA port.

[0034] The beneficial effects of the present invention are as follows:

[0035] 1. The present invention can simulate on-site the sending of S-mode baseband signals by aircraft electronic equipment. At the same time, the content and sending frequency of the S-mode baseband signal can be customized by the user through a PC host computer, so that the S-mode transponder can effectively verify the S-mode signal during factory testing and field testing.

[0036] 2. The device of the present invention has an automatic detection function, which can detect in real time whether the analog S-mode baseband signal is encoded, the difference between the encoded S-mode baseband signal and the input analog message data, and the operating status of the device itself, and upload timely feedback.

[0037] 3. The device of the present invention is provided with a GNSS module for receiving and parsing real-time GNSS message information, so as to obtain the latitude, longitude, altitude and other parameters of the place where the device is used, which can be used as the actual coordinates of the ADS-B message encoding, and an ADS-B message data encoding data input method is added to make the simulated S-mode baseband signal more realistic. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 is a flow chart of Example 1;

[0039] Figure 2 is a flow chart of Example 2;

[0040] Figure 3 Flowchart of the encoding states for detecting analog S-mode baseband signals. DETAILED DESCRIPTION

[0041] The present invention is further described below in conjunction with the embodiments, and the invention described is only a part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, other embodiments obtained by ordinary technicians in this field without creative work are all within the protection scope of the present invention.

[0042] Embodiment 1:

[0043] Reference Figure 1 and 3 , a device for simulating the generation of a Mode S baseband signal, comprising:

[0044] The power supply module is used to convert the power supply of the device from AC 220V to the various low-voltage DC power supplies required in the device, and can complete the collection and transmission of status information through the BIT monitoring provided by the power supply system;

[0045] USB2.0 interface is used as an auxiliary communication interface. USB2.0 communication is used to avoid using the network and other communication methods. It is necessary to configure the computer's IP and other parameters. The use of it requires the operator to have high computer knowledge, and the device cannot be used at the same time when the computer network port is occupied. At present, computers provide multiple groups of USB communication ports to ensure that the device can interact with the computer software at any time when it is used, which is convenient for the connection between the device and the computer. USB2.0 uses a virtual serial port to achieve a data transmission speed of up to 3Mbps to ensure that there is no bandwidth bottleneck for the transmission of information such as signal transmission, status display, and system control;

[0046] A baseband coding module, wherein the baseband coding module includes an FPGA, which is used to complete data exchange with the USB2.0 interface and the ADS-B baseband coding function. The FPGA receives the PC host computer message data and generates an ADS-B coded pulse signal according to the standard ADS-B pulse coding format;

[0047] An auxiliary control module, the auxiliary control module includes an ARM chip, which is used to monitor the status of the device and assist in completing control functions, and uses the ARM chip to complete auxiliary functions such as power supply monitoring, status indication, external communication and firmware upgrade control;

[0048] The power supply module is connected to the FPGA and ARM chip wires respectively, and the USB2.0 interface is connected to the FPGA wire.

[0049] Furthermore, it also includes an RS232 interface circuit as an auxiliary communication interface. The RS232 interface circuit is connected to the ARM chip wire. The RS232 interface circuit can be used for system debugging, firmware upgrading, and external information exchange functions.

[0050] Furthermore, the FPGA includes four baseband channels, and the output ends of the four baseband channels are uniformly connected to the SMA port. The FPGA controls the four baseband channels to complete the S-mode baseband information encoding work. The four baseband channels control the relative time delay output between the four channels to be 128us through a unified time alignment method, so as to achieve the purpose of generating overlapping signals or reflected signals, so that the output or reflected S-mode baseband signal can maintain time synchronization by increasing the delay time when encountering an obstacle.

[0051] The usage of this embodiment is as follows: the working user customizes the input of commonly used ADS-B information data on the PC host computer in advance, such as flight number, ICAO address, longitude and latitude, altitude, speed parameters, and determines the information sending frequency to be 400 aircraft / second, and transmits the simulated ADS-B message data to the FPGA through the USB2.0 interface. After receiving the ADS-B message data, the FPGA sends it to the four baseband channels for parsing and baseband pulse information encoding, and generates DF4, DF5, DF20, and DF21 format simulated S-mode baseband signals respectively, and controls the relative time delay output between the four channels to be 128us.

[0052] After FPGA encoding, it first checks whether the analog S-mode baseband signal is encoded and generated. If the analog S-mode baseband signal is generated, part of the analog S-mode baseband signal is passed to the FPGA. If the analog S-mode baseband signal is not generated, error message one is generated; the FPGA detects the difference between the analog S-mode baseband signal generated by the encoding and the input message data. If there is no difference, the remaining analog S-mode baseband signal is passed to the output end. If there is a difference, error message two is generated; the output end detects whether the remaining analog S-mode baseband signal is received. If the remaining analog S-mode baseband signal is received, the normal operation of the equipment is generated, and the analog S-mode baseband signal can be output externally. If the remaining analog S-mode baseband signal is not received, error message three is generated.

[0053] The analog S-mode baseband signal is output through the SMA port for on-site detection of S-mode transponders. At the same time, the ARM chip sends the device operation status information collected by the system to the FPGA and uploads it to the PC host computer through the USB2.0 interface.

[0054] Embodiment 2:

[0055] Reference Figure 2 and 3 This embodiment is further optimized on the basis of Embodiment 1, specifically, the device for generating the simulated S-mode baseband signal also includes a GNSS module, and the GNSS module is connected to the FPGA wire.

[0056] The GNSS module has reserved GPS and BD receiving components inside to obtain the latitude, longitude, altitude and other parameters of the device's location, which can be used as the actual coordinates encoded in the ADS-B message.

[0057] By pre-entering the commonly used ADS-B information data on the PC host computer, there is no need to enter the latitude, longitude and altitude parameters. The GNSS module can input them to obtain the actual coordinates of the device's location, making the simulated S-mode baseband signal more realistic.

[0058] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for generating a simulated S-mode baseband signal, characterized in that: The following steps are involved: A. Input simulated ADS-B message data in advance; B. FPGA receives and parses the simulated ADS-B message data, then encodes the baseband pulse information to generate a simulated S-mode baseband signal; C. Detect the simulated S-mode baseband signal and device operating status; D. Output analog S-mode baseband signal, and at the same time, the ARM chip collects and uploads the device operation status to the PC host computer; The step A specifically includes: (1) inputting the simulated ADS-B message data through a PC host computer; (2) transmitting the simulated ADS-B message data to the FPGA through a USB interface; The step A specifically includes: (1) the simulated ADS-B message data is input from a PC host computer and a GNSS module; (2) the simulated ADS-B message data input from the PC host computer is transmitted to the FPGA via a USB interface, and the message data input from the GNSS module is transmitted to the FPGA via a data line; The step B specifically includes: after receiving the ADS-B message data, the FPGA sends it to multiple baseband channels for parsing and encoding baseband pulse information, generates multiple simulated S-mode baseband signals, and controls the relative time delay between the multiple baseband channels and any one of the baseband channels; The step C specifically includes: (1) detecting whether the analog S-mode baseband signal is generated by encoding through the FPGA, and if the analog S-mode baseband signal is generated, transmitting part of the analog S-mode baseband signal to the FPGA, and if the analog S-mode baseband signal is not generated, generating error information 1; (2) The FPGA detects the difference between the generated simulated S-mode baseband signal and the input message data. If there is no difference, the remaining simulated S-mode baseband signal is passed to the output end. If there is a difference, error message 2 is generated; (3) The output end detects whether the remaining analog S-mode baseband signal is received. If the remaining analog S-mode baseband signal is received, the device is operating normally and the analog S-mode baseband signal can be output externally. If the remaining analog S-mode baseband signal is not received, error message three is generated. The step D specifically includes: outputting the simulated S-mode baseband signal through the SMA port, and at the same time, the ARM chip sends the device operation status information collected by the system to the FPGA and uploads it to the PC host computer through the USB2.0 interface.

2. A device for generating a simulated S-mode baseband signal, used to implement the method for generating a simulated S-mode baseband signal as claimed in claim 1, characterized in that: include: The power module is used to convert the power supply of the device from AC 220V to the various low-voltage DC power supplies required in the device, and can complete the collection and transmission of status information through the BIT monitoring of the power system; USB2.0 interface, as an auxiliary communication interface; A baseband coding module, the baseband coding module includes an FPGA, which is used to complete data exchange with the USB2.0 interface and ADS-B baseband coding functions; An auxiliary control module, the auxiliary control module includes an ARM chip, which is used to monitor the device status and assist in completing the control function; the power module is connected to the FPGA and the ARM chip wires respectively, and the USB2.0 interface is connected to the FPGA wire; It also includes a GNSS module for receiving and parsing real-time GNSS message information and providing ADS-B message data encoding parameters, wherein the GNSS module is connected to the FPGA wire; It also includes an RS232 interface circuit as an auxiliary communication interface, and the RS232 interface circuit is connected to the ARM chip wire; The FPGA includes four baseband channels, and the output ends of the four baseband channels are uniformly connected to the SMA port.

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