Linear wide-range variable gain amplifier for wideband applications

Abstract

A variable gain amplifier (1) for amplifying an input signal (13) having a variable gain. The variable gain amplifier (1) comprises a first variable gain amplification stage (11) and a second variable gain amplification stage (10). The first variable gain amplification stage (11) is adapted to amplify the input signal (13) in a first gain range of the variable gain. The second variable gain amplification stage (10) is adapted to amplify the input signal (13) in a second gain range of the variable gain. The first gain range extends from a minimum gain of the variable gain amplifier (1) to a boundary gain. The second gain range extends from the boundary gain to a maximum gain of the variable gain amplifier (1).

Description

[0001] The present invention relates to amplifiers, in particular high frequency amplifiers with high efficiency.

[0002] For a large number of applications, variable gain amplifiers are used. Variable Gain Amplifiers (VGAs) are amplifiers with adjustable gain, where the gain can be adjusted by a control voltage or current. VGAs are widely used when a signal amplification chain needs some kind of gain control mechanism.

[0003] The most common application of VGAs is in amplification chains using an Automatic Gain Control (AGC) feedback loop. A typical AGC feedback loop consists of:

[0004] • several amplification stages, of which one or more are VGAs, i.e. they have gain control;

[0005] • a peak detector, i.e. a circuit that senses the signal amplitude at the output of the amplification chain;

[0006] • an error amplifier that amplifies the difference between the output power detector and a target value.

[0007] The AGC feedback loop adjusts the gain of the VGAs so that the output signal amplitude is constant, regardless of input signal amplitude, temperature, process variations, supply voltage, etc.

[0008] The most important performance parameters (usually in trade-off) for a VGA used in linear wideband applications are:

[0009] • gain range (ratio between maximum and minimum gain);

[0010] • linearity (or equivalent distortion, usually measured as Total Harmonic Distortion (THD));

[0011] • bandwidth.

[0012] A common point for all VGAs is that the THD performance usually varies over the gain range, depending on the implementation.

[0013] A general problem encountered in VGAs is that the maximum THD over the gain range usually worsens as the gain range is extended, i.e. a wider range VGA usually has a worse linearity performance.

[0014] In summary, many VGA topologies suffer from a severe gain range / linearity trade-off, while achieving a wide gain range and high linearity can require very high power consumption. Furthermore, many known solutions have only a small number of fixed programmable gain steps, or are limited to implementations that can tolerate very small input signal amplitudes with good linearity.

[0015] It is therefore an object of the present invention to provide a variable gain amplifier that provides a very wide gain range while achieving high linearity.

[0016] This object is solved by the features of the apparatus of claim 1. The dependent claims include further developments.

[0017] The variable gain amplifier according to the invention is used for amplifying an input signal with a variable gain. The variable gain amplifier comprises a first variable gain amplification stage and a second variable gain amplification stage. The first variable gain amplification stage is adapted to amplify the input signal in a first gain range of the variable gain. The second variable gain amplification stage is adapted to amplify the input signal in a second gain range of the variable gain. The first gain range extends from a minimum gain of the variable gain amplifier to a boundary gain. The second gain range extends from the boundary gain to a maximum gain of the variable gain amplifier. Thus a very wide gain range and high linearity can be achieved.

[0018] Advantageously, the first variable gain amplification stage can be a multiplier-like variable gain amplifier. The second variable gain amplification stage is a two-stage variable gain amplifier. This allows for particularly high linearity in both amplification stages.

[0019] Further advantageously, the multiplier-like variable gain amplifier can be adapted to progressively direct an amplified signal away from a load, thereby reducing the gain of the multiplier-like variable gain amplifier. This allows for a seamless transition within the gain range.

[0020] The two-stage variable gain amplifier can comprise a first amplification stage and a second amplification stage, both adapted to amplify the input signal. The first amplification stage comprises a larger gain and a lower linearity than the second amplification stage. The two-stage variable gain amplifier further comprises a summer adapted to sum the output of the first amplification stage and the output of the second amplification stage. This allows for a particularly efficient amplification.

[0021] The summer can be adapted to sum the output signal of the first amplification stage with variable weights depending on the variable gain. This allows for a very simple seamless transition between different amplification stages.

[0022] The first and second variable gain amplification stages can be based on bipolar transistor technology or field effect transistor technology. This allows for a very simple implementation.

[0023] Advantageously, the first and second variable gain amplification stages can be based on differential bipolar transistor technology or differential field effect transistor technology. This allows for a very simple amplification of differential signals.

[0024] Advantageously, the boundary gain can be preset to a value that maximizes the average linearity performance of the variable gain amplifier over the total variable gain range of the variable gain amplifier. This allows for a particularly beneficial performance of the variable gain amplifier.

[0025] Further advantageously, the first variable gain amplification stage can be adapted to amplify the input signal over the first gain range based on a first control signal. The second variable gain amplification stage is adapted to amplify the input signal over the second gain range based on a second control signal. The first and second control signals are based on the variable gain. The first control signal is different from the second control signal. This allows for a particularly efficient control of the amplification.

[0026] Advantageously, the variable gain amplifier can comprise a control signal generator adapted to generate the first and second control signals based on the variable gain. This allows for a particularly efficient control of the amplification.

[0027] Further advantageously, the control signal generator can be based on bipolar transistor technology or field effect transistor technology. This further simplifies the implementation.

[0028] Example embodiments of the present application will now be further explained with reference to the accompanying drawings, in which

[0029] Figure 1 A first embodiment of a variable gain amplifier is shown in a block diagram;

[0030] Figure 2 Performance diagrams of an exemplary variable gain amplifier and a second embodiment of a variable gain amplifier of the present application are shown;

[0031] Figure 3 A third embodiment of a variable gain amplifier of the present application is shown in a circuit diagram;

[0032] Figure 4 Control signals within a third exemplary embodiment of a variable gain amplifier of the present application are shown;

[0033] Figure 5 Performance diagrams of a fourth embodiment of a variable gain amplifier of the present application are shown;

[0034] Figure 6 Operation of the fifth embodiment of the inventive variable gain amplifier in a first operating point is shown;

[0035] Figure 7 Operation of the fifth embodiment of the inventive variable gain amplifier in a second operating point is shown;

[0036] Figure 8 Operation of the fifth embodiment of the variable gain amplifier in a third operating point is shown.

[0037] First, we follow the Figure 1 and Figure 2 The general structure and function of the embodiments of the variable gain amplifier is demonstrated. Further details about Figures 3 to 8 different embodiments and operations are explained. Similar entities and reference numbers in different figures have been partly omitted.

[0038] The general approach of the invention is to combine two different gain variation methods to extend the VGA gain range for a given THD or equivalently to improve the THD for a given gain range.

[0039] In Figure 1 a first embodiment of the inventive variable gain amplifier 1 is shown. The variable gain amplifier 1 comprises a first variable gain amplification stage 11 and a second variable gain amplification stage 10. An input signal 13 is provided to both variable gain amplification stages 10, 11. The output signals of the variable gain amplification stages 10, 11 are added by an adder 12 to an output signal 14.

[0040] The first variable gain amplification stage 11 is optimized for low gain amplification. The second variable gain amplification stage 10 is optimized for high gain amplification. Both variable gain amplification stages 10, 11 are provided with control signals 15, 16 by a control signal generator 17. The control signal generator 17 generates the control signals 15, 16 independently such that separate and different control signals 15, 16 are provided to both variable gain amplification stages 10, 11. In particular, the control signals 15, 16 control which of the variable gain amplification stages 10, 11 performs the amplification of the input signal 13. Furthermore, the control signal generator 17 is connected to an additional input 18 through which an external gain control signal is input.

[0041] In particular, the first variable gain amplification stage 11 can be implemented as a multiplier-like variable gain amplifier. Furthermore, the second variable gain amplification stage can be implemented as a two-stage variable gain amplifier.

[0042] In case the first amplification stage is implemented as a multiplier-like variable gain amplifier, the multiplier-like variable gain amplifier is adapted to progressively direct the amplified signal away from the load, thereby reducing the gain of the multiplier-like variable gain amplifier.

[0043] In case the second variable gain amplification stage is implemented as a two-stage variable gain amplifier, the two-stage variable gain amplifier comprises a first amplification stage and a second amplification stage, both adapted to amplify the input signal. The first amplification stage comprises a higher gain and a lower linearity than the second amplification stage. The two-stage variable gain amplifier further comprises a summer adapted to add the output signals of the first and second amplification stages of the two-stage variable gain amplifier. In particular, this summer can add the signals with variable weights.

[0044] In Figure 2 the performance of an exemplary multiplier-like variable gain amplifier and the performance of an exemplary two-stage variable gain amplifier are shown. Furthermore, the resulting performance of an embodiment of the inventive variable gain amplifier is shown in the lower part of the figure. From Figure 2 It can be easily seen that the total VGA gain range is divided into two regions 20, 21.

[0045] Starting from Gmax, the VGA gain is reduced in region 21 using a two-stage technique. The two-stage technique comprises mixing the outputs of two different gain stages with variable weights, one gain stage having a high gain and the other gain stage having a lower gain but a better linearity. This gain variation technique typically results in a bell-shaped THD variation versus gain.

[0046] Then, after the high gain stage is completely turned off, the gain of the low gain stage is further reduced in region 20 using a multiplier-like technique. The multiplier-like gain reduction technique comprises progressively steering the RF signal generated by the gain stage away from the load, thereby reducing the gain of the amplifier. This gain variation technique typically results in a sharp increase of the THD when the gain is reduced from MAX.

[0047] The border between these two regions is optimized to achieve a minimum THDmax, i.e. when THDmax has the same value in both regions.

[0048] Figure 3 One possible embodiment in a bipolar technique suitable for wideband applications is shown. The first variable gain amplification stage 11 comprises a low gain input differential stage formed by transistors Q2p-Q2n, which converts the input differential voltage signal Vin_p-Vin_n corresponding to the input signal 13 into a differential current. This differential stage can use some kind of resistive degeneration Re_lg to improve its linearity performance. This low gain stage has a lower transconductance but a higher linearity than the high gain stage (typically Re_lg > Re_hg), as described below. Figure 1

[0049] ​The second variable gain amplification stage 10 comprises a high gain input differential stage formed by transistors Q1p-Q1n, which converts the input differential voltage signal Vin_p-Vin_n to a differential current. This differential stage can use some kind of resistive degeneration Re_hg to improve its linearity performance.

[0050] The variable gain amplification stages 10, 11 share a gain variation network consisting of transistors Q3p / n and Q4p / n, which is used to mix the differential currents produced by the high and low gain stages into a resistive load. The bases of transistors Q3p / n and Q4p / n are connected to two separate differential gain control signals Vgcp_hg-Vgcn_hg and Vgcp_lg-Vgcn_lg. These control signals correspond to Figure 1 the control signals 15, 16. The connection of the output of the gain variation network corresponds to Figure 1 the summer 12.

[0051] The load resistance RL converts the differential current to a differential output voltage (Vout_p-Vout_n), performing the amplification of the input signal. There is a dump resistance Rdump, where the "unused" differential current is directed by transistors Q3p / n and Q4p / n. The resulting differential output signal Vout_p-Vout_n corresponds to Figure 1 the output signal 14.

[0052] The control of the low and high gain stages is separated, with two separate differential gain control signals Vgcp_hg-Vgcn_hg and Vgcp_lg-Vgcn_lg for the high and low gain stages, respectively. Compared to a VGA using only double stage gain variation techniques, the current consumption and the number of transistors connected to the output node is the same as in a VGA using only double stage gain variation techniques, thus potentially achieving the same bandwidth.

[0053] Figure 4 The expected shape of the gain control signals and the expected THD performance affected by the VGA gain are outlined. In Figure 5 the performance of especially the two different gain regions can be seen.

[0054] In Figure 6In Figure 6, the case when configured for maximum gain is shown. When configured for MAX gain, the high gain stage differential gain control signals Vgcp_hg - Vgcn_hg must be positive large, and the low gain stage differential gain control signals Vgcp_lg - Vgcn_lg must be negative large. In this case, transistor Q3p is on, while transistor Q3n is off. The differential current generated by the high gain stage Qlp / n is fully steered into the load resistor RL, resulting in the generation of the output signal. On the other side, transistor Q4p is off, while transistor Q4n is on, such that the differential current generated by the low gain stage 11 is fully steered into the dump resistor Rdump, resulting in no output signal generation.

[0055] In this case, the VGA gain is maximum, and its linearity is fully determined by the high gain stage 10.

[0056] In Figure 7 Figure 6, the case when configured for maximum gain is shown. When configured for MAX gain, the high gain stage differential gain control signals Vgcp_hg - Vgcn_hg must be positive large, and the low gain stage differential gain control signals Vgcp_lg - Vgcn_lg must be negative large. In this case, transistor Q3p is on, while transistor Q3n is off. The differential current generated by the high gain stage Qlp / n is fully steered into the load resistor RL, resulting in the generation of the output signal. On the other side, transistor Q4p is off, while transistor Q4n is on, such that the differential current generated by the low gain stage 11 is fully steered into the dump resistor Rdump, resulting in no output signal generation.

[0057] Finally, in Figure 8 Figure 6, the case when configured for maximum gain is shown. When configured for MAX gain, the high gain stage differential gain control signals Vgcp_hg - Vgcn_hg must be positive large, and the low gain stage differential gain control signals Vgcp_lg - Vgcn_lg must be negative large. In this case, transistor Q3p is on, while transistor Q3n is off. The differential current generated by the high gain stage Qlp / n is fully steered into the load resistor RL, resulting in the generation of the output signal. On the other side, transistor Q4p is off, while transistor Q4n is on, such that the differential current generated by the low gain stage 11 is fully steered into the dump resistor Rdump, resulting in no output signal generation.

[0058] VGA minimum gain depends on where the low gain stage differential control signals Vgcp_lg - Vgcn_lg stop at the end of region 20, which is a design parameter and depends on the required VGA gain range.

[0059] In both regions, the THD reaches a maximum somewhere within region 21 and at the bottom end of region 20. As already pointed out, the overall THD performance is optimized when both maxima are equal. This can easily be done by adjusting the transition point between region 21 and region 20, i.e. by deciding how much of the total gain range R is to be performed using the two-stage gain reduction and how much is left to be performed using a gain reduction like a multiplier. The decision can be made with the help of a simple optimization that can be done during the design phase or during the measurement.

[0060] The present application is not limited to the examples, in particular not to the specific amplifier technology. Features of the exemplary embodiments can be used in any advantageous combination.

Claims

1. A variable gain amplifier (1) for amplifying an input signal (13) with a variable gain, characterized by comprises: - a first variable gain amplification stage (11) adapted to amplify the input signal (13) in a first gain range of the variable gain, the first variable gain amplification stage (11) being used for low gain amplification; - a second variable gain amplification stage (10) adapted to amplify the input signal (13) in a second gain range of the variable gain, the second variable gain amplification stage (10) being used for high gain amplification; wherein the first gain range extends from a minimum gain to a boundary gain of the variable gain amplifier (1), the second gain range extends from the boundary gain to a maximum gain of the variable gain amplifier (1), the boundary gain is pre-set to a value maximizing an average linearity performance of the variable gain amplifier (1) in the total variable gain range of the variable gain amplifier (1).

2. The variable gain amplifier (1) according to claim 1, characterized in that the first variable gain amplification stage (11) is a multiplier-like variable gain amplifier, the second variable gain amplification stage (10) is a two-stage variable gain amplifier.

3. The variable gain amplifier (1) according to claim 2, characterized in that the multiplier-like variable gain amplifier is adapted to progressively direct an amplified signal away from a load, thereby reducing a gain of the multiplier-like variable gain amplifier.

4. The variable gain amplifier (1) according to claim 2, characterized in that the two-stage variable gain amplifier comprises a first amplification stage and a second amplification stage, both adapted to amplify the input signal (13), the first amplification stage comprises a higher gain and a lower linearity than the second amplification stage, the two-stage variable gain amplifier comprises a summer adapted to add an output signal of the first amplification stage and an output signal of the second amplification stage.

5. The variable gain amplifier (1) according to claim 4, characterized in that the summer is adapted to add the output signal of the first amplification stage and the output signal of the second amplification stage with variable weights depending on the variable gain.

6. The variable gain amplifier (1) according to any one of claims 1 to 5, characterized in that the first variable gain amplification stage (11) and the second variable gain amplification stage (10) are based on bipolar transistor technology or field effect transistor technology.

7. The variable gain amplifier (1) according to any one of claims 1 to 5, characterized in that the first variable gain amplification stage (11) and the second variable gain amplification stage (10) are based on differential bipolar transistor technology or differential field effect transistor technology.

8. The variable gain amplifier (1) according to any one of claims 1 to 5, characterized in that the first variable gain amplification stage (11) is adapted to amplify the input signal (13) in the first gain range based on a first control signal (16, Vgcn_hg, Vgcp_hg), the second variable gain amplification stage (10) is adapted to amplify the input signal (13) in the second gain range based on a second control signal (17, Vgcn_hg, Vgcp_hg). The second variable gain amplification stage (10) is adapted to amplify the input signal (13) within the second gain range based on a second control signal (15, Vgcn_lg, Vgcp_lg), wherein the first control signal (16, Vgcn_hg, Vgcp_hg) and the second control signal (15, Vgcn_lg, Vgcp_lg) are based on the variable gain, the first control signal (16, Vgcn_hg, Vgcp_hg) is different from the second control signal (15, Vgcn_lg, Vgcp_lg).

9. The variable gain amplifier (1) according to claim 8, characterized in that the variable gain amplifier (1) comprises a control signal generator (17) adapted to generate the first control signal (16, Vgcn_hg, Vgcp_hg) and the second control signal (15, Vgcn_lg, Vgcp_lg) based on the variable gain.

10. The variable gain amplifier (1) according to claim 9, characterized in that the control signal generator (17) is based on bipolar transistor technology or field effect transistor technology.

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