Methods for forming structures with desired crystallinity for use in MRAM applications

Abstract

A method for forming structures with desired crystallinity used in MRAM applications is disclosed. Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures used in spin transfer torque magnetoresistive random access memory (STT-MRAM) applications on a substrate. In one embodiment, the method includes patterning a film stack disposed on a substrate having a tunneling barrier disposed between a magnetic reference layer and a magnetic storage layer to remove a portion of the film stack from the substrate until an upper surface of the substrate is exposed; forming a sidewall passivation layer on sidewalls of the patterned film stack; and subsequently performing a thermal anneal process on the film stack.

Description

[0001] This application is a divisional application of application number 201610554216.1, filed on July 14, 2016, entitled "Method for forming a structure with desired crystallinity used in MRAM applications". Technical Field

[0002] Embodiments of this disclosure relate to methods for manufacturing structures used in magnetoresistive random access memory (MRAM) applications. More specifically, embodiments of this disclosure relate to methods for manufacturing magnetic tunnel junction structures used in MRAM applications. Background Technology

[0003] Magnetoresistive random access memory (MRAM) is a type of memory element that contains an array of MRAM cells that store data using their resistance values ​​rather than electronic charges. Typically, each MRAM cell includes a magnetic tunnel junction (MTJ) structure. The MTJ structure may have an adjustable resistor representing a logic state of "0" or "1". An MTJ structure typically comprises a stack of magnetic layers with a configuration in which two ferromagnetic layers are separated by a thin non-magnetic dielectric (e.g., an insulating tunneling layer). Top and bottom electrodes are used to clamp the MTJ structure, allowing current to flow between the top and bottom electrodes.

[0004] One ferromagnetic layer (e.g., a reference layer) is characterized by magnetization with a fixed orientation. Another ferromagnetic layer (e.g., a storage layer) is characterized by magnetization with an orientation that changes during device writing (e.g., by applying a magnetic field). In some devices, an insulating material (such as a dielectric oxide layer) may be formed as a thin tunneling barrier layer sandwiched between the ferromagnetic layers. Typically, these layers are deposited sequentially as a coating. The ferromagnetic layers and the insulating material are sequentially patterned by various etching processes in which one or more layers are partially or completely removed to form device features.

[0005] When the corresponding magnetizations of the reference layer and the storage layer are antiparallel, the resistance of the magnetic tunnel junction is high, with a resistance value R corresponding to the high logic state "1". max On the other hand, when the corresponding magnetization is parallel, the resistance of the magnetic tunnel junction is low, that is, it has a resistance value R corresponding to the low logic state "0". min The logic state of an MRAM cell is determined by comparing its resistance value with a reference resistance value R. ref The reference resistance value is read by comparison and is derived from a reference cell or a set of reference cells and represents the intermediate resistance value between the resistance value of the high logic state "1" and the resistance value of the low logic state "0".

[0006] One type of MRAM cell is Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM). In the fabrication of conventional STT-MRAM devices, a thermal annealing process is typically performed immediately following the film deposition process to aid in the crystallization of the ferromagnetic layer and the insulating material sandwiched within the device structure. Insufficient thermal energy or inaccurate temperature control during the annealing process can lead to undesirable film bonding structures or properties. For example, inaccurate temperature control or undesirable drift in thermal diffusion during the annealing process can result in insufficient film crystallization, preventing the device from meeting its expected performance.

[0007] Therefore, there is a need in the art for improved methods and apparatus for manufacturing MTJ structures used in MRAM applications. Summary of the Invention

[0008] Embodiments of this disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for use in MRAM applications, particularly spin-transfer torque magnetic random access memory (STT-MRAM) applications. In one embodiment, a film stack for forming a magnetic tunnel junction structure on a substrate includes: a pinning layer disposed on the substrate, wherein the pinning layer comprises a plurality of layers, the plurality of layers including at least one or more of a Co-containing layer, a Pt-containing layer, a Ta-containing layer, a Ru-containing layer, and combinations thereof; an optional structural decoupling layer disposed on the magnetic pinning layer; a magnetic reference layer disposed on the optional structural decoupling layer; a tunneling barrier layer disposed on the magnetic reference layer; a magnetic storage layer disposed on the tunneling barrier layer; and a capping layer disposed on the magnetic storage layer.

[0009] In another embodiment, the method includes: patterning a film stack having a tunneling barrier layer disposed on a substrate between a magnetic reference layer and a magnetic storage layer to remove a portion of the film stack from the substrate until an upper surface of the substrate is exposed; forming a sidewall passivation layer on the sidewalls of the patterned film stack; and subsequently performing a thermal annealing process on the film stack.

[0010] In another embodiment, a method for forming a magnetic tunnel junction structure on a substrate includes: patterning a film stack having a tunneling barrier layer disposed between a magnetic reference layer and a magnetic storage layer on the substrate to remove a portion of the film stack from the substrate until the upper surface of the substrate is exposed; forming a sidewall passivation layer on the sidewalls of the patterned film stack; forming an insulating layer on the substrate in contact with the sidewall passivation layer; and driving a dopant laterally outward from the magnetic reference layer and the magnetic storage layer into the sidewall passivation layer by a heat treatment process. Attached Figure Description

[0011] To better understand the above-described features of this disclosure, a more detailed description of the disclosure, which is briefly outlined above, can be made by referring to embodiments, some of which are illustrated in the accompanying drawings.

[0012] Figure 1 One embodiment of a plasma processing chamber for practicing one embodiment of the present disclosure is described;

[0013] Figure 2 An embodiment of an annealing chamber for practicing one embodiment of the present disclosure is described;

[0014] Figure 3 A flowchart illustrating a method for manufacturing a magnetic tunnel junction (MTJ) structure according to one embodiment of the present disclosure is depicted;

[0015] Figures 4A-4E Is in Figure 3 A schematic side view of the substrate at various stages of the method; and

[0016] Figure 5 yes Figure 4A A schematic diagram of another embodiment of a portion of the membrane stack shown.

[0017] For ease of understanding, the same reference numerals have been used wherever possible to designate the same elements common to all figures. It is conceivable that elements disclosed in one embodiment may be advantageously used in other embodiments without specific description.

[0018] However, it should be noted that the accompanying drawings merely illustrate typical embodiments of the present disclosure and should therefore not be construed as limiting the scope of the present disclosure, as the present disclosure may allow for other equivalent embodiments. Detailed Implementation

[0019] Embodiments of this disclosure generally provide apparatus and methods for forming MTJ structures used in MRAM applications from a film stack disposed on a substrate. The apparatus and methods include forming film properties of material layers with a desired crystallinity in a film stack by a thermal process performed after patterning of material layers in the film stack. During patterning, sidewall passivation layers may be formed along the sidewalls of the film stack. Therefore, by performing the thermal process after the patterning process and the sidewall passivation deposition process, the thermal energy provided by the thermal process can effectively diffuse dopants laterally outward toward the sidewall passivation layers (rather than perpendicularly toward adjacent material layers formed in the film stack) into the material layers. In this way, controllable crystallinity of the material layers in the film stack can be achieved without damage or interference from dopants that may cross-diffuse from adjacent materials. Film stacks patterned and annealed with a desired crystallinity can be used to form MTJ structures with desired dimensions and characteristics for MRAM applications.

[0020] Figure 1 This is a cross-sectional view of an example of a processing chamber 100 suitable for performing patterning processes to etch a film stack disposed on a substrate. Suitable processing chambers that may be suitable for use with the teachings disclosed herein include, for example, those available from Applied Materials, Inc. of Santa Clara, California. Or AdvantEdge Processing chamber. Although processing chamber 100 is shown to include several features that enable superior etching performance, it is conceivable that other processing chambers may be adapted to benefit from one or more of the inventive features disclosed herein.

[0021] Processing chamber 100 includes a chamber body 102 and a cover 104, which enclose an internal volume 106. The chamber body 102 is typically made of aluminum, stainless steel, or other suitable material. The chamber body 102 generally includes sidewalls 108 and a bottom 110. A substrate support base inlet / outlet port (not shown) is generally defined in the sidewall 108 and is selectively sealed by a slit valve to facilitate the entry and exit of a substrate 103 into and out of the processing chamber 100. A drain port 126 is defined in the chamber body 102 and couples the internal volume 106 to a pump system 128. The pump system 128 generally includes one or more pumps for evacuating and regulating the pressure of the internal volume 106 of the processing chamber 100, as well as a throttle valve. In one embodiment, the pump system 128 maintains the pressure within the internal volume 106 at an operating pressure typically between about 10 mTorr and about 500 Torr.

[0022] The cover 104 is securely supported on the side wall 108 of the chamber body 102. The cover 104 can be opened to allow access to the internal volume 106 of the processing chamber 100. The cover 104 includes a window 142 that facilitates optical process monitoring. In one embodiment, the window 142 is made of quartz or other suitable material for signal transmission to an optical monitoring system 140 mounted outside the processing chamber 100.

[0023] Optical monitoring system 140 is positioned to view, through window 142, at least one of the internal volume 106 of chamber body 102 and / or substrate 103 positioned on substrate support base assembly 148. In one embodiment, optical monitoring system 140 is coupled to cover 104 and facilitates an integrated deposition process that uses optical metrics to provide information for enabling process adjustments to compensate for inconsistencies in substrate pattern features (such as thickness), and to provide process status monitoring (such as plasma monitoring, temperature monitoring, etc.) as needed. An optical monitoring system suitable for benefiting from this disclosure is available from Applied Materials Inc., Santa Clara, California. Full-spectrum interferometric metrology module.

[0024] Gas panel 158 is coupled to processing chamber 100 to supply process and / or cleaning gases to internal volume 106. Figure 1 In the depicted example, inlet ports 132', 132" are provided in cover 104 to allow gas delivery from gas panel 158 to the internal volume 106 of processing chamber 100. In one embodiment, gas panel 158 is adapted to provide fluorinated process gas through inlet ports 132', 132" and to provide it to the internal volume 106 of processing chamber 100. In one embodiment, the process gas provided from gas panel 158 includes at least fluorinated gas, chlorine, carbon-containing gas, oxygen, nitrogen-containing gas, and chlorine-containing gas. Examples of fluorinated carbon-containing gases include CHF3, CH2F2, and CF4. Other fluorinated gases may include one or more of C2F, C4F6, C3F8, and C5F8. Examples of oxygen-containing gases include O2, CO2, CO, N2O, NO2, O3, H2O, etc. Examples of nitrogen-containing gases include N2, NH3, N2O, NO2, etc. Examples of chlorine-containing gases include HCl, Cl2, CCl4, CHCl3, CH2Cl2, CH3Cl, etc. Suitable examples of carbon-containing gases include methane (CH4), ethane (C2H6), ethylene (C2H4), etc.

[0025] The spray head assembly 130 is coupled to the inner surface 114 of the cover 104. The spray head assembly 130 includes a plurality of pores that allow gas to flow in a predefined distribution across the surface of the substrate 103 being processed in the processing chamber 100 from the inlet ports 132', 132" into the internal volume 106 of the processing chamber 100.

[0026] A remote plasma source 177 may be coupled to the gas panel 158 to facilitate the dissociation of the gas mixture from the remote plasma before it enters the internal volume 106 for processing. An RF power source 143 is coupled to the spray head assembly 130 via a matching network 141. The RF power source 143 is typically capable of generating up to approximately 3000 W at a tunable frequency ranging from approximately 50 kHz to approximately 200 MHz.

[0027] The spray head assembly 130 further includes an area for transmitting optical measurement signals. The optical transmission area or passage 138 is adapted to allow the optical monitoring system 140 to view the internal volume 106 and / or the substrate 103 positioned on the substrate support base assembly 148. The passage 138 may be a material, pores, or a plurality of pores formed or disposed in the spray head assembly 130, which is substantially transmissive to the wavelength of energy generated by the optical monitoring system 140 and reflected back to the optical monitoring system. In one embodiment, the passage 138 includes a window 142 to prevent gas leakage through the passage 138. The window 142 may be a sapphire plate, a quartz plate, or other suitable material. The window 142 may alternatively be disposed in the cover 104.

[0028] In one embodiment, the spray head assembly 130 is configured with multiple zones that allow individual control of the gas flowing into the internal volume 106 of the treatment chamber 100. Figure 1 In the example shown, the spray head assembly 130 is individually coupled to the inner zone 134 and outer zone 136 of the gas panel 158 via separate inlet ports 132' and 132" respectively.

[0029] A substrate support base assembly 148 is disposed within the internal volume 106 of the processing chamber 100, below the gas distribution (spray head) assembly 130. The substrate support base assembly 148 holds the substrate 103 during processing. The substrate support base assembly 148 generally includes a plurality of lifting rods (not shown) disposed therethrough, configured to lift the substrate 103 from the substrate support base assembly 148 and to facilitate the exchange of the substrate 103 using a robot (not shown) in a conventional manner. A liner 118 tightly surrounds the periphery of the substrate support base assembly 148.

[0030] In one embodiment, the substrate support base assembly 148 includes a mounting plate 162, a base 164, and an electrostatic chuck 166. The mounting plate 162 is coupled to the bottom 110 of the chamber body 102 and includes pathways for conveying wiring facilities (such as fluid, wires, and sensor leads) to the base 164 and the electrostatic chuck 166. The electrostatic chuck 166 includes at least one clamping electrode 180 for holding the substrate 103 below the spray head assembly 130. The electrostatic chuck 166 is driven by a clamping power source 182 to generate an electrostatic force holding the substrate 103 to the chuck surface, as is generally known. Alternatively, the substrate 103 may be held to the substrate support base assembly 148 by clamping, vacuum, or gravity.

[0031] At least one of the base 164 or the electrostatic chuck 166 may include at least one optional embedded heater 176, at least one optional embedded isolator 174, and a plurality of conduits 168, 170 for controlling the lateral temperature distribution of the substrate support base assembly 148. The conduits 168, 170 are fluidly coupled to a fluid source 172 through which temperature-regulating fluid is circulated. The heater 176 is regulated by a power source 178. The conduits 168, 170 and the heater 176 are used to control the temperature of the base 164, thereby heating and / or cooling the electrostatic chuck 166, and ultimately controlling the temperature distribution of the substrate 103 disposed thereon. The temperatures of the electrostatic chuck 166 and the base 164 may be monitored using a plurality of temperature sensors 190, 192. The electrostatic chuck 166 may further include a plurality of gas passages (not shown), such as grooves, formed in the substrate support base support surface of the chuck 166, and fluidly coupled to a source of heat-transferring (e.g., backside) gas (such as He). During operation, backside gas is supplied to the gas passage under controlled pressure to enhance heat transfer between the electrostatic chuck 166 and the substrate 103.

[0032] In one embodiment, the substrate support base assembly 148 is configured as a cathode and includes an electrode 180 coupled to a plurality of RF power bias sources 184, 186. The RF power bias sources 184, 186 are coupled between the electrode 180 disposed in the substrate support base assembly 148 and another electrode (such as the spray head assembly 130 or the top cover (cover 104) of the chamber body 102). The RF bias power excites and sustains a plasma discharge formed from a gas disposed in a processing region of the chamber body 102.

[0033] exist Figure 1In the depicted example, dual RF bias power sources 184 and 186 are coupled to electrodes 180 disposed in a substrate support assembly 148 via a matching circuit 188. Signals generated by the RF bias power sources 184 and 186 are fed to the substrate support assembly 148 via the matching circuit 188 through a single feed to ionize the gas mixture provided in the plasma processing chamber 100, thereby providing the ion energy necessary to perform deposition or other plasma enhancement processes. The RF bias power sources 184 and 186 are generally capable of generating RF signals with frequencies from about 50 kHz to about 200 MHz and power between about 0 watts and about 5000 watts. An additional bias power source 189 may be coupled to the electrodes 180 to control the characteristics of the plasma.

[0034] In one operating mode, substrate 103 is disposed on substrate support base assembly 148 within plasma processing chamber 100. Process gases and / or gas mixtures are introduced into chamber body 102 from gas panel 158 via spray head assembly 130. Vacuum pump system 128 maintains pressure within chamber body 102 while removing deposition byproducts.

[0035] Controller 150 is coupled to processing chamber 100 to control the operation of processing chamber 100. Controller 150 includes a central processing unit (CPU) 152, memory 154, and support circuitry 156 for controlling the process sequence and regulating airflow from gas panel 158. CPU 152 can be any type of general-purpose computer processor suitable for industrial environments. Software routines can be stored in memory 154 (such as random access memory, read-only memory, floppy disk or hard disk, or other forms of digital storage devices). Support circuitry 156 is conventionally coupled to CPU 152 and may include cache, clock circuitry, input / output systems, power supply, etc. Bidirectional communication between controller 150 and various components of processing chamber 100 is handled via numerous signal cables.

[0036] Figure 2 A schematic diagram of a processing chamber 200 according to one embodiment is shown. The processing chamber 200 can be used to process a substrate 103, including providing heat / thermal energy to a material layer disposed on the substrate 103. The processing chamber 200 may include an array of radiant heat lamps 202 for heating components such as the back side 204 of a support 220 disposed within the wall 201 of the processing chamber 200 and the substrate 103. The support 220 is supported by a support support member 218. Figure 2In the illustrated embodiment, the support 220 has an annular body with a central opening 203 and a lip 221 extending from the edge of the support 220 and surrounding the central opening 203. The lip 221 and the front side 202 of the support 220 form a pocket 226 that supports the substrate 103 from the edge of the substrate to facilitate exposure of the substrate 103 to the thermal radiation provided by the lamp 202.

[0037] The support 220 is positioned within the processing chamber 200, between the upper cover 210 and the lower cover 212. The upper cover 210 is coupled to the lower cover 212 via a base ring 214. The upper cover 210, lower cover 212, and base ring 214 generally define an internal region of the processing chamber 200. In some embodiments, an array of radiant heat lamps 202 may be disposed above the upper cover 210. The substrate 301 may be fed into the processing chamber 200 and positioned onto the support 220 via a loading port (not shown) formed in the base ring 214.

[0038] The support 220 is shown in the raised processing position, but can be moved vertically to a loading position below the processing position by an actuator (not shown) to allow the lifting rod 222 to pass through a hole in the support member 218 and lift the substrate 103 from the support 220. A robot (not shown) can then enter the processing chamber 200 to engage the substrate 103 through the loading port and remove the substrate therefrom. The support 220 can then be actuated upwards to reach the processing position to place the substrate 103 onto the front side 202 of the support 220, with the element side 224 facing upwards.

[0039] When in the processing position, the support 220 and support support 218 divide the internal volume of the processing chamber 200 into a process gas region 228 above the substrate 103 and a purge gas region 230 below the support 220 and support support 218. During processing, the support 220 and support support 218 rotate via a supporting cylindrical central shaft 232 to minimize the impact of thermal and process airflow anomalies within the processing chamber 200, and thus promote uniform processing of the substrate 103. The central shaft 232 moves the substrate 301 vertically 234 during loading and unloading, and in some cases during substrate 103 processing.

[0040] Generally, the central window portion of the upper cover 210 and the bottom of the lower cover 212 are formed of an optically transparent material (such as quartz). One or more lamps (such as an array of lamps 202) may be arranged in a specific optimal manner adjacent to and below the lower cover 212 around the central axis 232 to independently control the temperature at various regions of the substrate 103. The heated substrate 103 is exposed to process gases, thereby facilitating the heat treatment (i.e., deposition) of material onto the upper surface of the substrate 103.

[0041] Lamp 202 may be configured to include bulb 236 and to heat substrate 301 to a temperature in the range of about 200 degrees Celsius to about 1600 degrees Celsius (e.g., between about 300 degrees Celsius and about 1200 degrees Celsius, or between about 500 degrees Celsius and about 580 degrees Celsius). Each lamp 202 is coupled to a power distribution board (not shown), through which power is supplied to each lamp 202. Lamp 202 is positioned within lamp holder 238, which may be cooled during or after processing by, for example, cooling fluid introduced into channels 252 located between lamps 202. Lamp holder 238 conductively or radially cools lower cover 212, in part because lamp holder 238 is in close proximity to lower cover 212. Lamp holder 238 may also cool the lamp walls and the walls of reflectors (not shown) surrounding the lamp. Alternatively, lower cover 212 may be cooled by known convection methods, such as by a fan or other cooling techniques. Depending on the application, the lamp holder 238 may or may not contact the lower cover 212. Due to the backside heating of the substrate 103, an optical pyrometer 242 can also be used for temperature measurement / control of the substrate 103 and the support 220.

[0042] Reflector 244 may be positioned outside upper cover 210 to reflect infrared light positively radiating from substrate 301 back onto substrate 301. Reflector 244 may be made of metal (such as aluminum or stainless steel). Reflection efficiency may be improved by coating the reflector area with a high-reflectivity coating (such as gold). Reflector 244 may have one or more processed channels 246 connected to a cooling source (not shown). Channels 246 are connected to a passage (not shown) formed on one side of reflector 244. The passage is configured to carry a fluid (such as water) flow and may travel horizontally along that side of reflector 244 in any desired pattern, thereby covering a portion or the entire surface of reflector 244 to cool reflector 244.

[0043] Process gas supplied from process gas supply source 248 is introduced into process gas region 228 through process gas inlet 250 formed in the sidewall of base ring 214. Process gas inlet 250 is configured to guide the process gas in a generally radially inward direction. During the film deposition process, support 220 can be located at a processing position adjacent to and at approximately the same height as process gas inlet 250, thereby allowing the process gas to flow upward in a laminar manner and circulate along a flow path over the upper surface of substrate 103. Process gas exits process gas region 228 through gas outlet 255 located on the side of processing chamber 200 opposite to process gas inlet 250. Removal of process gas through gas outlet 255 can be facilitated by a vacuum pump 256 coupled to the gas outlet. Since process gas inlet 250 and gas outlet 255 are aligned and positioned at approximately the same height, it is believed that this parallel arrangement provides a generally flat and uniform airflow on substrate 103 when combined with flat top cover 210. Further radial uniformity can be provided by rotating the substrate 103 by the support 220.

[0044] Purified gas can be supplied from purified gas source 258 to purified gas region 230 through optional purified gas inlet 260 (or through process gas inlet 250) formed in the sidewall of base ring 214. Purified gas inlet 260 is located at a height below process gas inlet 250. Purified gas inlet 260 is configured to guide purified gas in a generally radially inward direction. During the process, support 220 can be positioned so that purified gas flows downward in a laminar manner and along a flow path past the back side 204 of support 220. Without being bound by any specific theory, it is assumed that the flow of purified gas prevents or substantially avoids process gas flow into purified gas region 230, or reduces process gas diffusion into purified gas region 230 (i.e., the region below support 220). Purified gas exits purified gas region 230 and is discharged from processing chamber 200 through gas outlet 255, which is located on the side of processing chamber 200 opposite to purified gas inlet 260.

[0045] Figure 3 A flowchart illustrating a process 300 for fabricating an MTJ structure used in an MRAM application on a substrate, according to one embodiment of the present disclosure, is depicted. Figures 4A-4E Is in Figure 3 A schematic cross-sectional view of substrate 400 at various stages of the process. Process 300 is configured in a plasma processing chamber and a heat treatment chamber (such as... Figure 1 and Figure 2The process 300 is performed in the processing chambers 100 and 200 described herein. It is envisioned that the process 300 can be performed in other suitable plasma immersion ion implantation systems or etching chambers (including those from other manufacturers).

[0046] Process 300 begins at operation 302 by providing a substrate (such as substrate 400 having a film stack 402 disposed thereon). Figure 5 yes Figure 4A This is a schematic diagram of one embodiment of a portion of the film stack 402 shown. In one embodiment, the substrate 400 comprises metal or glass, silicon, dielectric bulk material and metal alloy, or comprises composite glass, crystalline silicon (e.g., Si). <100> or Si <111> Silicon oxide, strained silicon, silicon germanide, germanium, doped or undoped polycrystalline silicon, doped or undoped silicon wafers and silicon on insulators (SOI) with patterned or unpatterned wafers, carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, or sapphire. The substrate 400 can have various sizes, such as 200 mm, 300 mm, 450 mm, or other diameters, and can be a rectangular or square panel. Unless otherwise specified, the examples described herein are carried out on substrates having a diameter of 200 mm, 300 mm, or 450 mm. In one embodiment, the substrate 400 (e.g., silicon oxide, strained silicon, silicon germanide, germanium, doped or undoped polycrystalline silicon, doped or undoped silicon wafers and silicon on insulators with patterned or unpatterned wafers (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, or sapphire. Figure 4A (As shown) includes a film stack 402 disposed on a substrate 400.

[0047] In one example, the membrane stack 402 includes a magnetic pinning layer 404, an optional structural decoupling layer 405, and a tunneling barrier layer 408. The tunneling barrier layer, in the case of a tunnel junction magnetoresistive (TMR) sensor, may be an oxide barrier layer, or in the case of a giant magnetoresistive (GMR) sensor, a conductive layer, disposed above the magnetic pinning layer 404 and sandwiched between the magnetic storage layer 410 and the magnetic reference layer 406. When the membrane stack 402 is configured to form a TMR sensor, the tunneling barrier layer 408 may comprise MgO, HfO2, TiO2, or TaO. x Al2O3 or other suitable materials. Figure 5 In the depicted embodiment, the tunneling barrier layer 408 may comprise MgO having a thickness of about 1 angstrom to about 15 angstroms (such as about 10 angstroms). The tunneling barrier layer 408 may be annealed during or after deposition, for example using a rapid thermal annealing (RTP) process.

[0048] If the membrane stack 402 is configured to form a GMR sensor, then the membrane stack 402 may contain a non-magnetically conductive material, such as copper. The structural decoupling layer 405 may be a metallic or magnetic material, such as Mo, Ta, W, CoFe, CoFeB, etc.

[0049] In one example, the magnetic pinning layer 404 may have a thickness of approximately 2 nm. The magnetic pinning layer 404 may comprise one of several types of pinning layers, such as a simple pinning sensor, an antiparallel pinning sensor, a self-pinning sensor, or an antiferromagnetic pinning sensor. The magnetic pinning layer 404, the magnetic storage layer 410, and the magnetic reference layer 406 may be constructed from several magnetic materials, such as metal alloys with dopants (such as boron dopants, oxygen dopants, or other suitable materials). The metal alloy may be nickel-containing, platinum-containing, Ru-containing, cobalt-containing, tantalum-containing, and palladium-containing materials. Suitable examples of magnetic materials that may constitute the magnetic pinning layer 404 include Ru, Ta, Co, Pt, TaN, and NiFeO. x NiFeB, CoFeO x B, CoFeB, CoFe, NiO x B, CoBO x FeBO x , CoFeNiB, CoPt, CoPd, TaO x etc.

[0050] exist Figure 4A In the depicted embodiments, the magnetic storage layer 410 may be CoFeB, CoFeNiB, Ta, Mo, or W, combinations thereof, or other suitable layers. For example, in Figure 5 In the depicted embodiment, the magnetic storage layer 410 includes a first CoFeB layer 508 and a second CoFeB layer 512 sandwiching an intermediate layer 510. The first CoFeB layer 508 and the second CoFeB layer 512 may have a thickness of about 5 angstroms to about 20 angstroms (e.g., about 10 angstroms), with a B composition ranging from about 10% to about 30% and an Fe composition ranging from about 20% to about 60%. The intermediate layer 510 may include one or more layers of at least one or more of Ta, Mo, or W. The intermediate layer 510 may have a thickness of about 0 angstroms to about 10 angstroms (e.g., about 3 angstroms).

[0051] The magnetic reference layer 406 may be CoFeB or other suitable layers. The magnetic reference layer 406 may have a thickness of about 5 angstroms to about 20 angstroms (e.g., about 10 angstroms). The magnetic reference layer 406 may have a composition of about 10% to about 30% boron (B) and about 20% to about 60% Fe.

[0052] A structural decoupling layer 405 is disposed between the magnetic reference layer 406 and the magnetic pinning layer 404. The structural decoupling layer 405 may include one or more layers of at least one or more of Ta, Mo, or W. The structural decoupling layer 405 may have a thickness of about 0 angstroms to about 10 angstroms (e.g., about 3 angstroms).

[0053] The magnetic nail piercing layer 404 may include one or more layers. Figure 5In the depicted example, the magnetic nailing layer 404 sequentially comprises a Co layer 520, a Co / Pt layer 522, a Ru layer 524, a Co layer 526, a Co / Pt layer 528, a Pt layer 530, a Ta layer 532, a Ru layer 534, a Ta layer 536, and a TaN layer 538. The Co layer 520 may have a thickness of about 0 angstroms to about 10 angstroms (e.g., about 5 angstroms). The Ru layer 524 may have a thickness of about 3 angstroms to about 10 angstroms (e.g., about 4-5 angstroms or about 7-9 angstroms). The Co layer 526 may have a thickness of about 0 angstroms to about 10 angstroms (e.g., about 5 angstroms). The Pt layer 530, Ta layer 532, Ru layer 534, Ta layer 536, and TaN layer 538 may each have a thickness of about 0 angstroms to about 5 angstroms (e.g., about 3 angstroms).

[0054] Co / Pt layer 522 can have [Co] (x1) / Pt (y1) ] m The composition includes a Co layer with a thickness between about 1 angstrom and about 6 angstroms, a Pt layer with a thickness between about 1 angstrom and about 10 angstroms (e.g., about 1-8 angstroms), and a m value between 0 and 5, where m represents the number of times the Co / Pt layer 522 is repeatedly formed in the film stack. For example, when x1 is 5 angstroms, y1 is 3 angstroms, and m is 2, it represents a film stack of Co layer (5 angstroms) / Pt layer (3 angstroms) / Co layer (5 angstroms) / Pt layer (3 angstroms).

[0055] Co / Pt layer 528 can have [Co] (x) / Pt (y) ] n The components, wherein x has a thickness of about 1 angstrom to about 6 angstroms, y has a thickness of about 1 angstrom to about 10 angstroms (e.g., about 1-8 angstroms), and n has a value between 3 and 10.

[0056] A capping layer 412 is then formed on the magnetic storage layer 410 in the film stack 402. In one embodiment, the capping layer 412 may include a magnetic layer. Suitable examples of the capping layer 412 include one or more layers selected from CoFeB, MgO, Ta, and Ru. Figure 5In the depicted example, the cap layer 412 includes a first layer 502 and a second layer 506 sandwiching an intermediate layer 504. The first layer 502 may have a thickness of about 0 nanometers (nm) to about 5 nanometers (e.g., about 2 nm). The first layer 502 may include one or more layers comprising Ta and / or Ru. The second layer 506 may contain MgO and have a thickness of about 0 angstroms to about 15 angstroms (e.g., 7 angstroms). The intermediate layer 504 may include CoFeB. The intermediate layer 504 may have a thickness of about 0 angstroms to about 50 angstroms (e.g., about 10 angstroms). The intermediate layer 504 may have a composition of about 10% to about 30% B and about 20% to about 60% Fe.

[0057] It should be noted that the magnetic nailing layer 404, the optional structural decoupling layer 405, the tunneling barrier layer 408, the magnetic storage layer 410, the magnetic reference layer 406, and the capping layer 412 can be formed by any suitable technique, such as CVD, PVD, ALD, spin coating, spray coating, and any suitable method. An example of a system that can be used to form these layers includes... PRECISION and The deposition systems are all available from Applied Materials, Inc., Santa Clara, California. It is envisioned that other processing systems (including those available from other manufacturers) could be adapted to implement this disclosure.

[0058] At operation 304, a patterning process (e.g., an etching process) is performed to remove the exposed portion 407 of the film stack 402 defined by the etch mask layer (not shown) from the substrate 301 until the underlying substrate 400 is exposed, as shown. Figure 4B As shown. The patterning process for patterning film stack 402 may include several steps or different formulations configured to etch different layers according to different gas mixtures or etchants supplied based on the materials included in each layer.

[0059] During the patterning process, an etching gas mixture or several gas mixtures with different etching substances are sequentially supplied to the substrate surface to remove a portion of the film stack 402 from the substrate 400.

[0060] The endpoint of the patterning process at operation 304 can be controlled by time or other suitable methods. For example, the patterning process can be terminated after approximately 200 seconds to approximately 10 minutes of execution, until the substrate 400 is exposed. Figure 4B As shown. The patterning process can be terminated as needed by confirmation from an endpoint detector (such as an OES detector, or other suitable detector).

[0061] At operation 306, after the patterning process, a sidewall passivation layer 414 is formed on the sidewalls 415 of the patterned film stack 402 (such as the magnetic nailing layer 404, the optional structural decoupling layer 405, the tunneling barrier layer 408, the magnetic storage layer 410, the magnetic reference layer 406, and the cap layer 412).

[0062] In one example, the sidewall passivation layer 414 may be a dielectric layer formed by a deposition process performed after a patterning process at operation 304. For example, the sidewall passivation layer 414 may be formed as needed by CVD deposition, PVD deposition, ALD deposition, or other suitable deposition processes. The sidewall passivation layer 414 may be formed from nitrogen-containing, carbon-containing, or oxygen-containing materials. Suitable examples of materials for forming the sidewall passivation layer 414 include SiN, SiCN, SiO2, SiON, SiC, amorphous carbon, SiOC, alumina (Al2O3), aluminum nitride (AlN), and the like.

[0063] In another example, the sidewall passivation layer 414 may be formed from byproducts generated during the patterning process at operation 304, which accumulate on the sidewalls of the film stack 402 after the patterning process at operation 304. For example, during the patterning process, carbon-containing gas, oxygen-containing gas, or nitrogen-containing gas may be used in the etching gas mixture during the patterning process. The carbon, oxygen, and nitrogen elements from these gases may react with the elements from the film stack 402 to form byproducts, residues, or deposits adhering to the sidewalls 415 of the film stack 402. Therefore, in an example where the sidewall passivation layer 414 is formed by a patterning process from operation 304, the gas supplied in the etching gas mixture at operation 304 may include at least one of carbon-containing gas, oxygen-containing gas, or nitrogen-containing gas.

[0064] After the sidewall passivation layer 414 is formed on the sidewall 415 of the film stack 402, another deposition process can be performed to form an insulating layer 416 on the portion 407 of the substrate 400 that was removed during the patterning process at operation 304, such as... Figure 4C As shown. The insulating layer 416 can be any suitable insulating material in which interconnect structures can be formed later in a series of etching and deposition processes (e.g., back-end processes) to complete the device structure fabrication process. In one example, the insulating layer 416 is a silicon oxide layer or other suitable material.

[0065] At operation 308, after the patterning process at operation 304 is completed and the sidewall passivation layer and insulating layer 416 are formed on the substrate 400, a thermal annealing process can be performed. The thermal annealing process is performed to repair, densify, and enhance the lattice structure of the film stack 402, particularly the lattice structure of the magnetic storage layer 410 and the magnetic reference layer 406 included in the film stack 402. For example, compared to before the thermal / annealing process (e.g., in the absence of a thermal / annealing process), after the thermal / annealing process, the magnetic storage layer 410 and the magnetic reference layer 406 can have a stronger crystalline structure with (111), (220), and (311) planar peaks under XRD analysis, thereby enhancing the crystallinity of the magnetic storage layer 410 and the magnetic reference layer 406 formed therein. During the annealing process, dopants from the magnetic storage layer 410 and the magnetic reference layer 406 are driven laterally away from the magnetic storage layer 410 and the magnetic reference layer 406 (as shown by arrow 420) to the sidewall passivation layer 414, as... Figure 4D As shown. By forming a sidewall passivation layer 414 between the insulating layer 416 and the film stack 402, dopants from the magnetic storage layer 410 and the magnetic reference layer 406 can be effectively retained in a lateral position near the sidewall passivation layer 414, rather than moving vertically toward the capping layer 412, tunneling barrier layer 408, magnetic pinning layer 404, or optional structural decoupling layer 405 formed in the film stack 402. Lateral diffusion (rather than vertical diffusion) of dopants can effectively control dopant drift to the sidewall passivation layer 414, so that the film properties and the crystallinity of the layers in the film stack 402 will not be adversely affected or altered. For example, in embodiments where boron (B) dopant is included in the magnetic storage layer 410 and the magnetic reference layer 406, during the annealing process, the boron dopant can laterally diffuse into the sidewall passivation layer 414, thereby forming a boron compound (such as boron oxide, boron nitride, or boron carbide, depending on the material used to form the sidewall passivation layer 414), which is a relatively stable compound that does not significantly alter the electrical properties of the device. Undesired diffusion of the dopant into the magnetic storage layer 410 and the magnetic reference layer 406 when a magnetic field is applied can lead to inaccurate magnetization or undesirable atomic spin orientations, thereby adversely affecting the overall performance of the MTJ device.

[0066] Therefore, compared with the conventional practice of performing the annealing process immediately after each layer is formed in the film stack or immediately after the film stack 402 is formed on the substrate 400, a more stable magnetization process and better control over the dopant diffusion process can be obtained by utilizing a thermal annealing process performed after the patterning process and / or after the sidewall passivation and / or insulating layer deposition process.

[0067] In one example, the annealing process can be performed after the patterning process at operation 304, either without forming the sidewall passivation layer 414 and the insulating layer 416, or before forming the sidewall passivation layer 414 and the insulating layer 416. In another example, the annealing process can be performed as needed after the patterning process at operation 304 and the sidewall passivation and / or insulating layer deposition process at operation 306.

[0068] The hot annealing process can be carried out in a hot annealing chamber (such as...) Figure 2 The annealing process is performed in the depicted processing chamber 200. Alternatively, the annealing process can be performed in any processing chamber configured to provide sufficient heat energy to the film stack 402 disposed on the substrate 400. In one embodiment, the thermal annealing process can be performed in situ in a processing chamber in which the patterning process at operation 304 or the deposition process at operation 306 has been performed. The thermal annealing process can heat the substrate 400 to a temperature greater than 200 degrees Celsius (such as between about 250 degrees Celsius and about 550 degrees Celsius) to help dopants in the magnetic storage layer 410 and the magnetic reference layer 406 diffuse outward and laterally from the film stack, and enhance the crystallinity of the magnetic storage layer 410 and the magnetic reference layer 406, as well as the other layers in the film stack 402.

[0069] During the annealing process, an annealing gas mixture may be supplied. The gases that may be supplied to the annealing gas mixture may include nitrogen-containing gases (such as NH3, N2, NF3, N2O, NO2, NO, etc.), inert gases (such as Ar, He, Ne, Kr, Xe, etc.), or oxygen-containing gases (such as O2, O3, N2O, H2O, CO2, CO, etc.).

[0070] Alternatively, the annealing process may also be performed after an interconnect manufacturing process (e.g., a back-end manufacturing process). It should be noted that the interconnect manufacturing process (e.g., a back-end manufacturing process) mentioned herein includes a process of patterning insulating layer 416 to form trenches or vias in insulating layer 416 and subsequently forming a conductive layer in the trenches or vias defined in insulating layer 416. The temperatures configured to be performed immediately after the insulating layer 416 deposition process or the sidewall passivation layer 414 deposition process at operation 306 and after the interconnect manufacturing process (e.g., a back-end manufacturing process) may be the same or different. In one example, the temperature for a thermal annealing process configured to be performed after an interconnect manufacturing process (e.g., a back-end manufacturing process) may be slightly lower than the temperature of a thermal annealing process performed immediately after the insulating layer 416 deposition process or the sidewall passivation layer 414 deposition process at operation 306.

[0071] After the thermal annealing process, the magnetic storage layer 410 and the magnetic reference layer 406 can be transformed into a crystalline magnetic storage layer 422 and a crystalline magnetic reference layer 424 with crystal orientations mostly in one plane, such as... Figure 4E As shown. The heat energy provided during the thermal annealing process helps to crystallize the magnetic storage layer 410, the magnetic reference layer 406, and other layers in the film stack 402 from an amorphous state to a crystalline state, thereby effectively enhancing the magnetization of the film layers included in the film stack 402. The heat energy provided during the thermal annealing process at operation 308 helps to grow grains from an amorphous state to larger crystalline grains, thereby enhancing the crystallinity of the magnetic storage layer 410, the magnetic reference layer 406, and other layers in the film stack 402. Due to the desired crystallinity of the magnetic storage layer 410 and the magnetic reference layer 406, the overall electrical properties of the film stack 402 used to fabricate MTJ devices are improved.

[0072] Therefore, processes and apparatus are provided for forming MTJ device structures used in MRAM. The process advantageously provides a method of thermal annealing (e.g., heat treatment) for forming film stacks of MTJ devices. The thermal annealing process, performed after film stack deposition, patterning, sidewall passivation, and insulating layer deposition processes, effectively crystallizes the layers in the film stack in a manner that does not damage or affect the film properties of adjacent layers formed in the film stack (e.g., lateral diffusion rather than vertical diffusion). In this way, the film stack used to form the MTJ structure can have a desired dopant distribution, as well as electrical properties and magnetization.

[0073] Although the foregoing describes embodiments of this disclosure, other and further embodiments of this disclosure may be designed without departing from the basic scope of this disclosure.

Claims

1. A film stack for forming a magnetic tunnel junction structure on a substrate, the film stack comprising: A pinning layer is disposed on the substrate, wherein the pinning layer comprises multiple layers, including a Co layer, a Pt layer, a Ta layer, and a Ru layer; A structural decoupling layer, comprising Mo or W or both Mo and W, wherein the structural decoupling layer is disposed on the pinning layer; A magnetic reference layer disposed on the structure decoupling layer, wherein the magnetic reference layer comprises boron and wherein the magnetic reference layer has a boron composition of about 10% to about 30%. A tunneling barrier layer is disposed on the magnetic reference layer; A magnetic storage layer disposed on the tunneling barrier layer; A cap layer, wherein the cap layer is disposed on the magnetic storage layer; A sidewall passivation layer conformally contacts the top surface of the substrate, wherein the sidewall passivation layer has a vertical portion and a horizontal portion, the vertical portion being continuously coplanar along a vertical axis perpendicular to the main axis of the substrate, and the horizontal portion being in direct contact with the substrate; as well as An insulating layer is formed on the sidewall passivation layer and is in direct contact with the sidewall passivation layer, wherein the insulating layer extends from the top surface of the sidewall passivation layer toward a horizontal portion of the sidewall passivation layer.

2. The membrane stack according to claim 1, characterized in that, The cap layer includes at least a Ta-containing layer or a Ru-containing layer disposed on a Co-containing layer.

3. The membrane stack according to claim 1, characterized in that, The pinning layer includes a total of 10 layers.

4. The membrane stack according to claim 1, characterized in that, The magnetic storage layer includes a CoFeB layer.

5. The membrane stack according to claim 1, characterized in that, The magnetic storage layer includes at least two Co-containing layers sandwiching a layer containing at least one of Ta-containing materials, Mo-containing materials, or W-containing materials.

6. The membrane stack according to claim 5, characterized in that, The Co-containing layer is a CoFeB layer.

7. The membrane stack according to claim 1, characterized in that, The tunneling barrier layer includes an MgO layer.

8. The membrane stack according to claim 1, characterized in that, The decoupling layer of the structure further includes Ta.

9. The membrane stack according to claim 1, characterized in that, The magnetic reference layer has a composition of about 20% to about 60% Fe.

10. The membrane stack according to claim 2, characterized in that, The cap layer includes at least two Ta-containing layers disposed on the Co-containing layer.

11. The membrane stack according to claim 10, characterized in that, One of the at least two Ta-containing layers is the top layer.

12. The membrane stack according to claim 11, characterized in that, The top surface of the top layer is coplanar with the top surface of the sidewall passivation layer.

13. The membrane stack according to claim 11, characterized in that, The top-level selection is a group consisting of Ta, TaN, Ti, TiN, W, and WN.

14. The membrane stack according to claim 1, characterized in that, The sidewall passivation layer comprises materials selected from the group consisting of SiN, SiCN, SiO2, SiON, SiC, amorphous carbon, SiOC, Al2O3, and AlN.

15. The membrane stack according to claim 1, characterized in that, The cap layer includes a magnetic layer.

16. The membrane stack according to claim 15, characterized in that, The magnetic layer is selected from the group consisting of CoFeB, MgO, Ta and Ru.

17. The membrane stack according to claim 1, characterized in that, The decoupling layer of the structure has a thickness between about 0 and about 10 angstroms.

18. The membrane stack according to claim 1, characterized in that, The magnetic storage layer comprises a material selected from the group consisting of CoFeB, CoFeNiB, Ta, Mo, and W.

19. The membrane stack according to claim 5, characterized in that, The at least two Co-containing layers of the magnetic storage layer have a thickness between about 5 and about 20 angstroms.

20. The membrane stack according to claim 5, characterized in that, The at least two Co-containing layers of the magnetic storage layer comprise between about 10% and about 30% boron and between about 20% and about 60% iron.

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