A data storage method, system, storage medium and electronic device

Abstract

The present application relates to the field of GNSS satellite communication, and particularly relates to a data storage method, system, storage medium and electronic device.The method comprises the following steps: step 1, based on the Viterbi algorithm, the soft bit information is calculated to obtain the branch metric of each soft bit information, and the soft bit information is the information data after baseband processing; step 2, based on the branch metric, the surviving path is obtained; step 3, the index relationship between the surviving path and the current storage address corresponding to the surviving path is established; step 4, based on the index relationship, the surviving path is updated to the physical position of the current storage address. The method can effectively solve the problem that a large amount of resources are occupied due to separate storage of the calculation result in the prior art by replacing the position of the storage address, in addition, the calculation result can also be saved without affecting the data of other positions by replacing the physical position, so that the integrity of the data is ensured.

Description

Technical Field

[0001] This invention relates to the field of GNSS satellite communication, and more particularly to a data storage method, system, storage medium, and electronic device. Background Technology

[0002] The Viterbi decoder is a type of decoder used in satellite navigation data modulation with convolutional coding. Its core algorithm involves finding every possible coded path and comparing it with the received sequence, selecting the path with the highest likelihood (minimum distance) as the decoded output. Generally, for a convolutional code of depth N, 2N paths are searched simultaneously. Whenever a new set of symbols arrives, 2x2N branches are generated, and these are then merged back into 2N paths.

[0003] Based on the above process, the traditional Viterbi algorithm requires multiple butterfly operations on the data to obtain the final decoding result. Considering that the input and output addresses of each decoding operation must satisfy the butterfly transformation relationship, the results of each butterfly operation must be stored separately, consuming a large amount of hardware resources. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a data storage method, system, storage medium and electronic device.

[0005] The technical solution of this invention to solve the above-mentioned technical problems is as follows: A data storage method based on the Viterbi algorithm, comprising:

[0006] Step 1: Based on the Viterbi algorithm, calculate the soft bit information to obtain the branch metric for each soft bit information, where the soft bit information is the information data after baseband processing;

[0007] Step 2: Based on the branch metric, obtain the surviving path;

[0008] Step 3: Establish the index relationship between the surviving path and the current storage address corresponding to the surviving path;

[0009] Step 4: Based on the index relationship, update the surviving path to the physical location of the current storage address.

[0010] The beneficial effects of this invention are: establishing an index relationship facilitates tracing; in addition, changing the storage address location effectively solves the problem of excessive resource consumption caused by storing calculation results separately in the prior art; furthermore, changing the physical location can save the calculation results without affecting data in other locations, thus ensuring data integrity.

[0011] Based on the above technical solution, the present invention can be further improved as follows.

[0012] Furthermore, the procedure preceding step 1 includes:

[0013] Set the decoding frame length, which represents the threshold number of times steps 1 to 4 are repeated.

[0014] The advantage of adopting the above-mentioned further scheme is that initializing the decoder can make the decoder adapt to the soft bit information, thus better realizing the path calculation.

[0015] Furthermore, step 4 includes the following:

[0016] Step 501: Before storing any soft bit information, determine whether the number of times S1 to S4 has been repeated is less than the length of the decoded frame, and obtain the determination result;

[0017] Step 502: When the judgment result is yes, repeat step 1 to obtain a new branch metric; superimpose the new branch metric with the surviving path corresponding to the previous soft bit information of any soft bit information to obtain a new surviving path; use the new surviving path as the surviving path in step 2, and continue to execute steps 3 and 4.

[0018] The advantage of adopting the above-mentioned further scheme is that the number of decoding frames determines the number of calculations. Therefore, updating and saving the new surviving path during each calculation can reduce the space occupied.

[0019] Furthermore, step 502 also includes:

[0020] The calculation stops when the judgment result is negative.

[0021] Another technical solution of the present invention to solve the above-mentioned technical problems is as follows: A data storage system based on the Viterbi algorithm, comprising:

[0022] The algorithm module calculates the soft bit information according to the Viterbi algorithm to obtain the branch metric for each soft bit information, wherein the soft bit information is the information data after baseband processing;

[0023] The calculation module obtains the surviving path based on the branch metric;

[0024] A module is established to create an index relationship between the surviving path and the current storage address corresponding to the surviving path.

[0025] The storage module updates the surviving path to the physical location of the current storage address based on the index relationship.

[0026] The beneficial effects of this invention are: establishing an index relationship facilitates tracing; in addition, changing the storage address location effectively solves the problem of excessive resource consumption caused by storing calculation results separately in the prior art; furthermore, changing the physical location can save the calculation results without affecting data in other locations, thus ensuring data integrity.

[0027] Furthermore, it also includes:

[0028] The setting module is used to set the decoding frame length, which represents the threshold number of times steps 1 to 4 are repeated.

[0029] The advantage of adopting the above-mentioned further scheme is that initializing the decoder can make the decoder adapt to the soft bit information, thus better realizing the path calculation.

[0030] Furthermore, it also includes:

[0031] The judgment module is used to determine whether the number of times S1 to S4 is repeated is less than the length of the decoded frame before storing any soft bit information, and to obtain the judgment result.

[0032] The update module is used to repeat step 1 to obtain a new branch metric when the judgment result is yes; to superimpose the new branch metric with the surviving path corresponding to the previous soft bit information of any soft bit information to obtain a new surviving path; to use the new surviving path as the surviving path in step 2; and to continue to execute steps 3 and 4.

[0033] The advantage of adopting the above-mentioned further scheme is that the number of decoding frames determines the number of calculations. Therefore, updating and saving the new surviving path during each calculation can reduce the space occupied.

[0034] Furthermore, the update module is also used for:

[0035] The calculation stops when the judgment result is negative.

[0036] Another technical solution of the present invention to solve the above-mentioned technical problems is as follows: a storage medium storing instructions, wherein when a computer reads the instructions, the computer executes a data storage method based on the Viterbi algorithm as described in any of the above claims.

[0037] The beneficial effects of this invention are: establishing an index relationship facilitates tracing; in addition, changing the storage address location effectively solves the problem of excessive resource consumption caused by storing calculation results separately in the prior art; furthermore, changing the physical location can save the calculation results without affecting data in other locations, thus ensuring data integrity.

[0038] Another technical solution of the present invention to solve the above-mentioned technical problems is as follows: an electronic device, including a memory, a processor, and a program stored in the memory and running on the processor, wherein when the processor executes the program, it implements a data storage method based on the Viterbi algorithm as described in any of the above claims.

[0039] The beneficial effects of this invention are: establishing an index relationship facilitates tracing; in addition, changing the storage address location effectively solves the problem of excessive resource consumption caused by storing calculation results separately in the prior art; furthermore, changing the physical location can save the calculation results without affecting data in other locations, thus ensuring data integrity. Attached Figure Description

[0040] Figure 1 This is a flowchart illustrating an embodiment of a data storage method based on the Viterbi algorithm according to the present invention.

[0041] Figure 2 This is a structural framework diagram of an embodiment of a data storage system based on the Viterbi algorithm according to the present invention;

[0042] Figure 3 This is a schematic diagram of the index relationship provided for an embodiment of a data storage method based on the Viterbi algorithm of the present invention. Detailed Implementation

[0043] The principles and features of the present invention are described below. The examples given are only for explaining the present invention and are not intended to limit the scope of the present invention.

[0044] like Figure 1 As shown, a data storage method based on the Viterbi algorithm includes:

[0045] Step 1: Based on the Viterbi algorithm, calculate the soft bit information to obtain the branch metric for each soft bit information, where the soft bit information is the information data after baseband processing;

[0046] Step 2: Based on the branch metric, obtain the surviving path;

[0047] Step 3: Establish the index relationship between the surviving path and the current storage address corresponding to the surviving path;

[0048] Step 4: Based on the index relationship, update the surviving path to the physical location of the current storage address.

[0049] In some possible implementations, establishing an index relationship facilitates tracing. In addition, changing the storage address can effectively solve the problem of excessive resource consumption caused by storing calculation results separately in the prior art. Furthermore, changing the physical location can also save the calculation results without affecting data in other locations, thus ensuring data integrity.

[0050] It should be noted that the Viterbi algorithm is an existing algorithm, and the baseband processing is also an existing method. The branch metric is calculated from two results for each soft bit information; the surviving path is the path corresponding to the better result in the branch metric. For the index relationship and the method of storing data based on the index relationship, please refer to [reference needed]. Figure 3 And Example 1 to aid understanding.

[0051] In Example 1, after the Viterbi algorithm is used to calculate S0 in the left storage module, two paths are obtained, pointing to S0 and S1 in the right storage module. Similarly, after the Viterbi algorithm is used to calculate S4 in the left storage module, two paths are obtained, also pointing to S0 and S1 in the right storage module. At this point, S0 in the right storage module corresponds to two soft bits, namely S0 and S4 in the left storage module. Between S0 and S4 in the left storage module, the path with the smaller value (S0) is stored in the right storage module. Therefore, the path data (surviving path) of S0 in the right storage module is located in the physical position of S0 in the left storage module (i.e., the first square from top to bottom). Furthermore, it should be emphasized that in this example, the left and right sides represent the state (positional relationship) of the same storage medium before and after calculation. That is, during the storage process, the content to be stored, i.e., the path data of S0 in the right storage module, directly overwrites the original location of S0, thus achieving the purpose of calculation and storage updates without the need for two storage media. Similarly, S1 in the right storage module corresponds to two soft bit information, namely S0 and S4 in the left storage module. Between S0 and S4 in the left storage module, the one with the smaller path (S4) is stored in the right storage module at position S4. Therefore, the path data (surviving path) of S1 in the right storage module is located in the physical position of S4 in the left storage module (i.e., the fifth block from the top). As can be understood from Example 1, the index relationship is the index of S0 in the left storage module relative to the index of S0 in the right storage module, and the index of S4 in the left storage module relative to the index of S1 in the right storage module.

[0052] Figure 3 The convolutional coding constraint length is 3, and S0-S7 represent the path metrics corresponding to register states 000-111. The Viterbi decoding algorithm searches 2N paths simultaneously during each search of surviving paths. Whenever a new set of symbols arrives, 2x2N branches are generated, and 2N paths are recombined. Therefore, in this example, for each update, S0 / S1 is calculated from S0 / S4 at step i. S2 / S3 is calculated from S1 / S5, and so on.

[0053] For traditional algorithms, two cache spaces of the same size are usually used as ping-pong buffers to complete the above operations. That is, the result of the i-th calculation is cached in buffer A, and the result is updated to buffer B in the (i+1)-th update.

[0054] The improved data storage method proposed in this patent performs a secondary mapping on the data index, changing the data storage order, thus eliminating the need for ping-pong buffers to complete the above operations.

[0055] Specifically, a circular counter is maintained during each Viterbi decoding process. During each update, the input data is read from the mapped address, and the result of the butterfly operation is written back to the original address. In this example, after three operations, the storage order of the calculation results will return to the normal order. It can be deduced that the mapped address is the result of a circular shift of the original address, and the number of shift bits is the size of the counter. The resulting formula is addr1 = {addr, addr} >> cnt. In the above formula, addr1 is the actual address, and addr is the virtual address. This formula can be understood as the actual address being the result of a circular right shift of the virtual address.

[0056] It is important to note that convolutional codes are a type of error control coding, and specifically a type of error correction coding with memory. They generally take the form (n, k, L) with a code rate of R (R = k / n), where n is the output codeword, k is the input bit information, and L is the constraint length, also known as the memory length. The initialization process can be handled according to the following signal characteristics:

[0057] The GPS / QZSS L5I signal CNAV data bit rate is 50bps, using rate-1 / 2 convolutional coding and forward error correction (FEC) coding. Therefore, the symbol rate is 100sps. The convolutional coding will have a constraint length of 7, corresponding to the coding polynomials G1 (171 OCTAL) and G2 (133 OCTAL), broadcasting 300-bit navigation information in 6-second frames.

[0058] The GPS L2CM signal CNAV data bit rate is 25bps, using rate-1 / 2 convolutional coding and forward error correction (FEC) coding. Therefore, the symbol rate is 50sps. The convolutional coding will have a constraint length of 7, corresponding to the coding polynomials G1 (171 OCTAL) and G2 (133 OCTAL), and 300-bit navigation information will be broadcast in 12-second frames.

[0059] The GLONASS L1OCd signal data bit rate is 125bps, using rate 1 / 2 convolutional coding, symbol rate 250sps, convolutional coding with a constraint length of 7, corresponding to coding polynomials G1 (171OCTAL) and G2 (133OCTAL), and 250-bit navigation information is broadcast in 2s frames.

[0060] The GLONASS L3OCd signal data bit rate is 100bps, using rate 1 / 2 convolutional coding, symbol rate 200sps, convolutional coding with a constraint length of 7, corresponding to coding polynomials G1 (171OCTAL) and G2 (133OCTAL), and 300-bit navigation information is broadcast in 3s frames.

[0061] The Galileo E5aI signal data bit rate is 25bps, using rate 1 / 2 convolutional coding, symbol rate 50sps, convolutional coding with a constraint length of 7, corresponding to coding polynomials G1 (171 OCTAL) and G2 (133 OCTAL), and 250-bit navigation information is broadcast in 10-second frames.

[0062] The Galileo E1B / E5bI signal data bit rate is 125bps, using rate 1 / 2 convolutional coding, symbol rate 250sps, convolutional coding with a constraint length of 7, corresponding to coding polynomials G1 (171 OCTAL) and G2 (133 OCTAL), broadcasting 250-bit navigation information in 2s frames.

[0063] The QZSS L1S / L5S signal data bit rate is 250bps, using rate 1 / 2 convolutional coding, symbol rate 500sps, convolutional coding with a constraint length of 7, corresponding to coding polynomials G1 (171 OCTAL) and G2 (133 OCTAL), broadcasting 250-bit navigation information per frame per second.

[0064] The IRNSS L5S signal data bit rate is 25bps, using rate 1 / 2 convolutional coding, symbol rate 25sps, convolutional coding with a constraint length of 7, corresponding to coding polynomials G1 (171 OCTAL) and G2 (133 OCTAL), and 300-bit navigation information is broadcast in 12s frames.

[0065] The L-band signal data bit rate is 4876bps, using rate 1 / 2 convolutional coding, with a symbol rate of 9752sps. The convolutional coding will have a constraint length of 7, corresponding to the coding polynomials G1 (171 OCTAL) and G2 (133 OCTAL). One frame of 8192-bit navigation information is broadcast every 0.84s.

[0066] The Viterbi decoder is a type of decoder used in satellite navigation data modulation with convolutional coding. Its core algorithm involves finding every possible coded path and comparing it with the received sequence, selecting the path with the highest likelihood (minimum distance) as the decoded output. Generally, for a convolutional code of depth N, 2N paths are searched simultaneously. Whenever a new set of symbols arrives, 2x2N branches are generated, and these are then merged back into 2N paths.

[0067] Preferably, in any of the above embodiments, step 1 is further included before:

[0068] Set the decoding frame length, which represents the threshold number of times steps 1 to 4 are repeated; and initialize the decoder, which includes: state settings, convolutional coding polynomial, and decoding frame length.

[0069] It should be noted that the initialization settings are based on which satellite the soft bit data belongs to.

[0070] In some possible implementations, initializing the decoder can adapt it to soft bit information, thereby improving path calculation.

[0071] Preferably, in any of the above embodiments, step 4 is followed by:

[0072] Step 501: Before storing any soft bit information, determine whether the number of times S1 to S4 has been repeated is less than the length of the decoded frame, and obtain the determination result;

[0073] Step 502: When the judgment result is yes, repeat step 1 to obtain a new branch metric; superimpose the new branch metric with the surviving path corresponding to the previous soft bit information of any soft bit information to obtain a new surviving path; use the new surviving path as the surviving path in step 2, and continue to execute steps 3 and 4.

[0074] It should be noted that the complete process of calculating based on the decoding length can be understood by referring to Example 2.

[0075] In Example 2, the CPU reads soft bit information from memory and stores it inside the Viterbi module. The decoder is initialized, including initialization state, convolutional coding polynomial, and decoding frame length. Based on the input encoded soft bit information, the branch metric is calculated. If it's the first calculation, the branch metric is directly evaluated to determine the surviving path. If it's not the first calculation, the calculated branch metric is added to the path metric. The path metric here can be understood as the latest path metric. A new surviving path is searched in the new path metric, and the path is stored at the corresponding position according to the index relationship explained in Example 1. This process has been explained in Example 1 and will not be repeated here. Then, the decoding length is determined. If the decoding frame length is reached, the CPU reads the Viterbi decoding result; otherwise, the branch metric calculation continues.

[0076] In some possible implementations, the number of decoding frames determines the number of calculations. Therefore, updating and saving the new surviving path during each calculation can reduce the space required.

[0077] Preferably, in any of the above embodiments, step 502 further includes:

[0078] The calculation stops when the judgment result is negative.

[0079] like Figure 2 As shown, a data storage system based on the Viterbi algorithm includes:

[0080] Algorithm module 100 is used to calculate the soft bit information based on the Viterbi algorithm to obtain the branch metric of each soft bit information, wherein the soft bit information is information data after baseband processing;

[0081] Calculation module 200 is used to obtain the surviving path based on the branch metric;

[0082] The module 300 is used to establish an index relationship between the surviving path and the current storage address corresponding to the surviving path;

[0083] Storage module 400 is used to update the surviving path to the physical location of the current storage address based on the index relationship.

[0084] In some possible implementations, establishing an index relationship facilitates tracing. In addition, changing the storage address can effectively solve the problem of excessive resource consumption caused by storing calculation results separately in the prior art. Furthermore, changing the physical location can also save the calculation results without affecting data in other locations, thus ensuring data integrity.

[0085] Preferably, in any of the above embodiments, it further includes:

[0086] The setting module is used to set the decoding frame length, which represents the threshold number of times steps 1 to 4 are repeated. It is also used to initialize the decoder, and the initialization settings include: state settings, convolutional coding polynomial, and decoding frame length.

[0087] In some possible implementations, initializing the decoder can adapt it to soft bit information, thereby improving path calculation.

[0088] Preferably, in any of the above embodiments, it further includes:

[0089] The judgment module is used to determine whether the number of times S1 to S4 is repeated is less than the length of the decoded frame before storing any soft bit information, and to obtain the judgment result.

[0090] The update module is used to repeat step 1 to obtain a new branch metric when the judgment result is yes; to superimpose the new branch metric with the surviving path corresponding to the previous soft bit information of any soft bit information to obtain a new surviving path; to use the new surviving path as the surviving path in step 2; and to continue to execute steps 3 and 4.

[0091] In some possible implementations, the number of decoding frames determines the number of calculations. Therefore, updating and saving the new surviving path during each calculation can reduce the space required.

[0092] Preferably, in any of the above embodiments, the updating module is further configured to:

[0093] The calculation stops when the judgment result is negative.

[0094] Another technical solution of the present invention to solve the above-mentioned technical problems is as follows: a storage medium storing instructions, wherein when a computer reads the instructions, the computer executes a data storage method based on the Viterbi algorithm as described in any of the above claims.

[0095] In some possible implementations, establishing an index relationship facilitates tracing. In addition, changing the storage address can effectively solve the problem of excessive resource consumption caused by storing calculation results separately in the prior art. Furthermore, changing the physical location can also save the calculation results without affecting data in other locations, thus ensuring data integrity.

[0096] Another technical solution of the present invention to solve the above-mentioned technical problems is as follows: an electronic device, including a memory, a processor, and a program stored in the memory and running on the processor, wherein when the processor executes the program, it implements a data storage method based on the Viterbi algorithm as described in any of the above claims.

[0097] In some possible implementations, establishing an index relationship facilitates tracing. In addition, changing the storage address can effectively solve the problem of excessive resource consumption caused by storing calculation results separately in the prior art. Furthermore, changing the physical location can also save the calculation results without affecting data in other locations, thus ensuring data integrity.

[0098] Readers should understand that in the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0099] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the method embodiments described above are merely illustrative. For instance, the division of steps is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple steps may be combined or integrated into another step, or some features may be ignored or not executed.

[0100] If the above methods are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0101] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A data storage method based on the Viterbi algorithm, characterized in that, The method comprises the following steps: Step 1, based on the Viterbi algorithm, the soft bit information is calculated to obtain the branch metric of the soft bit information, and the soft bit information is the information data after baseband processing; Step 2, based on the branch metric, the surviving path is obtained; Step 3, the index relationship between the surviving path and the current storage address corresponding to the surviving path is established; Step 4, based on the index relationship, the surviving path is updated to the physical location of the current storage address; The data storage mode comprises: In each Viterbi decoding process, a loop counter is maintained; in each update, the input data is read out through the mapped address, and the calculation result of the butterfly operation is written back to the original address; after three operations, the storage order of the calculation result returns to the normal order; the mapped address is the result of the circular shift of the original address, and the shift bit number is the size of the counter, and the obtained formula is addr1 = {addr, addr} >> cnt, addr1 is the actual address, and addr is the virtual address; Before the step 1, the method further comprises the following steps: Setting a decoding frame length, the decoding frame length represents a number threshold of repeatedly executing the steps 1 to 4; After the step 4, the method further comprises the following steps: Step 501, before storing any soft bit information, it is judged whether the number of repeatedly executing the steps 1 to 4 is less than the decoding frame length, and a judgment result is obtained; Step 502, when the judgment result is yes, a new branch metric is obtained by repeating the step 1; the new branch metric and the surviving path corresponding to the previous soft bit information of the any soft bit information are superimposed to obtain a new surviving path, and the steps 3 and 4 are continuously executed.

2. The data storage method based on Viterbi algorithm according to claim 1, characterized in that, The step 502 further comprises the following steps: When the judgment result is no, the calculation is stopped.

3. A data storage system based on the Viterbi algorithm, employing a data storage method based on the Viterbi algorithm as claimed in claim 1, characterized in that, The method comprises the following steps: An algorithm module is used to calculate the soft bit information according to the Viterbi algorithm to obtain the branch metric of the soft bit information, and the soft bit information is the information data after baseband processing; A calculation module is used to obtain the surviving path according to the branch metric; An establishment module is used to establish the index relationship between the surviving path and the current storage address corresponding to the surviving path; A storage module is used to update the surviving path to the physical location of the current storage address according to the index relationship.

4. A data storage system based on Viterbi algorithm as claimed in claim 3, wherein, The update module is further used for: When the judgment result is no, the calculation is stopped.

5. A storage medium, characterized by The storage medium stores instructions, and when the computer reads the instructions, the computer executes the data storage method based on the Viterbi algorithm as claimed in claim 1 or 2.

6. An electronic device, comprising: The storage medium and the processor executing the instructions in the storage medium are comprised.

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