A C++ vector programming method based on domestic heterogeneous platforms

Abstract

The present invention discloses a C++ vector programming method based on a domestic heterogeneous platform, and the programming method comprises the following steps: S1, obtaining support for vector data types and vector programming interfaces by introducing header file simd.h; S2, the compiler performs front-end processing on the C++ vector program to generate intermediate representation code; S3, the compiler mid-end optimizes the intermediate representation code generated in S25 to generate a new intermediate representation; S4, the compiler mid-end generates instructions for the optimized intermediate code in step S3 to form vector assembly code; S5, generates machine code; S6, the linker mixes and links all the master core and slave core machine codes generated above into an executable code; S7, runs the executable code on a heterogeneous multi-core platform. The present invention provides a new programming method for the application development of the domestic heterogeneous multi-core architecture, which is conducive to maximizing the advantages of the architecture and improving application performance.

Description

Technical Field

[0001] The invention relates to a C++ vector programming method based on a domestic heterogeneous platform, belonging to the technical field of high performance computing. Background Art

[0002] Domestic heterogeneous platforms are suitable for high-performance computing and are increasingly suitable for artificial intelligence. There are a lot of C++ vector programming needs in these two fields to improve the efficiency of parallel programming and speed up program execution. The general C++ program parallel methods are different, and only some projects use vector methods, but their vector width and vector interface are not suitable for domestic heterogeneous platforms.

[0003] At present, domestic heterogeneous platforms only support vector programming interfaces of C language and FORTRAN language. In addition, the existing domestic heterogeneous platform vector programming interface based on C language has an interface name that includes a vector width representation. When the main core program is rewritten into a slave core program, or when the domestic heterogeneous platform is updated, a large amount of program code needs to be modified.

[0004] The heterogeneous many-core platform includes two cores, the master core and the slave core. The vector width and vector instructions of each core are inconsistent according to the different functional divisions of the cores. Due to the improvement of chip design level and the reduction of chip cost, the vector instructions and vector width of each generation of domestic heterogeneous platforms are inconsistent; the general C++ vector language has a vector width that is inconsistent with domestic heterogeneous platforms. The vector interface cannot be directly applied to domestic heterogeneous platforms, and the efficient vector instructions of domestic heterogeneous platforms cannot be used to achieve high-performance development of programs. Therefore, in the process of C++ program writing or transplanting of domestic heterogeneous platforms, it is necessary to distinguish and remember a large number of interfaces, which is difficult. Summary of the invention

[0005] The purpose of the present invention is to provide a C++ vector programming method based on a domestic heterogeneous platform to solve the problem of inconsistent vector interfaces of different core codes of the same generation of domestic heterogeneous platforms and inconsistent vector interfaces of different generations of domestic heterogeneous platforms, and to accelerate the performance of C++ programs on domestic heterogeneous platforms.

[0006] To achieve the above object, the technical solution adopted by the present invention is: to provide a C++ vector programming method based on a domestic heterogeneous platform, based on the following configuration:

[0007] Adding a C++ vector header file to construct a source program based on a C++ program, wherein the C++ vector header file is used to define a vector data type and a vector programming interface;

[0008] The C++ vector header file is simd.h, which distinguishes vector data types and vector programming interfaces of different architectures through macro definitions, and the macro definitions are automatically generated by the compiler according to the architecture options;

[0009] In the C++ vector header file simd-Nh, N is determined by the supported architecture code. Each simd-Nh file contains a unified vector programming interface. The vector programming interface calls the compiler built-in function according to different vector widths. The compiler translates the built-in function into the vector assembly code of the domestic heterogeneous platform through code downgrade.

[0010] For different vector data types, vector programming interfaces with the same name are provided, and the vector programming interfaces are processed according to the vector data types;

[0011] The underlying implementation of the vector programming interface includes an op syntax mode and a built-in function mode, wherein the op syntax mode uses mathematical symbol operators to represent the operation type, and the built-in function mode represents the operation type by calling a compiler built-in function;

[0012] The programming method comprises the following steps:

[0013] S1. Obtain support for vector data types and vector programming interfaces by introducing the header file simd.h;

[0014] S2. The compiler performs front-end processing on the C++ vector program, including:

[0015] S21, the compiler driver opens the corresponding architecture control macro definition according to the architecture option in the compilation command to take effect the code of the corresponding architecture in simd.h;

[0016] S22, the compiler front end performs a renaming operation on the vector programming interface, encodes the interface symbol, parameter and interface type of the vector programming interface, and forms a new symbol;

[0017] S23, the compiler front end determines whether it is a slave core code, and if so, performs the name change operation again, adding the slave_ prefix to the new symbol formed in S22;

[0018] S24, the compiler front end identifies the implementation of the vector programming interface, distinguishing between the built-in function mode and the OP syntax mode;

[0019] S25, the compiler front end generates an abstract syntax tree through lexical, grammatical, and semantic recognition processing, generates an intermediate representation code based on the abstract syntax tree, generates a built-in function interface intermediate representation from the built-in function pattern identified in S24, and generates an operator intermediate representation from the OP syntax pattern;

[0020] S3, the compiler mid-end optimizes the intermediate representation code generated in S25 to generate a new intermediate representation;

[0021] S4, the compiler middle end generates instructions for the intermediate code optimized in step S3, generates corresponding vector assembly code by pattern matching for the operator intermediate representation generated in S25 or S3, and distinguishes different built-in functions through the built-in function degradation module to perform corresponding instruction degradation to form vector assembly code;

[0022] S5, the assembler assembles the vector assembly code to generate machine code;

[0023] S6, the linker mixes and links all the master core and slave core machine codes generated above into an executable code;

[0024] S7. Run the executable code on a heterogeneous many-core platform.

[0025] Due to the application of the above technical solution, the present invention has the following advantages compared with the prior art:

[0026] The present invention provides a C++ vector programming method based on a domestic heterogeneous platform, which realizes the combination of software and hardware through a compiler and a C++ header file, realizes C++ vector programming on a domestic heterogeneous platform, fills the gap in the ecological chain, and provides a new programming method for the application development of a domestic heterogeneous many-core architecture, which is conducive to maximizing the advantages of the architecture and improving application performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Attached Figure 1 A schematic diagram of a C++ vector programming method based on a domestically produced heterogeneous platform according to the present invention;

[0028] Attached Figure 2 The figure is a schematic diagram of a C++ vector programming method based on a domestic heterogeneous platform according to the present invention. DETAILED DESCRIPTION

[0029] Embodiment: The present invention provides a C++ vector programming method based on a domestic heterogeneous platform, based on the following configuration:

[0030] Adding a C++ vector header file to construct a source program based on a C++ program, wherein the C++ vector header file is used to define a vector data type and a vector programming interface;

[0031] The C++ vector header file is simd.h. The C++ vector header file distinguishes vector data types and vector programming interfaces of different architectures through macro definitions. The macro definitions are automatically generated by the compiler according to the architecture options, thereby achieving the unification of vector programming methods of different architectures.

[0032] In the C++ vector header file simd-Nh, N is determined by the supported architecture code. Each simd-Nh file contains a unified vector programming interface, such as Figure 1 In the vector data processing and code downgrading, the vector programming interface calls the compiler built-in functions according to different vector widths. The compiler translates the built-in functions into vector assembly codes for domestic heterogeneous platforms through code downgrading.

[0033] For different vector data types, vector programming interfaces with the same name are provided, and the vector programming interfaces are processed according to the vector data types;

[0034] The underlying implementation of the vector programming interface includes an op syntax mode and a built-in function mode, wherein the op syntax mode uses mathematical symbol operators to represent the operation type, and the built-in function mode represents the operation type by calling a compiler built-in function;

[0035] The programming method comprises the following steps:

[0036] S1, such as Figure 1 As shown in the figure, the C++ vector programming of the domestic heterogeneous platform consists of C++ program and C++ vector header file. The user programming obtains the support of vector data type and vector programming interface by introducing the header file simd.h.

[0037] S2. The compiler performs front-end processing on the C++ vector program, including:

[0038] S21, the compiler driver opens the corresponding architecture control macro definition according to the architecture option in the compilation command to take effect the code of the corresponding architecture in simd.h;

[0039] like Figure 2 As shown, the header file distinguishes the vector data types and vector programming interfaces of different architectures through architecture control macro definitions, thereby achieving the unification of vector programming methods of different architectures;

[0040] In simd-Nh, N is determined by the supported architecture code. Each simd-Nh file contains a unified vector programming interface.

[0041] S22, the compiler front end performs a renaming operation on the vector programming interface, encodes the interface symbol, parameter and interface type of the vector programming interface, and forms a new symbol;

[0042] S23, the compiler front end determines whether it is a slave core code, and if so, performs the name change operation again, adding the slave_ prefix to the new symbol formed in S22;

[0043] S24, the compiler front end identifies the implementation of the vector programming interface, such as Figure 2As shown in the figure, the difference is between built-in function mode and OP syntax mode;

[0044] S25, the compiler front end generates an abstract syntax tree through lexical, grammatical, and semantic recognition processing, generates an intermediate representation code based on the abstract syntax tree, generates a built-in function interface intermediate representation from the built-in function pattern identified in S24, and generates an operator intermediate representation from the OP syntax pattern;

[0045] S3, the compiler mid-end optimizes the intermediate representation code generated in S25 to generate a new intermediate representation;

[0046] S4, the compiler middle end generates instructions for the intermediate code optimized in step S3, generates corresponding vector assembly code by pattern matching for the operator intermediate representation generated in S25 or S3, and distinguishes different built-in functions through the built-in function degradation module to perform corresponding instruction degradation to form vector assembly code;

[0047] S5, the assembler assembles the vector assembly code to generate machine code;

[0048] S6, the linker mixes and links all the master core and slave core machine codes generated above into an executable code;

[0049] S7. Run the executable code on a heterogeneous many-core platform.

[0050] The above embodiment is further explained as follows:

[0051] The present invention adopts a language extension method to expand the C++ language and programming model through a compiler, retains the language features of the C++ language itself to the greatest extent, adds vector data types consistent with the hardware vector register width according to the hardware vector design of the domestic heterogeneous platform, and makes the programming language correspond to the chip vector width and vector interface design, and provides a set of reloadable and easy-to-port vector programming interfaces in the form of header files. C++ language vector programming can be used on domestic heterogeneous multi-core chips, which reduces the difficulty of program development and porting, and ensures that the vector features of the domestic heterogeneous platform are fully used;

[0052] It fills the gap of C++ vector programming in the domestic heterogeneous platform ecosystem, improves the parallel efficiency of C++ programming on the domestic platform, speeds up the running speed, reduces the difficulty of program porting and rewriting, improves compatibility, gives full play to the hardware advantages of the domestic heterogeneous platform, speeds up the running speed of the program, and is of great significance in the porting and performance improvement of real high-performance and artificial intelligence applications.

[0053] The programming model of domestic heterogeneous platforms can make the vector data type of C++ programs consistent with the hardware vector register width, and the vector programming interface of C++ programs can generate assembly code for domestic heterogeneous platforms;

[0054] The C++ reloadable and portable vector programming interface for domestic heterogeneous platforms uses the same vector programming interface for the master core and slave core in the same chip, the master core and master core in chips of different generations, and the slave core and slave core in chips of different generations in domestic heterogeneous platforms, shielding the differences in vector data types and vector assembly codes to achieve reloadability and portability.

[0055] The specific process is as follows:

[0056] 1. If Figure 1 As shown, the C++ vector programming of domestic heterogeneous platforms consists of C++ programs and C++ vector header files. User programming obtains support for vector data types and vector programming interfaces by introducing header files.

[0057] 2. If Figure 2 As shown in the figure, the C++ vector header file is simd.h. This header file distinguishes the vector data types and vector programming interfaces of different architectures through macro definitions. The macro definitions are automatically generated by the compiler according to the architecture options, thereby achieving the uniformity of vector programming methods for different architectures. In simd-Nh, N is determined by the supported architecture code. Each simd-Nh file contains a unified vector programming interface, such as Figure 1 In vector data processing and code downgrade, the vector programming interface will call the compiler built-in functions according to different vector widths. The compiler will translate the built-in functions into assembly codes for domestic heterogeneous platforms through code downgrade.

[0058] 3. If Figure 1 As shown, the data type definition of the vector is implemented in the header file and processed by the compiler. The compiler can support vector data type extensions of all widths. The vector data types of different architectures are controlled by the method in step 2.

[0059] 4. If Figure 2 As shown, the vector programming interface definition is implemented in the header file and processed by the compiler. The compiler can support vector interface processing of all architectures. The vector programming interfaces of different architectures are controlled by the method in step 2.

[0060] 5. For different vector data types, provide vector programming interfaces with the same name, and process the vector programming interfaces according to the vector data type.

[0061] 6. The vector operation interface is divided into two modes. The first mode is the op mode, which uses mathematical symbols to represent the operation type, such as "+" for vector addition; the second mode is the built-in function mode, which is the method of calling functions, such as "simd_add" for vector addition.

[0062] 7. If Figure 2 As shown, some built-in function modes actually call the op operation to extend the processing.

[0063] 8. If Figure 1 As shown, after processing the vector data type and vector programming interface, code degradation is performed to generate an architecture-independent intermediate representation.

[0064] 9. If Figure 1 As shown, the intermediate representation is processed by the compiler backend and finally generates the machine code corresponding to the vector instructions that can be recognized by the domestic heterogeneous platform.

[0065] From the above steps, it can be found that steps 1-2 shield the vector differences of the architecture through the header file and the macro definition controlled by the compiler, which is conducive to the porting of master-slave core codes in different generations of domestic heterogeneous platforms and domestic heterogeneous platforms. Steps 3-5 implement the same interface name for the same vector operation of different data types through function interface overloading, shielding the interference of data types on the vector programming interface. Steps 6-7 reduce compiler code modifications and facilitate expansion by reusing the op mode processing flow. Steps 8-9 shield the differences in language and architecture through a layer of language-independent and architecture-independent intermediate representation code, so that the compiler backend can be reused to the greatest extent.

[0066] When the above-mentioned C++ vector programming method based on a domestic heterogeneous platform is adopted, the combination of software and hardware is realized through the compiler and C++ header file, and C++ vector programming is realized on the domestic heterogeneous platform, filling the gap in the ecological chain and providing a new programming method for the application development of the domestic heterogeneous many-core architecture, which is conducive to maximizing the architectural advantages and improving application performance.

[0067] In order to facilitate a better understanding of the present invention, the terms used in this article are briefly explained below:

[0068] Heterogeneous many-core chip: a high-performance heterogeneous central processing unit that integrates a small number of general-purpose main cores that perform management, communication and computing functions and a large number of streamlined slave cores that perform computing functions on a complete chip; the general-purpose main core runs a general-purpose operating system, mainly performs the management and control functions of the entire chip, and also performs certain computing functions and the communication function between the chip and the outside world; the slave core plays the function of accelerating computing, and the main core and slave core have different architectures and use different instruction sets.

[0069] Domestic heterogeneous platform: a computing platform built based on domestic heterogeneous many-core chips.

[0070] Scalar: In the computer field, a scalar is used to represent a single data unit, such as a floating-point number, an integer, etc.

[0071] Vector: In the computer field, vector is used to represent data composed of several scalars.

[0072] Vector width: refers to the number of data bits that a vector can represent.

[0073] The above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with the technology to understand the content of the present invention and implement it accordingly, and they cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. A C++ vector programming method based on domestic heterogeneous platforms, It is characterized in that Based on the following configuration: Adding a C++ vector header file to construct a source program based on a C++ program, wherein the C++ vector header file is used to define a vector data type and a vector programming interface; The C++ vector header file is simd.h, which distinguishes vector data types and vector programming interfaces of different architectures through macro definitions, and the macro definitions are automatically generated by the compiler according to the architecture options; In the C++ vector header file simd-Nh, N is determined by the supported architecture code. Each simd-Nh file contains a unified vector programming interface. The vector programming interface calls the compiler built-in function according to different vector widths. The compiler translates the built-in function into the vector assembly code of the domestic heterogeneous platform through code downgrade. For different vector data types, vector programming interfaces with the same name are provided, and the vector programming interfaces are processed according to the vector data types; The underlying implementation of the vector programming interface includes an op syntax mode and a built-in function mode, wherein the op syntax mode uses mathematical symbol operators to represent the operation type, and the built-in function mode represents the operation type by calling a compiler built-in function; The programming method comprises the following steps: S1. Obtain support for vector data types and vector programming interfaces by introducing the header file simd.h; S2. The compiler performs front-end processing on the C++ vector program, including: S21, the compiler driver opens the corresponding architecture control macro definition according to the architecture option in the compilation command to take effect the code of the corresponding architecture in simd.h; S22, the compiler front end performs a renaming operation on the vector programming interface, encodes the interface symbol, parameter and interface type of the vector programming interface, and forms a new symbol; S23, the compiler front end determines whether it is a slave core code, and if so, performs the name change operation again, adding the slave_ prefix to the new symbol formed in S22; S24, the compiler front end identifies the implementation of the vector programming interface, distinguishing between the built-in function mode and the OP syntax mode; S25, the compiler front end generates an abstract syntax tree through lexical, grammatical, and semantic recognition processing, generates an intermediate representation code based on the abstract syntax tree, generates a built-in function interface intermediate representation from the built-in function pattern identified in S24, and generates an operator intermediate representation from the OP syntax pattern; S3, the compiler mid-end optimizes the intermediate representation code generated in S25 to generate a new intermediate representation; S4, the compiler middle end generates instructions for the intermediate code optimized in step S3, generates corresponding vector assembly code by pattern matching for the operator intermediate representation generated in S25 or S3, and distinguishes different built-in functions through the built-in function degradation module to perform corresponding instruction degradation to form vector assembly code; S5, the assembler assembles the vector assembly code to generate machine code; S6, the linker mixes and links all the master core and slave core machine codes generated above into an executable code; S7. Run the executable code on a heterogeneous many-core platform.

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