An active arc extinction compensation method and system for single-phase earth faults

Abstract

The application discloses an active arc-extinguishing compensation method and system for single-phase grounding fault, relates to the technical field of power systems, and comprises the following steps: acquiring a theoretical zero sequence admittance of a zero sequence network; collecting bus voltages of the zero sequence network and zero sequence currents of each branch line in the zero sequence network in real time, and obtaining a current zero sequence admittance of the zero sequence network according to the collected bus voltages and the zero sequence currents; judging whether a single-phase grounding fault occurs or not according to the current zero sequence admittance and the theoretical zero sequence admittance of the zero sequence network; and after judging that the single-phase grounding fault occurs, updating a primary current to be injected into a bus of the zero sequence network according to the current bus voltage and the theoretical zero sequence admittance. The application can sensitively identify the single-phase grounding fault and compensate for residual current through the zero sequence admittance of the zero sequence network, can realize arc-extinguishing compensation without knowing which phase of which branch line has a fault, and will not cause short-circuit faults among phases of the zero sequence network.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power systems, and in particular to an active arc extinction compensation method and system for single-phase ground fault. BACKGROUND

[0002] Ground fault in distribution network due to arc current, light damage line, heavy cause electrical fire. In the distribution network occurs single-phase ground fault, if not to intervene, the fault exists, arc easy to make transient fault deterioration into permanent fault, and permanent fault will further lead to short circuit fault, serious will also threaten personal safety.

[0003] In order to reduce the negative impact of ground fault, the distribution network is usually equipped with arc suppression coil, because the ground current contains active and harmonic components, the arc suppression coil is difficult to compensate for this part of the current, and the residual current is still large, which is difficult to meet the demand of perfect arc extinction.

[0004] In related technologies, there is a kind of arc extinction device that takes the bus voltage of zero sequence network as the disposal object. The arc extinction device is active intervention type or voltage control type. Although the arc extinction device can theoretically eliminate the fault residual current perfectly, the core link is to select the phase through the bus voltage, and then adjust the fault phase voltage to zero to eliminate the ground current.

[0005] For complex distribution network, there is a possibility of phase selection error in the process of phase selection. Once the phase selection error occurs, it will cause serious bus interphase short circuit. SUMMARY

[0006] The embodiments of the present application provide an active arc extinction compensation method and system for single-phase ground fault, to solve the technical problem of possible phase selection error in arc extinction compensation of single-phase ground fault in related technologies.

[0007] In a first aspect, an active arc extinction compensation method for single-phase ground fault is provided, comprising the following steps:

[0008] Obtaining the theoretical zero sequence admittance of the zero sequence network;

[0009] Real-time acquisition of the bus voltage of the zero sequence network and the zero sequence current of each branch line in the zero sequence network, and obtaining the current zero sequence admittance of the zero sequence network according to the acquired bus voltage and each zero sequence current;

[0010] According to the current zero sequence admittance and the theoretical zero sequence admittance, it is judged whether the single-phase ground fault occurs in the zero sequence network;

[0011] After determining that the single-phase ground fault occurs, the primary current to be injected into the bus of the zero sequence network is updated according to the current bus voltage and the theoretical zero sequence admittance.

[0012] In some embodiments, the step of determining whether a single-phase ground fault occurs in the zero sequence network according to the current zero sequence admittance and the theoretical zero sequence admittance comprises:

[0013] determining whether a single-phase ground fault occurs in the zero sequence network according to the difference between the current zero sequence admittance and the theoretical zero sequence admittance.

[0014] In some embodiments, after determining that a single-phase ground fault occurs, the step of updating the primary current to be injected into the bus of the zero sequence network according to the current bus voltage and the theoretical zero sequence admittance comprises:

[0015] obtaining the zero sequence admittance of the arc suppression coil and summing it with the theoretical zero sequence admittance;

[0016] determining the direction of the updated primary current to be injected into the bus of the zero sequence network according to the difference between the current zero sequence admittance and the theoretical zero sequence admittance;

[0017] multiplying the current bus voltage by the summed zero sequence admittance to obtain the value of the updated primary current to be injected into the bus of the zero sequence network.

[0018] In some embodiments, after updating the primary current to be injected into the bus of the zero sequence network, the method further comprises the steps of:

[0019] obtaining the next current zero sequence admittance of the zero sequence network, and determining whether to continue updating the primary current to be injected into the bus of the zero sequence network according to the difference between the next current zero sequence admittance and the theoretical zero sequence admittance, until the difference between the last current zero sequence admittance and the theoretical zero sequence admittance meets the error requirement.

[0020] In some embodiments, before determining whether a single-phase ground fault occurs, the method further comprises the steps of:

[0021] injecting a current into the bus of the zero sequence network to balance the primary current of the zero sequence network.

[0022] In some embodiments, the step of determining the current to balance the primary current of the zero sequence network comprises:

[0023] collecting the voltages of each phase of the zero sequence network and determining the admittance of each phase;

[0024] determining the simulated power supply voltage of each phase according to the collected bus voltage and the voltage of each phase;

[0025] processing the admittance of each phase and the power supply voltage of each phase to obtain the current to balance the primary current of the zero sequence network.

[0026] In some embodiments, the mathematical formula of processing the admittance of each phase and the power supply voltage of each phase to obtain the current to balance the primary current of the zero sequence network comprises:

[0027] I inv =-(E A Y A +E B Y B +E C Y C ,

[0028] In the formula, E A , E B , E C are the simulated power supply voltages of phase A, phase B and phase C respectively, Y A , Y B , Y C are the admittances on the lines of phase A, phase B and phase C respectively, and I inv is the primary current injected into the zero sequence network bus.

[0029] The second aspect also provides an active arc extinction compensation system for single-phase ground fault, comprising a central processing cabinet, an active inverter cabinet, a step-up transformer and an arc suppression coil branch.

[0030] The central processing cabinet is configured to execute the active arc extinction compensation method for single-phase ground fault as described above to obtain a primary current to be injected into the zero sequence network bus, and determine an output instruction current according to the transformation ratio of the step-up transformer.

[0031] The active inverter cabinet is configured to output a secondary current according to the instruction current.

[0032] The secondary side of the step-up transformer is connected to the output end of the active inverter cabinet, and the primary side is connected to the bus of the zero sequence network and is also connected in parallel to the arc suppression coil branch.

[0033] In some embodiments, the arc suppression coil branch is composed of an arc suppression coil.

[0034] In some embodiments, the central processing cabinet and the active inverter cabinet are independent cabinets.

[0035] The technical solutions provided in the application have the following beneficial effects:

[0036] The single-phase ground fault is sensitively identified by the current zero sequence admittance and the theoretical zero sequence admittance of the zero sequence network, after the occurrence of the single-phase ground fault is determined, the primary current injected into the zero sequence network is determined and updated according to the current bus voltage and the theoretical zero sequence admittance to compensate for the residual current, the arc extinction compensation can be realized without knowing which phase of which line is faulty, and the short-circuit fault between the phases of the zero sequence network will not be caused. BRIEF DESCRIPTION OF DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative effort based on these drawings.

[0038] Figure 1 A structural schematic diagram of an active arc extinction compensation system for single-phase ground fault provided by the embodiments of the present application.

[0039] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the drawings. DETAILED DESCRIPTION

[0040] In order to make the objectives, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings of the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative effort belong to the scope of protection of the present application.

[0041] The flowcharts shown in the drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor do they have to be executed in the order described. For example, some operations / steps can be further divided, combined or partially merged, so the actual execution order may be changed according to the actual situation.

[0042] The embodiments of the present application provide an active arc extinction compensation method for single-phase ground fault, which can sensitively identify single-phase ground fault by the current zero sequence admittance and the theoretical zero sequence admittance of the zero sequence network. After determining the occurrence of single-phase ground fault, the primary current injected into the zero sequence network is determined and updated according to the current bus voltage and the theoretical zero sequence admittance, so as to compensate for the residual current. The arc extinction compensation can be achieved without knowing which phase of which branch line is faulty, and the short-circuit fault between the phases of the zero sequence network will not be caused.

[0043] Some embodiments of the present application will be described in detail below with reference to the drawings. In the case of no conflict, the embodiments and features in the embodiments described below can be combined with each other.

[0044] The embodiments of the present application provide an active arc extinction compensation method for single-phase ground fault, which includes the following steps:

[0045] Obtaining the theoretical zero sequence admittance of the zero sequence network;

[0046] acquire bus voltage of the zero sequence network and zero sequence current of each branch of the zero sequence network in real time, and obtain current zero sequence admittance of the zero sequence network according to the acquired bus voltage and each zero sequence current;

[0047] determine whether single-phase ground fault occurs in the zero sequence network according to the current zero sequence admittance and the theoretical zero sequence admittance;

[0048] update the primary current to be injected into the bus of the zero sequence network according to the current bus voltage and the theoretical zero sequence admittance after determining that single-phase ground fault occurs.

[0049] In the embodiment of the application, the current zero sequence admittance of the zero sequence network is taken as an object, whether single-phase ground fault occurs in the zero sequence network is determined according to the current zero sequence admittance and the theoretical zero sequence admittance of the zero sequence network, and after recognizing single-phase ground fault, the primary current to be injected into the bus of the zero sequence network is updated according to the current bus voltage and the theoretical zero sequence admittance, and the updated primary current is injected into the bus of the zero sequence network.

[0050] In the embodiment, whether single-phase ground fault occurs is determined in relation to the theoretical zero sequence admittance and the current zero sequence admittance of the zero sequence network, and the injected primary current is also related to the theoretical zero sequence admittance and the bus voltage, without involving the separate phase of the zero sequence network, without needing to know which branch has fault, without needing to determine the phase of single-phase ground fault before compensation, without causing short-circuit fault between phases, and being able to directly determine single-phase ground fault.

[0051] Further, the specific steps of determining whether single-phase ground fault occurs in the zero sequence network according to the current zero sequence admittance and the theoretical zero sequence admittance include:

[0052] determining whether single-phase ground fault occurs in the zero sequence network according to the difference between the current zero sequence admittance and the theoretical zero sequence admittance.

[0053] Further, the specific steps of updating the primary current to be injected into the bus of the zero sequence network according to the current bus voltage and the theoretical zero sequence admittance after determining that single-phase ground fault occurs include:

[0054] obtaining zero sequence admittance of the arc suppression coil and summing the zero sequence admittance with the theoretical zero sequence admittance;

[0055] determining the direction of the updated primary current to be injected into the bus of the zero sequence network according to the difference between the current zero sequence admittance and the theoretical zero sequence admittance;

[0056] multiplying the current bus voltage by the summed zero sequence admittance to obtain the value of the updated primary current to be injected into the bus of the zero sequence network.

[0057] As a preferred scheme of the embodiment, after the primary current to be injected into the zero sequence network bus is updated, the method further comprises the steps of:

[0058] The next current zero sequence admittance of the zero sequence network is obtained, and whether the primary current to be injected into the zero sequence network bus is continuously updated is determined according to the difference between the next current zero sequence admittance and the theoretical zero sequence admittance until the difference between the last current zero sequence admittance and the theoretical zero sequence admittance meets the error requirement.

[0059] In theory, if the current zero sequence admittance is equal to the theoretical zero sequence admittance, it can be determined that the zero sequence network is in a balanced state. However, in practice, the obtained current zero sequence admittance will have an error with the theoretical zero sequence admittance, and if the difference between the current zero sequence admittance and the theoretical zero sequence admittance is within the allowable error accuracy, the current zero sequence admittance can also be considered to be equal to the theoretical zero sequence admittance.

[0060] Wherein, the solving formula of the current zero sequence admittance Y0' of the zero sequence network after the single-phase ground fault occurs is derived from:

[0061]

[0062] In the formula, Y0' is the current zero sequence admittance of all branches of the zero sequence network after the single-phase ground fault occurs, Y 0k ' is the current zero sequence admittance of the branch where the fault occurs, Y 0j is the current zero sequence admittance of a branch where no fault occurs, I 0k ' is the current zero sequence current of the branch where the fault occurs, I 0j is the current zero sequence current of a branch where no fault occurs, and U0 is the current bus voltage of the bus.

[0063] Whether (Y0'-Y0) is equal to zero is solved, if yes, the injected primary current is consistent with the previously injected primary current, otherwise, it is determined that the single-phase ground fault occurs, and the direction of the primary current to be injected is determined according to whether (Y0'-Y0) is greater than zero or less than zero.

[0064] If not equal to zero, the sum of the theoretical zero sequence admittance of the zero sequence network and the zero sequence admittance of the arc suppression coil is multiplied by the current bus voltage to obtain the primary current I inv injected into the bus of the zero sequence network after the single-phase ground fault occurs.

[0065] Then, the bus voltage and the zero sequence current of each branch of the compensated zero sequence network are collected again, and the current zero sequence admittance of the zero sequence network after the first compensation is obtained in the same way. Then, whether the relative change of the current zero sequence admittance is equal to the theoretical zero sequence admittance is judged again. If the difference is still not equal to zero, a new primary current is obtained in the same way, and the new primary current is injected into the bus of the zero sequence network until the difference is equal to zero, and the injection of the primary current is stopped.

[0066] It can be seen that the embodiment of the application continuously injects the new primary current to perform closed-loop dynamic adjustment, so that the zero sequence network finally reaches a steady state.

[0067] After the single-phase grounding fault is identified, if the zero sequence network is to be balanced again, the grounding residual current is zero, where the grounding residual current If' is derived from the formula

[0068] If' = I0' - I0 = -U0 (Y0 - Y0') = -U0 (Y0 + Y L -Y inv );

[0069] In the formula, If' is the grounding residual current, I0' is the current zero sequence current on all branches of the zero sequence network after the single-phase grounding fault occurs; I0 is the zero sequence current on all branches of the zero sequence network in a normal state, U0 is the current bus voltage on the bus, Y0' is the current zero sequence admittance on all branches of the zero sequence network after the single-phase grounding fault occurs, Y0 is the theoretical zero sequence admittance of the zero sequence network, Y L is the zero sequence admittance of the arc extinction coil, and Y inv is the equivalent zero sequence admittance of the primary current to be injected.

[0070] Let the grounding residual current be zero, that is, Y inv = I inv / U0 = Y0 + Y L

[0071] In the formula, Y0 is the theoretical zero sequence admittance of the zero sequence network, Y L is the zero sequence admittance of the arc extinction coil, both of which are fixed known values; U0 is the bus voltage, which is a real-time value collected; and I inv is the primary current injected into the bus of the zero sequence network.

[0072] For verification, different unilateral grounding faults are set on a branch.

[0073] In the 1kΩ unilateral grounding fault test, the fault is identified at 0.1s, and the grounding residual current of the zero sequence network is arc extinction compensated at 0.4s. At the same time, the grounding residual current is reduced from 4.11A to 0.33A, which has obvious arc extinction compensation effect.

[0074] In the 33Ω single-phase grounding fault test, if no arc extinguishing compensation is performed, the residual current is 6.12A, and after the arc extinguishing compensation is performed using the active arc extinguishing compensation method provided in the embodiment, the residual current is 0.4A, and the current is reduced by 93.5%, and the compensation effect is significant.

[0075] In the 10kΩ single-phase grounding fault test, if no arc extinguishing compensation is performed, the residual current is 0.4A, and after the arc extinguishing compensation is performed using the active arc extinguishing compensation method provided in the embodiment, the residual current is 0.08A, and the current is reduced by 80%.

[0076] It can be seen that in the 10kΩ high resistance grounding fault, the embodiment can also identify the fault, and because the current is very small when the resistance is high, the accuracy error of the zero sequence current transformer is large, which reduces the compensation effect of the zero sequence network, but the arc extinguishing compensation effect is still obvious, and the arc extinguishing effect is good.

[0077] Necessarily, before determining that a single-phase grounding fault occurs, the method further comprises the steps of:

[0078] Injecting a current to the bus of the zero sequence network to balance the primary current of the zero sequence network.

[0079] Further, the specific steps of determining the current to balance the primary current of the zero sequence network include:

[0080] Collecting the voltage of each phase of the zero sequence network and determining the admittance of each phase;

[0081] Determining the simulated power supply voltage of each phase according to the collected bus voltage and the voltage of each phase;

[0082] Processing the admittance of each phase and the power supply voltage of each phase to obtain the current to balance the primary current of the zero sequence network.

[0083] Wherein, the power supply voltage of each phase E A , E B , E C is equal to the difference between the voltage of each phase U A , U B , U C and the zero sequence voltage or the bus voltage in turn.

[0084] Specifically, the mathematical formula of processing the admittance of each phase and the power supply voltage of each phase to obtain the current to balance the primary current of the zero sequence network includes:

[0085] I inv =-(E A Y A +E B Y B +E C YC

[0086] E A , E B , E C are the simulated power supply voltages of phase A, phase B and phase C respectively, Y A , Y B , Y C are the admittances on the lines of phase A, phase B and phase C respectively, I inv is the primary current injected into the zero sequence network bus.

[0087] E A , E B , E C and Y A , Y B , Y C are fixed values, and the primary current injected into the zero sequence network bus is also fixed before single-phase ground fault.

[0088] It is worth noting that the specific steps for obtaining the theoretical zero sequence admittance Y0 of the zero sequence network and the phase admittances Y i include:

[0089] After lifting the zero sequence voltage U0 of the zero sequence network from zero to 15% of the phase voltage, the admittances Y A , Y B , Y C on the lines of each phase and the theoretical zero sequence admittance Y0 are measured.

[0090] As shown in Figure 1 , the embodiment of the present application also provides an active arc extinction compensation system for single-phase ground fault, which comprises a central processing cabinet, an active inverter cabinet, a step-up transformer, and an arc suppression coil branch.

[0091] The central processing cabinet is configured to execute the active arc extinction compensation method for single-phase ground fault as described above to obtain a primary current to be injected into the zero sequence network bus, and determine an output command current according to the transformation ratio of the step-up transformer.

[0092] The active inverter cabinet is configured to output a secondary current according to the command current.

[0093] The secondary side of the step-up transformer is connected to the output end of the active inverter cabinet, and the primary side is connected to the bus of the zero sequence network, and the primary side is also connected in parallel to the arc suppression coil branch.

[0094] Another end of the arc suppression coil is grounded.

[0095] Preferably, the arc suppression coil branch is composed of an arc suppression coil.

[0096] ​It is worth noting that the traditional arc suppression coil must be equipped with a damping resistor to ensure that the zero sequence voltage of the zero sequence network does not deviate too high, but the damping resistor also causes the disadvantage that the zero sequence voltage changes less when a single-phase ground fault occurs.

[0097] In the embodiment, the zero sequence network is closed-loop controlled by the active arc suppression compensation system, and when a high-resistance ground fault occurs, the zero sequence voltage changes significantly, thereby greatly improving the single-direction ground fault recognition sensitivity.

[0098] Before the single-phase ground fault of the zero sequence network occurs, in order to ensure the balance of the zero sequence network, the system injects a primary current in the bus of the zero sequence network, which is related to the zero sequence admittance of each phase and the simulated power supply voltage of each phase. Among them, no matter whether the zero sequence network is in a normal state or a single-phase ground fault state, the power supply voltage E A , E B , E C of each phase does not change, which is equal to the difference between the voltage U A , U B , U C of each phase and the zero sequence voltage in turn, that is, the primary current I inv injected in the bus of the zero sequence network to ensure the balance of the zero sequence network when the zero sequence network is in a normal state can be obtained. At this time, the zero sequence voltage of the zero sequence network is zero, so that the zero sequence network can be balanced, and there is no interference of the damping resistor, and if a single-phase ground fault occurs, the zero sequence voltage changes significantly, thereby greatly improving the single-direction ground fault recognition sensitivity.

[0099] Further, the central processing cabinet and the active inverter cabinet are independent cabinets. The active inverter cabinet has power electronic devices, and is independent of the central processing cabinet and is electrically isolated, which is beneficial to the stability of the generated secondary current and ensures the reliability of the arc suppression compensation.

[0100] The central processing cabinet and the active inverter cabinet are connected through an optical fiber.

[0101] It should be noted that those skilled in the art can clearly understand that, for the convenience and brevity of description, the execution examples of the central processing cabinet in the above device embodiment can refer to the corresponding processes in the foregoing method embodiments, which will not be described herein.

[0102] In the description of the present application, it should be noted that the terms "upper", "lower", and the like are used for indicating the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. Unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connecting" should be interpreted broadly, for example, can be fixed connection, can also be detachable connection, or integrally connected; can be mechanical connection, can also be electrical connection; can be directly connected, can also be indirectly connected through an intermediate medium, can be the internal communication of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0103] It should be noted that in the present application, relational terms such as "first" and "second", and the like are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus including a series of elements includes not only those elements, but also other elements not explicitly listed, or other elements inherent in such a process, method, article or apparatus. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of other identical elements in the process, method, article or apparatus including the element.

[0104] The above is only a specific embodiment of the present application, which enables those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features applied herein.

Claims

1. An active arc extinction compensation method for single phase ground fault, characterized by, The method comprises the following steps: obtaining a theoretical zero sequence admittance of a zero sequence network; real-time collecting bus voltage of the zero sequence network and zero sequence current of each branch of the zero sequence network, and obtaining a current zero sequence admittance of the zero sequence network according to the collected bus voltage and each zero sequence current; judging whether a single-phase ground fault occurs in the zero sequence network according to the current zero sequence admittance and the theoretical zero sequence admittance; after judging that the single-phase ground fault occurs, updating a primary current to be injected into a bus of the zero sequence network according to the current bus voltage and the theoretical zero sequence admittance; the specific steps of judging whether the single-phase ground fault occurs in the zero sequence network according to the current zero sequence admittance and the theoretical zero sequence admittance comprise: judging whether the single-phase ground fault occurs in the zero sequence network according to a difference between the current zero sequence admittance and the theoretical zero sequence admittance; the specific steps of updating the primary current to be injected into the bus of the zero sequence network after judging that the single-phase ground fault occurs comprise: obtaining a zero sequence admittance of an arc suppression coil and summing the zero sequence admittance with the theoretical zero sequence admittance; determining a direction of the updated primary current to be injected into the bus of the zero sequence network according to a difference between the current zero sequence admittance and the theoretical zero sequence admittance; multiplying the current bus voltage by the summed zero sequence admittance to obtain a value of the updated primary current to be injected into the bus of the zero sequence network; before judging that the single-phase ground fault occurs, the method further comprises the step of: injecting a current into the bus of the zero sequence network to balance a primary current of the zero sequence network.

2. The method of active arc extinction compensation for single phase earth fault as claimed in claim 1 wherein, after updating the primary current to be injected into the bus of the zero sequence network, the method further comprises the step of: obtaining a next current zero sequence admittance of the zero sequence network, and determining whether to continue updating the primary current to be injected into the bus of the zero sequence network according to a difference between the next current zero sequence admittance and the theoretical zero sequence admittance, until a difference between a last current zero sequence admittance and the theoretical zero sequence admittance meets an error requirement.

3. The method of active arc extinction compensation for single phase earth fault as claimed in claim 1 wherein, the specific steps of determining the current to balance the primary current of the zero sequence network comprise: collecting each-phase voltage of the zero sequence network and determining each-phase admittance; determining simulated each-phase power supply voltage according to the collected bus voltage and each-phase voltage; operating and processing the each-phase admittance and the each-phase power supply voltage to obtain the current to balance the primary current of the zero sequence network.

4. The method of active arc extinction compensation for single phase earth fault as claimed in claim 3 wherein, the mathematical formula of operating and processing the each-phase admittance and the each-phase power supply voltage to obtain the current to balance the primary current of the zero sequence network comprises: , wherein E A , E B , E C are the simulated supply voltages of the A-phase, B-phase and C-phase, respectively, Y A , Y B , Y C are the admittances on the A-phase, B-phase and C-phase lines, respectively, and I inv is the primary current injected into the zero sequence network bus.

5. An active arc extinction compensation system for single phase ground faults, characterized by, the system comprises a central processing cabinet, an active inversion cabinet, a step-up transformer, and an arc suppression coil branch; the central processing cabinet is configured to obtain the primary current to be injected into the bus of the zero sequence network by executing the active arc compensation method of the single-phase ground fault according to any one of claims 1-4, and determine an output instruction current according to a transformation ratio of the step-up transformer; the active inversion cabinet is configured to output a secondary current according to the instruction current; a secondary side of the step-up transformer is connected with an output end of the active inversion cabinet, a primary side is connected with the bus of the zero sequence network, and the primary side is also connected with the arc suppression coil branch in parallel.

6. The single phase ground fault active arc extinction compensation system of claim 5, wherein, the arc suppression coil branch is composed of an arc suppression coil.

7. The single phase ground fault active arc extinction compensation system of claim 5, wherein, the central processing cabinet and the active inversion cabinet are independent cabinets.

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