Secret square root inverse calculation system, secret normalization system, their methods, secret calculation device and computer program product

By designing a secret square root reciprocal calculation system, using multiple secret computing devices for bit processing and normalization, the problem of high cost of calculating square roots in the prior art is solved, and the high-speed calculation effect in secret calculation is achieved.

CN114981863BActive Publication Date: 2025-05-02NIPPON TELEGRAPH & TELEPHONE CORP
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Patent Information

Application Number
CN202080093589.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-01-20
Publication Date
2025-05-02
Estimated Expiration
2040-01-20

AI Technical Summary

Technical Problem

In the prior art, calculating the inverse of square roots is relatively expensive in secret calculations, making it difficult to achieve high-speed calculations.

Method used

A secret square root reciprocal calculation system is designed. Through multiple secret computing devices, bit decomposition, bit string generation, normalized multiplier generation, flag calculation and square root reciprocal calculation unit and other components are used to bit processing and normalize the dispersion value [a] of the value a, and finally calculate the dispersion value [1/√a] of the reciprocal of the square root of the value a.

Benefits of technology

In secret calculation, high-speed calculation of the inverse of square roots is realized, which reduces the calculation cost and improves the calculation efficiency.

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Abstract

Calculating the reciprocal of the square root at high speed in secret computing. The secret square root reciprocal calculation system (100) takes [a] as the input and calculates [1 / √a]. The bit decomposition unit (11) generates the bit representation {a0}, …, {a λ‑1}. The first bit string generation unit (12) calculates {a' i} = {a i} ∨ {a i+1} to generate {a'0}, …, {a' λ'‑1}. The flag string generation unit (13) generates {x0}, …, {x λ'‑1} representing the leftmost bits of {a'0}, …, {a' λ'‑1}. The normalized multiplier generation unit (14) generates [c'] by combining the bits of {x λ'‑1}, …, {x0}. The second bit string generation unit (15) sets {a" i} = {a 2i} to generate {a"0}, …, {a" λ'‑1}. The flag calculation unit (16) calculates the scatter value {r} obtained by summing {x j}{a" j}. The normalization unit (18) calculates [b]: = [c'][c'][2a] if r = 1, and calculates [b]: = [c'][c'][a] if r = 0. The square root reciprocal calculation unit (19) calculates [w]: = [1 / √b]*√2 if r = 1, and calculates [w]: = [1 / √b] if r = 0. The inverse normalization unit (20) multiplies [1 / √a]: = [w][c'].
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