Device for generating radio frequency signals in phase quadrature

Abstract

Embodiments disclose an apparatus for generating radio frequency signals in phase quadrature. The integrated electronic device includes a mixer module comprising a voltage / current transconductance stage including a first transistor and connected to a mixing stage including a second transistor, wherein the mixing stage includes: a resistance degeneration circuit connected to the source of the second transistor; and a calibration input connected to the gate of the second transistor and intended to receive an adjustable calibration voltage, and the source of the first transistor is directly connected to a cold power supply point.

Description

[0001] This application is a divisional application of the Chinese invention patent application with the application date of March 1, 2021, application number 202110225804.1, and invention name “Device for generating phase-orthogonal radio frequency signals”. Technical Field

[0002] Embodiments and implementations of the present invention relate to generating high frequency signals, for example but not exclusively greater than 20 GHz, and in particular generating such signals for use as frequency conversion signals (or local oscillator signals) offset by 90°, intended to allow down or up frequency conversion of received radio frequency signals (down conversion) or of baseband signals intended to be transmitted (up conversion). Background Art

[0003] In telecommunications such as the fifth generation “5G” telecommunications, it is required to be able to generate a switching signal or a signal of a local oscillator shifted by 90° at a frequency equal to 28 GHz, for example, but not limited to this value.

[0004] A known solution involves using a voltage-controlled oscillator to generate a sinusoidal signal at a frequency of 56 GHz and then using a frequency divider to obtain a converted signal at 28 GHz.

[0005] However, propagating a signal at 56 GHz in a circuit and using a frequency divider is an expensive solution in terms of consumption.

[0006] In the article by Curtis Leifso et al., entitled “A Monolithic 6 GHz Quadrature Frequency Doubler With Adjustable Phase Offset”, IEEE Journal of Solid-state circuits, vol. 41, No. 2, February 2006, a 6 GHz frequency doubler is proposed which allows the use of a combination of a polyphase filter and a mixer associated with an adder and a subtractor to deliver at the output two signals offset by 90° and having a frequency twice that of the input oscillator signal.

[0007] However, such a structure not only occupies a considerable surface area but also operates at a high supply voltage (3.3 V). Moreover, the Gilbert cell used in each mixer consumes DC current, which limits the performance of the structure in terms of noise. Summary of the Invention

[0008] Therefore, it is necessary to generate signals offset by 90° at a high frequency, typically greater than 20 GHz (eg, 28 GHz), with acceptable imbalance in phase and amplitude, and to provide low power consumption and good accuracy in the 90° offset of the two generated signals.

[0009] Embodiments of the present invention have particularly advantageous, but non-limiting, use in the field of telecommunications, and in particular in 5G telephony standard technology.

[0010] According to one embodiment, a mixer module is used which comprises a mixing stage with emitter degeneration and an adjustment of the gate voltages of the transistors of the mixing stage, and a combination of such mixer modules to produce a frequency multiplier.

[0011] Therefore, according to one aspect, an electronic device, eg an integrated device, comprising a mixer module is proposed.

[0012] The mixer module includes a voltage / current transconductance stage including a first transistor (eg, a MOS transistor) and connected to a mixing stage including a second transistor (eg, a MOS transistor).

[0013] According to this aspect, the mixer stage comprises a resistance degeneration circuit connected to the source of the second transistor, and a calibration input connected to the gate of the second transistor and intended to receive an adjustable calibration voltage.

[0014] Furthermore, the source of the first transistor is directly connected to a cold supply point, such as ground.

[0015] According to this aspect, a degenerated passive mixing stage is thus used. The resistive degeneration circuit allows correction of static errors in the 90° offset and is placed in the mixing stage, as opposed to prior art frequency multipliers which have this degeneration circuit at the transistor level of the voltage / current transconductance stage.

[0016] Furthermore, adjusting the calibration voltage, for example by digital calibration, of the voltage at the gate of the transistor controlling the mixing stage allows:

[0017] - correcting the effects of process variations on the phase shift of the mixer module's output signal, and

[0018] When using a combination of such mixer modules, in order to form a frequency doubler, a mutual phase shift of 90 degrees between the two output signals provided by the frequency doubler is obtained with good accuracy.

[0019] According to one embodiment, the transconductance stage includes a current amplifier block connected between the gate and the drain of the first transistor.

[0020] Such a current amplifier block, although not essential, enables the current gain to be improved.

[0021] According to one embodiment, the transconductance stage comprises a first input interface comprising two first input terminals respectively connected to the gates of two first transistors.

[0022] Furthermore, the mixer stage comprises a second input interface comprising two second input terminals respectively connected to the gates of the two pairs of second transistors, and an output interface comprising two output terminals.

[0023] Each output terminal is connected to two second transistors belonging to two different pairs.

[0024] According to one embodiment, the two first input terminals are intended to respectively receive two first signals having a sinusoidal shape shifted by 180°.

[0025] The two second input terminals are also intended to respectively receive two second signals having a sinusoidal shape shifted by 180°.

[0026] The two second signals are identical to the two first signals or are shifted by 90° relative to the two first signals.

[0027] The expression "a signal having a sinusoidal shape" includes a sine signal and a cosine signal.

[0028] According to one embodiment, so as to form a frequency multiplier, the device comprises:

[0029] a signal generator having two first terminals, referred to as generating terminals, configured to generate two sine signals offset by 180°, and two second generating terminals configured to generate two cosine signals offset by 180°, the sine signals and the cosine signals having the same initial frequency,

[0030] a first mixer module, wherein the two first input terminals and the two second input terminals of the first mixer module are connected to the two first generating terminals, respectively;

[0031] a second mixer module, wherein the two first input terminals and the two second input terminals of the second mixer module are connected to the two second generating terminals, respectively;

[0032] - the two output terminals of the first mixer module are respectively connected to the two opposite output terminals of the second mixer module, in such a way as to form two first output nodes intended to generate two cosine signals shifted by 180° and having a frequency twice the initial frequency,

[0033] a third mixer module, wherein the two first input terminals of the third mixer module are connected to the two first generating terminals respectively, and the two second input terminals of the third mixer module are connected to the two second generating terminals respectively,

[0034] a fourth mixer module, wherein the two first input terminals of the fourth mixer module are respectively connected to the two second generation terminals, and the two second input terminals are respectively connected to the two first generation terminals,

[0035] The two output terminals of the third mixer module are respectively connected to the two identical output terminals of the fourth mixer module, in this way forming two second output nodes in order to generate two sinusoidal signals shifted by 180° and having a frequency twice the initial frequency.

[0036] Thus, in such a configuration, by appropriately connecting the output terminals of the various mixer modules, adders and subtractors are eliminated, and the mixer modules are allowed to operate with radio frequency currents at their outputs.

[0037] According to one embodiment, the signal generator comprises a source, such as a voltage controlled oscillator configured to generate a sinusoidal shaped initial signal having the indicated initial frequency, and a polyphase filter connected between an output of the source and first and second generating terminals.

[0038] Furthermore, the device advantageously comprises a voltage amplification circuit connected between each second terminal of each mixer module and the corresponding generating terminal.

[0039] This allows the signal delivered to the mixer stage transistors to be amplified without distorting the sinusoidal signal too much.

[0040] According to one embodiment, the device advantageously further comprises a calibration circuit configured to adjust the calibration voltage in dependence on a phase shift between the sine and cosine signals transmitted at the first output node and the second output node.

[0041] This calibration (for example digital calibration) thus allows obtaining a 90° offset between the signals delivered at the output of the frequency multiplier with very high accuracy (for example give or take 1 degree depending on process variations).

[0042] The initial frequency is advantageously greater than or equal to 10 GHz, for example equal to 14 GHz, which allows obtaining a converted signal having a frequency of 28 GHz, shifted by 90°, at the output of the frequency multiplier.

[0043] According to another aspect, a communication device is proposed, such as a cellular mobile telephone, comprising a receiving chain and a transmitting chain, and a device as described above intended to transmit sine and cosine signals to a first output node and a second output node, the sine and cosine signals forming two components shifted by 90° of a frequency converted signal intended for the receiving chain and the transmitting chain.

[0044] Therefore, the communication device is configured to operate with a 28 GHz conversion signal in a frequency band dedicated to 5G use, for example. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Other advantages and features of the present invention will become apparent upon examination of the detailed description of, but not limitation to, examples and embodiments thereof and the accompanying drawings, in which:

[0046] Figure 1 A communication device capable of receiving and transmitting radio frequency signals compatible with, for example, 5G technology is shown;

[0047] Figure 2 An embodiment of a device for transmitting a switching signal offset by 90° is shown;

[0048] Figure 3 shows the structure of the mixer module;

[0049] Figure 4 shows the interconnection of multiple mixing modules;

[0050] Figure 5 An embodiment of a voltage amplifier circuit is shown, and

[0051] Figure 6 A calibration block is shown connected to the control inputs of four mixer blocks. DETAILED DESCRIPTION

[0052] exist Figure 1 In the figures, the reference APP denotes a communication device, for example a cellular mobile phone, which is capable of receiving and transmitting radiofrequency signals compatible with, for example, 5G technology via an antenna ANT and, in particular, having a frequency of 28 GHz in the example described herein.

[0053] The device APP comprises a duplexer DX connected to an antenna and a reception chain CHR and a transmission chain CHT connected between the duplexer DX and a processor PROC intended to perform baseband processing.

[0054] The reception chain comprises, in a conventional and per se known manner, a mixer MXI which receives the input signal and the converted signal SGS1 from a device DIS created, for example, in an integrated circuit.

[0055] The frequency of the switching signal SGS1 is equal to 28 GHz.

[0056] Mixer MXI therefore delivers the signal in baseband on channel I.

[0057] The reception chain CHR also comprises a further mixer MXQ which receives a converted signal SGS2 having the same frequency as the signal SGS1 but phase-shifted by 90 degrees relative to the signal SGS1, so that the mixer MXQ transmits on channel Q a signal also in baseband but shifted by 90° relative to the signal transmitted on channel I.

[0058] The converted signals SGS1 and SGS2 shifted by 90° are generated by a device whose structure will be described in detail with reference to the following figures and which comprises, for example, a source OSC configured to transmit an initial signal at 14 GHz.

[0059] The transmit channel CHT also comprises two mixers MXI and MXQ intended to receive, on the one hand, the transmit signals in baseband from channel I and channel Q, and to convert the signals SGS1 and SGS2 , in this way performing an up-conversion from baseband to a frequency of 28 GHz.

[0060] The reception chain CHR also comprises two analog-to-digital converters ADC for converting the analog signals in baseband of the channels I and Q into digital signals for the processor PROC.

[0061] As for the transmit chain, it includes two digital-to-analog converters DAC for performing digital-to-analog conversion to deliver the analog signals on channels I and Q to mixers MXI and MXQ.

[0062] Now more specifically refer to Figure 2 , to describe an embodiment of an apparatus for transmitting a switching signal offset by 90°.

[0063] In this embodiment, the architecture is a differential architecture.

[0064] therefore, Figure 1 The conversion signal SGS1 shown actually includes two components SGS10 and SGS11 offset by 180°, while the conversion signal SGS2 offset by 90° relative to the conversion signal SGS1 includes two components SGS20 and SGS21 offset by 180°.

[0065] The device DIS comprises a signal generator GNT, here comprising a source OSC, such as a voltage-controlled oscillator or a phase-locked loop, which delivers an initial signal with a sinusoidal shape and an initial frequency, here a frequency of 14 GHz.

[0066] The signal generator GNT further comprises a polyphase filter PPF having a conventional structure known per se, which receives the initial signal and comprises two first generation terminals BG10 and BG11 , and two second generation terminals BG20 and BG21 .

[0067] The two first generating terminals BG10 and BG11 deliver two sinusoidal signals SG10 and SG11 offset by 180°, which have an initial frequency of 14 GHz.

[0068] The two second generating terminals BG20 and BG21 deliver two cosine signals SG20 and SG21 , also having the same initial frequency of 14 GHz.

[0069] The device DIS also comprises a combination of four mixer modules MX1 to MX4, the output terminals of which are connected in a suitable manner, as will be seen in more detail below, in such a way as to form two first output nodes NDS10 and NDS11 and two second output nodes NDS20 and NDS21.

[0070] The two first output nodes NDS10 and NDS11 transmit two signals SGS10 and SGS11 (two components of the converted signal SGS1) shifted by 180° respectively. These two signals are actually two cosine signals shifted by 180° and have a frequency twice the initial frequency or 28 GHz.

[0071] The two second output nodes NDS20 and NDS21 deliver two sinusoidal signals SGS20 and SGS21 (two components of the converted signal SGS2) shifted by 180° and also having a frequency twice the initial frequency or 28 GHz.

[0072] Advantageously, although this is not essential, a voltage amplifier circuit AMP is present between the polyphase filter PPF and the mixer modules MX1 to MX4. The structure of the voltage amplifier circuit on the one hand and the connection of the voltage amplifier circuit AMP between the polyphase filter PPF and the various mixer modules MX1 to MX4 on the other hand will be discussed in more detail below.

[0073] Now more specifically refer to Figure 3 , to describe the structure of the mixer modules MXi (i=1 to 4) in more detail.

[0074] This structure is the same for the four mixer modules.

[0075] The mixer module MXi comprises a voltage / current transconductance stage ETT comprising first transistors, here NMOS transistors, N5 and N6.

[0076] The current transconductance stage is connected to the mixer stage ETM via a capacitor.

[0077] The mixer stage ETM comprises second transistors, here also NMOS transistors, N1 to N4.

[0078] Before discussing the structure of the mixing stage again in more detail, the transconductance stage ETT will now be described in more detail.

[0079] The transconductance stage ETT comprises a first input interface comprising two first input terminals BE10i and BE11i connected to the gates of two first transistors N5 and N6 via two capacitors C1 and C2 respectively.

[0080] The sources of the two first transistors are directly connected to the ground GND.

[0081] The two first input terminals BE10i and BE11i are intended to respectively receive two first signals having a sinusoidal shape shifted by 180°.

[0082] More precisely, as will be seen in more detail below, the two first signals are either sine signals or cosine signals, depending on the index of the mixer module.

[0083] The transconductance stage further includes a current amplifier block BLA connected between the gate and the drain of each of the first transistors N5 and N6.

[0084] Herein, the current amplifier block includes a PMOS transistor connected between a power supply terminal for receiving a power supply voltage VDD and a drain of a corresponding first transistor ( N5 or N6 ), and a resistor connected between a gate of the PMOS transistor and a drain thereof.

[0085] The current amplifier block BLA further includes a capacitor connected between the gate of the PMOS transistor and the gate of the corresponding first transistor ( N5 or N6 ).

[0086] The transconductance stage ETT further comprises a polarization circuit comprising two resistors RB3 and RB4 connected between the gates of the two first transistors N5 and N6 respectively, and a polarization input for receiving a polarization voltage VBias.

[0087] This polarization voltage is adjustable, allowing the current circulating in transistors N5 and N6 to be set.

[0088] Typically, low currents are available, for example 1 mA, which allows limiting the current consumption of the mixer module.

[0089] The mixing stage ETM comprises a second input interface comprising two second input terminals BE20i and BE21i connected to the gates of two pairs N1 , N4 and N2 , N3 of second transistors N1 to N4 via two further capacitors C6 and C5 , respectively.

[0090] The mixer stage ETM also comprises an output interface comprising two output terminals BS10i and BS11i, each output terminal being connected to two second transistors belonging to two different pairs.

[0091] More precisely, in this example, the output terminal BS10 i is connected to the drains of the two transistors N1 and N3 , whereas the output terminal BS11 i is connected to the drains of the two transistors N2 and N4 .

[0092] The mixing stage ETM further comprises a resistance degeneration circuit connected to the sources of the second transistors N1 to N4.

[0093] More specifically, in this differential structure, the resistance degeneration circuit includes two resistors R1 and R2 connected in series between the sources of the transistors N1 and N2 , and two resistors R3 and R4 connected in series between the sources of the transistors N3 and N4 .

[0094] The midpoint of each pair of degeneration resistors is connected to the drain of the first corresponding transistor N5 or N6 via a capacitor.

[0095] The two second input terminals BE20i and BE21i are used to respectively receive two second signals having a sinusoidal shape shifted by 180° (sine signals or cosine signals, depending on the index i of the mixer module MXi).

[0096] The two second signals are identical to the two first signals received at the two first input terminals BE10i and BE11i or are offset by 90° relative to the two first signals, here again according to the index i of the mixer module MXi.

[0097] The mixing stage ETM also comprises a calibration input ECi connected to the gates of the second transistors N1 to N4 via two resistors RB1 and RB2.

[0098] The calibration input is used to receive an adjustable calibration voltage, which is used as will be seen in more detail below during the calibration phase.

[0099] Now more specifically refer to Figure 4 , to describe the interconnection of the various mixing modules MX1 to MX4.

[0100] The two first input terminals BE101 and BE111 of the mixer module MX1 and the two second input terminals BE201 and BE211 of the first mixer module MX1 are connected to the two first generating terminals BG10 and BG11 that transmit the sinusoidal signals SG10 and SG11, respectively. Figure 2 ).

[0101] When the two first terminals BE101 and BE111 are directly connected to the generating terminals BG10 and BG11, the second input terminals BE201 and BE211 are connected via Figure 2 Two voltage amplifier circuits AMP101 and AMP111 that are part of the voltage amplifier circuit AMP shown are connected to generation terminals BG10 and BG11.

[0102] The two first input terminals BE102 and BE112 of the second mixer module are directly connected to the two second generating terminals BG20 and BG21 ( Figure 2 ).

[0103] The two second input terminals BE202 and BE212 of the second mixer module MX2 are also connected to the two second generating terminals BG20 and BG21, but this time via the two voltage amplifier circuits AMP102 and AMP112, which are also Figure 2 Part of the voltage amplifier circuit AMP shown.

[0104] Typically, the two output terminals of the mixer module transmit two differential signals shifted by 180°, namely, a “plus” signal and a “minus” signal.

[0105] The two output terminals BS101 and BS111 of the first mixer module are connected to two opposite output terminals BS102 and BS112 of the second mixer module MX2, respectively, so as to form a current difference at two first output nodes NDS10 and NDS11, which are intended to generate two cosine signals SGS10 and SGS11 offset by 180° and with a frequency twice the initial frequency.

[0106] The two input terminals BE103 and BE113 of the third mixer module MX3 are respectively connected to two first generation terminals BG10 and BG11 which transmit the two sinusoidal signals SG10 and SG11 .

[0107] The two second input terminals BE203 and BE213 of the third mixer module MX3 are connected to the two second generating terminals BG20 and BG21 respectively via the two voltage amplifier circuits AMP103 and AMP113. The two voltage amplifier circuits AMP103 and AMP113 are Figure 2 The MOSFET is part of the voltage amplifier circuit AMP and is therefore used to receive two cosine signals SG20 and SG21 that are offset by 180°.

[0108] The two input terminals BE104 and BE114 of the fourth mixer module MX4 are respectively connected to two first generation terminals BG20 and BG21 which carry two cosine signals SG20 and SG21 .

[0109] The two second input terminals BE204 and BE214 of the fourth mixer module MX4 are connected to the two first generating terminals BG10 and BG11 that transmit the two sinusoidal signals SG10 and SG11 shifted by 180 degrees respectively via the two voltage amplifier circuits AMP104 and AMP114. Figure 2Part of the voltage amplifier circuit AMP.

[0110] The two output terminals BS103 and BS113 of the third mixer module MX3 are connected to the two homologous output terminals BS104 and BS114 of the fourth mixer module MX4, respectively, so as to form the sum of the currents of the two second output nodes NDS20 and NDS21, which generate two sinusoidal signals SGS20 and SGS21 offset by 180° and with a frequency twice the initial frequency.

[0111] This specific connection of the output terminals of the various mixer modules therefore makes it possible to dispense with the use of adders and subtractors in order to generate an output signal shifted by 90° and having a frequency twice the initial frequency.

[0112] Now more specifically refer to Figure 5 , to show that as Figure 2 An embodiment of a voltage amplifier circuit of a portion of the voltage amplifier circuit AMP.

[0113] More precisely, a circuit AMP101 is shown here. Figure 4 The structures of the other amplifier circuits shown are the same as that of the amplifier AMP101.

[0114] More specifically, the circuit AMP101 includes an inverter IV, the power supply voltage of which is adjustable by a voltage regulator LDO (eg, a low dropout type).

[0115] The input of the inverter IV is connected to the corresponding generating terminal (here, terminal BG10 ) via a capacitor C, and the output of the inverter is connected to the corresponding input terminal (here, terminal BE201 ) of the corresponding mixer module.

[0116] Impedance Z is connected in parallel to the terminals of inverter IV.

[0117] The regulator LDO allows limiting variations in the supply voltage. An inverter IV associated with the regulator LDO amplifies the input signal so as to provide a sinusoidal signal with low harmonic distortion at the gate of the second transistor of the corresponding mixer stage.

[0118] The device also includes ( Figure 6 ) calibration circuit MCAL, which is connected to the control inputs EC1 to EC4 of the four mixer modules MX1 to MX4 and in this way adjusts the calibration voltage VGM as a function of the phase shift between the sine and cosine signals transmitted to the output nodes NDS10 and NDS11 and NDS20 and NDS21.

[0119] In this regard, the resistance degeneration circuits R1 to R4 allow reducing or even eliminating the static phase error in the 90° offset of the output signals SGS10, SGS11 and SGS20, SGS21 by adding a phase shift between the signals SGS10, SGS11 and the signals SGS20, SGS21 at a frequency twice the initial frequency.

[0120] The values ​​of these impedances are determined by simulation on nominal devices. However, process variations can be compensated by adjusting the calibration voltage VGM, and even in the presence of these process variations, an accuracy of approximately plus or minus 1 degree can be obtained within a 90° offset.

[0121] The measurement of the phase shift between the output signals SGS10 , SGS11 and SGS20 and SGS21 can be done in any way, for example during the production phase, by a test bench equipped with an oscilloscope or on an embedded device, for example by a demodulated test signal.

[0122] Although the present invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a restrictive sense. Various modifications and combinations of the illustrative embodiments and other embodiments of the present invention will become apparent to those skilled in the art by reference to the description. Therefore, the appended claims include any such modifications or embodiments.

Claims

1. A communication device, comprising: A signal generator having: two first generating terminals configured to generate two first sinusoidal signals offset by 180°; and two second generating terminals configured to generate two first cosine signals shifted by 180°, the first sine signal and the first cosine signal having the same initial frequency; A first mixer module includes: two first input terminals and two second input terminals, which are respectively connected to the two first generating terminals; A second mixer module includes: two first input terminals and two second input terminals, each connected to the two second generating terminals; wherein two output terminals of the first mixer module are respectively connected to two opposite output terminals of the second mixer module, thereby forming two first output nodes, wherein the two first output nodes are configured to generate two second cosine signals having a frequency twice the initial frequency and being shifted by 180°; The third mixer module includes: two first input terminals connected to the two first generating terminals respectively; and two second input terminals connected to the two second generating terminals respectively; a fourth mixer module comprising: two first input terminals connected to the two second generating terminals, respectively; and two second input terminals connected to the two first generating terminals, respectively; wherein the two output terminals of the third mixer module are respectively connected to the two same-source output terminals of the fourth mixer module, thereby forming two second output nodes, and the two second output nodes are configured to generate two second sinusoidal signals with a frequency twice the initial frequency and shifted by 180°; receive chain; and launch chain; The receiving chain and the transmitting chain are configured to receive the second sine signal and the second cosine signal from the first output node and the second output node, the second sine signal and the second cosine signal forming two components of the frequency-converted signal shifted by 90°.

2. The communication device of claim 1, configured to operate in a fifth generation (5G) frequency band. The communication device according to claim 1 , wherein the frequency conversion signal is 28 GHz.

4. The communication device according to claim 1, The signal generator comprises: a signal source configured to generate an initial signal having a sinusoidal shape, the sinusoidal shape having the initial frequency; as well as a polyphase filter connected between the output of the signal source and the first generating terminal and the second generating terminal; as well as The communication device further includes a voltage amplifying circuit connected between each second terminal of each mixer module and the corresponding generating terminal. 5 . The communication device according to claim 1 , further comprising a calibration circuit configured to adjust a calibration voltage of the mixer module according to a phase shift between the second sine signal and the second cosine signal generated at the first output node and the second output node. The communication device according to claim 1 , wherein the initial frequency is greater than or equal to 10 GHz. The communication device according to claim 6 , wherein the initial frequency is equal to 14 GHz.

8. The communication device according to claim 1 , wherein each mixer module comprises: a voltage / current transconductance stage including a first transistor; as well as A mixing stage connected to the voltage / current transconductance stage, the mixing stage comprising: a second transistor; a resistance degradation circuit connected to the source of the second transistor; and A calibration input is connected to the gate of the second transistor and is configured to receive an adjustable calibration voltage, wherein the source of the first transistor is directly connected to a cold power supply point. 9 . The communication device of claim 8 , wherein the transconductance stage further comprises a current amplifier block connected between the gate and drain of the first transistor.

10. The communication device according to claim 8, The transconductance stage further includes a first input interface, and the first input interface includes: Two first input terminals are connected to the gates of the two first transistors respectively; as well as wherein the mixing stage further comprises: The second input interface comprises: two second input terminals, each connected to the gates of the two pairs of second transistors; and The output interface includes two output terminals, each of which is connected to two second transistors belonging to two different pairs.

11. The communication device according to claim 10, wherein the two first input terminals are configured to respectively receive two first signals having a sinusoidal shape offset by 180°, wherein the two second input terminals are configured to respectively receive two second signals having a sinusoidal shape offset by 180°, and wherein the two second signals are identical to the two first signals or are offset by 90° relative to the two first signals.

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