A power harmonic treatment method and a single-phase full-bridge combined active power filter

Abstract

The present application relates to the technical field of active power filter, and provides a power harmonic treatment method and a single-phase full-bridge combined active power filter, the method comprising: acquiring a grid voltage, an actual DC bus voltage, a load current and an actual compensation current injected into the grid by the active power filter; calculating a target compensation current in real time according to the grid voltage, the actual DC bus voltage, the load current and the actual compensation current; calculating a control quantity of a DC bus voltage outer loop and a reference quantity of a current inner loop control through a system closed-loop control algorithm; calculating a sinusoidal pulse width modulation instruction signal through the system closed-loop control algorithm; and controlling the active power filter to inject the target compensation current into the grid according to the instruction signal. The present application injects the target compensation current into the grid to offset the harmonic current generated by a nonlinear load, so that the grid current remains a sinusoidal wave and prevents harmonic pollution of the grid.

Description

Technical Field

[0001] This invention relates to the field of active power filter technology, and more particularly to a method for controlling power harmonics and a single-phase full-bridge combined active power filter. Background Technology

[0002] The hazards of power grid harmonics are becoming increasingly serious, making the solution to harmonic pollution in the power grid an urgent matter. Currently, there are two main approaches to harmonic mitigation: proactive measures, which start with the equipment itself, employing new circuit topologies and tracking control strategies to prevent or reduce harmonic generation; and passive measures, which involve installing harmonic compensation devices to compensate for harmonic sources. Proactive measures mainly include: multi-pulse rectification technology, pulse width modulation (PWM) technology, multiplexing technology, and multi-level technology. Passive measures mainly include: passive filtering technology, active filtering technology, and hybrid filtering technology.

[0003] Active mitigation measures can fundamentally eliminate the root cause of harmonic generation, i.e., reduce the number of harmonic sources, with significant effects. However, this approach only achieves ideal results when the harmonic source is a power electronic device, and it is also costly and inefficient. Due to these inherent drawbacks, passive mitigation measures are currently the primary approach used in practical applications.

[0004] Traditional passive compensation methods in passive governance measures can only compensate for harmonics of fixed frequencies, which is not very flexible. The passive devices used in filters are prone to parallel resonance with power lines, which can amplify harmonics, overload and damage the passive filters, and endanger the stable operation of the power system. The compensation characteristics are easily affected by grid impedance, environmental factors and operating conditions, resulting in unstable effects. Summary of the Invention

[0005] The purpose of this invention is to solve at least one technical problem in the background art and to provide a power harmonic mitigation method and a single-phase full-bridge combined active power filter. This invention overcomes the defects of traditional passive compensation methods by injecting a target compensation current into the power grid through an active power filter to offset the harmonic current generated by nonlinear loads, so that the power grid current remains sinusoidal, thereby preventing harmonic pollution of the power grid.

[0006] To achieve the above objectives, this invention provides a power harmonic mitigation method applied to a single-phase full-bridge combined active power filter, wherein the active power filter is connected in parallel between a nonlinear load and the power grid. The method includes the following steps:

[0007] Obtain the grid voltage, actual DC bus voltage, load current, and the actual compensation current injected into the grid by the active power filter;

[0008] The target compensation current is calculated in real time based on the grid voltage, the actual DC bus voltage, the load current, and the actual compensation current.

[0009] Based on the actual DC bus voltage, the target DC bus voltage, and the target compensation current, the control quantity of the outer loop of the DC bus voltage and the reference quantity of the inner loop of the current are calculated by the system closed-loop control algorithm.

[0010] Based on the reference quantity of the current inner loop control and the actual compensation current, the sinusoidal pulse width modulation command signal is calculated by the system closed-loop control algorithm.

[0011] The active power filter is controlled to inject the target compensation current into the power grid according to the instruction signal.

[0012] Furthermore, the target compensation current is calculated in real time, including: calculating the load harmonic current based on the dq transformation method of instantaneous reactive power theory, and obtaining the target compensation current by reversing the polarity of the load harmonic current.

[0013] The process of calculating the load harmonic current is as follows:

[0014] Based on the dq coordinate transformation, the active component i is obtained. d The calculation formula is as follows:

[0015]

[0016] Among them, i q For reactive components, i d Active component, i0 is the zero-sequence current, θ is the phase of the grid voltage, i a i b i c The three-phase current is the load current.

[0017] The active component i d The input is a fourth-order section IIR filter formed by cascading two second-order section filters, which filters out the active component i. d Components other than the fundamental frequency; the calculation formula is as follows:

[0018]

[0019] Where, x t Let x be the input signal value at time t of the first-stage second-order section filter. t-1 Let x be the input signal value at time t-1 of the first-stage second-order section filter. t-2 Let y be the input signal value at time t-2 of the first-stage second-order section filter. t Let y be the output signal value of the first-stage second-order section filter at time t.t-1 Let y be the output signal value of the first-stage second-order section filter at time t-1. t-2 Let z be the output signal value of the first-stage second-order section filter at time t-2. t Let z be the output signal value of the second-order section filter at time t. t-1 The output signal value z of the second-order section filter at time t-1 is... t-2 This represents the output signal value of the second-order section filter at time t-2, where t is a positive integer.

[0020] The output value of the fourth-order IIR filter is the active component i. d The fundamental frequency component;

[0021] Subtract the active component i from the load current d The fundamental component is used to obtain the load harmonic current.

[0022] Furthermore, the system closed-loop control algorithm includes: a DC bus voltage loop anti-integral saturation PI control algorithm;

[0023] Based on the deviation between the actual DC bus voltage and the target DC bus voltage, the control quantity of the outer loop of the DC bus voltage is calculated using the DC bus voltage loop anti-integral saturation PI control algorithm.

[0024] The reference value for the inner current control is obtained by adding the control value of the outer loop of the DC bus voltage to the target compensation current.

[0025] The calculation formula for the DC bus voltage loop anti-integral saturation PI control algorithm is as follows:

[0026]

[0027]

[0028] Where u(n) represents the calculation result of the PI controller at the nth sampling time; K p The scaling factor is denoted by e(n), which represents the input deviation value at the nth sampling time. n (n) represents the sum of the integrals accumulated at the nth sampling time; I n (n-1) represents the sum of the integrals from the previous time step; K i K is the integral coefficient; sat To prevent saturation; e pi To prevent the algorithm's output from saturating; u s The control input to prevent integral saturation in the algorithm; u max u min These are the maximum and minimum values ​​output by the configured PI controller, respectively.

[0029] Furthermore, the system closed-loop control algorithm includes: a compensation current loop PR control algorithm; and a sinusoidal pulse width modulation command signal is calculated through the compensation current loop PR control algorithm.

[0030] The calculation formula for the compensation current loop PR control algorithm is as follows:

[0031] y(k)=b0u(k)+b1u(k-1)+b2u(k-2)-a1y(k-1)-a2y(k-2) (11)

[0032] In the formula, y(k) is the output of the PR controller at the k-th sampling time; u(k) is the input of the PR controller at the k-th sampling time; u(k-1) is the input of the PR controller at the (k-1)-th sampling time; u(k-2) is the input of the PR controller at the (k-2)-th sampling time; y(k-1) is the output of the PR controller at the (k-1)-th sampling time; and y(k-2) is the output of the PR controller at the (k-2)-th sampling time.

[0033] Where b0, b1, and b2 are the first forward coefficient, the second forward coefficient, and the third forward coefficient, respectively; a1 and a2 are the first feedback coefficient and the second feedback coefficient, respectively; the expressions for each coefficient are shown below:

[0034]

[0035] Among them, K p K is the proportionality coefficient. i ω is the integral coefficient. i ω is the resonant angular frequency. c T is the cutoff frequency. s C is the sampling period, and C is an intermediate parameter.

[0036] To achieve the above objectives, the present invention also provides a single-phase full-bridge combined active power filter for implementing any of the power harmonic mitigation methods described above. The active power filter includes: a filter module, a main power module, a sampling and conditioning module, an auxiliary control module, and a digital controller module.

[0037] The sampling and conditioning module is used to sample and acquire the grid voltage, actual DC bus voltage, load current and the actual compensation current injected into the grid by the active power filter, and to preprocess the collected data and send it to the digital controller module.

[0038] The digital controller module is used to calculate the target compensation current in real time based on the grid voltage, the actual DC bus voltage, the load current and the actual compensation current;

[0039] The digital controller module is also used to calculate the control quantity of the outer loop of the DC bus voltage and the reference quantity of the inner loop of the current control based on the actual DC bus voltage, the target DC bus voltage and the target compensation current through the system closed-loop control algorithm; and to calculate the sinusoidal pulse width modulation command signal based on the reference quantity of the inner loop control of the current and the actual compensation current through the system closed-loop control algorithm.

[0040] The auxiliary control module is used to control the main power module according to the command signal, and the main power module injects the target compensation current into the power grid through the filter module.

[0041] Furthermore, the main power module comprises a three-phase four-wire system consisting of three completely independent single-phase full-bridge topologies.

[0042] Furthermore, the sampling and conditioning module is also used to collect the temperature of the active power filter and preprocess the temperature of the active power filter before sending it to the digital controller module;

[0043] The auxiliary control module includes a drive circuit for power switching devices, a hardware protection circuit, and a relay and fan drive circuit; the auxiliary control module is also used to control the state of the relay and fan, and the state of the hardware protection circuit, according to the control signals sent by the digital controller module.

[0044] Furthermore, the digital controller module includes at least one of the following processors: CPU processor, DSP processor, or FPGA processor.

[0045] This invention calculates the target compensation current using a closed-loop control algorithm and injects it into the power grid through a unidirectional full-bridge combined active power filter to counteract harmonic currents generated by nonlinear loads, maintaining the grid current as a sine wave and preventing harmonic pollution of the power grid. In the unidirectional full-bridge combined active power filter of this invention, the control of the three single phases is independent and does not interfere with each other, greatly simplifying the complexity of the control algorithm. Simultaneously, the miniaturized design allows for local compensation and distributed deployment of the unidirectional full-bridge combined active power filter. This invention improves the PI control algorithm, effectively preventing data overflow and improving the algorithm's accuracy. Attached Figure Description

[0046] Figure 1 This diagram illustrates a power harmonic mitigation method according to one embodiment of the present invention.

[0047] Figure 2 A schematic diagram illustrating the algorithm flowchart for calculating load harmonic current using the dq transformation method based on instantaneous reactive power theory;

[0048] Figure 3 A schematic diagram illustrating the algorithm flowchart of the DC bus voltage loop anti-integral saturation PI control algorithm;

[0049] Figure 4 The schematic diagram illustrates the structure of a single-phase full-bridge combined active power filter according to an embodiment of the present invention.

[0050] Figure 5 A schematic diagram illustrating the topology of a main power module according to an embodiment of the present invention;

[0051] Figure 6 The diagram illustrates the uncompensated three-phase grid voltage and current waveforms obtained through simulation.

[0052] Figure 7 The diagram illustrates the voltage and current waveforms of a three-phase power grid after compensation using the single-phase full-bridge combined active power filter of this invention, obtained through simulation.

[0053] Figure 8 The diagram illustrates a comparison of the THD content in the three-phase current before and after compensation using the single-phase full-bridge combined active power filter of this invention, obtained through simulation. Detailed Implementation

[0054] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0055] The invention will now be discussed with reference to exemplary embodiments. It should be understood that the described embodiments are merely intended to enable those skilled in the art to better understand and thus implement the invention, and are not intended to imply any limitation on the scope of the invention.

[0056] As used herein, the term "comprising" and its variations are to be interpreted as open-ended terms meaning "including but not limited to". The term "based on" is to be interpreted as "at least partially based on". The terms "one embodiment" and "an embodiment" are to be interpreted as "at least one embodiment".

[0057] Example 1

[0058] Figure 1 This diagram schematically illustrates a power harmonic mitigation method according to one embodiment of the present invention. Figure 1As shown, according to one embodiment of the present invention, a power harmonic mitigation method is applied to a single-phase full-bridge combined active power filter, wherein the active power filter is connected in parallel between a nonlinear load and the power grid, and the method includes the following steps:

[0059] S10: Obtain the grid voltage, actual DC bus voltage, load current, and actual compensation current injected into the grid by the active power filter;

[0060] S20: The target compensation current is calculated in real time based on the grid voltage, the actual DC bus voltage, the load current and the compensation current;

[0061] S30: Based on the actual DC bus voltage, the target DC bus voltage, and the target compensation current, the control quantity of the outer loop of the DC bus voltage and the reference quantity of the inner loop of the current are calculated through the system closed-loop control algorithm.

[0062] Based on the reference quantity of the current inner loop control and the actual compensation current, the sinusoidal pulse width modulation command signal is calculated through the system closed loop control algorithm.

[0063] S40: Controls the active power filter to inject the target compensation current into the power grid according to the command signal.

[0064] In this embodiment, the grid voltage, actual DC bus voltage, load current, and actual compensation current injected into the grid by the active power filter are acquired, and the target compensation current is calculated based on the acquired data. The control quantity of the outer loop of the DC bus voltage is calculated based on the actual DC bus voltage and the target DC bus voltage. The control quantity of the outer loop of the DC bus voltage is added to the target compensation current to calculate the reference quantity of the inner loop current control. Based on the reference quantity of the inner loop current control and the actual compensation current, a sinusoidal pulse width modulation command signal is calculated through the system closed-loop control algorithm. The active power filter is controlled to inject the target compensation current into the grid according to the command signal.

[0065] According to one embodiment of the present invention, the target compensation current is calculated in real time, including: calculating the load harmonic current based on the dq transformation method of instantaneous reactive power theory, and obtaining the target compensation current by reversing the polarity of the load harmonic current.

[0066] Figure 2 A schematic diagram illustrating the algorithm flowchart for calculating load harmonic current using the dq transformation method based on instantaneous reactive power theory, as shown below. Figure 2 As shown, the process of calculating the load harmonic current is as follows:

[0067] Based on the dq coordinate transformation, the active component i is obtained. d The calculation formula is as follows:

[0068]

[0069] Among them, i q For reactive components, i d Active component, i0 is the zero-sequence current, θ is the phase of the grid voltage, i a i b i c The three-phase current is the load current.

[0070] The active component i d The input is a fourth-order section IIR filter formed by cascading two second-order section filters, which filters out the active component i. d Components other than the fundamental frequency; the calculation formula is as follows:

[0071]

[0072] Where, x t Let x be the input signal value at time t of the first-stage second-order section filter. t-1 Let x be the input signal value at time t-1 of the first-stage second-order section filter. t-2 Let y be the input signal value at time t-2 of the first-stage second-order section filter. t Let y be the output signal value of the first-stage second-order section filter at time t. t-1 Let y be the output signal value of the first-stage second-order section filter at time t-1. t-2 Let z be the output signal value of the first-stage second-order section filter at time t-2. t Let z be the output signal value of the second-order section filter at time t. t-1 The output signal value z of the second-order section filter at time t-1 is... t-2 This represents the output signal value of the second-order section filter at time t-2, where t is a positive integer.

[0073] The output value of a 4th-order IIR filter is the active component i. d The fundamental frequency component;

[0074] Subtract the active component i from the load current d The fundamental component is used to obtain the load harmonic current.

[0075] In this embodiment, the collected three-phase current i is transformed using the dq transformation matrix. a i b i c And the grid voltage phase θ obtained from the digital phase-locked loop is decomposed into active component i. d reactive component i q And the zero-sequence current i0. The active component i at this time... dThis includes not only the fundamental active component required by the algorithm, but also the active components of each harmonic. Therefore, a low-pass filter needs to be designed to filter out components other than the fundamental. Since FIR filters consume significant resources, IIR filters are generally used in embedded systems. This embodiment designs a fourth-order section IIR filter formed by cascading two second-order section filters to filter out the active component i. d The input is filtered by a 4th-order section IIR filter, and the output value of the 4th-order section IIR filter is the active component i. d The fundamental frequency component is calculated by subtracting the active component i from the load current. d The fundamental component is used to obtain the harmonic components in the load current, i.e., the load harmonic current. The target compensation current is obtained by reversing the polarity of the load harmonic current. By injecting the target compensation current into the power grid, the load harmonic current generated by the nonlinear load is offset, so that the power grid current is kept as a sine wave, thereby preventing harmonic pollution of the power grid.

[0076] According to one embodiment of the present invention, the system closed-loop control algorithm includes: a DC bus voltage loop anti-integral saturation PI control algorithm;

[0077] Based on the deviation between the actual DC bus voltage and the target DC bus voltage, the control quantity of the outer loop of the DC bus voltage is calculated using the DC bus voltage loop anti-integral saturation PI control algorithm.

[0078] The reference value for the inner current control is obtained by adding the target compensation current to the control value of the outer loop of DC bus voltage.

[0079] Figure 3 This is a schematic diagram illustrating the algorithm flowchart of the DC bus voltage loop anti-integral saturation PI control algorithm. (Example:) Figure 3 As shown, the calculation formula for the DC bus voltage loop anti-integral saturation PI control algorithm is as follows:

[0080]

[0081]

[0082] Where u(n) represents the calculation result of the PI controller at the nth sampling time; K p The scaling factor is denoted by e(n), which represents the input deviation value at the nth sampling time. n (n) represents the sum of the integrals accumulated at the nth sampling time; I n (n-1) represents the sum of the integrals from the previous time step; K i K is the integral coefficient; sat To prevent saturation; e pi To prevent the algorithm's output from saturating; u s The control input to prevent integral saturation in the algorithm; u max umin These are the maximum and minimum values ​​output by the configured PI controller, respectively.

[0083] In this embodiment, the difference between the actual DC bus voltage and the target DC bus voltage is calculated to obtain the deviation value of the DC bus voltage. Then, the control quantity of the outer loop of the DC bus voltage is calculated by the DC bus voltage loop anti-integral saturation PI control algorithm. The DC power supply system is adjusted according to the control quantity of the outer loop of the DC bus voltage to keep the DC bus voltage near the reference value. By adopting the DC bus voltage loop anti-integral saturation PI control algorithm, voltage fluctuations can be effectively suppressed, preventing damage to power equipment and systems caused by voltage instability.

[0084] In DSP digital control systems, the output value of the PI controller may overflow as the integral term accumulates. Once overflow occurs, the PI controller's output value will change abruptly, causing irreparable damage to the system. Therefore, to prevent PI controller output value overflow, an anti-integral saturation algorithm is added. This invention employs an improved PI control algorithm, which effectively prevents data overflow and improves the algorithm's accuracy.

[0085] According to one embodiment of the present invention, the system closed-loop control algorithm includes: a compensation current loop PR control algorithm; and a sinusoidal pulse width modulation command signal is calculated by the compensation current loop PR control algorithm.

[0086] The calculation formula for the compensation current loop PR control algorithm is as follows:

[0087] y(k)=b0u(k)+b1u(k-1)+b2u(k-2)-a1y(k-1)-a2y(k-2) (11)

[0088] In the formula, y(k) is the output of the PR controller at the k-th sampling time; u(k) is the input of the PR controller at the k-th sampling time; u(k-1) is the input of the PR controller at the (k-1)-th sampling time; u(k-2) is the input of the PR controller at the (k-2)-th sampling time; y(k-1) is the output of the PR controller at the (k-1)-th sampling time; and y(k-2) is the output of the PR controller at the (k-2)-th sampling time.

[0089] Where b0, b1, and b2 are the first forward coefficient, the second forward coefficient, and the third forward coefficient, respectively; a1 and a2 are the first feedback coefficient and the second feedback coefficient, respectively; the expressions for each coefficient are shown below:

[0090]

[0091] Among them, K p K is the proportionality coefficient. i ω is the integral coefficient.i ω is the resonant angular frequency. c T is the cutoff frequency. s C is the sampling period, and C is an intermediate parameter.

[0092] In this embodiment, the compensation current loop employs multiple parallel proportional resonant (PR) controllers to track sinusoidal signal components of different frequencies, achieving zero-error tracking. The control quantity of the outer loop of the DC bus voltage is added to the target compensation current to obtain the reference quantity for the inner current loop control. The difference between the reference quantity of the inner current loop control and the actual compensation current is input to the PR controller. The compensation current loop PR control algorithm is used to calculate the sinusoidal pulse width modulation command signal. Based on the command signal, the active power filter is controlled to inject the target compensation current into the power grid.

[0093] Figure 4 This diagram schematically illustrates the structure of a single-phase full-bridge combined active power filter according to an embodiment of the present invention. Figure 4 As shown, according to one embodiment of the present invention, a single-phase full-bridge combined active power filter is used to implement the power harmonic control method described above. The single-phase full-bridge combined active power filter includes: a filter module, a main power module, a sampling and conditioning module, an auxiliary control module, and a digital controller module.

[0094] The sampling and conditioning module is used to sample and acquire the grid voltage, actual DC bus voltage, load current, and actual compensation current injected into the grid by the single-phase full-bridge combined active power filter, and to preprocess the collected data before sending it to the digital controller module.

[0095] The digital controller module is used to calculate the target compensation current in real time based on the grid voltage, actual DC bus voltage, load current and actual compensation current;

[0096] The digital controller module is also used to calculate the control quantity of the outer loop of DC bus voltage and the reference quantity of the inner loop of current control based on the actual DC bus voltage, the target DC bus voltage and the target compensation current through the system closed-loop control algorithm; and to calculate the sinusoidal pulse width modulation command signal based on the reference quantity of the inner loop of current control and the actual compensation current through the system closed-loop control algorithm.

[0097] The auxiliary control module controls the main power module according to the command signal, and the main power module injects the target compensation current into the power grid through the filter module.

[0098] In this embodiment, the single-phase full-bridge combined active power filter includes: a filter module, a main power module, a sampling and conditioning module, an auxiliary control module, and a digital controller module. One end of the filter module is connected between the nonlinear load and the power grid, and the other end is connected to the main power module. The sampling and conditioning module samples the grid voltage, the actual DC bus voltage of the main power module, the actual compensation current injected into the grid through the filter module, and the load current. The sampling and conditioning module preprocesses the collected data by sampling, quantizing, and encoding the data, converting the analog sampled signal into an electrical signal that the control system can recognize and sending it to the digital controller module. The digital controller used in the module includes, but is not limited to, embedded processors such as CPU, DSP, and FPGA. The digital controller module calculates the harmonic components in the load current in real time based on the grid voltage, the actual DC bus voltage, the load current, and the actual compensation current to obtain the load harmonic current. After reversing the polarity of the load harmonic current, the target compensation current is obtained. At the same time, the digital controller module uses a system closed-loop control algorithm to calculate the sinusoidal pulse width modulation command signal. The digital controller module sends the command signal to the auxiliary control module, which controls the main power module according to the command signal. The main power module injects the target compensation current into the grid through the filter module.

[0099] Figure 5 This schematic diagram illustrates the topology of a main power module according to one embodiment of the present invention. Figure 5 As shown, according to one embodiment of the present invention, the main power module includes a three-phase four-wire system consisting of three completely independent single-phase full-bridge topologies.

[0100] In this embodiment, the main power module includes a three-phase four-wire system composed of three completely independent single-phase full-bridge topologies. The three unidirectional controls are independent of each other and do not interfere with each other, which greatly simplifies the complexity of the control algorithm.

[0101] According to one embodiment of the present invention, the sampling and conditioning module is further used to acquire the temperature of the active power filter and preprocess the temperature of the active power filter and send it to the digital controller module;

[0102] The auxiliary control module includes drive circuits for power switching devices, hardware protection circuits, and relay and fan drive circuits; the auxiliary control module is also used to control the state of the relays and fans, and the state of the hardware protection circuits according to the control signals sent by the digital controller module.

[0103] In this embodiment, the temperature of the active power filter is collected by the sampling and conditioning module. The collected temperature data is preprocessed and sent to the digital controller module. The digital controller module combines the collected data and sends control signals to the auxiliary control module. The auxiliary control module controls the working status of the grid-connected relay and fan, and the opening and closing of overcurrent and overtemperature protection to ensure that the system can stably output compensation current and take corresponding protection measures in case of system abnormality.

[0104] This invention calculates the target compensation current using a closed-loop control algorithm and injects it into the power grid through a unidirectional full-bridge combined active power filter to counteract harmonic currents generated by nonlinear loads, maintaining the grid current as a sine wave and preventing harmonic pollution of the power grid. In the unidirectional full-bridge combined active power filter of this invention, the control of the three single phases is independent and does not interfere with each other, greatly simplifying the complexity of the control algorithm. Simultaneously, the miniaturized design allows for local compensation and distributed deployment of the unidirectional full-bridge combined active power filter. This invention improves the PI control algorithm, effectively preventing data overflow and improving the algorithm's accuracy.

[0105] Example 2

[0106] According to one embodiment of the present invention, a single-phase full-bridge combined active power filter includes a main power module, a filter module, an auxiliary control module, a sampling and conditioning module, and a digital controller module.

[0107] The filter module can be either a commonly used L-type (single inductor) filter or an LCL-type filter. The L-type filter is a first-order element, simple in structure, and easy to stabilize, but it has poor suppression of current ripple and often requires a large filter inductance value. Preferably, this embodiment uses an LCL-type filter, whose hardware structure includes three energy storage elements. The input-output transfer function is a third-order system. The LCL filter attenuates significantly faster in the high-frequency range, achieving greater harmonic current attenuation in the high-frequency band.

[0108] The main power module comprises a three-phase four-wire system composed of three completely independent single-phase full-bridge topologies. The topology is simple, the control algorithms for each phase are independent and do not interfere with each other, the control algorithms are easy to implement, and it can also compensate for three-phase voltage imbalance without adding extra control programs.

[0109] The sampling and conditioning module includes an ADC DC bus voltage sampling unit, an ADC grid voltage and current sampling unit, a temperature sampling unit, and an amplitude conditioning unit. The sampling and conditioning module preprocesses the analog sampled signals, such as voltage or current signals, of the system, converting the controllable quantity into an electrical signal that the control system can recognize and send it into the digital controller module.

[0110] The auxiliary control module includes a drive circuit unit and a protection circuit unit. The drive circuit unit includes drive circuits for power switching devices and relay and fan drive circuits. The protection circuit unit includes hardware protection circuits. The auxiliary control module is used to ensure that the system can stably output compensation current and to take corresponding protective measures in the event of system abnormalities.

[0111] The digital controller module controls the operating status of grid-connected relays and fans, and enables and disables overcurrent and overtemperature protection. It controls the sampling and conditioning module to sample grid voltage, load current, compensation current, and DC bus voltage. Based on the data obtained from the sampling and conditioning module, it calculates the harmonic components in the load current in real time and generates SPWM drive signals through a system closed-loop control algorithm. The digital controller module includes, but is not limited to, embedded processors such as CPUs, DSPs, and FPGAs. In this embodiment, a floating-point DSP embedded processor is selected as the digital controller module.

[0112] like Figure 4 As shown, in this embodiment, a unidirectional full-bridge combined active power filter is connected in parallel between the nonlinear load and the power grid, and the main power module is connected to the power grid through the filter module. On one hand, the filter module filters the signal transmitted from the power grid to the main power module; on the other hand, the target compensation current transmitted from the main power module to the power grid is injected into the power grid through the filter module. The sampling and conditioning module collects the power grid voltage, the actual DC bus voltage, the load current, and the actual compensation current injected into the power grid by the unidirectional full-bridge combined active power filter. The sampling and conditioning module preprocesses the collected signals, converting the controllable quantity into an electrical signal that the control system can recognize and sending it to the digital controller module. The digital controller module includes a DC voltage controller unit, a current controller unit, an SPWM modulation unit, a harmonic current dq method detection unit, and a digital phase-locked loop unit. The digital controller module calculates the harmonic components in the load current in real time, i.e., the load harmonic current. The specific process is as follows:

[0113] The algorithm for real-time calculation of harmonic components in load current is based on the dq transform method of instantaneous reactive power theory. The specific implementation process of this algorithm is as follows: the sampled three-phase current i... a i b i c The grid voltage phase θ obtained from the phase-locked loop is decomposed into active components i by the dq transformation matrix shown in equation (1). d reactive component i q And zero-sequence current i0.

[0114]

[0115] The active component i at this time dIt includes not only the fundamental active component required by the algorithm, but also the active components of each harmonic, so a low-pass filter needs to be designed to filter out the components other than the fundamental. Since FIR filters consume a lot of resources, IIR filters are generally used in embedded systems. In this embodiment, a fourth-order section IIR filter is designed, and the difference equation of the cascaded implementation of two second-order section filters shown in equation (2) is derived.

[0116]

[0117] In equation (2), x t Let x be the input signal value at time t of the first-stage second-order section filter. t-1 Let x be the input signal value at time t-1 of the first-stage second-order section filter. t-2 Let y be the input signal value at time t-2 of the first-stage second-order section filter. t Let y be the output signal value of the first-stage second-order section filter at time t. t-1 Let y be the output signal value of the first-stage second-order section filter at time t-1. t-2 Let z be the output signal value of the first-stage second-order section filter at time t-2. t Let z be the output signal value of the second-order section filter at time t. t-1 The output signal value z of the second-order section filter at time t-1 is... t-2 Let t be the output signal value of the second-order section filter at time t-2, where t is a positive integer.

[0118] Based on the above analysis and design results of the dq detection method based on instantaneous reactive power theory, the following is obtained: Figure 2 The algorithm flowchart is shown.

[0119] The system closed-loop control algorithm includes a DC bus voltage loop anti-integral saturation PI control algorithm and a compensation current loop PR control algorithm.

[0120] In this embodiment, the DC bus voltage loop PI controller in the closed-loop control algorithm is a linear controller. It constructs a control deviation e(t) based on the given value r(t) and the actual output value c(t). Then, the proportional (P) and integral (I) of this control deviation are linearly combined to form a control quantity, which is applied to the controlled object for control. Its control law is as follows:

[0121]

[0122] In equation (3), u(t) is the output of the PI controller, e(t) is the input of the PI controller, and K p T is the proportionality coefficient. i is the integration time constant.

[0123] The DSP digital controller in this embodiment uses a digital sampling control method, which requires calculating the control quantity based on the deviation value at each sampling time. Therefore, the above formula needs to be discretized, using a series of sampling time points to represent continuous time. The discretized PI control algorithm expression is as follows:

[0124]

[0125] Where n = 0, 1, 2, ... represents the sampling sequence, u(n) represents the output value of the PI controller at the nth sampling time, e(n) represents the input deviation value at the nth sampling time, and e(j) represents the input deviation value at the jth sampling time, j = 0, 1, 2, ..., n, T s K represents the sampling period. p K is the proportionality coefficient. i T is the integral coefficient. i is the integration time constant.

[0126] Furthermore, in DSP digital control systems, the output value of the PI controller may overflow as the integral term accumulates. Once overflow occurs, the PI controller's output value will change abruptly, causing irreparable damage to the system. Therefore, to prevent PI controller output value overflow, an anti-integral saturation algorithm is added. The improved PI control algorithm expression is:

[0127]

[0128] In equation (5),

[0129]

[0130] In the formula, e pi u represents the output of the algorithm to prevent integral saturation. s Let u(n) represent the control quantity of the anti-integral saturation algorithm, u(n) represent the calculation result of the PI controller at the nth sampling time, e(n) represent the input deviation value at the nth sampling time, and K represent the control quantity of the anti-integral saturation algorithm. sat I represents the anti-saturation coefficient. n (n) represents the sum of the integrals accumulated at the nth sampling time, I n (n-1) represents the sum of the integrals from the previous time step, u max u min These represent the maximum and minimum values ​​of the PI controller output, respectively. Users can set the maximum and minimum values ​​of the PI controller output according to the actual situation of the control system. Using this PI algorithm, the controller output can be limited to the required range, ensuring that the PI controller does not experience data overflow.

[0131] In this embodiment, the digital controller module uses an improved PI control algorithm to control the DC bus voltage near the reference value, thereby improving the system's stability.

[0132] The compensation current loop employs multiple parallel proportional resonant (PR) controllers to track sinusoidal signal components of different frequencies, achieving zero-error tracking. Its S-domain transfer function is shown below:

[0133]

[0134] In the formula, K p K is the proportionality coefficient. i ω is the integral coefficient. i ω is the resonant angular frequency. c This is the cutoff frequency.

[0135] Equation (7) represents the control law of the PR controller in the time domain, which cannot be directly applied to the DSP digital controller and needs to be discretized. In this embodiment, the compensation current signal contains multiple high-frequency harmonic components, so the pre-corrected Tustin transform of Equation (8) is used to discretize the PR controller:

[0136]

[0137] In the formula, ω is the resonant frequency that needs to be corrected; T s The sampling period is ω / tan(T). Compared to the ordinary Tustin transform, this is achieved by using a correction coefficient ω / tan(T). s / 2) replaced the original coefficient 2 / T s This ensures that the controller amplitude is equal at the resonant frequency ω. Substituting equation (8) into equation (7) yields the Z-domain transfer function expression of the PR controller:

[0138]

[0139] In equation (9), b0, b1, and b2 are the first forward coefficient, the second forward coefficient, and the third forward coefficient, respectively; a1 and a2 are the first feedback coefficient and the second feedback coefficient, respectively; the expressions for each coefficient are shown below:

[0140]

[0141] Equation (10) can be transformed into the difference equation form required for a digital control system, and its expression is as follows:

[0142] y(k)=b0u(k)+b1u(k-1)+b2u(k-2)-a1y(k-1)-a2y(k-2) (11)

[0143] In the formula, y(k) is the output of the PR controller; u(k) is the input of the PR controller.

[0144] Figure 6 The schematic diagram shows the uncompensated three-phase grid voltage and current waveforms obtained through simulation. It can be seen that there is a large distortion phenomenon in all three phase currents.

[0145] Figure 7 This schematically illustrates the three-phase grid voltage and current waveforms after compensation using the single-phase full-bridge combined active power filter of this invention, obtained through simulation. Figure 6 The comparison shows that the three-phase current waveform has been significantly improved and is close to the standard sine wave.

[0146] Figure 8 The diagram illustrates the comparison of THD content in the three-phase current before and after compensation using the single-phase full-bridge combined active power filter of this invention, obtained through simulation. It can be seen that the THD content of the three-phase grid current decreased from about 22% before compensation to about 5%, and the compensation effect is very obvious.

[0147] This invention provides a single-phase full-bridge combined active power filter and its control method. It uses three single-phase full-bridge filters combined into a three-phase four-wire compensation system. The main power circuit topology is simple, and the control algorithms for each phase are independent and do not interfere with each other, greatly simplifying the complexity of the control algorithm. Simultaneously, it can compensate for three-phase voltage imbalance systems without adding extra control programs. Furthermore, the miniaturized design allows the single-phase full-bridge active power filter to achieve local compensation and distributed deployment.

[0148] The above are merely preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

[0149] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for controlling power harmonics, applied to a single-phase full-bridge combined active power filter, wherein the active power filter is connected in parallel between a nonlinear load and the power grid, characterized in that, The method includes the following steps: Obtain the grid voltage, actual DC bus voltage, load current, and the actual compensation current injected into the grid by the active power filter; The target compensation current is calculated in real time based on the grid voltage, the actual DC bus voltage, the load current, and the actual compensation current. Based on the actual DC bus voltage, the target DC bus voltage, and the target compensation current, the control quantity of the outer loop of the DC bus voltage and the reference quantity of the inner loop of the current are calculated by the system closed-loop control algorithm. Based on the reference quantity of the current inner loop control and the actual compensation current, the sinusoidal pulse width modulation command signal is calculated by the system closed-loop control algorithm. The active power filter is controlled to inject the target compensation current into the power grid according to the instruction signal; The target compensation current is calculated in real time, including: calculating the load harmonic current based on the dq transformation method of instantaneous reactive power theory, and obtaining the target compensation current by reversing the polarity of the load harmonic current. The process of calculating the load harmonic current is as follows: The active component is obtained based on the dq coordinate transformation. i d The calculation formula is as follows: ； in, i q For reactive components, i d Merit weight, i 0 represents zero-sequence current. θ The phase of the grid voltage. i a , i b , i c The three-phase current is the load current. The active component i d The input is a fourth-order section IIR filter formed by cascading two second-order section filters, which filters out the active component. i d Components other than the fundamental frequency; the calculation formula is as follows: ； in, x t The input signal value at time t is the first-stage second-order section filter. x t-1 The input signal value at time t-1 is the first-stage second-order section filter. x t-2 The input signal value at time t-2 is the first-stage second-order section filter. y t The output signal value at time t is the first-stage second-order section filter. y t-1 The output signal value of the first-stage second-order section filter at time t-1. y t-2 The output signal value of the first-stage second-order section filter at time t-2. z t The output signal value at time t is the second-order section filter of the second stage. z t-1 The output signal value of the second-order section filter at time t-1. z t-2 This represents the output signal value of the second-order section filter at time t-2, where t is a positive integer. The output value of the fourth-order IIR filter is the active component. i d The fundamental frequency component; Subtract the active component from the load current. i d The fundamental component is used to obtain the load harmonic current.

2. The power harmonic mitigation method according to claim 1, characterized in that, The system closed-loop control algorithm includes: DC bus voltage loop anti-integral saturation PI control algorithm; Based on the deviation between the actual DC bus voltage and the target DC bus voltage, the control quantity of the outer loop of the DC bus voltage is calculated using the DC bus voltage loop anti-integral saturation PI control algorithm. The reference value for the inner current control is obtained by adding the control value of the outer loop of the DC bus voltage to the target compensation current. The calculation formula for the DC bus voltage loop anti-integral saturation PI control algorithm is as follows: ； ； in, u (n) represents the calculation result of the PI controller at the nth sampling time; K p This is the proportionality coefficient; e (n) represents the deviation value input at the nth sampling time; I n (n) represents the sum of the integrals accumulated at the nth sampling time; I n (n-1) represents the sum of the integrals from the previous time step; K i The integral coefficient; K sat To prevent saturation coefficient; e pi To prevent the algorithm's output from saturating; u s To prevent integral saturation in the algorithm; u max , u min These are the maximum and minimum values ​​output by the configured PI controller, respectively.

3. The power harmonic mitigation method according to claim 2, characterized in that, The system closed-loop control algorithm includes: a compensation current loop PR control algorithm; the sinusoidal pulse width modulation command signal is calculated through the compensation current loop PR control algorithm; The calculation formula for the compensation current loop PR control algorithm is as follows: ； In the formula, y ( k () represents the output of the PR controller at the k-th sampling time; u ( k () represents the input to the PR controller at the k-th sampling time; u ( k-1 () represents the input to the PR controller at the (k-1)th sampling time; u ( k-2 () represents the input to the PR controller at the (k-2)th sampling time; y ( k-1 ) represents the output of the PR controller at the (k-1)th sampling time; y ( k-2 () represents the output of the PR controller at the (k-2)th sampling time; in, b 0、 b 1. b 2 represents the first forward coefficient, the second forward coefficient, and the third forward coefficient, respectively; a 1. a 2 represents the first feedback coefficient and the second feedback coefficient, respectively; the expressions for each coefficient are shown below: ； in, K p This is the proportionality coefficient. K i The integral coefficient is... ω i It is the resonant angular frequency. ω c The cutoff frequency, T s C is the sampling period, and C is an intermediate parameter.

4. A single-phase full-bridge combined active power filter, used to implement the power harmonic control method as described in any one of claims 1-3, characterized in that, The active power filter includes: a filter module, a main power module, a sampling and conditioning module, an auxiliary control module, and a digital controller module; The sampling and conditioning module is used to sample and acquire the grid voltage, actual DC bus voltage, load current and the actual compensation current injected into the grid by the active power filter, and to preprocess the collected data and send it to the digital controller module. The digital controller module is used to calculate the target compensation current in real time based on the grid voltage, the actual DC bus voltage, the load current and the actual compensation current; The digital controller module is also used to calculate the control quantity of the outer loop of the DC bus voltage and the reference quantity of the inner loop of the current control based on the actual DC bus voltage, the target DC bus voltage and the target compensation current through the system closed-loop control algorithm; and to calculate the sinusoidal pulse width modulation command signal based on the reference quantity of the inner loop control of the current and the actual compensation current through the system closed-loop control algorithm. The auxiliary control module is used to control the main power module according to the command signal, and the main power module injects the target compensation current into the power grid through the filter module.

5. The single-phase full-bridge combined active power filter according to claim 4, characterized in that: The main power module comprises a three-phase four-wire system consisting of three completely independent single-phase full-bridge topologies.

6. The single-phase full-bridge combined active power filter according to claim 4, characterized in that: The sampling and conditioning module is also used to collect the temperature of the active power filter and preprocess the temperature of the active power filter before sending it to the digital controller module; The auxiliary control module includes a drive circuit for power switching devices, a hardware protection circuit, and a relay and fan drive circuit; the auxiliary control module is also used to control the state of the relay and fan, and the state of the hardware protection circuit, according to the control signals sent by the digital controller module.

7. The single-phase full-bridge combined active power filter according to claim 4, characterized in that, The digital controller module includes at least one of the following processors: CPU processor, DSP processor, or FPGA processor.

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