RF Transmitter with Transformer-Based N-Channel Filter Modulator

Abstract

The present invention discloses a radio frequency transmitter based on a transformer-based N-channel filter modulator, which includes a baseband low-pass filter, an N-channel filter modulator, and a power amplification driver. The baseband low-pass filter includes N filtering units, and the N-channel filter modulator includes a transformer, a variable capacitor, a frequency divider, and N mixers; the input ends of the N filtering units are respectively connected to N input signals, the output ends of the N filtering units are respectively connected to the first input ends of the N mixers, the output ends of the N mixers are connected to the input end of the transformer, the output end of the transformer is connected to the second input ends of the N mixers and the input end of the power amplification driver, the N mixers are respectively driven by non-overlapping clocks generated by the frequency divider, and the two ends of the variable capacitor are respectively connected to the input end and the output end of the transformer. The embodiments of the present invention maintain a certain output power, reduce noise, improve linearity and integration, and can be widely applied to the field of communication technologies.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a radio frequency transmitter of an N-channel filter modulator based on a transformer. Background Art

[0002] With the booming development of communication systems and mobile devices, the functions and standards integrated in mobile terminals are constantly increasing. In order to adapt to and meet the standard diversity of different countries and operators, as well as the requirements of various functions, the wireless transceivers in mobile terminals need to further develop towards low cost, high integration, and small size on the premise of meeting sensitivity, linearity, and selectivity.

[0003] There are two multiplexing methods in wireless two-way communication systems: time-division multiplexing (TDD, Time Division Duplexing) and frequency-division multiplexing (FDD, Frequency Division Duplexing). The main purpose of multiplexing is to reduce the number of antennas to save the cost and space of mobile devices. Because the form of FDD can isolate the transmit frequency from the receive frequency, it has been widely used in the field of wireless communication. In order not to reduce the sensitivity of the receiver path, the noise of the transmit signal in the receive band needs to be lower than a specific value, that is, there are strict noise floor and spurious requirements for transmitter design. Excessive transmit power in the transmit band may cause the receiver to tend to saturate, gain compression, and affect linearity, so it also needs to be suppressed in the transmit band.

[0004] In the FDD mode, the duplexer of the radio frequency front end is relied on to achieve isolation between the receive band and the transmit band. However, the signal attenuation that the duplexer can achieve is limited. The off-chip SAW (Surface-Acoustic Wave) filter is used to further suppress the transmitter in the corresponding band. However, the SAW filter is not only expensive but also its interpolation loss reduces the working performance of the radio frequency front end. In addition, the simple parallel integration method based on the SAW filter will surely cause a great increase in the cost of multi-mode and multi-standard mobile terminals.

[0005] Therefore, the SAW-less (without surface acoustic wave) radio frequency front end has gradually become a research hotspot. The design difficulty of the SAW-less radio frequency transmitter lies in how to achieve low output noise without a SAW filter and maintain a certain output power and linearity. Summary of the Invention

[0006] In view of this, to solve one of the above problems, an object of the embodiments of the present invention is to provide a radio frequency transmitter of an N-channel filter modulator based on a transformer, which maintains a certain output power, reduces noise, and improves linearity and integration.

[0007] In a first aspect, an embodiment of the present invention provides a radio frequency transmitter of an N-channel filter modulator based on a transformer, which includes a baseband low-pass filter, an N-channel filter modulator, and a power amplification driver. The baseband low-pass filter includes N filtering units, and the N-channel filter modulator includes a transformer, a variable capacitor, a frequency divider, and N mixers. Among them, the input ends of the N filtering units are respectively connected to N input signals, the output ends of the N filtering units are respectively connected to the first input ends of the N mixers, the output ends of the N mixers are connected to the input end of the transformer, the output end of the transformer is connected to the second input ends of the N mixers and the input end of the power amplification driver, the N mixers are respectively driven by non-overlapping clocks generated by the frequency divider, the two ends of the variable capacitor are respectively connected to the input end and the output end of the transformer, and the output end of the power amplification driver is used as the output end of the radio frequency transmitter.

[0008] Optionally, the mixer includes a first switching transistor, a second switching transistor, a first capacitor, and a second capacitor. Two ends of the first switching transistor are respectively connected to the first input end and the output end of the mixer. Two ends of the first capacitor are respectively connected to the first input end of the mixer and one end of the second switching transistor. The other end of the second switching transistor is connected to the second input end of the mixer. Two ends of the second capacitor are respectively connected to one end of the second switching transistor and the ground terminal.

[0009] Optionally, both the first switching transistor and the second switching transistor are connected to one of the outputs of the frequency divider.

[0010] Optionally, the filtering unit includes a filtering resistor and a filtering capacitor. One end of the filtering resistor is connected to the input end of the filtering unit, the other end of the filtering resistor is connected to the output end of the filtering unit, the other end of the filtering resistor is connected to one end of the filtering capacitor, and the other end of the filtering capacitor is connected to the ground terminal.

[0011] Optionally, the power amplification driver includes a first linearization unit, a second linearization unit, and a transistor. The first linearization unit and the second linearization unit are connected in parallel. Two ends of the first linearization unit are respectively connected to the input end of the power amplification driver and the emitter of the transistor. The base of the transistor is connected to a driving voltage, and the collector of the transistor is connected to the ground terminal.

[0012] Optionally, the radio frequency transmitter includes a 4-channel filter modulator, the 4-channel filter modulator includes 4 mixers, and the baseband low-pass filter includes 4 filtering units.

[0013] Optionally, the frequency divider includes a divide-by-two circuit, an inverter and a logic "AND gate", the input of the divide-by-two circuit includes a twice-frequency differential clock, the output of the divide-by-two circuit is connected to the input of the inverter, the output of the inverter and the twice-frequency differential clock are connected to the input of the logic "AND gate", and the output of the logic "AND gate" serves as the output of the distributor.

[0014] Optionally, the output of the frequency divider is a non-overlapping clock with a duty cycle of 25%, and the four outputs of the frequency divider drive four mixers respectively.

[0015] The implementation of the embodiment of the present invention includes the following beneficial effects: This embodiment mainly uses an N-channel filter modulator based on a transformer passive gain enhancement type, and the center frequency is tunable. By changing the frequency of the clock and combining the frequency deviation tuning capacitor C T , can accurately change the center frequency, which is conducive to the integration of multi-mode and multi-standard RF systems; the high-Q bandpass characteristics near the center frequency can suppress the out-of-band noise generated by the baseband circuit and the modulator itself, which replaces the high-Q SAW filter outside the chip, saving costs and improving integration. In addition, the low-pass characteristics of the transformer itself reduce the third-order harmonic terms at the output of the filter modulator, thereby suppressing the CIM3 (Third-Order Counter Intermodulation) term that appears near the transmit frequency at the transmit output, improving linearity. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a structural diagram of a SAW-less voltage mode RF transmitter front end provided by an embodiment of the present invention;

[0017] Figure 2 A noise contribution value diagram of different modules in a transmitter provided by an embodiment of the present invention;

[0018] Figure 3 1 is a circuit diagram of an N-channel filter and its equivalent RLC circuit diagram provided by an embodiment of the present invention;

[0019] Figure 4 1 is a circuit diagram of a gain-enhanced N-channel filter and its equivalent RLC circuit diagram provided by an embodiment of the present invention;

[0020] Figure 5 It is a structural schematic diagram of a SAW-less voltage mode radio frequency transmitter provided by an embodiment of the present invention;

[0021] Figure 6 A transformer-based passive gain N-channel filter modulator is provided in an embodiment of the present invention;

[0022] Figure 7 It is the equivalent circuit schematic diagram of a SAW-less voltage-mode RF transmitter provided by an embodiment of the present invention;

[0023] Figure 8 It is the generation process diagram of the CIM3 item non-linearity of a transmitter provided by an embodiment of the present invention;

[0024] Figure 9 It is the S of a transformer obtained by simulation provided by an embodiment of the present invention 21 ;

[0025] Figure 10 It is the circuit schematic diagram of a SAW-less voltage-mode RF transmitter provided by an embodiment of the present invention;

[0026] Figure 11 It is the circuit schematic diagram of another SAW-less voltage-mode RF transmitter provided by an embodiment of the present invention;

[0027] Figure 12 It is a gain response diagram obtained by simulation at the V o,RF terminal provided by an embodiment of the present invention;

[0028] Figure 13 It is a low-noise and high-efficiency LO frequency division circuit provided by an embodiment of the present invention. Specific embodiments

[0029] The following further elaborates on the present invention in detail in conjunction with the accompanying drawings and specific embodiments. For the step numbers in the following embodiments, they are only set for the convenience of elaboration and explanation, and no limitation is imposed on the order between the steps. The execution order of each step in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0030] Refer to Figure 1 , the voltage-mode transmitter mainly consists of a baseband low-pass filter, a passive mixer, and a PAD (Power Amplifier Driver). The passive mixer is driven by a non-overlapping local oscillator (LO) clock. In the entire transmission link, the signal is transmitted in a voltage state, with a simple structure and high working efficiency. However, a simple first-order passive filter cannot effectively suppress the noise and glitches generated by a DAC (Digital to analog converter). If higher-order filtering is desired, the cost of power consumption and area has to be paid. The embodiments of the present invention achieve the performance of low CIM3 non-linearity terms and low noise without increasing the area and power consumption.

[0031] In a radio frequency transceiver system, the noise of the front - end link has the greatest impact on the overall system because its noise will be amplified by the subsequent stages. Relatively speaking, the noise contribution of the subsequent modules to the overall system decreases gradually. Therefore, the noise and spurs generated by the DAC in the transmit link contribute the most to the output noise, and a low - pass filter is usually required to suppress it. As Figure 2 shown, the noise contributions of each module at different frequency offsets are also different. Taking an uplink single - carrier frequency - division multiple - access (SC - FDMA) signal with a signal bandwidth of 20 MHz as an example, at the single - side frequency offset of 10 MHz to 40 MHz from the carrier, each module contributes to the output spectrum of the transmitter. Among them, it is mainly affected by the adjacent - channel leakage ratio (ACLR), and the ACLR can be reduced by linearly optimizing the PA driver. When the frequency offset increases to 40 MHz to 60 MHz, the influence of the baseband noise (the noise of the DAC and the low - pass filter itself) gradually appears. A high - order filter can be used to enhance the suppression of the baseband noise, but a complex - structured low - pass filter needs to be adopted, which increases the power consumption at the same time. The noise contributions of the passive mixer and the LO divider occur at relatively far - away frequency offsets (greater than 60 MHz). The noise contribution of the passive mixer comes from the thermal noise of the on - resistance, and the noise contribution of the LO divider (phase - modulation noise) is achieved by up - converting the spectrum near the carrier after modulating the phase noise with the analog baseband signal. As the last stage of the transmitter, the PA driver has a small noise contribution.

[0032] The main methods for optimizing the noise of a voltage - mode transmitter are to enhance the filtering ability of the baseband, reduce the on - resistance of the passive mixer, and improve the phase noise of the LO divider. However, reducing the on - resistance of the passive mixer by increasing the transistor size usually makes the capacitive load of the output buffer of the LO divider larger, thereby prolonging the rise and fall times of the LO - driving clock. This situation is likely to lead to a decrease in the linearity of the mixer and the phenomenon of mutual interference between the in - phase / quadrature (I / Q) orthogonal signals in the baseband. In addition, the improvement of the phase noise of the LO divider is usually achieved at the cost of increasing the dynamic power consumption.

[0033] As Figure 3 shown, in a specific embodiment, the N - channel filter is composed of switching transistors (M SW ) and capacitors (C B ). The switching transistors are driven by non - overlapping LO clocks (LO_1 to LO_4) with a 25% duty cycle. The N - channel filter can be equivalent to an RLC filter with a tunable center frequency:

[0034]

[0035] Among them, R SW is the on-resistance of the transistor, and R S is the source resistance. The out-of-band rejection effect near the N-channel filter depends on the capacitance C B . In order to achieve better filtering performance, a larger C B is usually required; its ultimate rejection performance is determined by the on-resistance R SW . The smaller R SW , the better the rejection effect at a larger frequency offset. However, a larger C B increases the area requirement, and at the same time, a smaller R SW increases the dynamic power consumption requirement. To solve such problems, a gain-enhanced N-channel filter came into being.

[0036] As Figure 4 shown, in the gain-enhanced N-channel filter, an inverting amplifier (-A0) is introduced and forms a negative feedback loop with the N-channel filter; where -A0 serves as the feedforward path and the N-channel filter serves as the feedback path. Based on the Miller effect, the effective capacitance value of the capacitance C F increases by a factor of (1 + A0), and at the same time, the effective resistance value of the on-resistance R SW decreases by a factor of (1 + A0), thus realizing the optimization of the area and dynamic power consumption. In addition, the N-channel band-pass filtering frequency response existing at the input and output ends of the inverting amplifier -A0 realizes the effective suppression of out-of-band noise and interference signals. Compared with the N-channel filter, the gain-enhanced N-channel filter provides a voltage gain while suppressing the blocking signal, effectively realizing the performance of low noise figure and high linearity, and its switch has the function of a mixer, which can realize the up-conversion of the baseband signal, so it is called an N-channel filter modulator.

[0037] Different from noise, the overall linearity of the system is mainly determined by the subsequent modules of the link. Therefore, the linearity of the PA driver needs to be optimized with emphasis, and the specific design structure will be mentioned in the embodiments. Using the N-channel filter modulator not only meets the requirement of suppressing out-of-band noise but also provides corresponding gain at the front stage of the link, alleviating the strict linearity requirement for the subsequent PA to a certain extent.

[0038] Refer to Figure 5, in a specific embodiment, the SAW-less transmitter front-end architecture adopted in the embodiments of the present invention is shown. A passive-gain-based N-channel filter modulator is introduced between the baseband low-pass filter and the PA driver, realizing the functions of a mixer and an N-channel filter simultaneously. In the transmission link, signal modulation, up-conversion, and their noise optimization functions are all realized in a passive architecture, and only the last-stage linearized PA driver is an active circuit, effectively reducing the deterioration of the transmitter's linearity. For the noise suppression function of the modulator, the baseband filter can be implemented using an RC filter to filter out the out-of-band noise generated by the DAC. The four channels are convenient for connecting typical quadrature baseband signals (I / Q and differential).

[0039] Refer to Figure 6 , in a specific embodiment, in the passive-gain N-channel filter modulator, the loop gain is provided by a transformer. In the switched-capacitor gain loop, the baseband signal is input between the mixer (SW L ) and the feedback capacitor (C F ). After up-conversion, the RF signal is amplified by an inverting transformer and then output at the secondary coil port of the transformer; here, the amplified RF signal needs to be down-converted (realized by the mixer SW R ) to close the loop. Here, the gain of the transformer is where k is the coupling coefficient of the transformer, and L1 and L2 are the inductance values of the primary coil and secondary coil of the transformer respectively. The magnetic coupling between the primary and secondary coils of the transformer is only effective at the switching frequency f lo because the transformer presents a high impedance at f lo , while the N-channel switched-capacitor circuit presents a low impedance outside the frequency band. In this switched-capacitor gain loop, high-Q N-channel filter band-pass filtering characteristics are provided at both the input and output ends of the transformer, effectively suppressing the thermal noise of the mixer and the phase modulation noise of the LO divider. According to the Miller effect, the negative voltage gain provided by the inverting transformer can increase the effective capacitance value of C F , while reducing the effective on-resistance of SW L and SW R . Considering that the transformer, as a passive device, does not have the ability to amplify power, in the embodiments of the present invention, an inverting baseband signal is input between the mixer SW R and the feedback capacitor C F . After up-conversion (realized by SW R ), it directly drives the PA driver. The purpose of noise suppression and driving the PA driver is achieved through the parallel input of two baseband signals.

[0040] For a more intuitive understanding of the working principle of the N-channel filter modulator, refer to the equivalent circuit schematic diagram of the transmitter, as shown in Figure 7As shown. Here, the mixer is extracted from the loop of the N-channel filter modulator, and the N-channel filter modulator is equivalent to a feedback network composed of an RLC resonant circuit and an inverting transformer, achieving a frequency-tunable band-pass filtering characteristic between the mixer and the PA driver.

[0041] The low-pass characteristic of the transformer itself will reduce the third harmonic content 3×f at the output of the modulator Lo , thus effectively suppressing the CIM3 term at f LO -3×f BB formed in the overall circuit. As Figure 8 shown, when the baseband signal f 3B is injected into the transmitter and mixed with the LO at a 25% duty cycle in the modulator, the desired signal f LO +f BB and the unwanted signal 3×f LO -f BB will be generated. After passing through the PA driver, the CIM3 term will appear at the output. Refer to Figure 9 , Figure 9 shows that the S 21 of the transformer provides more than 12 dB of suppression at 9 GHz, and it can be seen that the notch is at ~13 GHz, so further adjustment and optimization can be done.

[0042] Refer to Figure 10 , an embodiment of the present invention provides a radio frequency transmitter based on a transformer N-channel filter modulator, including a baseband low-pass filter, an N-channel filter modulator, and a power amplification driver. The baseband low-pass filter includes N filtering units, and the N-channel filter modulator includes a transformer, a variable capacitor, a frequency divider, and N mixers; wherein, the input ends of the N filtering units are respectively connected to N input signals, the output ends of the N filtering units are respectively connected to the first input ends of the N mixers, the output ends of the N mixers are connected to the input end of the transformer, the output end of the transformer is connected to the second input ends of the N mixers and the input end of the power amplification driver, the N mixers are respectively driven by non-overlapping clocks generated by the frequency divider, the two ends of the variable capacitor are respectively connected to the input end and the output end of the transformer, and the output end of the power amplification driver is used as the output end of the radio frequency transmitter.

[0043] It should be noted that N is a natural number and an integer multiple of 4, such as 4, 8, 12... etc. The duty cycle of the clock generated by the frequency divider is determined according to the number of mixers. For example, the driving clock of a 4-channel filter modulator is a non-overlapping clock with a 25% duty cycle generated by the frequency divider.

[0044] Refer to Figure 10 , a tunable capacitor C T is connected in parallel across the transformer to adjust the center frequency of the passband, introducing a capacitor C to groundB For enhancing out-of-band rejection. The transformer is combined with C T After adjustment, at V o,RF The simulated HRR 3 Is 30.3 dB, and the results are as Figure 11 Shown. The designed transformer has k = 0.82, T = 4.5, and C T The adjustable range of is 0.2 - 1.8 pF. Thanks to C T , the center frequency offset can be adjusted to <1 MHz. For the entire N-channel filter modulator, adding a resistor anywhere in the loop will reduce V i,RF And V o,RF The Q value at. The R in the figure B Is added to adjust the overall requirements. A large R B Will enhance out-of-band rejection but sacrifice some passband gain at the same time. The nonlinearity of the N-channel filter modulator is mainly determined by the on-resistance of the passive switch. A transmission gate or an LO signal with a large swing (>1.2 V) can be used to improve it, but these methods will increase additional power consumption and may also affect stability. In addition, the drain and source of the switch need to be adjusted to appropriate bias voltages to ensure that the switch is fully closed when it is turned on and there is no leakage when it is turned off.

[0045] Refer to Figure 10 , each mixer includes a first switching transistor SW L , a second switching transistor SW R , a first capacitor C F And a second capacitor C R , the two ends of the first switching transistor SW L Are respectively connected to the first input end and the output end of the mixer. The two ends of the first capacitor C F Are respectively connected to the first input end of the mixer and one end of the second switching transistor SW R , the other end of the second switching transistor SW R Is connected to the second input end of the mixer, and the two ends of the second capacitor C R Are respectively connected to one end of the second switching transistor and the ground end.

[0046] Optionally, both the first switching transistor and the second switching transistor are connected to one of the outputs of the frequency divider.

[0047] The first switching transistor and the second switching transistor in each mixer are driven by the same clock. Refer to Figure 10 , the first switching transistor and the second switching transistor in the first mixer are driven by the clock LO 1 . For example, if the transmitter includes 4 mixers, then the 4 mixers are respectively driven by LO 1 , LO 2 , LO3 , LO 4 Drive.

[0048] Optionally, refer to Figure 10 , the filtering unit includes a filtering resistor R B and a filtering capacitor C B , one end of the filtering resistor R B is connected to the input terminal BB of the filtering unit, and the other end of the filtering resistor R B is connected to the output terminal of the filtering unit, and the other end of the filtering resistor R B is connected to one end of the filtering capacitor C B , and the other end of the filtering capacitor C B is connected to the ground terminal.

[0049] Optionally, refer to Figure 11 , the power amplification driver includes a first linearization unit -G ,1 , a second linearization unit -G m2 and a transistor. The first linearization unit -G m1 and the second linearization unit -G m2 are connected in parallel. The two ends of the first linearization unit -G m1 are respectively connected to the input terminal of the power amplification driver and the emitter of the transistor. The base of the transistor is connected to the driving voltage V B2 , and the collector of the transistor is connected to the ground terminal.

[0050] Since the overall linearity of the transmitter is mainly determined by the subsequent PA driver, the multi-gate linearization technology is used on the PA driver. As Figure 11 shown, a parallel second linearization unit (-G m2 , operating in the linear region) is set on the main first linearization unit (-G m1 , operating in the saturation region) to improve linearity, especially the CIM3 term. To achieve better power efficiency, -G m1 operates in Class-AB mode, and -G m2 and -G m1 both use simple NMOS transistors. The out-of-band output reference third-order intermodulation point (OB-OIP 3 ) is related to the CIM3 term:

[0051]

[0052] where, P out is the output power of the transmitter, P in,3LO represents the input power of the PA driver at 3×f LO , and G PAD represents the gain of the PA driver. Assume that the input power of the PA driver at 3×f LO is higher than that at 1×fLO less than 30 dB, reference Figure 12 , then OB - OIP 3 needs to be > 19.5 dBm to achieve < - 60 dBc CIM3 when using a 15 dB PA driver gain to reach an output power of 3 dBm. After using the g m linearization unit, the OB - OIP of the PA driver 3 is increased by 7.3 dB.

[0053] Optionally, the radio frequency transmitter includes a 4 - channel filter modulator, the 4 - channel filter modulator includes 4 mixers, and the baseband low - pass filter includes 4 filter units.

[0054] In a specific embodiment, the radio frequency transmitter includes a 4 - channel filter modulator, the 4 - channel filter modulator includes 4 mixers, the baseband low - pass filter includes 4 filter units, each filter unit is connected to a signal input, and the output of each filter unit is correspondingly connected to a mixer.

[0055] Optionally, the frequency divider includes a divide - by - two circuit, an inverter, and a logic "AND" gate. The input of the divide - by - two circuit includes a double - frequency differential clock. The output terminal of the divide - by - two circuit is connected to the input terminal of the inverter. The output terminal of the inverter and the double - frequency differential clock are connected to the input terminals of the logic "AND" gate. The output terminal of the logic "AND" gate serves as the output terminal of the distributor.

[0056] Optionally, the output of the frequency divider is a non - overlapping clock with a 25% duty cycle, and the 4 outputs of the frequency divider respectively drive 4 mixers.

[0057] The switching transistors of the N - channel filter modulator need to be driven by a non - overlapping LO clock with a 25% duty cycle, and this driving clock is generated by an LO frequency divider. The low - noise and high - efficiency LO frequency divider circuit adopted in this invention, such as Figure 13As shown. The double-frequency differential clock is provided externally. After passing through the input buffer, clock signals 2LO_P and 2LO_N are obtained. Clock signals 2LO_P and 2LO_N pass through a divide-by-2 circuit to generate clock signals LO_I+, LO_I-, LO_Q+ and LO_Q- with a 50% duty cycle. Here, by adding an inverter at the output of the divide-by-2 circuit, the rising edges of its output signals LO_I+ and LO_I- have a certain delay with respect to the input clock 2LO_N, so that the high potential of 2LO_P overlaps with the high potential of LO_I+, and at the same time the next high potential of 2LO_P overlaps with the high potential of LO_I-. Then, through a logical "AND gate", drive clock signals LO_1 to LO_4 can be obtained. Taking LO_1 and LO_3 as examples, LO_I+ "AND" 2LO_P gives LO_1, and LO_I- "AND" 2LO_P gives LO_3. The same is true for LO_2 and LO_4. The non-overlapping LO clocks can be achieved by adjusting the size ratio of the nMOS and pMOS transistors of the "AND gate" and the output buffer. In this structure, the rising and falling edges of the drive clock signals LO_1 to LO_4 all come from the input double-frequency clocks 2LO_P and 2LO_N. Therefore, the divide-by-2 circuit does not contribute to the output phase noise of the LO divider, thus realizing a low-noise and high-efficiency LO divider circuit.

[0058] Generally speaking, the SAW-less RF transmitter proposed in the embodiments of the present invention has many advantages. It mainly uses an N-channel filter modulator based on transformer passive gain enhancement. First, its center frequency is tunable. By changing the frequency of the LO and combining the frequency offset tuning capacitor C T the center frequency can be accurately changed, which is beneficial to the integration of today's multi-mode and multi-standard RF systems. Secondly, it exhibits a high-Q band-pass characteristic near the center frequency, which can suppress the noise generated by the baseband circuit and the modulator itself outside the band. This perfectly replaces the off-chip high-Q SAW filter, saving costs and improving the integration degree. In addition, the low-pass characteristic of the transformer itself reduces the third harmonic term at the output of the filter modulator, thereby suppressing the CIM3 term that appears at the transmitter output near the transmission frequency, improving the linearity. Finally, using a parallel g m linearization unit improves the linearity of the PA driver as the last stage of the transmitter, so that the overall linearity of the system is improved. It is implemented using a 65nm CMOS process, with an effective area of 0.21mm 2 , and the simulation results show excellent out-of-band noise suppression (<-157dBc / Hz) and sufficient linearity (-46dBc ALCR 1 and -61dBc CIM3). And at an output power of 2.3dBm, this transmitter can achieve a satisfactory transmission efficiency (5.1%).

[0059] The above is a specific description of the preferred embodiment of the present invention. However, the present invention is not limited to the described embodiment. Those skilled in the art can make various equivalent deformations or substitutions without departing from the spirit of the present invention, and these equivalent deformations or substitutions are all included within the scope defined by the claims of this application.

Claims

1. A radio frequency transmitter based on a transformer-based N-channel filter modulator, characterized in that: The invention comprises a baseband low-pass filter, an N-channel filter modulator and a power amplifier driver, wherein the baseband low-pass filter comprises N filter units, and the N-channel filter modulator comprises a transformer, a variable capacitor, a frequency divider and N mixers; wherein the input ends of the N filter units are respectively connected to N input signals, the output ends of the N filter units are respectively connected to the first input ends of the N mixers, the output ends of the N mixers are connected to the input end of the transformer, the output end of the transformer is connected to the second input ends of the N mixers and the input end of the power amplifier driver, and the N mixers are respectively connected to the non-overlapping time signals generated by the frequency divider. The variable capacitor is driven by a clock, the two ends of the variable capacitor are respectively connected to the input end and the output end of the transformer, and the output end of the power amplifier driver is used as the output end of the radio frequency transmitter; the mixer includes a first switch transistor, a second switch transistor, a first capacitor and a second capacitor, the two ends of the first switch transistor are respectively connected to the first input end and the output end of the mixer, the two ends of the first capacitor are respectively connected to the first input end of the mixer and one end of the second switch transistor, the other end of the second switch transistor is connected to the second input end of the mixer, and the two ends of the second capacitor are respectively connected to one end of the second switch transistor and the ground; N is a natural number and an integer multiple of 4.

2. The radio frequency transmitter according to claim 1, characterized in that: The first switch transistor and the second switch transistor are both connected to one of the outputs of the frequency divider.

3. The radio frequency transmitter according to claim 1, characterized in that: The filter unit includes a filter resistor and a filter capacitor, one end of the filter resistor is connected to the input end of the filter unit, the other end of the filter resistor is connected to the output end of the filter unit, the other end of the filter resistor is connected to one end of the filter capacitor, and the other end of the filter capacitor is connected to the ground.

4. The radio frequency transmitter according to claim 1, characterized in that: The power amplifier driver comprises a first linearization unit, a second linearization unit and a transistor. The first linearization unit and the second linearization unit are connected in parallel. Two ends of the first linearization unit are respectively connected to the input end of the power amplifier driver and the emitter of the transistor. The base of the transistor is connected to a driving voltage, and the collector of the transistor is connected to a ground end.

5. The radio frequency transmitter according to claim 1, characterized in that: The radio frequency transmitter includes a 4-channel filter modulator, the 4-channel filter modulator includes 4 mixers, and the baseband low-pass filter includes 4 filter units.

6. The radio frequency transmitter according to claim 5, characterized in that: The frequency divider includes a divide-by-two circuit, an inverter and a logic "AND gate", the input of the divide-by-two circuit includes a twice-frequency differential clock, the output of the divide-by-two circuit is connected to the input of the inverter, the output of the inverter and the twice-frequency differential clock are connected to the input of the logic "AND gate", and the output of the logic "AND gate" serves as the output of the frequency divider.

7. The radio frequency transmitter according to claim 5, characterized in that: The output of the frequency divider is a non-overlapping clock with a duty cycle of 25%, and the four outputs of the frequency divider drive four mixers respectively.

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