A method for a functional layer of a high-precision non-destructive lithographic organic field-effect transistor compatible with a soft elastic material

Abstract

The present invention discloses a method for a functional layer of a high-precision non-destructive lithographic organic field-effect transistor compatible with a flexible elastic material. The method comprises the following steps: depositing a functional layer of an organic field-effect transistor on the surface of a substrate, and preparing a water-resistant protective layer or a double protective layer of a water-resistant protective layer and a solvent-resistant protective layer on the functional layer; spin-coating a photoresist on the solvent-resistant protective layer or the double protective layer for lithography to form a patterned photoresist film; etching the substrate; and sequentially post-treating the substrate to remove the patterned photoresist film, the water-resistant protective layer and the solvent-resistant protective layer to obtain the product. The method of the present invention has a simple process and universality. It can not only lithograph an organic semiconductor layer, but also lithograph an organic insulating layer and a polymer electrode layer. All the lithographic patterning of each functional layer of the organic field-effect transistor can be achieved by one lithography method.

Description

Technical Field

[0001] The present invention relates to a method for a functional layer of a high-precision non-destructive lithographic organic field-effect transistor compatible with a flexible and elastic material, and belongs to the field of organic electronics. Background Art

[0002] In recent years, flexible electronic devices have attracted wide attention worldwide and have developed rapidly. Such devices refer to electronic devices that can still work under certain deformation (bending, folding, twisting, compressing, or stretching) conditions. As early as 2000, the American magazine "Science" rated flexible electronic technology, the human genome draft, and biological cloning technology as the world's top ten scientific and technological achievements. Thus, concepts such as wearable electronic devices, medical implantable devices, electronic skin, and intelligent electronic fabrics have been continuously proposed and constitute a part of the future blueprint of human life. In order to improve the operation speed of flexible and elastic organic field-effect transistor devices and reduce the power consumption of the devices, reducing the size of the transistors has become the only way.

[0003] To meet the commercial applications of the density and integration complexity of electronic chips, it is necessary to pattern all functional layers of organic field-effect transistor devices. Traditional mask methods, screen printing methods, and inkjet printing methods are all low-density patterning technologies with a spatial resolution of only hundreds of micrometers, resulting in problems of low precision and low integration. Lithography, as the basis of the modern optoelectronic industry, has shown irreplaceable advantages in large-scale, high-precision, and high-integration production. Compared with other technologies such as shadow masks and printing, lithography technology can reduce the feature size of devices to a few nanometers and has extremely flexible and high-precision pattern design. However, the weak van der Waals force between organic material molecules causes chemical damage when exposed to organic solvents and ultraviolet light during the lithography process, resulting in a serious decline in the performance of organic field-effect transistor devices.

[0004] Therefore, researchers began to improve the traditional lithography process. Currently, the main strategies for lithographing organic materials are as follows: (1) The first method is to synthesize fluorinated photoresists and perfluorinated solvents orthogonal to the organic materials, so that the organic semiconductors are not chemically damaged by dissolution (Adv. Mater. 2008, 20, 3481–3484; J. Am. Chem. Soc. 2008, 130, 11564–11565; Chem. Sci. 2011, 2, 1178; Adv. Mater. 2009, 21, 2314–2317). Although key progress has been made in orthogonal lithography with fluorinated materials, the current fluorinated photoresists still contain some organic solvents and are not completely fluorinated, which is harmful to the underlying organic materials. (2) The second method is to synthesize solvent-resistant organic materials and directly perform lithography on the organic materials (Adv. Mater. 2017, 29, 1605282). (3) The third method is to use a photo-crosslinking strategy, that is, by using a precursor form, or side-chain crosslinking, or mixing an alkyl-containing polymer material with a photo-crosslinkable organic additive, an insoluble polymer network is generated under ultraviolet irradiation to form a semiconductor pattern (Chem. Mater. 2012, 24, 215-221; Macromolecules 2012, 45, 2338-2347; Nat. Commun. 2020, 11, 1520; Nat. Commun. 2021, 12, 4937; Science 2021, 373, 88-94). For example, the group of Zhenan Bao proposed a single-chip optical microlithography process (called PhotoAssist), which synthesizes different types of crosslinking agents and mixes them with polymer semiconductors, polymer insulating layers, and polymer electrodes (PEDOT:PSS) respectively, and realizes the patterning of polymer electronic materials through ultraviolet light-induced photo-crosslinking reactions. Finally, a fully polymer elastic transistor array containing 10,000 transistors was successfully fabricated on a 0.238 cm 2 substrate, achieving a device density of approximately 42,000 transistors per square centimeter, which is more than 100 times the device density reported previously. However, this strategy also has some limitations. This method is only applicable to various alkylated polymers and not to small molecule materials; the preparation method for organic materials must also be the solution method and not applicable to vapor deposition. Moreover, the mobility of the device will decrease after development, indicating that the photo-crosslinking patterning method will still cause certain damage to the organic thin film. In addition, all three methods require the synthesis of specific organic materials, which greatly limits the material selection, and the synthesis cost is high and the difficulty is great. In addition to not being universal, the low mobility of the device is also an issue that cannot be ignored. The mobilities of most reported devices are lower than 0.5 cm 2 V-1 s -1 , it is difficult to meet the requirements of commercial applications. (4) The fourth method is to add a protective layer between the organic semiconductor layer and the photoresist. So far, there are mainly three choices for the protective layer: parylene, fluorinated polymer, and water-based material. Among them, parylene needs to be deposited at high temperature, which is not suitable for organic small molecule semiconductors and is difficult to remove; while the surface energy of fluorinated polymers is relatively low, and it is difficult to deposit photoresist on them. Researchers usually choose to deposit a thin layer of aluminum on it and then spin-coat the photoresist film, but this increases the complexity of the process; when the water-based material is used as the protective layer, during the development and fixing steps of the lithography process, the water in the solvent will dissolve the edge of the water-based protective layer, resulting in poor accuracy and integration of the finally obtained pattern, and the advantages of the lithography process cannot be maximally highlighted. Moreover, based on the method of the protective layer, the entire device of the lithographed organic semiconductor is based on a rigid device, and it is difficult to highlight the greatest advantage of the organic semiconductor - flexibility.

[0005] Based on this, most of the reported patterning methods are difficult to achieve high-precision and high-integration patterns, and they are all based on rigid devices; while the high-precision patterning technology compatible with flexible and elastic materials cannot be applied to all organic materials, does not have universality, and requires material synthesis with complex processes. More importantly, it is difficult to balance the mobility and integration of the device, which has become the biggest obstacle to the development of high-integration and large-scale production of flexible electronic products (Adv. Sci. 2021, 8, 2004050). Currently, there is a need for a simple method that is applicable to all organic materials, with high precision, high integration, high performance, and compatible with flexible and elastic materials, and without chemical damage to the patterning process. This will greatly promote the large-scale application and commercial development of large-area flexible electronic devices and open a new era of high-performance flexible organic electronic products. Summary of the Invention

[0006] The object of the present invention is to provide a method for lithographing the functional layer of a high-precision and non-destructive organic field-effect transistor compatible with flexible and elastic materials. The provided method can lithographically pattern organic semiconductors, organic insulating layers, and polymer electrode layers. A single lithography method can achieve full lithographic patterning of each functional layer of the organic field-effect transistor.

[0007] The method provided by the present invention has simple steps, universality, and can be combined with flexible and elastic materials; the film morphology before and after lithography using the method of the present invention and the performance of the fabricated device are almost unchanged, realizing non-chemically damaged lithographic patterning of organic materials. The method of the present invention can achieve high-precision and complex and diverse patterns, thereby fabricating high-integration organic field-effect transistor devices; the organic film after lithography using the present invention can be completely peeled off with an elastomer, which is compatible with the fabrication process of flexible and elastic devices.

[0008] The patterning method of the functional layer of the organic field effect transistor provided by the present invention comprises the following steps:

[0009] S1. Deposit the functional layer of the organic field effect transistor on the surface of the substrate, and the functional layer is an organic semiconductor layer, an organic insulating layer or a polymer electrode layer;

[0010] S2. Prepare a water-resistant protective layer, or a double protective layer of a solvent-resistant protective layer and a water-resistant protective layer on the functional layer; when the functional layer is a water-based material, only the water-resistant protective layer needs to be prepared;

[0011] S3. Spin-coat a photoresist on the water-resistant protective layer or the double protective layer for photolithography to form a patterned photoresist film;

[0012] S4. Etch the substrate processed in step S3 to remove the water-resistant protective layer, the solvent-resistant protective layer and the functional layer not covered by the photoresist;

[0013] S5. Post-treat the substrate processed in step S4 in sequence to remove the patterned photoresist film, the water-resistant protective layer and the solvent-resistant protective layer, and then a patterned functional layer of the organic field effect transistor is obtained.

[0014] The functional layer involved in the present invention includes an organic semiconductor layer, an organic insulating layer and a polymer electrode layer;

[0015] The thickness of the organic semiconductor layer can be 2-100 nm;

[0016] The thickness of the organic insulating layer can be 100 nm-1 μm;

[0017] The thickness of the polymer electrode layer can be 2-100 nm;

[0018] The material of the organic semiconductor layer can be a polymer semiconductor material or a small molecule semiconductor material;

[0019] The polymer semiconductor material can be IDTBT (indacenodithiophene-benzothiadiazole), DPPT-TT (poly(3,4-diphenyl-2,5-dithienylenepyrrolo[3,4-c]pyrrole-1,4-dione)), P3HT (poly(3-hexylthiophene-2,5-diyl)), etc.;

[0020] The small molecule semiconductor material can be DNTT (dinaphtho[2,3-b:2’,3’-f]thieno[3,2-b]thiophene), C8-BTBT (2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene), Pentacene;

[0021] The organic insulating layer can be a water-based insulating layer, a solvent-based insulating layer, or an insulating elastomer;

[0022] The water-based insulating layer can be PVA (polyvinyl alcohol), Dextran;

[0023] The solvent-based insulating layer can be PMMA (polymethyl methacrylate), PS (polystyrene);

[0024] The insulating elastomer can be SEBS (styrene-ethylene-butadiene-styrene block copolymer);

[0025] The material of the polymer electrode layer can be poly(3,4-ethylenedioxythiophene)-polystyrene sulfonic acid.

[0026] The substrates applicable to the method of the present invention can be hard substrates such as silicon, silicon dioxide, and glass, or flexible substrates such as polyimide and polyethylene terephthalate; if the finally obtained organic layer needs to be peeled off from the substrate, the substrate needs to be modified with octadecyltrichlorosilane before depositing the organic layer and after plasma etching;

[0027] Octadecyltrichlorosilane can be modified by a gas phase method, and the specific steps are as follows:

[0028] After the surface of the cleaned substrate is treated with oxygen plasma to form hydroxyl groups, it is placed in a vacuum drying oven together with the octadecyltrichlorosilane and heated to 60 °C and kept for 30 minutes; then the substrate is taken out and ultrasonically treated in chloroform solvent for 10 minutes, and the above octadecyltrichlorosilane is connected to the substrate.

[0029] In step S1 of the present invention, the solution method can be used to deposit each functional layer, such as:

[0030] Taking the organic semiconductor layer as an example of a semiconductor IDTBT (indacenobenzothiadiazole) film: spin-coating an IDTBT solution (5 mg / ml, dissolved in chloroform) on the substrate at a rotation speed of 1500 rpm for 60 s, and then annealing in nitrogen at 100 °C for 30 min to obtain a semiconductor IDTBT film;

[0031] Taking the organic insulating layer as an example of a PMMA (polymethyl methacrylate) layer: spin-coating a PMMA solution (anisole, 60 mg / ml) (rotation speed 5000 rpm, time: 40 s) on the substrate, and annealing at 70 °C for 1 h to obtain an insulating layer of PMMA;

[0032] Taking PEDOT:PSS (poly(3,4-ethylenedioxythiophene)-polystyrenesulfonic acid) as an example of the polymer electrode: Spin-coat a solution of PEDOT:PSS (a mixed solution of PH1000, ethylene glycol, and surfactant FS-30) on a substrate at a rotation speed of 6000 rpm for 30 s, anneal at 100 °C for 1 h, then soak in concentrated nitric acid for 3 min, soak in deionized water for 1 min, and dry with nitrogen to obtain a PEDOT:PSS thin film of the polymer electrode.

[0033] In step S2 of the present invention, the thickness of the solvent-resistant protective layer is 200 - 400 nm, and the thickness of the water-resistant protective layer is 30 - 70 nm;

[0034] The material of the solvent-resistant protective layer is a water-based material, specifically polyvinyl alcohol or dextran;

[0035] The material of the water-resistant protective layer is a solvent-based material, specifically poly(3,4-dithienyl)pyrrolo[3,4-c]pyrrole-1,4-dione or indacenobenzothiadiazole;

[0036] The preparation method of the solvent-resistant protective layer is as follows:

[0037] Spin-coat a solution of the material of the solvent-resistant protective layer on the functional layer and cure to obtain it;

[0038] Taking the solvent-resistant protective layer PVA as an example: Prepare a 6% by mass PVA solution with deionized water as the solvent, stir overnight, then spin-coat it on the organic layer at a rotation speed of 6000 rpm for 40 s, and then place it in an oven at 60 °C for 10 minutes to cure to obtain it;

[0039] The preparation method of the water-resistant protective layer is as follows:

[0040] Spin-coat a solution of the material of the water-resistant protective layer on the solvent-resistant protective layer and cure to obtain it;

[0041] Taking the water-resistant protective layer DPPT-TT as an example: Prepare a DPPT-TT solution with a concentration of 5 mg / ml, with chloroform as the solvent, stir overnight, then spin-coat it on the solvent-resistant protective layer PVA at a rotation speed of 6000 rpm for 60 s, and then place it in an oven at 60 °C for 10 minutes to obtain it.

[0042] In step S3 of the present invention, the photoresist is AZ MIR-703, AZ 5200NJ, or AZ 5214E.

[0043] The conditions for photolithography are as follows:

[0044] The photoresist film formed by spin-coating the photoresist is irradiated with ultraviolet light with a wavelength of 365 nm for 10 s, then immersed in the developer AZ 300MIF for 30 - 60 s, and then fixed in secondary deionized water for 2 s to obtain the patterned photoresist film;

[0045] In step S4, the etching is oxygen plasma etching or reactive ion etching;

[0046] The power of the oxygen plasma treatment is 100 w and the time is 5 - 10 min.

[0047] In step S5 of the present invention, the patterned photoresist film and the water-resistant protective layer are removed by soaking in acetone;

[0048] The solvent-resistant protective layer is removed by soaking in water.

[0049] The patterned functional layers prepared by the method of the present invention also belong to the protection scope of the present invention.

[0050] Based on the patterned functional layers of the present invention, the present invention also provides an organic electronic device, such as an organic field effect transistor, a capacitor, etc.

[0051] The present invention provides a universal method for lithographing organic materials without chemical damage. This method has a simple process and universality. It can not only lithograph organic semiconductor layers, but also organic insulating layers and polymer electrode layers. One lithography method can achieve full lithographic patterning of each functional layer of an organic field effect transistor. The method of the present invention has no requirements for the preparation method of organic thin films, and both vapor phase method and solution method are compatible; the present invention can achieve chemical damage-free lithographic patterning of organic materials, and the morphology and properties of the lithographed organic thin film are consistent with those of the original thin film. The present invention maximally highlights the advantages of lithography. The lithography accuracy can reach hundreds of nanometers, and the lithography scale can reach wafer level, realizing high-precision and high-integration lithographic patterning of organic materials. The method of the present invention can be combined with flexible elastic materials, and the patterned thin film after lithography can be peeled off with an elastomer and seamlessly adhered to the human skin, maximally highlighting the advantages of organic materials, and will greatly promote the large-scale application and commercial development of large-area flexible electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 It is a schematic flowchart of the preparation process of each functional layer of a high-precision non-destructive lithographic organic field effect transistor compatible with flexible elastic materials of the present invention.

[0053] Figure 2 It is a microscope picture of the semiconductor IDTBT lithographed in Example 1 of the present invention( Figure 2 (a)) and a scanning electron microscope picture(Figure 2 (b)).

[0054] Figure 3 is the transfer characteristic curve of the IDTBT-based field effect transistor device before and after lithography prepared in Example 2 of the present invention ( Figure 3 (a)) and the output characteristic curve ( Figure 3 (b)).

[0055] Figure 4 is the microscope picture of the insulating layer PMMA lithographed in Example 3 of the present invention.

[0056] Figure 5 is the capacitance-frequency curve of the PMMA capacitor prepared before and after lithography in Example 4 of the present invention.

[0057] Figure 6 is the microscope picture of the polymer electrode PEDOT:PSS lithographed in Example 5 of the present invention ( Figure 6 (a)) and the scanning electron microscope picture ( Figure 6 (b), Figure 6 (c)).

[0058] Figure 7 is the current-voltage curve of the PEDOT:PSS thin film prepared before and after lithography in Example 5 of the present invention.

[0059] Figure 8 is the photo of the PEDOT:PSS electrode array lithographed in Example 6 attached to the human arm. Detailed implementation manners

[0060] Unless otherwise specified, the experimental methods used in the following examples are all conventional methods.

[0061] Unless otherwise specified, the materials, reagents, etc. used in the following examples can all be obtained from commercial channels.

[0062] The preparation flowcharts of the following Examples 1-6 are as Figure 1 shown.

[0063] Example 1. Preparation of a lithographed semiconductor IDTBT thin film

[0064] (1) Substrate cleaning, the specific steps are as follows:

[0065] Ultrasonic clean the silica substrate with acetone, isopropanol, and secondary deionized water in sequence for 10 min, and dry it with nitrogen.

[0066] (2) Prepare a semiconductor IDTBT thin film on the silica substrate after step (1), the specific steps are as follows:

[0067] The semiconductor IDTBT solution (concentration: 5 mg / ml, solvent: chloroform) was spin-coated (rotation speed: 1500 rpm, time: 60 s) on the cleaned silica substrate, and then annealed with nitrogen at 100 °C for 30 min to obtain a semiconductor IDTBT thin film with a thickness of 50 nm.

[0068] (3) A solvent-resistant protective layer PVA was spin-coated on the semiconductor IDTBT thin film after step (2), and the specific steps are as follows:

[0069] The PVA solution (mass fraction: 6%, solvent: secondary deionized water) was spin-coated on the semiconductor IDTBT thin film at a rotation speed of 6000 rpm for a time of 40 s, and then cured at 60 °C for 10 min to obtain a solvent-resistant protective layer with a thickness of 300 nm.

[0070] (4) A water-resistant protective layer DPPT-TT was spin-coated on the solvent-resistant protective layer PVA after step (3), and the specific steps are as follows:

[0071] The DPPT-TT solution (5 mg / ml dissolved in chloroform) was spin-coated on the solvent-resistant protective layer PVA at a rotation speed of 6000 rpm for a time of 60 s, and then placed in an oven and heated at 60 °C for 10 min to obtain a water-resistant protective layer with a thickness of 50 nm.

[0072] (5) A photoresist was spin-coated on the water-resistant protective layer DPPT-TT thin film after step (4), and the specific steps are as follows:

[0073] The photoresist (AZ MIR-703) was spin-coated on the water-resistant protective layer at a rotation speed of 6000 rpm for a time of 40 s, and then placed on a hot plate at 100 °C and cured for 80 s to obtain a photoresist thin film.

[0074] (6) Photolithography was performed on the photoresist thin film after step (5), and the specific steps are as follows:

[0075] The photoresist thin film was irradiated with ultraviolet light with a wavelength of 365 nm for 10 s, then developed in the developer AZ 300MIF for 30 s, fixed in deionized water for 2 s, and dried with nitrogen to obtain a patterned photoresist thin film.

[0076] (7) On the patterned photoresist thin film after step (6), the water-resistant protective layer DPPT-TT, the solvent-resistant protective layer PVA, and the organic semiconductor IDTBT that were not covered by the photoresist were removed by oxygen plasma etching.

[0077] (8) Immerse the patterned multi-layer thin film after step (7) into acetone solvent for 2 - 3 min to remove the patterned photoresist thin film and the water-resistant protective layer DPPT-TT. At this time, only the patterned semiconductor IDTBT and the solvent-resistant protective layer PVA remain on the silica substrate.

[0078] (9) Remove the solvent-resistant protective layer PVA after step (8). The specific steps are as follows:

[0079] Immerse the silica substrate with the patterned semiconductor IDTBT thin film and the solvent-resistant protective layer PVA into ultrapure water for 5 - 20 min, or rinse it with ultrapure water to dissolve the solvent-resistant protective layer PVA, and then cure it in a vacuum drying oven at 100 °C for 20 min to remove the residual moisture, thus obtaining the patterned semiconductor IDTBT thin film.

[0080] Figure 2 are the microscope picture and scanning electron microscope picture of lithographing semiconductor IDTBT on the silica substrate. It can be seen that the method of the present invention can achieve high-precision and complex and diverse patterns of organic semiconductors.

[0081] Example 2: Fabricate IDTBT-based field-effect transistors before and after lithography

[0082] 1. Fabricate an IDTBT-based field-effect transistor without lithography

[0083] (1) Substrate cleaning and modification. The specific steps are as follows:

[0084] Ultrasonically clean the silica substrate with acetone, isopropyl alcohol, and ultrapure water in sequence for 10 min, and dry it with nitrogen; perform oxygen plasma treatment on the cleaned silica substrate (power: 100 W, time: 0.5 min), then put the substrate and octadecyltrichlorosilane into a vacuum drying oven, heat at 60 °C for half an hour, and then put it into chloroform for ultrasonic cleaning for 10 min, and dry it with nitrogen, so as to modify octadecyltrichlorosilane on the surface of the silica substrate.

[0085] (2) Fabricate a semiconductor IDTBT thin film on the octadecyltrichlorosilane-modified silica substrate after step (1). The specific steps are as follows:

[0086] Spin-coat the semiconductor IDTBT solution (concentration: 5 mg / ml, solvent: chloroform) (rotation speed: 1500 rpm, time: 60 s) on the octadecyltrichlorosilane-modified silica substrate, and then perform nitrogen annealing at 100 °C for 30 min to obtain a semiconductor IDTBT thin film with a thickness of 50 nm.

[0087] (3) After step (2), source and drain electrodes are fabricated on the semiconductor IDTBT thin film. The specific steps are as follows:

[0088] On the semiconductor IDTBT thin film, 30 nm of gold is deposited by vacuum deposition using a mask (deposition rate: ) as the source and drain electrodes. The channel length is 100 μm and the width is 1000 μm, obtaining a bottom-gate top-contact IDTBT-based field-effect transistor.

[0089] 2. Fabrication of a lithographed IDTBT-based field-effect transistor

[0090] (1) Substrate cleaning and modification. The specific steps are as follows:

[0091] The silica substrate is ultrasonically cleaned with acetone, isopropyl alcohol, and deionized water for 10 min in sequence and dried with nitrogen. The cleaned silica substrate is subjected to oxygen plasma treatment (power: 100 W, time: 0.5 min). Then, the substrate and octadecyltrichlorosilane are placed in a vacuum drying oven and heated at 60 °C for half an hour. After that, it is placed in chloroform and ultrasonically cleaned for 10 min and dried with nitrogen, thus modifying the surface of the silica substrate with octadecyltrichlorosilane.

[0092] (2)-(9) are the same as the corresponding steps in Example 1.

[0093] (10) After step (9), source and drain electrodes are fabricated on the semiconductor IDTBT. The specific steps are as follows:

[0094] On the semiconductor IDTBT, 30 nm of gold is deposited by vacuum deposition using a mask (deposition rate: ) as the source and drain electrodes. The channel length is 100 μm and the width is 1000 μm, obtaining a lithographed bottom-gate top-contact polymer-based field-effect transistor.

[0095] Figure 3 are the transfer characteristic curves ( Figure 3 (a)) and output characteristic curves ( Figure 3 (b)) of the organic field-effect transistors fabricated based on the IDTBT thin films before and after lithography respectively. It can be seen that before and after lithography of the semiconductor thin film, the mobilities of the organic field-effect transistor devices are 1.34 cm 2 V -1 s -1 (before lithography) and 1.32 cm 2 V -1 s -1 (after lithography) respectively, and the mobilities are almost unchanged, indicating that the method of the present invention can lithographically pattern the organic semiconductor without chemical damage.

[0096] Example 3. Fabrication of a lithographed insulating material PMMA thin film

[0097] (1) Substrate cleaning, the specific steps are as follows:

[0098] Ultrasonically clean the silicon substrate with acetone, isopropanol, and twice-distilled deionized water in sequence for 10 min, and then dry it with nitrogen.

[0099] (2) Prepare the insulating layer PMMA on the silicon substrate after step (1), the specific steps are as follows:

[0100] Dissolve the insulating material PMMA in anisole (60 mg / ml), spin-coat it on the silicon substrate (rotation speed: 5000 rpm; time: 40 s), and anneal it at 70 °C for 1 h to obtain a PMMA insulating layer with a thickness of about 300 nm.

[0101] (3) Prepare the solvent-resistant protective layer PVA on the insulating layer PMMA after step (2), the specific steps are as follows:

[0102] Spin-coat the PVA solution (mass fraction: 6%; solvent: twice-distilled deionized water) on the insulating layer PMMA at a rotation speed of 6000 rpm for 40 s, and then cure it at 60 °C for 10 min to obtain a solvent-resistant protective layer with a thickness of 300 nm.

[0103] (4) Prepare the water-resistant protective layer DPPT-TT on the solvent-resistant protective layer PVA after step (3), the specific steps are as follows:

[0104] Spin-coat the DPPT-TT solution (5 mg / ml dissolved in chloroform) on the solvent-resistant protective layer PVA at a rotation speed of 6000 rpm for 60 s, and then cure it at 60 °C for 10 min to obtain a water-resistant protective layer with a thickness of 50 nm.

[0105] (5) Spin-coat photoresist on the water-resistant protective layer DPPT-TT film after step (4), the specific steps are as follows:

[0106] Spin-coat the photoresist (AZ MIR-703) on the water-resistant protective layer at a rotation speed of 6000 rpm for 40 s, and then place it on a baking table at 100 °C to cure for 80 s to obtain a photoresist film.

[0107] (6) Lithography on the photoresist film after step (5), the specific steps are as follows:

[0108] Irradiate the photoresist film with ultraviolet light with a wavelength of 365 nm for 10 s, then develop it in the developer AZ 300MIF for 30 s, fix it in deionized water for 2 s, and dry it with nitrogen to obtain a patterned photoresist film.

[0109] (7) On the patterned photoresist film after step (6), oxygen plasma etching is used to remove the water-resistant protective layer DPPT-TT, solvent-resistant protective layer PVA, and insulating layer PMMA that are not covered by the photoresist.

[0110] (8) The patterned multi-layer film after step (7) is immersed in acetone for 2 - 3 min to remove the patterned photoresist film and the water-resistant protective layer DPPT-TT. At this time, only the patterned insulating layer PMMA and the solvent-resistant protective layer PVA remain on the silicon substrate.

[0111] (9) Remove the solvent-resistant protective layer PVA after step (8). The specific steps are as follows:

[0112] Immerse the silicon substrate with the patterned insulating layer PMMA and the solvent-resistant protective layer PVA in ultrapure water for 5 - 20 min, or rinse with ultrapure water to dissolve the solvent-resistant protective layer PVA, and then cure in a vacuum drying oven at 100 °C for 20 min to remove the residual moisture, and the patterned insulating layer PMMA can be obtained.

[0113] Figure 4 It is a microscope picture of the insulating layer PMMA lithographed on the silicon substrate.

[0114] Example 4: Preparation of PMMA capacitors before and after lithography

[0115] 1. Preparation of non-lithographed PMMA capacitors

[0116] (1) Substrate cleaning. The specific steps are as follows:

[0117] Ultrasonically clean the silicon substrate with acetone, isopropyl alcohol, and ultrapure water in sequence for 10 min and then dry with nitrogen.

[0118] (2) Preparation of the insulating layer PMMA on the silicon substrate after step (1). The specific steps are as follows:

[0119] Dissolve the insulating material PMMA in anisole (60 mg / ml) and spin-coat (rotation speed 5000 rpm, time: 40 s) on the silicon substrate, and anneal at 70 °C for 1 h to obtain the PMMA insulating layer.

[0120] (3) Evaporate metal on the insulating layer PMMA after step (2). The specific steps are as follows:

[0121] Deposit gold with a size of 2 mm * 2 mm on the insulating layer PMMA using a mask plate in vacuum, and the deposition rate is The thickness is 30 nm.

[0122] 2. Preparation of lithographed PMMA capacitors

[0123] (1)-(9) are the corresponding steps in Example 3.

[0124] (10) Deposit gold with a size of 2 mm × 2 mm on the patterned insulating layer PMMA after step (9) using a mask plate by vacuum deposition, and the deposition rate is with a thickness of 30 nm.

[0125] Figure 5 It is a capacitor based on PMMA thin films before and after lithography prepared in an embodiment of the present invention. The capacitance curves of the insulating layer PMMA before and after lithography almost coincide with the frequency, indicating that the method of the present invention can lithographically pattern the organic insulating layer without chemical damage.

[0126] Example 5. Preparation of a lithographed polymer electrode PEDOT:PSS thin film

[0127] (1) Clean the substrate, and the specific steps are as follows:

[0128] Ultrasonically clean the silica substrate with acetone, isopropyl alcohol, and secondary deionized water in sequence for 10 min, and then dry it with nitrogen.

[0129] (2) Prepare a polymer electrode PEDOT:PSS thin film on the silica substrate after step (1), and the specific steps are as follows:

[0130] Spin-coat the polymer electrode PEDOT:PSS solution (a mixed solution of PH1000, ethylene glycol, and surfactant FS-30) on the silica substrate at a rotation speed of 6000 rpm for 30 s, anneal at 100 °C for 1 h, then soak it in concentrated nitric acid for 3 min, soak it in deionized water for 1 min, and then dry it with nitrogen to obtain a polymer electrode PEDOT:PSS thin film with a thickness of about 15 nm.

[0131] (3) Prepare a solvent-resistant protective layer PVA on the polymer electrode PEDOT:PSS thin film after step (2), and the specific steps are as follows:

[0132] Spin-coat the PVA solution (mass fraction: 6%, solvent: secondary deionized water) on the polymer semiconductor thin film at a rotation speed of 6000 rpm for 40 s, and then cure it at 60 °C for 10 min to obtain a solvent-resistant protective layer with a thickness of 300 nm.

[0133] (4) Prepare a water-resistant protective layer DPPT-TT on the solvent-resistant protective layer PVA after step (3), and the specific steps are as follows:

[0134] Spin-coat the DPPT-TT solution (5 mg / ml dissolved in chloroform) on the solvent-resistant protective layer PVA at a rotation speed of 6000 rpm for 60 s, and then cure it at 60 °C for 10 min to obtain a water-resistant protective layer with a thickness of 50 nm.

[0135] (5) Spin-coat a photoresist on the water-resistant protective layer DPPT-TT film after step (4). The specific steps are as follows:

[0136] Spin-coat the photoresist (AZ MIR-703) on the water-resistant protective layer at a rotation speed of 6000 rpm for 40 s, and then place it on a hot plate at 100 °C to cure for 80 s to obtain a photoresist film.

[0137] (6) Lithography is performed on the photoresist film after step (5). The specific steps are as follows:

[0138] Irradiate the photoresist film with ultraviolet light with a wavelength of 365 nm for 10 s, then develop it in the developer AZ 300MIF for 30 s, fix it in deionized water for 2 s, and dry it with nitrogen to obtain a patterned photoresist film.

[0139] (7) On the patterned photoresist film after step (6), oxygen plasma etching is used to remove the water-resistant protective layer DPPT-TT, the solvent-resistant protective layer PVA, and the polymer electrode PEDOT:PSS that are not covered by the photoresist.

[0140] (8) Immerse the patterned multi-layer film after step (7) in acetone for 2 - 3 min to remove the patterned photoresist film and the water-resistant protective layer DPPT-TT. At this time, only the patterned polymer electrode PEDOT:PSS and the solvent-resistant protective layer PVA remain on the silica substrate.

[0141] (9) Remove the solvent-resistant protective layer PVA after step (8). The specific steps are as follows:

[0142] Immerse the silica substrate with the patterned polymer electrode PEDOT:PSS film and the solvent-resistant protective layer PVA in secondary deionized water for 5 - 20 min, or rinse it with secondary deionized water to dissolve the solvent-resistant protective layer PVA, and then cure it in a vacuum drying oven at 100 °C for 20 min to remove the residual moisture to obtain the patterned polymer electrode PEDOT:PSS.

[0143] Figure 6 are the microscope pictures and scanning electron microscope pictures of lithographing the polymer electrode PEDOT:PSS on the silica substrate. The PEDOT:PSS electrode lithographed by the method of the present invention can not only achieve various patterns such as rings and windmills, but also achieve a high resolution of 750 nm.

[0144] Figure 7 It is the current-voltage curve of the polymer electrode PEDOT:PSS lithographed on a silica substrate. The current-voltage curves of the PEDOT:PSS thin film before and after lithography are consistent, indicating that the method of the present invention can lithographically pattern the polymer electrode PEDOT:PSS without chemical damage.

[0145] Example 6. Preparation of a conformable lithographed polymer electrode PEDOT:PSS array

[0146] (1) Substrate cleaning and modification, the specific steps are as follows:

[0147] Ultrasonically clean a 4-inch silicon substrate with acetone, isopropyl alcohol, and secondary deionized water in sequence for 10 minutes, and dry it with nitrogen; perform oxygen plasma treatment on the cleaned 4-inch silicon substrate (power: 100 W, time: 0.5 min), then put the substrate and octadecyltrichlorosilane into a vacuum drying oven, heat at 60 °C for half an hour, then put it into chloroform and ultrasonically clean for 10 minutes, and dry it with nitrogen, so that octadecyltrichlorosilane can be modified on the surface of the silicon substrate.

[0148] (2)-(10) are the same as the corresponding steps in Example 5.

[0149] (11) Spin-coat the elastomer polydimethylsiloxane (PDMS) on the patterned PEDOT:PSS thin film after step (10), the specific steps are as follows:

[0150] Prepare a PDMS solution (PDMS:curing agent = 10:1, volume ratio), stir for five minutes and then let it stand for 1.5 h to eliminate bubbles, then spin-coat (rotation speed: 1500 rpm, time: 60 s) on the patterned PEDOT:PSS thin film, and put it into an oven at 70 °C to cure for half an hour.

[0151] (12) Peel the patterned PEDOT:PSS electrode obtained in step (11) from the 4-inch silicon substrate modified with octadecyltrichlorosilane and attach it to the human arm.

[0152] Figure 8 It is the lithographed PEDOT:PSS electrode array attached to the human arm, indicating that the method of the present invention can not only achieve wafer-scale lithographic patterning, but also be compatible with flexible and elastic materials. The lithographed thin film can be completely peeled off from the substrate with an elastomer and seamlessly attached to the human skin.

Claims

1. A patterning method for a functional layer of an organic field-effect transistor, comprising the following steps: S1. Deposit a functional layer of an organic field-effect transistor on the surface of a substrate, where the functional layer is an organic semiconductor layer, an organic insulating layer, or a polymer electrode layer; S2. Sequentially prepare a double-layer protective layer of a solvent-resistant protective layer and a water-resistant protective layer on the functional layer; The material of the solvent-resistant protective layer is polyvinyl alcohol or dextran; The material of the water-resistant protective layer is poly(3,4-ethylenedioxythiophene)-pyrrolopyrrole dione or indacenobenzothiadiazole; S3. Spin-coat a photoresist on the double-layer protective layer for photolithography to form a patterned photoresist film; S4. Etch the substrate processed in step S3 to remove the water-resistant protective layer, the solvent-resistant protective layer, and the functional layer that are not covered by the photoresist; S5. Post-treat the substrate processed in step S4 sequentially to remove the patterned photoresist film, the water-resistant protective layer, and the solvent-resistant protective layer, thereby obtaining a patterned functional layer of an organic field-effect transistor; The post-treatment includes the following treatments 1) and 2): 1) Remove the patterned photoresist film and the water-resistant protective layer by soaking in acetone; 2) Remove the solvent-resistant protective layer by soaking in water.

2. The patterning method according to claim 1, wherein: The functional layer includes an organic semiconductor layer, an organic insulating layer, and a polymer electrode layer.

3. The patterning method according to claim 2, wherein: The material of the organic semiconductor layer is a polymer semiconductor material or a small molecule semiconductor material; The organic insulating layer is a water-based insulating layer, a solvent-based insulating layer, or an insulating elastomer; The material of the water-based insulating layer is polyvinyl alcohol or dextran; The material of the solvent-based insulating layer is polymethyl methacrylate or polystyrene; The material of the polymer electrode layer is poly(3,4-ethylenedioxythiophene)-polystyrene sulfonic acid.

4. The patterning method according to any one of claims 1-3, characterized in that: The photoresist is AZ MIR-703, AZ 5200NJ, or AZ 5214E.

5. The patterning method according to any one of claims 1-3, characterized in that: In step S2, the preparation method of the solvent-resistant protective layer is: Spin-coat a solution of the material of the solvent-resistant protective layer on the functional layer and cure it to obtain; The preparation method of the water-resistant protective layer is: Spin-coat a solution of the material of the water-resistant protective layer on the solvent-resistant protective layer and cure it to obtain.

6. The patterning method according to any one of claims 1 to 3, characterized in that: In step S3, the conditions of the photolithography are as follows: Place the photoresist film formed by spin-coating the photoresist under ultraviolet light with a wavelength of 365 nm for irradiation, then soak it in a developer, and then fix it in secondary deionized water to obtain the patterned photoresist film; In step S4, the etching is oxygen plasma etching or reactive ion etching.

7. A functional layer prepared by the method according to any one of claims 1-6.

8. An organic electronic device, comprising the functional layer according to claim 7.

9. The organic electronic device according to claim 8, wherein: The organic electronic device is an organic field-effect transistor or a capacitor.

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