Current polarity detection method based on second-order generalized integral frequency-locked loop

Abstract

The invention discloses a current polarity detection method based on a second-order generalized integral frequency-locked loop. A sampling value im of a stator current is obtained after the stator current io is subjected to sampling delay; a sampling value im is output to a second-order generalized integrator SOGI after a current error epsilon i of the sampling value im after delay compensation is multiplied by gain k of the band-pass filter; the second-order generalized integrator SOGI separates an output current io'and an orthogonal signal qio '; multiplying the current error epsiloni by the orthogonal signal qio'to obtain a frequency error epsilonf, inputting the frequency error epsilonf into a frequency-locked loop FLL, and converting the actual rotating speed of the motor into an electrical angular speed as a feedforward to be added into the frequency-locked loop FLL; and the frequency-locked loop FLL outputs the target frequency omega'of the output current io 'required by the second-order generalized integrator SOGI, so that the target frequency of the input current is tracked by the output current. The problem of accurate current detection under rapid current frequency change in a variable frequency motor system occasion is solved, and a foundation is laid for accurate detection of dead zone elimination current polarity.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronic transmission systems, and in particular relates to a current polarity detection method based on a second-order generalized integral frequency-locked loop. Background Art

[0002] In order to prevent the bridge arm shoot-through problem caused by device switching delay, the switch device of the power electronic transmission system needs to set a dead zone. Taking the diode clamp three-level topology, one of the most widely used ones, as an example, according to the principle of adding dead zone, the dead zone will cause an error in the output voltage. The error expression is as follows:

[0003] Table 1 Error voltage values

[0004]

[0005] The error voltage expression is as follows:

[0006] V err =-0.5·sign(i x )·U dc ·t d / T s

[0007] Where T s is the switching period, t d is the dead time, U dc is a DC voltage. From the expression, we can see that the generated output error voltage is only related to the current direction, and the amplitude is: (t d / T s ) d Therefore, when adding t d During the dead time, the output voltage can be approximately expressed as:

[0008] U=U * -V err (i x >0)

[0009] U=U * +V err (i x <0)

[0010] Among them, U is the actual output voltage value, and U* is the ideal output voltage value. There is an error voltage ΔU=UU* between the actual output voltage U and the ideal output voltage U*. From the analysis, it can be seen that the voltage distortion caused by the dead zone is determined by the polarity of the output current. In order to accurately compensate for the output voltage distortion caused by the dead zone, it is necessary to accurately determine the direction of the output phase current and increase or decrease the opening time of the corresponding switch tube.

[0011] The square wave voltage (mainly including 3rd, 5th, 7th and other low-frequency harmonics) formed by the dead time affects the inverter output harmonics. When indirect magnetic field oriented closed-loop control is adopted, the inverter output electromagnetic torque is proportional to the output current (i d ,i q The square of the product of the output voltage and the output voltage). If the nonlinearity of the motor winding is not considered, the output electromagnetic torque can be approximately proportional to the square of the output voltage. If the output voltage error caused by the dead zone effect is △U, the torque is:

[0012] T q =T q0 (1+k△U / U*)

[0013] Where U* is the ideal output voltage. According to the above formula, when the ideal output voltage U* is large, ΔU / U* is relatively small and can be ignored; when the motor runs at low speed, U* is small, ΔU / U* is relatively large, and the dead zone effect will cause a large torque error.

[0014] Therefore, it is necessary to compensate for the dead zone. Since the dead zone compensation method is to compensate or eliminate according to the current polarity, the dead zone compensation effect is highly dependent on the accuracy of current polarity detection. For motor drive systems, current zero crossing may be distorted due to pulse alternation. If there is an error in current polarity detection, additional harmonics will be added, limiting its wide range of applications. Current overcurrent distortion mainly occurs in the following two situations: 1) When the positive and negative driving pulses of the upper and lower tubes change, the current may change in steps. When the load current is positive, the conventional dead zone elimination method cannot make the current pass through zero naturally. The current can only fluctuate around zero and maintain a positive average value. When the load current is less than zero, the current can only fluctuate around zero and maintain a negative average value, so that the current cannot pass through zero smoothly, which will cause current steps; 2) Current polarity detection error. When the current polarity detection error occurs, the current will not pass through zero in time, further increasing the current distortion. For example, the current polarity detection delay T pd , which will cause the driving pulse alternation time delay T pd , which causes the current to continue to fluctuate around zero and fail to cross zero until the drive signal switches to the pair of tubes. Therefore, the delay will also cause serious zero-crossing distortion problems. For a three-phase system, if one phase current is distorted, the other two phase currents will also be distorted. For a closed-loop system, a reference current (no noise and no ripple) can be used to determine the current polarity, but there is an error between the reference current and the actual output current control, and there may be serious current zero-crossing distortion problems.

[0015] like Figure 1As shown, therefore, the current fluctuation at the zero crossing indicates that it cannot simply be determined according to the current polarity to switch the switch drive pulse, which may result in a failure to cross zero. Since the second-order generalized integral frequency-locked loop (SOGI-FLL) has noise elimination and frequency adaptation characteristics, it can extract the positive and negative sequence components of the current, and can also detect the current polarity under harmonic and unbalanced conditions, and compensate for the sampling delay through the delay compensation design, thereby achieving accurate detection of the current polarity. However, the existing SOGI-FLL is mainly used for frequency locking of fixed-frequency grid-connected inverters, and the dynamic response cannot meet the requirements of promoting the field of variable frequency speed regulation. Summary of the invention

[0016] Aiming at the problem of difficulty in detecting polarity when the output current frequency or amplitude changes rapidly when the dead zone of a variable frequency motor system is eliminated, the present invention provides a current polarity detection method based on a second-order generalized integral frequency locked loop, a computer device and a computer-readable storage medium.

[0017] To achieve the above object, the present invention provides a current polarity detection method based on a second-order generalized integral frequency-locked loop as follows:

[0018] 1) Stator current i o After sampling delay, the sampling value i of the stator current is obtained m ;

[0019] 2) Sampling value i m Current error ε after delay compensation i After being multiplied by the gain k of the bandpass filter, it is output to the second-order generalized integrator SOGI;

[0020] 3) The second-order generalized integrator SOGI separates the output current i o ′ and orthogonal signal qi o ';

[0021] 4) Current error ε i and orthogonal signal qi o ′ multiplied by the frequency error ε f The motor is then input into the frequency-locked loop (FLL), and the actual motor speed is converted into an electrical angular velocity as feedforward and added to the frequency-locked loop (FLL) to increase the tracking speed of the frequency-locked loop and improve the dynamic performance of the system.

[0022] 5) The output current i required by the second-order generalized integrator SOGI of the frequency-locked loop FLL output o ′, the target frequency ω', to achieve the output current i o ′ for input current i o Tracking at the target frequency ω'.

[0023] Furthermore, the output current i o ′ Input current kε after sampling delay, delay compensation and bandpass filter gaini The transfer function is

[0024]

[0025] s is the pull transformation variable.

[0026] Furthermore, the output current i o ′ for sample value i m The transfer function is

[0027]

[0028] Furthermore, the orthogonal signal qi o ′ to sample value i m The transfer function is

[0029]

[0030] k' is the gain of the low-pass filter and w' is the angular frequency.

[0031] Furthermore, the current error ε i To the sample value i m The transfer function is

[0032]

[0033] Compared with the prior art, the beneficial effects of the present invention are as follows: the present invention solves the technical defects of large output current detection error and low estimated dynamic performance caused by the use of a second-order generalized integral frequency-locked loop in a variable frequency motor system, and forms a reference angular frequency according to the motor speed and the number of motor poles as a frequency-locked feedforward of the second-order generalized integral frequency-locked loop, thereby solving the problem of accurate current detection under rapid changes in current frequency in variable frequency motor systems, and laying a foundation for accurate detection of current polarity by eliminating dead zones; it solves the engineering adaptability problem of the second-order generalized integral frequency-locked loop (SOGI-FLL) under rapid changes in current in variable frequency motor systems, and provides a solution for rapid current detection and accurate current polarity estimation based on a second-order generalized integral frequency-locked loop in variable frequency propulsion motor systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 To eliminate the current zero-crossing distortion caused by delay or error in current detection under PWM modulation in conventional dead zone;

[0035] Figure 2 This is a flow chart of a current polarity detection method based on a second-order generalized integral frequency-locked loop according to the present invention;

[0036] Figure 3The amplitude-frequency characteristic curves of SOGI(s), D(s) and Q(s) (resonant frequency ω'=100π, k=1.414);

[0037] Figure 4 The amplitude-frequency characteristic curve of the bandpass filter D(s) with different gain k (resonant frequency ω'=100π, );

[0038] Figure 5 The amplitude-frequency characteristic curve of the transfer function FLL(s) (resonant frequency ω'=100π, );

[0039] Figure 6 In order to adopt the dead-zone-free modulation method, the dynamic experimental results of the a-phase H-bridge of the scaled-down prototype are shown in Figure (Figure (a) M = 0.2, f0 changes from 1Hz to 10Hz, Figure (b) f0 = 1Hz, M changes from 0.1 to 0.3);

[0040] Figure 7 The current estimation effect diagram before and after SOGI-FLL improvement is shown when the output current changes dynamically from 5Hz to 50Hz under white noise (the middle figure shows the current estimation error before improvement, and the lower figure shows the current estimation error after improvement);

[0041] Figure 8 This is a diagram of the current estimation effect when the output current frequency changes dynamically under superimposed white noise (the middle figure shows the estimation error before improvement, and the lower figure shows the estimation error after improvement);

[0042] Fig. 9 This is a diagram of the current estimation effect considering the output current sampling delay and its delay compensation under superimposed white noise (the middle figure is the estimation error before improvement, and the lower figure is the estimation error after improvement). DETAILED DESCRIPTION

[0043] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0044] In view of the problems existing in the prior art, the present invention provides a current polarity detection method based on a second-order generalized integral frequency-locked loop. The present invention is described in detail below in conjunction with the accompanying drawings.

[0045] like Figure 2 The current polarity detection method based on the second-order generalized integral frequency-locked loop is characterized in that: the detection method is as follows:

[0046] 1) Stator current i o After sampling delay, the sampling value i of the stator current is obtainedm ;

[0047] 2) Sampling value i m Current error ε after delay compensation i After being multiplied by the gain k of the bandpass filter, it is output to the second-order generalized integrator SOGI;

[0048] 3) The second-order generalized integrator SOGI separates the output current i o ′ and orthogonal signal qi o ';

[0049] 4) Current error ε i and orthogonal signal qi o ′ multiplied by the frequency error ε f The motor is then input into the frequency-locked loop (FLL), and the actual motor speed is converted into an electrical angular velocity as feedforward and added to the frequency-locked loop (FLL) to increase the tracking speed of the frequency-locked loop and improve the dynamic performance of the system.

[0050] 5) The output current i required by the second-order generalized integrator SOGI of the frequency-locked loop FLL output o ′, the target frequency ω', to achieve the output current i o ′ for input current i o Tracking at the target frequency ω'.

[0051] The invention is based on a second-order generalized integral frequency-locked loop and includes sampling delay, delay compensation, FLL, SOGI and an improved frequency fast phase-locked loop; wherein the sampling delay link and the delay compensation link respectively simulate the current sampling delay in an actual digital control system, and the delay compensation is compensated according to the system delay; the FLL realizes accurate tracking of the polarity of the resonant frequency, mainly realizes frequency phase locking, and realizes the frequency self-adaptation function of the second-order generalized integral frequency-locked loop; the SOGI has infinite gain at the resonant frequency and can realize tracking of the AC signal without static error; the improved fast phase-locked loop forms the real angular frequency of the motor according to the actual rotation speed of the motor and the number of pole pairs of the motor, and uses it as the feedforward of the angular frequency of the FLL link, and finally realizes fast and accurate phase locking of the current to be estimated.

[0052] The present invention solves the problem of accurate detection of the output current frequency or amplitude of the variable frequency motor system under rapid changes by adding a second-order integral phase-locked loop feedforward, and provides a solution for accurate detection and delay-free filtering in situations where the current changes rapidly.

[0053] Output current i o ′ Input current kε after sampling delay, delay compensation and bandpass filter gain i The transfer function is

[0054]

[0055] s is the pull transformation variable.

[0056] From the amplitude-frequency characteristic curve Figure 3 It can be seen that at the resonant frequency, SOGI has infinite gain, indicating that it can achieve steady-state error-free tracking of the input signal.

[0057] Output current i o ′ for sample value i m The transfer function is

[0058]

[0059] The amplitude-frequency characteristic curve of the bandpass filter under different gains is shown in Figure 4 ,Depend on Figure 4 It can be seen that the overshoot and adjustment time are relatively good at k=1.414.

[0060] Orthogonal signal qi o ′ to sample value i m The transfer function is

[0061]

[0062] k' is the gain of the low-pass filter and w' is the angular frequency.

[0063] Current error ε i To the sample value i m The transfer function is

[0064]

[0065] Used to achieve SOGI frequency adaptation, Figure 2 Mid-frequency error ε f The input signal polarity can be tracked. Figure 5 From the FLL(s) amplitude-frequency characteristic curve, it can be seen that when the input frequency ω is lower than the resonant frequency ω', the current error εi(s) and qi'(s) have the same phase, and the frequency error ε f >0; when the input frequency ω is higher than the resonant frequency ω', εi(s) and qi'(s) are in opposite phases, ε f <0. Therefore, polarity can be used to directly characterize the polarity of the input signal.

[0066] Example

[0067] Based on the four-level 15kW principle prototype, the sampling was verified by dynamic test without dead zone modulation based on improved SOGI. Figure 6The results show that f0 changes from 1Hz to 10Hz when M = 0.2, and from 0.1 to 0.3 when f0 = 1Hz. The experimental results show that the current detector based on SOGI-FFL has good dynamic performance and can meet the application requirements of full-speed speed regulation drive of ship propulsion motors.

[0068] Since DSOGI-FLL is mainly used for fundamental current detection, it can be used in traditional converters such as photovoltaic and propulsion inverters, whose output current is mainly composed of fundamental and small proportion of current harmonics, THD is less than 5%, and fundamental current polarity can be used as the polarity of the entire output current. It is not suitable for current polarity detection of active power filters where the output current is mainly harmonics.

[0069] Under the dynamic change of output current frequency, the current estimation results before and after the improvement based on the second-order generalized integral frequency-locked loop, the fundamental current estimation error of the original scheme for superimposed white noise when the frequency changes rapidly, and the fundamental current estimation error of the improved scheme for superimposed white noise when the frequency changes rapidly are shown as follows: Figure 7 As shown in the figure, the estimation error of the former is larger, while that of the latter is relatively smaller. The results show that the improved scheme can achieve accurate estimation of fundamental current with white noise under dynamic changes in output current frequency, laying a foundation for current polarity judgment under the dead zone elimination PWM method.

[0070] Output current frequency changes dynamically Current estimation details such as Figure 8 Based on the above, Fig. 9 The current estimation results based on DSOGI-FLL are taken into account after considering the actual current sampling delay and delay compensation. The results show that the improved second-order generalized integral frequency-locked loop can adapt to the inverter current estimation of frequency changes and consider the sampling delay situations existing in digital control systems.

[0071] It should be noted that the embodiments of the present invention may be implemented by hardware, software, or a combination of software and hardware. The hardware portion may be implemented using dedicated logic; the software portion may be stored in a memory and executed by an appropriate instruction execution system, such as a microprocessor or dedicated design hardware. The device and its modules of the present invention may be implemented by hardware circuits such as integrated circuits or gate arrays, semiconductors such as logic chips, transistors, or programmable hardware devices such as field programmable gate arrays, programmable logic devices, etc., or by software executed by various types of processors, or by a combination of the above hardware circuits and software, such as firmware.

[0072] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any modifications, equivalent substitutions and improvements made by any technician familiar with the technical field within the technical scope disclosed by the present invention and within the spirit and principle of the present invention should be covered by the protection scope of the present invention.

[0073] In addition to the above examples, the present invention is also applicable to current delay compensation and non-delay filtering suppression of power electronic devices. Technical solutions using the same current detection method all fall within the protection scope of this patent.

Claims

1. A current polarity detection method based on a second-order generalized integral frequency-locked loop. Features: The detection method is as follows: 1) Stator current i o After sampling delay, the sampling value i of the stator current is obtained m ; 2) Sampling value i m Current error ε after delay compensation i After being multiplied by the gain k of the bandpass filter, it is output to the second-order generalized integrator SOGI; 3) The second-order generalized integrator SOGI separates the output current i o ′ and orthogonal signal qi o '; 4) Current error ε i and orthogonal signal qi o ′ multiplied by the frequency error ε f Then input the frequency locked loop FLL, and convert the actual motor speed into electrical angular velocity as feedforward and add it into the frequency locked loop FLL; 5) The output current i required by the second-order generalized integrator SOGI of the frequency-locked loop FLL output o ′, the target frequency ω', to achieve the output current i o ′ for input current i o Tracking at the target frequency ω'.

2. According to the current polarity detection method based on the second-order generalized integral frequency-locked loop according to claim 1, Features: The output current i o ′ Input current kε after sampling delay, delay compensation and bandpass filter gain i The transfer function is s is the pull transformation variable.

3. According to the current polarity detection method based on the second-order generalized integral frequency-locked loop according to claim 1, Features: The output current i o ′ for sample value i m The transfer function is 4. According to the current polarity detection method based on the second-order generalized integral frequency-locked loop according to claim 1, Features: The orthogonal signal qi o ′ to sample value i m The transfer function is k' is the gain of the low-pass filter and w' is the angular frequency.

5. According to the current polarity detection method based on the second-order generalized integral frequency-locked loop according to claim 1, Features: The current error ε i To the sample value i m The transfer function is

Images